usb: xhci: add PORTSC variable to xhci_hub_control()

+51 -51

1 changed file

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drivers

usb

host

xhci-hub.c

+51 -51

drivers/usb/host/xhci-hub.c

··· 1202 1202 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 1203 1203 int max_ports; 1204 1204 unsigned long flags; 1205 - u32 temp, portpmsc, status; 1205 + u32 portsc, portpmsc, status; 1206 1206 int retval = 0; 1207 1207 struct xhci_bus_state *bus_state; 1208 1208 u16 link_state; ··· 1258 1258 goto error; 1259 1259 1260 1260 port = ports[portnum]; 1261 - temp = xhci_portsc_readl(port); 1262 - if (temp == ~(u32)0) { 1261 + portsc = xhci_portsc_readl(port); 1262 + if (portsc == ~(u32)0) { 1263 1263 xhci_hc_died(xhci); 1264 1264 retval = -ENODEV; 1265 1265 break; 1266 1266 } 1267 - trace_xhci_get_port_status(port, temp); 1268 - status = xhci_get_port_status(hcd, bus_state, portnum, temp, &flags); 1267 + trace_xhci_get_port_status(port, portsc); 1268 + status = xhci_get_port_status(hcd, bus_state, portnum, portsc, &flags); 1269 1269 if (status == 0xffffffff) 1270 1270 goto error; 1271 1271 1272 1272 xhci_dbg(xhci, "Get port status %d-%d read: 0x%x, return 0x%x", 1273 - hcd->self.busnum, portnum + 1, temp, status); 1273 + hcd->self.busnum, portnum + 1, portsc, status); 1274 1274 1275 1275 put_unaligned(cpu_to_le32(status), (__le32 *) buf); 1276 1276 /* if USB 3.1 extended port status return additional 4 bytes */ ··· 1283 1283 break; 1284 1284 } 1285 1285 port_li = readl(&port->port_reg->portli); 1286 - status = xhci_get_ext_port_status(temp, port_li); 1286 + status = xhci_get_ext_port_status(portsc, port_li); 1287 1287 put_unaligned_le32(status, &buf[4]); 1288 1288 } 1289 1289 break; ··· 1293 1293 goto error; 1294 1294 1295 1295 port = ports[portnum]; 1296 - temp = xhci_portsc_readl(port); 1297 - if (temp == ~(u32)0) { 1296 + portsc = xhci_portsc_readl(port); 1297 + if (portsc == ~(u32)0) { 1298 1298 xhci_hc_died(xhci); 1299 1299 retval = -ENODEV; 1300 1300 break; 1301 1301 } 1302 - temp = xhci_port_state_to_neutral(temp); 1302 + portsc = xhci_port_state_to_neutral(portsc); 1303 1303 /* FIXME: What new port features do we need to support? */ 1304 1304 switch (wValue) { 1305 1305 case USB_PORT_FEAT_SUSPEND: 1306 - temp = xhci_portsc_readl(port); 1307 - if ((temp & PORT_PLS_MASK) != XDEV_U0) { 1306 + portsc = xhci_portsc_readl(port); 1307 + if ((portsc & PORT_PLS_MASK) != XDEV_U0) { 1308 1308 /* Resume the port to U0 first */ 1309 1309 xhci_set_link_state(xhci, port, XDEV_U0); 1310 1310 spin_unlock_irqrestore(&xhci->lock, flags); ··· 1315 1315 * a port unless the port reports that it is in the 1316 1316 * enabled (PED = ‘1’,PLS < ‘3’) state. 1317 1317 */ 1318 - temp = xhci_portsc_readl(port); 1319 - if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) 1320 - || (temp & PORT_PLS_MASK) >= XDEV_U3) { 1318 + portsc = xhci_portsc_readl(port); 1319 + if ((portsc & PORT_PE) == 0 || (portsc & PORT_RESET) || 1320 + (portsc & PORT_PLS_MASK) >= XDEV_U3) { 1321 1321 xhci_warn(xhci, "USB core suspending port %d-%d not in U0/U1/U2\n", 1322 1322 hcd->self.busnum, portnum + 1); 1323 1323 goto error; ··· 1338 1338 msleep(10); /* wait device to enter */ 1339 1339 spin_lock_irqsave(&xhci->lock, flags); 1340 1340 1341 - temp = xhci_portsc_readl(port); 1341 + portsc = xhci_portsc_readl(port); 1342 1342 bus_state->suspended_ports |= 1 << portnum; 1343 1343 break; 1344 1344 case USB_PORT_FEAT_LINK_STATE: 1345 1345 link_state = (wIndex & 0xff00) >> 3; 1346 - temp = xhci_portsc_readl(port); 1346 + portsc = xhci_portsc_readl(port); 1347 1347 /* Disable port */ 1348 1348 if (link_state == USB_SS_PORT_LS_SS_DISABLED) { 1349 1349 xhci_dbg(xhci, "Disable port %d-%d\n", 1350 1350 hcd->self.busnum, portnum + 1); 1351 - temp = xhci_port_state_to_neutral(temp); 1351 + portsc = xhci_port_state_to_neutral(portsc); 1352 1352 /* 1353 1353 * Clear all change bits, so that we get a new 1354 1354 * connection event. 1355 1355 */ 1356 - temp |= PORT_CSC | PORT_PEC | PORT_WRC | 1357 - PORT_OCC | PORT_RC | PORT_PLC | 1358 - PORT_CEC; 1359 - xhci_portsc_writel(port, temp | PORT_PE); 1360 - temp = xhci_portsc_readl(port); 1356 + portsc |= PORT_CSC | PORT_PEC | PORT_WRC | 1357 + PORT_OCC | PORT_RC | PORT_PLC | 1358 + PORT_CEC; 1359 + xhci_portsc_writel(port, portsc | PORT_PE); 1360 + portsc = xhci_portsc_readl(port); 1361 1361 break; 1362 1362 } 1363 1363 ··· 1366 1366 xhci_dbg(xhci, "Enable port %d-%d\n", 1367 1367 hcd->self.busnum, portnum + 1); 1368 1368 xhci_set_link_state(xhci, port, XDEV_RXDETECT); 1369 - temp = xhci_portsc_readl(port); 1369 + portsc = xhci_portsc_readl(port); 1370 1370 break; 1371 1371 } 1372 1372 ··· 1390 1390 break; 1391 1391 } 1392 1392 1393 - if ((temp & PORT_CONNECT)) { 1393 + if ((portsc & PORT_CONNECT)) { 1394 1394 xhci_warn(xhci, "Can't set compliance mode when port is connected\n"); 1395 1395 goto error; 1396 1396 } ··· 1399 1399 hcd->self.busnum, portnum + 1); 1400 1400 xhci_set_link_state(xhci, port, XDEV_COMP_MODE); 1401 1401 1402 - temp = xhci_portsc_readl(port); 1402 + portsc = xhci_portsc_readl(port); 1403 1403 break; 1404 1404 } 1405 1405 /* Port must be enabled */ 1406 - if (!(temp & PORT_PE)) { 1406 + if (!(portsc & PORT_PE)) { 1407 1407 retval = -ENODEV; 1408 1408 break; 1409 1409 } ··· 1422 1422 * completion 1423 1423 */ 1424 1424 if (link_state == USB_SS_PORT_LS_U0) { 1425 - u32 pls = temp & PORT_PLS_MASK; 1425 + u32 pls = portsc & PORT_PLS_MASK; 1426 1426 bool wait_u0 = false; 1427 1427 1428 1428 /* already in U0 */ ··· 1447 1447 xhci_dbg(xhci, "missing U0 port change event for port %d-%d\n", 1448 1448 hcd->self.busnum, portnum + 1); 1449 1449 spin_lock_irqsave(&xhci->lock, flags); 1450 - temp = xhci_portsc_readl(port); 1450 + portsc = xhci_portsc_readl(port); 1451 1451 break; 1452 1452 } 1453 1453 ··· 1465 1465 spin_unlock_irqrestore(&xhci->lock, flags); 1466 1466 while (retries--) { 1467 1467 usleep_range(4000, 8000); 1468 - temp = xhci_portsc_readl(port); 1469 - if ((temp & PORT_PLS_MASK) == XDEV_U3) 1468 + portsc = xhci_portsc_readl(port); 1469 + if ((portsc & PORT_PLS_MASK) == XDEV_U3) 1470 1470 break; 1471 1471 } 1472 1472 spin_lock_irqsave(&xhci->lock, flags); 1473 - temp = xhci_portsc_readl(port); 1473 + portsc = xhci_portsc_readl(port); 1474 1474 bus_state->suspended_ports |= 1 << portnum; 1475 1475 } 1476 1476 break; ··· 1484 1484 xhci_set_port_power(xhci, port, true, &flags); 1485 1485 break; 1486 1486 case USB_PORT_FEAT_RESET: 1487 - temp = (temp | PORT_RESET); 1488 - xhci_portsc_writel(port, temp); 1487 + portsc |= PORT_RESET; 1488 + xhci_portsc_writel(port, portsc); 1489 1489 1490 - temp = xhci_portsc_readl(port); 1490 + portsc = xhci_portsc_readl(port); 1491 1491 xhci_dbg(xhci, "set port reset, actual port %d-%d status = 0x%x\n", 1492 - hcd->self.busnum, portnum + 1, temp); 1492 + hcd->self.busnum, portnum + 1, portsc); 1493 1493 break; 1494 1494 case USB_PORT_FEAT_REMOTE_WAKE_MASK: 1495 1495 wake_mask = wIndex & 0xff00; 1496 1496 xhci_set_remote_wake_mask(xhci, port, wake_mask); 1497 - temp = xhci_portsc_readl(port); 1497 + portsc = xhci_portsc_readl(port); 1498 1498 xhci_dbg(xhci, "set port remote wake mask, actual port %d-%d status = 0x%x\n", 1499 - hcd->self.busnum, portnum + 1, temp); 1499 + hcd->self.busnum, portnum + 1, portsc); 1500 1500 break; 1501 1501 case USB_PORT_FEAT_BH_PORT_RESET: 1502 - temp |= PORT_WR; 1503 - xhci_portsc_writel(port, temp); 1504 - temp = xhci_portsc_readl(port); 1502 + portsc |= PORT_WR; 1503 + xhci_portsc_writel(port, portsc); 1504 + portsc = xhci_portsc_readl(port); 1505 1505 break; 1506 1506 case USB_PORT_FEAT_U1_TIMEOUT: 1507 1507 if (hcd->speed < HCD_USB3) ··· 1538 1538 goto error; 1539 1539 } 1540 1540 /* unblock any posted writes */ 1541 - temp = xhci_portsc_readl(port); 1541 + portsc = xhci_portsc_readl(port); 1542 1542 break; 1543 1543 case ClearPortFeature: 1544 1544 portnum = (wIndex & 0xff) - 1; ··· 1546 1546 goto error; 1547 1547 1548 1548 port = ports[portnum]; 1549 - temp = xhci_portsc_readl(port); 1550 - if (temp == ~(u32)0) { 1549 + portsc = xhci_portsc_readl(port); 1550 + if (portsc == ~(u32)0) { 1551 1551 xhci_hc_died(xhci); 1552 1552 retval = -ENODEV; 1553 1553 break; 1554 1554 } 1555 1555 /* FIXME: What new port features do we need to support? */ 1556 - temp = xhci_port_state_to_neutral(temp); 1556 + portsc = xhci_port_state_to_neutral(portsc); 1557 1557 switch (wValue) { 1558 1558 case USB_PORT_FEAT_SUSPEND: 1559 - temp = xhci_portsc_readl(port); 1559 + portsc = xhci_portsc_readl(port); 1560 1560 xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n"); 1561 - xhci_dbg(xhci, "PORTSC %04x\n", temp); 1562 - if (temp & PORT_RESET) 1561 + xhci_dbg(xhci, "PORTSC %04x\n", portsc); 1562 + if (portsc & PORT_RESET) 1563 1563 goto error; 1564 - if ((temp & PORT_PLS_MASK) == XDEV_U3) { 1565 - if ((temp & PORT_PE) == 0) 1564 + if ((portsc & PORT_PLS_MASK) == XDEV_U3) { 1565 + if ((portsc & PORT_PE) == 0) 1566 1566 goto error; 1567 1567 1568 1568 set_bit(portnum, &bus_state->resuming_ports); ··· 1593 1593 case USB_PORT_FEAT_C_ENABLE: 1594 1594 case USB_PORT_FEAT_C_PORT_LINK_STATE: 1595 1595 case USB_PORT_FEAT_C_PORT_CONFIG_ERROR: 1596 - xhci_clear_port_change_bit(xhci, wValue, port, temp); 1596 + xhci_clear_port_change_bit(xhci, wValue, port, portsc); 1597 1597 break; 1598 1598 case USB_PORT_FEAT_ENABLE: 1599 1599 xhci_disable_port(xhci, port);

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