Merge tag 'gpio-v4.9-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

+43 -49

drivers/gpio/gpio-mvebu.c

··· 293 293 { 294 294 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); 295 295 struct mvebu_gpio_chip *mvchip = gc->private; 296 - u32 mask = ~(1 << (d->irq - gc->irq_base)); 296 + u32 mask = d->mask; 297 297 298 298 irq_gc_lock(gc); 299 - writel_relaxed(mask, mvebu_gpioreg_edge_cause(mvchip)); 299 + writel_relaxed(~mask, mvebu_gpioreg_edge_cause(mvchip)); 300 300 irq_gc_unlock(gc); 301 301 } 302 302 ··· 305 305 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); 306 306 struct mvebu_gpio_chip *mvchip = gc->private; 307 307 struct irq_chip_type *ct = irq_data_get_chip_type(d); 308 - u32 mask = 1 << (d->irq - gc->irq_base); 308 + u32 mask = d->mask; 309 309 310 310 irq_gc_lock(gc); 311 311 ct->mask_cache_priv &= ~mask; ··· 319 319 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); 320 320 struct mvebu_gpio_chip *mvchip = gc->private; 321 321 struct irq_chip_type *ct = irq_data_get_chip_type(d); 322 - 323 - u32 mask = 1 << (d->irq - gc->irq_base); 322 + u32 mask = d->mask; 324 323 325 324 irq_gc_lock(gc); 326 325 ct->mask_cache_priv |= mask; ··· 332 333 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); 333 334 struct mvebu_gpio_chip *mvchip = gc->private; 334 335 struct irq_chip_type *ct = irq_data_get_chip_type(d); 335 - 336 - u32 mask = 1 << (d->irq - gc->irq_base); 336 + u32 mask = d->mask; 337 337 338 338 irq_gc_lock(gc); 339 339 ct->mask_cache_priv &= ~mask; ··· 345 347 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); 346 348 struct mvebu_gpio_chip *mvchip = gc->private; 347 349 struct irq_chip_type *ct = irq_data_get_chip_type(d); 348 - 349 - u32 mask = 1 << (d->irq - gc->irq_base); 350 + u32 mask = d->mask; 350 351 351 352 irq_gc_lock(gc); 352 353 ct->mask_cache_priv |= mask; ··· 459 462 for (i = 0; i < mvchip->chip.ngpio; i++) { 460 463 int irq; 461 464 462 - irq = mvchip->irqbase + i; 465 + irq = irq_find_mapping(mvchip->domain, i); 463 466 464 467 if (!(cause & (1 << i))) 465 468 continue; ··· 652 655 struct irq_chip_type *ct; 653 656 struct clk *clk; 654 657 unsigned int ngpios; 658 + bool have_irqs; 655 659 int soc_variant; 656 660 int i, cpu, id; 657 661 int err; ··· 662 664 soc_variant = (int) match->data; 663 665 else 664 666 soc_variant = MVEBU_GPIO_SOC_VARIANT_ORION; 667 + 668 + /* Some gpio controllers do not provide irq support */ 669 + have_irqs = of_irq_count(np) != 0; 665 670 666 671 mvchip = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_gpio_chip), 667 672 GFP_KERNEL); ··· 698 697 mvchip->chip.get = mvebu_gpio_get; 699 698 mvchip->chip.direction_output = mvebu_gpio_direction_output; 700 699 mvchip->chip.set = mvebu_gpio_set; 701 - mvchip->chip.to_irq = mvebu_gpio_to_irq; 700 + if (have_irqs) 701 + mvchip->chip.to_irq = mvebu_gpio_to_irq; 702 702 mvchip->chip.base = id * MVEBU_MAX_GPIO_PER_BANK; 703 703 mvchip->chip.ngpio = ngpios; 704 704 mvchip->chip.can_sleep = false; ··· 760 758 devm_gpiochip_add_data(&pdev->dev, &mvchip->chip, mvchip); 761 759 762 760 /* Some gpio controllers do not provide irq support */ 763 - if (!of_irq_count(np)) 761 + if (!have_irqs) 764 762 return 0; 765 763 766 - /* Setup the interrupt handlers. Each chip can have up to 4 767 - * interrupt handlers, with each handler dealing with 8 GPIO 768 - * pins. */ 769 - for (i = 0; i < 4; i++) { 770 - int irq = platform_get_irq(pdev, i); 771 - 772 - if (irq < 0) 773 - continue; 774 - irq_set_chained_handler_and_data(irq, mvebu_gpio_irq_handler, 775 - mvchip); 764 + mvchip->domain = 765 + irq_domain_add_linear(np, ngpios, &irq_generic_chip_ops, NULL); 766 + if (!mvchip->domain) { 767 + dev_err(&pdev->dev, "couldn't allocate irq domain %s (DT).\n", 768 + mvchip->chip.label); 769 + return -ENODEV; 776 770 } 777 771 778 - mvchip->irqbase = irq_alloc_descs(-1, 0, ngpios, -1); 779 - if (mvchip->irqbase < 0) { 780 - dev_err(&pdev->dev, "no irqs\n"); 781 - return mvchip->irqbase; 772 + err = irq_alloc_domain_generic_chips( 773 + mvchip->domain, ngpios, 2, np->name, handle_level_irq, 774 + IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_LEVEL, 0, 0); 775 + if (err) { 776 + dev_err(&pdev->dev, "couldn't allocate irq chips %s (DT).\n", 777 + mvchip->chip.label); 778 + goto err_domain; 782 779 } 783 780 784 - gc = irq_alloc_generic_chip("mvebu_gpio_irq", 2, mvchip->irqbase, 785 - mvchip->membase, handle_level_irq); 786 - if (!gc) { 787 - dev_err(&pdev->dev, "Cannot allocate generic irq_chip\n"); 788 - return -ENOMEM; 789 - } 790 - 781 + /* NOTE: The common accessors cannot be used because of the percpu 782 + * access to the mask registers 783 + */ 784 + gc = irq_get_domain_generic_chip(mvchip->domain, 0); 791 785 gc->private = mvchip; 792 786 ct = &gc->chip_types[0]; 793 787 ct->type = IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW; ··· 801 803 ct->handler = handle_edge_irq; 802 804 ct->chip.name = mvchip->chip.label; 803 805 804 - irq_setup_generic_chip(gc, IRQ_MSK(ngpios), 0, 805 - IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE); 806 + /* Setup the interrupt handlers. Each chip can have up to 4 807 + * interrupt handlers, with each handler dealing with 8 GPIO 808 + * pins. 809 + */ 810 + for (i = 0; i < 4; i++) { 811 + int irq = platform_get_irq(pdev, i); 806 812 807 - /* Setup irq domain on top of the generic chip. */ 808 - mvchip->domain = irq_domain_add_simple(np, mvchip->chip.ngpio, 809 - mvchip->irqbase, 810 - &irq_domain_simple_ops, 811 - mvchip); 812 - if (!mvchip->domain) { 813 - dev_err(&pdev->dev, "couldn't allocate irq domain %s (DT).\n", 814 - mvchip->chip.label); 815 - err = -ENODEV; 816 - goto err_generic_chip; 813 + if (irq < 0) 814 + continue; 815 + irq_set_chained_handler_and_data(irq, mvebu_gpio_irq_handler, 816 + mvchip); 817 817 } 818 818 819 819 return 0; 820 820 821 - err_generic_chip: 822 - irq_remove_generic_chip(gc, IRQ_MSK(ngpios), IRQ_NOREQUEST, 823 - IRQ_LEVEL | IRQ_NOPROBE); 824 - kfree(gc); 821 + err_domain: 822 + irq_domain_remove(mvchip->domain); 825 823 826 824 return err; 827 825 }

+9 -5

drivers/gpio/gpiolib-of.c

··· 26 26 27 27 #include "gpiolib.h" 28 28 29 - static int of_gpiochip_match_node(struct gpio_chip *chip, void *data) 29 + static int of_gpiochip_match_node_and_xlate(struct gpio_chip *chip, void *data) 30 30 { 31 - return chip->gpiodev->dev.of_node == data; 31 + struct of_phandle_args *gpiospec = data; 32 + 33 + return chip->gpiodev->dev.of_node == gpiospec->np && 34 + chip->of_xlate(chip, gpiospec, NULL) >= 0; 32 35 } 33 36 34 - static struct gpio_chip *of_find_gpiochip_by_node(struct device_node *np) 37 + static struct gpio_chip *of_find_gpiochip_by_xlate( 38 + struct of_phandle_args *gpiospec) 35 39 { 36 - return gpiochip_find(np, of_gpiochip_match_node); 40 + return gpiochip_find(gpiospec, of_gpiochip_match_node_and_xlate); 37 41 } 38 42 39 43 static struct gpio_desc *of_xlate_and_get_gpiod_flags(struct gpio_chip *chip, ··· 83 79 return ERR_PTR(ret); 84 80 } 85 81 86 - chip = of_find_gpiochip_by_node(gpiospec.np); 82 + chip = of_find_gpiochip_by_xlate(&gpiospec); 87 83 if (!chip) { 88 84 desc = ERR_PTR(-EPROBE_DEFER); 89 85 goto out;

+45 -12

drivers/gpio/gpiolib.c

··· 21 21 #include <linux/uaccess.h> 22 22 #include <linux/compat.h> 23 23 #include <linux/anon_inodes.h> 24 + #include <linux/file.h> 24 25 #include <linux/kfifo.h> 25 26 #include <linux/poll.h> 26 27 #include <linux/timekeeping.h> ··· 424 423 { 425 424 struct gpiohandle_request handlereq; 426 425 struct linehandle_state *lh; 426 + struct file *file; 427 427 int fd, i, ret; 428 428 429 429 if (copy_from_user(&handlereq, ip, sizeof(handlereq))) ··· 501 499 i--; 502 500 lh->numdescs = handlereq.lines; 503 501 504 - fd = anon_inode_getfd("gpio-linehandle", 505 - &linehandle_fileops, 506 - lh, 507 - O_RDONLY | O_CLOEXEC); 502 + fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC); 508 503 if (fd < 0) { 509 504 ret = fd; 510 505 goto out_free_descs; 511 506 } 512 507 508 + file = anon_inode_getfile("gpio-linehandle", 509 + &linehandle_fileops, 510 + lh, 511 + O_RDONLY | O_CLOEXEC); 512 + if (IS_ERR(file)) { 513 + ret = PTR_ERR(file); 514 + goto out_put_unused_fd; 515 + } 516 + 513 517 handlereq.fd = fd; 514 518 if (copy_to_user(ip, &handlereq, sizeof(handlereq))) { 515 - ret = -EFAULT; 516 - goto out_free_descs; 519 + /* 520 + * fput() will trigger the release() callback, so do not go onto 521 + * the regular error cleanup path here. 522 + */ 523 + fput(file); 524 + put_unused_fd(fd); 525 + return -EFAULT; 517 526 } 527 + 528 + fd_install(fd, file); 518 529 519 530 dev_dbg(&gdev->dev, "registered chardev handle for %d lines\n", 520 531 lh->numdescs); 521 532 522 533 return 0; 523 534 535 + out_put_unused_fd: 536 + put_unused_fd(fd); 524 537 out_free_descs: 525 538 for (; i >= 0; i--) 526 539 gpiod_free(lh->descs[i]); ··· 738 721 struct gpioevent_request eventreq; 739 722 struct lineevent_state *le; 740 723 struct gpio_desc *desc; 724 + struct file *file; 741 725 u32 offset; 742 726 u32 lflags; 743 727 u32 eflags; ··· 833 815 if (ret) 834 816 goto out_free_desc; 835 817 836 - fd = anon_inode_getfd("gpio-event", 837 - &lineevent_fileops, 838 - le, 839 - O_RDONLY | O_CLOEXEC); 818 + fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC); 840 819 if (fd < 0) { 841 820 ret = fd; 842 821 goto out_free_irq; 843 822 } 844 823 824 + file = anon_inode_getfile("gpio-event", 825 + &lineevent_fileops, 826 + le, 827 + O_RDONLY | O_CLOEXEC); 828 + if (IS_ERR(file)) { 829 + ret = PTR_ERR(file); 830 + goto out_put_unused_fd; 831 + } 832 + 845 833 eventreq.fd = fd; 846 834 if (copy_to_user(ip, &eventreq, sizeof(eventreq))) { 847 - ret = -EFAULT; 848 - goto out_free_irq; 835 + /* 836 + * fput() will trigger the release() callback, so do not go onto 837 + * the regular error cleanup path here. 838 + */ 839 + fput(file); 840 + put_unused_fd(fd); 841 + return -EFAULT; 849 842 } 843 + 844 + fd_install(fd, file); 850 845 851 846 return 0; 852 847 848 + out_put_unused_fd: 849 + put_unused_fd(fd); 853 850 out_free_irq: 854 851 free_irq(le->irq, le); 855 852 out_free_desc:

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