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arm64/sysreg: Add GICR CDNMIA encoding

The encoding for the GICR CDNMIA system instruction is thus far unused
(and shall remain unused for the time being). However, in order to
plumb the FGTs into KVM correctly, KVM needs to be made aware of the
encoding of this system instruction.

Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Link: https://patch.msgid.link/20260319154937.3619520-8-sascha.bischoff@arm.com
Signed-off-by: Marc Zyngier <maz@kernel.org>

authored by

Sascha Bischoff and committed by
Marc Zyngier 59991153 2808a833

+7
+7
arch/arm64/include/asm/sysreg.h
··· 1052 1052 #define GICV5_OP_GIC_CDPRI sys_insn(1, 0, 12, 1, 2) 1053 1053 #define GICV5_OP_GIC_CDRCFG sys_insn(1, 0, 12, 1, 5) 1054 1054 #define GICV5_OP_GICR_CDIA sys_insn(1, 0, 12, 3, 0) 1055 + #define GICV5_OP_GICR_CDNMIA sys_insn(1, 0, 12, 3, 1) 1055 1056 1056 1057 /* Definitions for GIC CDAFF */ 1057 1058 #define GICV5_GIC_CDAFF_IAFFID_MASK GENMASK_ULL(47, 32) ··· 1098 1097 #define GICV5_GICR_CDIA_VALID(r) FIELD_GET(GICV5_GIC_CDIA_VALID_MASK, r) 1099 1098 #define GICV5_GIC_CDIA_TYPE_MASK GENMASK_ULL(31, 29) 1100 1099 #define GICV5_GIC_CDIA_ID_MASK GENMASK_ULL(23, 0) 1100 + 1101 + /* Definitions for GICR CDNMIA */ 1102 + #define GICV5_GICR_CDNMIA_VALID_MASK BIT_ULL(32) 1103 + #define GICV5_GICR_CDNMIA_VALID(r) FIELD_GET(GICV5_GICR_CDNMIA_VALID_MASK, r) 1104 + #define GICV5_GICR_CDNMIA_TYPE_MASK GENMASK_ULL(31, 29) 1105 + #define GICV5_GICR_CDNMIA_ID_MASK GENMASK_ULL(23, 0) 1101 1106 1102 1107 #define gicr_insn(insn) read_sysreg_s(GICV5_OP_GICR_##insn) 1103 1108 #define gic_insn(v, insn) write_sysreg_s(v, GICV5_OP_GIC_##insn)