Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

+11

arch/x86/kernel/smpboot.c

··· 992 992 993 993 common_cpu_up(cpu, tidle); 994 994 995 + /* 996 + * We have to walk the irq descriptors to setup the vector 997 + * space for the cpu which comes online. Prevent irq 998 + * alloc/free across the bringup. 999 + */ 1000 + irq_lock_sparse(); 1001 + 995 1002 err = do_boot_cpu(apicid, cpu, tidle); 1003 + 996 1004 if (err) { 1005 + irq_unlock_sparse(); 997 1006 pr_err("do_boot_cpu failed(%d) to wakeup CPU#%u\n", err, cpu); 998 1007 return -EIO; 999 1008 } ··· 1019 1010 cpu_relax(); 1020 1011 touch_nmi_watchdog(); 1021 1012 } 1013 + 1014 + irq_unlock_sparse(); 1022 1015 1023 1016 return 0; 1024 1017 }

+2 -4

drivers/gpio/gpio-davinci.c

··· 578 578 writel_relaxed(~0, &g->clr_falling); 579 579 writel_relaxed(~0, &g->clr_rising); 580 580 581 - /* set up all irqs in this bank */ 582 - irq_set_chained_handler(bank_irq, gpio_irq_handler); 583 - 584 581 /* 585 582 * Each chip handles 32 gpios, and each irq bank consists of 16 586 583 * gpio irqs. Pass the irq bank's corresponding controller to 587 584 * the chained irq handler. 588 585 */ 589 - irq_set_handler_data(bank_irq, &chips[gpio / 32]); 586 + irq_set_chained_handler_and_data(bank_irq, gpio_irq_handler, 587 + &chips[gpio / 32]); 590 588 591 589 binten |= BIT(bank); 592 590 }

+75 -36

drivers/irqchip/irq-gic-v3-its.c

··· 75 75 76 76 #define ITS_ITT_ALIGN SZ_256 77 77 78 + struct event_lpi_map { 79 + unsigned long *lpi_map; 80 + u16 *col_map; 81 + irq_hw_number_t lpi_base; 82 + int nr_lpis; 83 + }; 84 + 78 85 /* 79 86 * The ITS view of a device - belongs to an ITS, a collection, owns an 80 87 * interrupt translation table, and a list of interrupts. ··· 89 82 struct its_device { 90 83 struct list_head entry; 91 84 struct its_node *its; 92 - struct its_collection *collection; 85 + struct event_lpi_map event_map; 93 86 void *itt; 94 - unsigned long *lpi_map; 95 - irq_hw_number_t lpi_base; 96 - int nr_lpis; 97 87 u32 nr_ites; 98 88 u32 device_id; 99 89 }; ··· 102 98 103 99 #define gic_data_rdist() (raw_cpu_ptr(gic_rdists->rdist)) 104 100 #define gic_data_rdist_rd_base() (gic_data_rdist()->rd_base) 101 + 102 + static struct its_collection *dev_event_to_col(struct its_device *its_dev, 103 + u32 event) 104 + { 105 + struct its_node *its = its_dev->its; 106 + 107 + return its->collections + its_dev->event_map.col_map[event]; 108 + } 105 109 106 110 /* 107 111 * ITS command descriptors - parameters to be encoded in a command ··· 146 134 struct { 147 135 struct its_device *dev; 148 136 struct its_collection *col; 149 - u32 id; 137 + u32 event_id; 150 138 } its_movi_cmd; 151 139 152 140 struct { ··· 253 241 254 242 its_fixup_cmd(cmd); 255 243 256 - return desc->its_mapd_cmd.dev->collection; 244 + return NULL; 257 245 } 258 246 259 247 static struct its_collection *its_build_mapc_cmd(struct its_cmd_block *cmd, ··· 272 260 static struct its_collection *its_build_mapvi_cmd(struct its_cmd_block *cmd, 273 261 struct its_cmd_desc *desc) 274 262 { 263 + struct its_collection *col; 264 + 265 + col = dev_event_to_col(desc->its_mapvi_cmd.dev, 266 + desc->its_mapvi_cmd.event_id); 267 + 275 268 its_encode_cmd(cmd, GITS_CMD_MAPVI); 276 269 its_encode_devid(cmd, desc->its_mapvi_cmd.dev->device_id); 277 270 its_encode_event_id(cmd, desc->its_mapvi_cmd.event_id); 278 271 its_encode_phys_id(cmd, desc->its_mapvi_cmd.phys_id); 279 - its_encode_collection(cmd, desc->its_mapvi_cmd.dev->collection->col_id); 272 + its_encode_collection(cmd, col->col_id); 280 273 281 274 its_fixup_cmd(cmd); 282 275 283 - return desc->its_mapvi_cmd.dev->collection; 276 + return col; 284 277 } 285 278 286 279 static struct its_collection *its_build_movi_cmd(struct its_cmd_block *cmd, 287 280 struct its_cmd_desc *desc) 288 281 { 282 + struct its_collection *col; 283 + 284 + col = dev_event_to_col(desc->its_movi_cmd.dev, 285 + desc->its_movi_cmd.event_id); 286 + 289 287 its_encode_cmd(cmd, GITS_CMD_MOVI); 290 288 its_encode_devid(cmd, desc->its_movi_cmd.dev->device_id); 291 - its_encode_event_id(cmd, desc->its_movi_cmd.id); 289 + its_encode_event_id(cmd, desc->its_movi_cmd.event_id); 292 290 its_encode_collection(cmd, desc->its_movi_cmd.col->col_id); 293 291 294 292 its_fixup_cmd(cmd); 295 293 296 - return desc->its_movi_cmd.dev->collection; 294 + return col; 297 295 } 298 296 299 297 static struct its_collection *its_build_discard_cmd(struct its_cmd_block *cmd, 300 298 struct its_cmd_desc *desc) 301 299 { 300 + struct its_collection *col; 301 + 302 + col = dev_event_to_col(desc->its_discard_cmd.dev, 303 + desc->its_discard_cmd.event_id); 304 + 302 305 its_encode_cmd(cmd, GITS_CMD_DISCARD); 303 306 its_encode_devid(cmd, desc->its_discard_cmd.dev->device_id); 304 307 its_encode_event_id(cmd, desc->its_discard_cmd.event_id); 305 308 306 309 its_fixup_cmd(cmd); 307 310 308 - return desc->its_discard_cmd.dev->collection; 311 + return col; 309 312 } 310 313 311 314 static struct its_collection *its_build_inv_cmd(struct its_cmd_block *cmd, 312 315 struct its_cmd_desc *desc) 313 316 { 317 + struct its_collection *col; 318 + 319 + col = dev_event_to_col(desc->its_inv_cmd.dev, 320 + desc->its_inv_cmd.event_id); 321 + 314 322 its_encode_cmd(cmd, GITS_CMD_INV); 315 323 its_encode_devid(cmd, desc->its_inv_cmd.dev->device_id); 316 324 its_encode_event_id(cmd, desc->its_inv_cmd.event_id); 317 325 318 326 its_fixup_cmd(cmd); 319 327 320 - return desc->its_inv_cmd.dev->collection; 328 + return col; 321 329 } 322 330 323 331 static struct its_collection *its_build_invall_cmd(struct its_cmd_block *cmd, ··· 529 497 530 498 desc.its_movi_cmd.dev = dev; 531 499 desc.its_movi_cmd.col = col; 532 - desc.its_movi_cmd.id = id; 500 + desc.its_movi_cmd.event_id = id; 533 501 534 502 its_send_single_command(dev->its, its_build_movi_cmd, &desc); 535 503 } ··· 560 528 static inline u32 its_get_event_id(struct irq_data *d) 561 529 { 562 530 struct its_device *its_dev = irq_data_get_irq_chip_data(d); 563 - return d->hwirq - its_dev->lpi_base; 531 + return d->hwirq - its_dev->event_map.lpi_base; 564 532 } 565 533 566 534 static void lpi_set_config(struct irq_data *d, bool enable) ··· 615 583 616 584 target_col = &its_dev->its->collections[cpu]; 617 585 its_send_movi(its_dev, target_col, id); 618 - its_dev->collection = target_col; 586 + its_dev->event_map.col_map[id] = cpu; 619 587 620 588 return IRQ_SET_MASK_OK_DONE; 621 589 } ··· 745 713 return bitmap; 746 714 } 747 715 748 - static void its_lpi_free(unsigned long *bitmap, int base, int nr_ids) 716 + static void its_lpi_free(struct event_lpi_map *map) 749 717 { 718 + int base = map->lpi_base; 719 + int nr_ids = map->nr_lpis; 750 720 int lpi; 751 721 752 722 spin_lock(&lpi_lock); ··· 765 731 766 732 spin_unlock(&lpi_lock); 767 733 768 - kfree(bitmap); 734 + kfree(map->lpi_map); 735 + kfree(map->col_map); 769 736 } 770 737 771 738 /* ··· 1134 1099 struct its_device *dev; 1135 1100 unsigned long *lpi_map; 1136 1101 unsigned long flags; 1102 + u16 *col_map = NULL; 1137 1103 void *itt; 1138 1104 int lpi_base; 1139 1105 int nr_lpis; 1140 1106 int nr_ites; 1141 - int cpu; 1142 1107 int sz; 1143 1108 1144 1109 dev = kzalloc(sizeof(*dev), GFP_KERNEL); ··· 1152 1117 sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 1153 1118 itt = kzalloc(sz, GFP_KERNEL); 1154 1119 lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 1120 + if (lpi_map) 1121 + col_map = kzalloc(sizeof(*col_map) * nr_lpis, GFP_KERNEL); 1155 1122 1156 - if (!dev || !itt || !lpi_map) { 1123 + if (!dev || !itt || !lpi_map || !col_map) { 1157 1124 kfree(dev); 1158 1125 kfree(itt); 1159 1126 kfree(lpi_map); 1127 + kfree(col_map); 1160 1128 return NULL; 1161 1129 } 1162 1130 1163 1131 dev->its = its; 1164 1132 dev->itt = itt; 1165 1133 dev->nr_ites = nr_ites; 1166 - dev->lpi_map = lpi_map; 1167 - dev->lpi_base = lpi_base; 1168 - dev->nr_lpis = nr_lpis; 1134 + dev->event_map.lpi_map = lpi_map; 1135 + dev->event_map.col_map = col_map; 1136 + dev->event_map.lpi_base = lpi_base; 1137 + dev->event_map.nr_lpis = nr_lpis; 1169 1138 dev->device_id = dev_id; 1170 1139 INIT_LIST_HEAD(&dev->entry); 1171 1140 1172 1141 raw_spin_lock_irqsave(&its->lock, flags); 1173 1142 list_add(&dev->entry, &its->its_device_list); 1174 1143 raw_spin_unlock_irqrestore(&its->lock, flags); 1175 - 1176 - /* Bind the device to the first possible CPU */ 1177 - cpu = cpumask_first(cpu_online_mask); 1178 - dev->collection = &its->collections[cpu]; 1179 1144 1180 1145 /* Map device to its ITT */ 1181 1146 its_send_mapd(dev, 1); ··· 1198 1163 { 1199 1164 int idx; 1200 1165 1201 - idx = find_first_zero_bit(dev->lpi_map, dev->nr_lpis); 1202 - if (idx == dev->nr_lpis) 1166 + idx = find_first_zero_bit(dev->event_map.lpi_map, 1167 + dev->event_map.nr_lpis); 1168 + if (idx == dev->event_map.nr_lpis) 1203 1169 return -ENOSPC; 1204 1170 1205 - *hwirq = dev->lpi_base + idx; 1206 - set_bit(idx, dev->lpi_map); 1171 + *hwirq = dev->event_map.lpi_base + idx; 1172 + set_bit(idx, dev->event_map.lpi_map); 1207 1173 1208 1174 return 0; 1209 1175 } ··· 1324 1288 irq_domain_set_hwirq_and_chip(domain, virq + i, 1325 1289 hwirq, &its_irq_chip, its_dev); 1326 1290 dev_dbg(info->scratchpad[1].ptr, "ID:%d pID:%d vID:%d\n", 1327 - (int)(hwirq - its_dev->lpi_base), (int)hwirq, virq + i); 1291 + (int)(hwirq - its_dev->event_map.lpi_base), 1292 + (int)hwirq, virq + i); 1328 1293 } 1329 1294 1330 1295 return 0; ··· 1336 1299 { 1337 1300 struct its_device *its_dev = irq_data_get_irq_chip_data(d); 1338 1301 u32 event = its_get_event_id(d); 1302 + 1303 + /* Bind the LPI to the first possible CPU */ 1304 + its_dev->event_map.col_map[event] = cpumask_first(cpu_online_mask); 1339 1305 1340 1306 /* Map the GIC IRQ and event to the device */ 1341 1307 its_send_mapvi(its_dev, d->hwirq, event); ··· 1367 1327 u32 event = its_get_event_id(data); 1368 1328 1369 1329 /* Mark interrupt index as unused */ 1370 - clear_bit(event, its_dev->lpi_map); 1330 + clear_bit(event, its_dev->event_map.lpi_map); 1371 1331 1372 1332 /* Nuke the entry in the domain */ 1373 1333 irq_domain_reset_irq_data(data); 1374 1334 } 1375 1335 1376 1336 /* If all interrupts have been freed, start mopping the floor */ 1377 - if (bitmap_empty(its_dev->lpi_map, its_dev->nr_lpis)) { 1378 - its_lpi_free(its_dev->lpi_map, 1379 - its_dev->lpi_base, 1380 - its_dev->nr_lpis); 1337 + if (bitmap_empty(its_dev->event_map.lpi_map, 1338 + its_dev->event_map.nr_lpis)) { 1339 + its_lpi_free(&its_dev->event_map); 1381 1340 1382 1341 /* Unmap device/itt */ 1383 1342 its_send_mapd(its_dev, 0);

-9

kernel/cpu.c

··· 527 527 goto out_notify; 528 528 } 529 529 530 - /* 531 - * Some architectures have to walk the irq descriptors to 532 - * setup the vector space for the cpu which comes online. 533 - * Prevent irq alloc/free across the bringup. 534 - */ 535 - irq_lock_sparse(); 536 - 537 530 /* Arch-specific enabling code. */ 538 531 ret = __cpu_up(cpu, idle); 539 - 540 - irq_unlock_sparse(); 541 532 542 533 if (ret != 0) 543 534 goto out_notify;

+13 -5

kernel/irq/resend.c

··· 75 75 !desc->irq_data.chip->irq_retrigger(&desc->irq_data)) { 76 76 #ifdef CONFIG_HARDIRQS_SW_RESEND 77 77 /* 78 - * If the interrupt has a parent irq and runs 79 - * in the thread context of the parent irq, 80 - * retrigger the parent. 78 + * If the interrupt is running in the thread 79 + * context of the parent irq we need to be 80 + * careful, because we cannot trigger it 81 + * directly. 81 82 */ 82 - if (desc->parent_irq && 83 - irq_settings_is_nested_thread(desc)) 83 + if (irq_settings_is_nested_thread(desc)) { 84 + /* 85 + * If the parent_irq is valid, we 86 + * retrigger the parent, otherwise we 87 + * do nothing. 88 + */ 89 + if (!desc->parent_irq) 90 + return; 84 91 irq = desc->parent_irq; 92 + } 85 93 /* Set it pending and activate the softirq: */ 86 94 set_bit(irq, irqs_resend); 87 95 tasklet_schedule(&resend_tasklet);

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