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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
ASoC: sun4i-spdif: Add 24bit support
Merge series from codekipper@gmail.com:
I've tested this patch series on the Allwinner H3, A64, H6 and H313 SoCs
up to 192KHz.
24bit support is working on my H313 board but 16bit plays a bit slow and
I suspect that there is an issue with the clock setups. This is even
present without this patch stack. I would look to address this asap,
but for now can you please review what's here.
+18
-6
+18
-6
sound/soc/sunxi/sun4i-spdif.c
+18
-6
sound/soc/sunxi/sun4i-spdif.c
···
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unsigned int reg_dac_txdata;
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bool has_reset;
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unsigned int val_fctl_ftx;
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+
unsigned int mclk_multiplier;
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};
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struct sun4i_spdif_dev {
···
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/* flush TX FIFO */
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regmap_update_bits(host->regmap, SUN4I_SPDIF_FCTL,
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quirks->val_fctl_ftx, quirks->val_fctl_ftx);
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+
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+
/* Valid data at the MSB of TXFIFO Register */
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+
regmap_update_bits(host->regmap, SUN4I_SPDIF_FCTL,
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+
SUN4I_SPDIF_FCTL_TXIM, 0);
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/* clear TX counter */
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regmap_write(host->regmap, SUN4I_SPDIF_TXCNT, 0);
···
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return -EINVAL;
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}
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+
host->dma_params_tx.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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fmt |= SUN4I_SPDIF_TXCFG_FMT16BIT;
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+
host->dma_params_tx.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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break;
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case SNDRV_PCM_FORMAT_S20_3LE:
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fmt |= SUN4I_SPDIF_TXCFG_FMT20BIT;
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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+
case SNDRV_PCM_FORMAT_S32_LE:
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fmt |= SUN4I_SPDIF_TXCFG_FMT24BIT;
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break;
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default:
···
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default:
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return -EINVAL;
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}
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+
mclk *= host->quirks->mclk_multiplier;
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ret = clk_set_rate(host->spdif_clk, mclk);
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if (ret < 0) {
···
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320
"Setting SPDIF clock rate for %d Hz failed!\n", mclk);
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321
return ret;
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}
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-
333
-
regmap_update_bits(host->regmap, SUN4I_SPDIF_FCTL,
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-
SUN4I_SPDIF_FCTL_TXIM, SUN4I_SPDIF_FCTL_TXIM);
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323
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switch (rate) {
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325
case 22050:
···
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default:
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return -EINVAL;
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}
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+
mclk_div *= host->quirks->mclk_multiplier;
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reg_val = 0;
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reg_val |= SUN4I_SPDIF_TXCFG_ASS;
···
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#define SUN4I_RATES SNDRV_PCM_RATE_8000_192000
531
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532
-
#define SUN4I_FORMATS (SNDRV_PCM_FORMAT_S16_LE | \
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-
SNDRV_PCM_FORMAT_S20_3LE | \
534
-
SNDRV_PCM_FORMAT_S24_LE)
525
+
#define SUN4I_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
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+
SNDRV_PCM_FMTBIT_S20_3LE | \
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+
SNDRV_PCM_FMTBIT_S24_LE | \
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+
SNDRV_PCM_FMTBIT_S32_LE)
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static struct snd_soc_dai_driver sun4i_spdif_dai = {
537
531
.playback = {
···
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static const struct sun4i_spdif_quirks sun4i_a10_spdif_quirks = {
549
541
.reg_dac_txdata = SUN4I_SPDIF_TXFIFO,
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542
.val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX,
543
+
.mclk_multiplier = 1,
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544
};
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static const struct sun4i_spdif_quirks sun6i_a31_spdif_quirks = {
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.reg_dac_txdata = SUN4I_SPDIF_TXFIFO,
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.val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX,
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549
.has_reset = true,
550
+
.mclk_multiplier = 1,
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};
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static const struct sun4i_spdif_quirks sun8i_h3_spdif_quirks = {
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.reg_dac_txdata = SUN8I_SPDIF_TXFIFO,
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555
.val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX,
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.has_reset = true,
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+
.mclk_multiplier = 4,
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};
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static const struct sun4i_spdif_quirks sun50i_h6_spdif_quirks = {
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.reg_dac_txdata = SUN8I_SPDIF_TXFIFO,
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.val_fctl_ftx = SUN50I_H6_SPDIF_FCTL_FTX,
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.has_reset = true,
564
+
.mclk_multiplier = 1,
569
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};
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static const struct of_device_id sun4i_spdif_of_match[] = {