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Merge tag 'riscv-for-linus-5.14-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Palmer Dabbelt:

- device tree updates for the Microsemi Polarfire development kit that
fix some mismatches between the u-boot and Linux enternet entries

- ensure that the F register state is correctly reflected in core dumps

* tag 'riscv-for-linus-5.14-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: dts: microchip: Add ethernet0 to the aliases node
riscv: dts: microchip: Use 'local-mac-address' for emac1
riscv: Ensure the value of FP registers in the core dump file is up to date

+9 -1
+4
arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
··· 14 14 model = "Microchip PolarFire-SoC Icicle Kit"; 15 15 compatible = "microchip,mpfs-icicle-kit"; 16 16 17 + aliases { 18 + ethernet0 = &emac1; 19 + }; 20 + 17 21 chosen { 18 22 stdout-path = &serial0; 19 23 };
+1 -1
arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
··· 317 317 reg = <0x0 0x20112000 0x0 0x2000>; 318 318 interrupt-parent = <&plic>; 319 319 interrupts = <70 71 72 73>; 320 - mac-address = [00 00 00 00 00 00]; 320 + local-mac-address = [00 00 00 00 00 00]; 321 321 clocks = <&clkcfg 5>, <&clkcfg 2>; 322 322 status = "disabled"; 323 323 clock-names = "pclk", "hclk";
+4
arch/riscv/kernel/ptrace.c
··· 10 10 #include <asm/ptrace.h> 11 11 #include <asm/syscall.h> 12 12 #include <asm/thread_info.h> 13 + #include <asm/switch_to.h> 13 14 #include <linux/audit.h> 14 15 #include <linux/ptrace.h> 15 16 #include <linux/elf.h> ··· 56 55 struct membuf to) 57 56 { 58 57 struct __riscv_d_ext_state *fstate = &target->thread.fstate; 58 + 59 + if (target == current) 60 + fstate_save(current, task_pt_regs(current)); 59 61 60 62 membuf_write(&to, fstate, offsetof(struct __riscv_d_ext_state, fcsr)); 61 63 membuf_store(&to, fstate->fcsr);