tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

phy: ti: phy-j721e-wiz: use dev_err_probe() instead of dev_err()

Use dev_err_probe() instead of dev_err() in wiz_clock_init() to simplify
the code and standardize the error output.

Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
Link: https://lore.kernel.org/r/20240412-j7200-phy-s2r-v1-1-f15815833974@bootlin.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Thomas Richard and committed by
Vinod Koul 5aa4733b 7d5ebb62

+21 -25
+21 -25
drivers/phy/ti/phy-j721e-wiz.c
··· 1088 1088 int i; 1089 1089 1090 1090 clk = devm_clk_get(dev, "core_ref_clk"); 1091 - if (IS_ERR(clk)) { 1092 - dev_err(dev, "core_ref_clk clock not found\n"); 1093 - ret = PTR_ERR(clk); 1094 - return ret; 1095 - } 1091 + if (IS_ERR(clk)) 1092 + return dev_err_probe(dev, PTR_ERR(clk), 1093 + "core_ref_clk clock not found\n"); 1094 + 1096 1095 wiz->input_clks[WIZ_CORE_REFCLK] = clk; 1097 1096 1098 1097 rate = clk_get_rate(clk); ··· 1121 1122 1122 1123 if (wiz->data->pma_cmn_refclk1_int_mode) { 1123 1124 clk = devm_clk_get(dev, "core_ref1_clk"); 1124 - if (IS_ERR(clk)) { 1125 - dev_err(dev, "core_ref1_clk clock not found\n"); 1126 - ret = PTR_ERR(clk); 1127 - return ret; 1128 - } 1125 + if (IS_ERR(clk)) 1126 + return dev_err_probe(dev, PTR_ERR(clk), 1127 + "core_ref1_clk clock not found\n"); 1128 + 1129 1129 wiz->input_clks[WIZ_CORE_REFCLK1] = clk; 1130 1130 1131 1131 rate = clk_get_rate(clk); ··· 1135 1137 } 1136 1138 1137 1139 clk = devm_clk_get(dev, "ext_ref_clk"); 1138 - if (IS_ERR(clk)) { 1139 - dev_err(dev, "ext_ref_clk clock not found\n"); 1140 - ret = PTR_ERR(clk); 1141 - return ret; 1142 - } 1140 + if (IS_ERR(clk)) 1141 + return dev_err_probe(dev, PTR_ERR(clk), 1142 + "ext_ref_clk clock not found\n"); 1143 + 1143 1144 wiz->input_clks[WIZ_EXT_REFCLK] = clk; 1144 1145 1145 1146 rate = clk_get_rate(clk); ··· 1154 1157 case J721S2_WIZ_10G: 1155 1158 ret = wiz_clock_register(wiz); 1156 1159 if (ret) 1157 - dev_err(dev, "Failed to register wiz clocks\n"); 1158 - return ret; 1160 + return dev_err_probe(dev, ret, "Failed to register wiz clocks\n"); 1161 + 1162 + return 0; 1159 1163 default: 1160 1164 break; 1161 1165 } ··· 1165 1167 node_name = clk_mux_sel[i].node_name; 1166 1168 clk_node = of_get_child_by_name(node, node_name); 1167 1169 if (!clk_node) { 1168 - dev_err(dev, "Unable to get %s node\n", node_name); 1169 - ret = -EINVAL; 1170 + ret = dev_err_probe(dev, -EINVAL, "Unable to get %s node\n", node_name); 1170 1171 goto err; 1171 1172 } 1172 1173 1173 1174 ret = wiz_mux_of_clk_register(wiz, clk_node, wiz->mux_sel_field[i], 1174 1175 clk_mux_sel[i].table); 1175 1176 if (ret) { 1176 - dev_err(dev, "Failed to register %s clock\n", 1177 - node_name); 1177 + dev_err_probe(dev, ret, "Failed to register %s clock\n", 1178 + node_name); 1178 1179 of_node_put(clk_node); 1179 1180 goto err; 1180 1181 } ··· 1185 1188 node_name = clk_div_sel[i].node_name; 1186 1189 clk_node = of_get_child_by_name(node, node_name); 1187 1190 if (!clk_node) { 1188 - dev_err(dev, "Unable to get %s node\n", node_name); 1189 - ret = -EINVAL; 1191 + ret = dev_err_probe(dev, -EINVAL, "Unable to get %s node\n", node_name); 1190 1192 goto err; 1191 1193 } 1192 1194 1193 1195 ret = wiz_div_clk_register(wiz, clk_node, wiz->div_sel_field[i], 1194 1196 clk_div_sel[i].table); 1195 1197 if (ret) { 1196 - dev_err(dev, "Failed to register %s clock\n", 1197 - node_name); 1198 + dev_err_probe(dev, ret, "Failed to register %s clock\n", 1199 + node_name); 1198 1200 of_node_put(clk_node); 1199 1201 goto err; 1200 1202 }