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iommu/arm-smmu-v3: Remove IAS

The driver only supports AArch64 page tables where OAS == IAS.

Remove the extra IAS tracking for AArch32 as this feature was
never implemented and that was creating BAD_STEs for SMMUv3
with stage-2 and OAS < 40.

Further discussion on this in:
https://lore.kernel.org/linux-iommu/20251130194506.593700-1-smostafa@google.com/

Reported-by: Tomasz Nowicki <tnowicki@google.com>
Fixes: f0c453dbcce7 ("iommu/arm-smmu: Ensure IAS is set correctly for AArch32-capable SMMUs")
Signed-off-by: Mostafa Saleh <smostafa@google.com>
Signed-off-by: Will Deacon <will@kernel.org>

authored by

Mostafa Saleh and committed by
Will Deacon 5ac66ed8 20261593

+5 -15
+5 -13
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
··· 2562 2562 ARM_SMMU_FEAT_VAX) ? 52 : 48; 2563 2563 2564 2564 pgtbl_cfg.ias = min_t(unsigned long, ias, VA_BITS); 2565 - pgtbl_cfg.oas = smmu->ias; 2565 + pgtbl_cfg.oas = smmu->oas; 2566 2566 if (enable_dirty) 2567 2567 pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_ARM_HD; 2568 2568 fmt = ARM_64_LPAE_S1; ··· 2572 2572 case ARM_SMMU_DOMAIN_S2: 2573 2573 if (enable_dirty) 2574 2574 return -EOPNOTSUPP; 2575 - pgtbl_cfg.ias = smmu->ias; 2575 + pgtbl_cfg.ias = smmu->oas; 2576 2576 pgtbl_cfg.oas = smmu->oas; 2577 2577 fmt = ARM_64_LPAE_S2; 2578 2578 finalise_stage_fn = arm_smmu_domain_finalise_s2; ··· 4406 4406 } 4407 4407 4408 4408 /* We only support the AArch64 table format at present */ 4409 - switch (FIELD_GET(IDR0_TTF, reg)) { 4410 - case IDR0_TTF_AARCH32_64: 4411 - smmu->ias = 40; 4412 - fallthrough; 4413 - case IDR0_TTF_AARCH64: 4414 - break; 4415 - default: 4409 + if (!(FIELD_GET(IDR0_TTF, reg) & IDR0_TTF_AARCH64)) { 4416 4410 dev_err(smmu->dev, "AArch64 table format not supported!\n"); 4417 4411 return -ENXIO; 4418 4412 } ··· 4519 4525 dev_warn(smmu->dev, 4520 4526 "failed to set DMA mask for table walker\n"); 4521 4527 4522 - smmu->ias = max(smmu->ias, smmu->oas); 4523 - 4524 4528 if ((smmu->features & ARM_SMMU_FEAT_TRANS_S1) && 4525 4529 (smmu->features & ARM_SMMU_FEAT_TRANS_S2)) 4526 4530 smmu->features |= ARM_SMMU_FEAT_NESTING; ··· 4528 4536 if (arm_smmu_sva_supported(smmu)) 4529 4537 smmu->features |= ARM_SMMU_FEAT_SVA; 4530 4538 4531 - dev_info(smmu->dev, "ias %lu-bit, oas %lu-bit (features 0x%08x)\n", 4532 - smmu->ias, smmu->oas, smmu->features); 4539 + dev_info(smmu->dev, "oas %lu-bit (features 0x%08x)\n", 4540 + smmu->oas, smmu->features); 4533 4541 return 0; 4534 4542 } 4535 4543
-2
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
··· 43 43 #define IDR0_COHACC (1 << 4) 44 44 #define IDR0_TTF GENMASK(3, 2) 45 45 #define IDR0_TTF_AARCH64 2 46 - #define IDR0_TTF_AARCH32_64 3 47 46 #define IDR0_S1P (1 << 1) 48 47 #define IDR0_S2P (1 << 0) 49 48 ··· 783 784 int gerr_irq; 784 785 int combined_irq; 785 786 786 - unsigned long ias; /* IPA */ 787 787 unsigned long oas; /* PA */ 788 788 unsigned long pgsize_bitmap; 789 789