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Merge tag 'usb-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next

Felipe writes:

USB changes for v4.21

So it looks like folks are interested in dwc3 again. Almost 64% of the
changes are in dwc3 this time around with some other bits in gadget
functions and dwc2.

There are two important parts here: a. removal of the waitqueue from
dwc3's dequeue implementation, which will guarantee that gadget
functions can dequeue from any context and; b. better method for
starting isochronous transfers to avoid, as much as possible, missed
isoc frames.

Apart from these, we have the usual set of non-critical fixes and new
features all over the place.

* tag 'usb-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: (56 commits)
usb: dwc2: Fix disable all EP's on disconnect
usb: dwc3: gadget: Disable CSP for stream OUT ep
usb: dwc2: disable power_down on Amlogic devices
Revert "usb: dwc3: pci: Use devm functions to get the phy GPIOs"
USB: gadget: udc: s3c2410_udc: convert to DEFINE_SHOW_ATTRIBUTE
usb: mtu3: fix dbginfo in qmu_tx_zlp_error_handler
usb: dwc3: trace: add missing break statement to make compiler happy
usb: dwc3: gadget: Report isoc transfer frame number
usb: gadget: Introduce frame_number to usb_request
usb: renesas_usbhs: Use SIMPLE_DEV_PM_OPS macro
usb: renesas_usbhs: Remove dummy runtime PM callbacks
usb: dwc2: host: use hrtimer for NAK retries
usb: mtu3: clear SOFTCONN when clear USB3_EN if work as HS mode
usb: mtu3: enable SETUPENDISR interrupt
usb: mtu3: fix the issue about SetFeature(U1/U2_Enable)
usb: mtu3: enable hardware remote wakeup from L1 automatically
usb: mtu3: remove QMU checksum
usb/mtu3: power down device ip at setup
usb: dwc2: Disable power down feature on Samsung SoCs
usb: dwc3: Correct the logic for checking TRB full in __dwc3_prepare_one_trb()
...

+777 -241
+4
Documentation/devicetree/bindings/usb/dwc3.txt
··· 37 37 - phy-names: from the *Generic PHY* bindings; supported names are "usb2-phy" 38 38 or "usb3-phy". 39 39 - resets: a single pair of phandle and reset specifier 40 + - snps,usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM 40 41 - snps,usb3_lpm_capable: determines if platform is USB3 LPM capable 42 + - snps,dis-start-transfer-quirk: when set, disable isoc START TRANSFER command 43 + failure SW work-around for DWC_usb31 version 1.70a-ea06 44 + and prior. 41 45 - snps,disable_scramble_quirk: true when SW should disable data scrambling. 42 46 Only really useful for FPGA builds. 43 47 - snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled
+25 -19
drivers/usb/dwc2/gadget.c
··· 262 262 if (gintsts2 & GINTSTS2_WKUP_ALERT_INT) { 263 263 dev_dbg(hsotg->dev, "%s: Wkup_Alert_Int\n", __func__); 264 264 dwc2_clear_bit(hsotg, GINTSTS2, GINTSTS2_WKUP_ALERT_INT); 265 - dwc2_set_bit(hsotg, DCFG, DCTL_RMTWKUPSIG); 265 + dwc2_set_bit(hsotg, DCTL, DCTL_RMTWKUPSIG); 266 266 } 267 267 } 268 268 ··· 3165 3165 dwc2_hsotg_txfifo_flush(hsotg, ep->fifo_index); 3166 3166 } 3167 3167 3168 - static int dwc2_hsotg_ep_disable(struct usb_ep *ep); 3169 - 3170 3168 /** 3171 3169 * dwc2_hsotg_disconnect - disconnect service 3172 3170 * @hsotg: The device state. ··· 3186 3188 /* all endpoints should be shutdown */ 3187 3189 for (ep = 0; ep < hsotg->num_of_eps; ep++) { 3188 3190 if (hsotg->eps_in[ep]) 3189 - dwc2_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); 3191 + kill_all_requests(hsotg, hsotg->eps_in[ep], 3192 + -ESHUTDOWN); 3190 3193 if (hsotg->eps_out[ep]) 3191 - dwc2_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); 3194 + kill_all_requests(hsotg, hsotg->eps_out[ep], 3195 + -ESHUTDOWN); 3192 3196 } 3193 3197 3194 3198 call_gadget(hsotg, disconnect); ··· 3234 3234 GINTSTS_PTXFEMP | \ 3235 3235 GINTSTS_RXFLVL) 3236 3236 3237 + static int dwc2_hsotg_ep_disable(struct usb_ep *ep); 3237 3238 /** 3238 3239 * dwc2_hsotg_core_init - issue softreset to the core 3239 3240 * @hsotg: The device state ··· 4070 4069 struct dwc2_hsotg *hsotg = hs_ep->parent; 4071 4070 int dir_in = hs_ep->dir_in; 4072 4071 int index = hs_ep->index; 4073 - unsigned long flags; 4074 4072 u32 epctrl_reg; 4075 4073 u32 ctrl; 4076 - int locked; 4077 4074 4078 4075 dev_dbg(hsotg->dev, "%s(ep %p)\n", __func__, ep); 4079 4076 ··· 4086 4087 } 4087 4088 4088 4089 epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index); 4089 - 4090 - locked = spin_is_locked(&hsotg->lock); 4091 - if (!locked) 4092 - spin_lock_irqsave(&hsotg->lock, flags); 4093 4090 4094 4091 ctrl = dwc2_readl(hsotg, epctrl_reg); 4095 4092 ··· 4109 4114 hs_ep->fifo_index = 0; 4110 4115 hs_ep->fifo_size = 0; 4111 4116 4112 - if (!locked) 4113 - spin_unlock_irqrestore(&hsotg->lock, flags); 4114 - 4115 4117 return 0; 4118 + } 4119 + 4120 + static int dwc2_hsotg_ep_disable_lock(struct usb_ep *ep) 4121 + { 4122 + struct dwc2_hsotg_ep *hs_ep = our_ep(ep); 4123 + struct dwc2_hsotg *hsotg = hs_ep->parent; 4124 + unsigned long flags; 4125 + int ret; 4126 + 4127 + spin_lock_irqsave(&hsotg->lock, flags); 4128 + ret = dwc2_hsotg_ep_disable(ep); 4129 + spin_unlock_irqrestore(&hsotg->lock, flags); 4130 + return ret; 4116 4131 } 4117 4132 4118 4133 /** ··· 4272 4267 4273 4268 static const struct usb_ep_ops dwc2_hsotg_ep_ops = { 4274 4269 .enable = dwc2_hsotg_ep_enable, 4275 - .disable = dwc2_hsotg_ep_disable, 4270 + .disable = dwc2_hsotg_ep_disable_lock, 4276 4271 .alloc_request = dwc2_hsotg_ep_alloc_request, 4277 4272 .free_request = dwc2_hsotg_ep_free_request, 4278 4273 .queue = dwc2_hsotg_ep_queue_lock, ··· 4412 4407 /* all endpoints should be shutdown */ 4413 4408 for (ep = 1; ep < hsotg->num_of_eps; ep++) { 4414 4409 if (hsotg->eps_in[ep]) 4415 - dwc2_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); 4410 + dwc2_hsotg_ep_disable_lock(&hsotg->eps_in[ep]->ep); 4416 4411 if (hsotg->eps_out[ep]) 4417 - dwc2_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); 4412 + dwc2_hsotg_ep_disable_lock(&hsotg->eps_out[ep]->ep); 4418 4413 } 4419 4414 4420 4415 spin_lock_irqsave(&hsotg->lock, flags); ··· 4862 4857 4863 4858 for (ep = 0; ep < hsotg->num_of_eps; ep++) { 4864 4859 if (hsotg->eps_in[ep]) 4865 - dwc2_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); 4860 + dwc2_hsotg_ep_disable_lock(&hsotg->eps_in[ep]->ep); 4866 4861 if (hsotg->eps_out[ep]) 4867 - dwc2_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); 4862 + dwc2_hsotg_ep_disable_lock(&hsotg->eps_out[ep]->ep); 4868 4863 } 4869 4864 } 4870 4865 ··· 5031 5026 val |= hsotg->params.lpm_clock_gating ? GLPMCFG_ENBLSLPM : 0; 5032 5027 val |= hsotg->params.hird_threshold << GLPMCFG_HIRD_THRES_SHIFT; 5033 5028 val |= hsotg->params.besl ? GLPMCFG_ENBESL : 0; 5029 + val |= GLPMCFG_LPM_ACCEPT_CTRL_ISOC; 5034 5030 dwc2_writel(hsotg, val, GLPMCFG); 5035 5031 dev_dbg(hsotg->dev, "GLPMCFG=0x%08x\n", dwc2_readl(hsotg, GLPMCFG)); 5036 5032
+1 -1
drivers/usb/dwc2/hcd.h
··· 366 366 u32 desc_list_sz; 367 367 u32 *n_bytes; 368 368 struct timer_list unreserve_timer; 369 - struct timer_list wait_timer; 369 + struct hrtimer wait_timer; 370 370 struct dwc2_tt *dwc_tt; 371 371 int ttport; 372 372 unsigned tt_buffer_dirty:1;
+12 -7
drivers/usb/dwc2/hcd_queue.c
··· 59 59 #define DWC2_UNRESERVE_DELAY (msecs_to_jiffies(5)) 60 60 61 61 /* If we get a NAK, wait this long before retrying */ 62 - #define DWC2_RETRY_WAIT_DELAY (msecs_to_jiffies(1)) 62 + #define DWC2_RETRY_WAIT_DELAY 1*1E6L 63 63 64 64 /** 65 65 * dwc2_periodic_channel_available() - Checks that a channel is available for a ··· 1464 1464 * qh back to the "inactive" list, then queues transactions. 1465 1465 * 1466 1466 * @t: Pointer to wait_timer in a qh. 1467 + * 1468 + * Return: HRTIMER_NORESTART to not automatically restart this timer. 1467 1469 */ 1468 - static void dwc2_wait_timer_fn(struct timer_list *t) 1470 + static enum hrtimer_restart dwc2_wait_timer_fn(struct hrtimer *t) 1469 1471 { 1470 - struct dwc2_qh *qh = from_timer(qh, t, wait_timer); 1472 + struct dwc2_qh *qh = container_of(t, struct dwc2_qh, wait_timer); 1471 1473 struct dwc2_hsotg *hsotg = qh->hsotg; 1472 1474 unsigned long flags; 1473 1475 ··· 1493 1491 } 1494 1492 1495 1493 spin_unlock_irqrestore(&hsotg->lock, flags); 1494 + return HRTIMER_NORESTART; 1496 1495 } 1497 1496 1498 1497 /** ··· 1524 1521 /* Initialize QH */ 1525 1522 qh->hsotg = hsotg; 1526 1523 timer_setup(&qh->unreserve_timer, dwc2_unreserve_timer_fn, 0); 1527 - timer_setup(&qh->wait_timer, dwc2_wait_timer_fn, 0); 1524 + hrtimer_init(&qh->wait_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 1525 + qh->wait_timer.function = &dwc2_wait_timer_fn; 1528 1526 qh->ep_type = ep_type; 1529 1527 qh->ep_is_in = ep_is_in; 1530 1528 ··· 1694 1690 * won't do anything anyway, but we want it to finish before we free 1695 1691 * memory. 1696 1692 */ 1697 - del_timer_sync(&qh->wait_timer); 1693 + hrtimer_cancel(&qh->wait_timer); 1698 1694 1699 1695 dwc2_host_put_tt_info(hsotg, qh->dwc_tt); 1700 1696 ··· 1720 1716 { 1721 1717 int status; 1722 1718 u32 intr_mask; 1719 + ktime_t delay; 1723 1720 1724 1721 if (dbg_qh(qh)) 1725 1722 dev_vdbg(hsotg->dev, "%s()\n", __func__); ··· 1739 1734 list_add_tail(&qh->qh_list_entry, 1740 1735 &hsotg->non_periodic_sched_waiting); 1741 1736 qh->wait_timer_cancel = false; 1742 - mod_timer(&qh->wait_timer, 1743 - jiffies + DWC2_RETRY_WAIT_DELAY + 1); 1737 + delay = ktime_set(0, DWC2_RETRY_WAIT_DELAY); 1738 + hrtimer_start(&qh->wait_timer, delay, HRTIMER_MODE_REL); 1744 1739 } else { 1745 1740 list_add_tail(&qh->qh_list_entry, 1746 1741 &hsotg->non_periodic_sched_inactive);
+2
drivers/usb/dwc2/hw.h
··· 333 333 #define GLPMCFG_SNDLPM BIT(24) 334 334 #define GLPMCFG_RETRY_CNT_MASK (0x7 << 21) 335 335 #define GLPMCFG_RETRY_CNT_SHIFT 21 336 + #define GLPMCFG_LPM_ACCEPT_CTRL_CONTROL BIT(21) 337 + #define GLPMCFG_LPM_ACCEPT_CTRL_ISOC BIT(22) 336 338 #define GLPMCFG_LPM_CHNL_INDX_MASK (0xf << 17) 337 339 #define GLPMCFG_LPM_CHNL_INDX_SHIFT 17 338 340 #define GLPMCFG_L1RESUMEOK BIT(16)
+10 -1
drivers/usb/dwc2/params.c
··· 71 71 p->power_down = false; 72 72 } 73 73 74 + static void dwc2_set_s3c6400_params(struct dwc2_hsotg *hsotg) 75 + { 76 + struct dwc2_core_params *p = &hsotg->params; 77 + 78 + p->power_down = 0; 79 + } 80 + 74 81 static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) 75 82 { 76 83 struct dwc2_core_params *p = &hsotg->params; ··· 118 111 p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI; 119 112 p->ahbcfg = GAHBCFG_HBSTLEN_INCR8 << 120 113 GAHBCFG_HBSTLEN_SHIFT; 114 + p->power_down = DWC2_POWER_DOWN_PARAM_NONE; 121 115 } 122 116 123 117 static void dwc2_set_amcc_params(struct dwc2_hsotg *hsotg) ··· 159 151 { .compatible = "lantiq,arx100-usb", .data = dwc2_set_ltq_params }, 160 152 { .compatible = "lantiq,xrx200-usb", .data = dwc2_set_ltq_params }, 161 153 { .compatible = "snps,dwc2" }, 162 - { .compatible = "samsung,s3c6400-hsotg" }, 154 + { .compatible = "samsung,s3c6400-hsotg", 155 + .data = dwc2_set_s3c6400_params }, 163 156 { .compatible = "amlogic,meson8-usb", 164 157 .data = dwc2_set_amlogic_params }, 165 158 { .compatible = "amlogic,meson8b-usb",
+14 -5
drivers/usb/dwc3/core.c
··· 80 80 mode = USB_DR_MODE_PERIPHERAL; 81 81 82 82 /* 83 - * dwc_usb31 does not support OTG mode. If the controller 84 - * supports DRD but the dr_mode is not specified or set to OTG, 85 - * then set the mode to peripheral. 83 + * DWC_usb31 and DWC_usb3 v3.30a and higher do not support OTG 84 + * mode. If the controller supports DRD but the dr_mode is not 85 + * specified or set to OTG, then set the mode to peripheral. 86 86 */ 87 - if (mode == USB_DR_MODE_OTG && dwc3_is_usb31(dwc)) 87 + if (mode == USB_DR_MODE_OTG && 88 + dwc->revision >= DWC3_REVISION_330A) 88 89 mode = USB_DR_MODE_PERIPHERAL; 89 90 } 90 91 ··· 662 661 663 662 if (dwc->dis_enblslpm_quirk) 664 663 reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; 664 + else 665 + reg |= DWC3_GUSB2PHYCFG_ENBLSLPM; 665 666 666 667 if (dwc->dis_u2_freeclk_exists_quirk) 667 668 reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS; ··· 705 702 /* Detected DWC_usb31 IP */ 706 703 dwc->revision = dwc3_readl(dwc->regs, DWC3_VER_NUMBER); 707 704 dwc->revision |= DWC3_REVISION_IS_DWC31; 705 + dwc->version_type = dwc3_readl(dwc->regs, DWC3_VER_TYPE); 708 706 } else { 709 707 return false; 710 708 } ··· 1248 1244 "snps,is-utmi-l1-suspend"); 1249 1245 device_property_read_u8(dev, "snps,hird-threshold", 1250 1246 &hird_threshold); 1247 + dwc->dis_start_transfer_quirk = device_property_read_bool(dev, 1248 + "snps,dis-start-transfer-quirk"); 1251 1249 dwc->usb3_lpm_capable = device_property_read_bool(dev, 1252 1250 "snps,usb3_lpm_capable"); 1251 + dwc->usb2_lpm_disable = device_property_read_bool(dev, 1252 + "snps,usb2-lpm-disable"); 1253 1253 device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd", 1254 1254 &rx_thr_num_pkt_prd); 1255 1255 device_property_read_u8(dev, "snps,rx-max-burst-prd", ··· 1490 1482 1491 1483 ret = dwc3_core_init(dwc); 1492 1484 if (ret) { 1493 - dev_err(dev, "failed to initialize core\n"); 1485 + if (ret != -EPROBE_DEFER) 1486 + dev_err(dev, "failed to initialize core: %d\n", ret); 1494 1487 goto err4; 1495 1488 } 1496 1489
+51 -9
drivers/usb/dwc3/core.h
··· 37 37 #define DWC3_EP0_SETUP_SIZE 512 38 38 #define DWC3_ENDPOINTS_NUM 32 39 39 #define DWC3_XHCI_RESOURCES_NUM 2 40 + #define DWC3_ISOC_MAX_RETRIES 5 40 41 41 42 #define DWC3_SCRATCHBUF_SIZE 4096 /* each buffer is assumed to be 4KiB */ 42 43 #define DWC3_EVENT_BUFFERS_SIZE 4096 ··· 175 174 #define DWC3_GSBUSCFG0_INCRBRSTENA (1 << 0) /* undefined length enable */ 176 175 #define DWC3_GSBUSCFG0_INCRBRST_MASK 0xff 177 176 177 + /* Global Debug LSP MUX Select */ 178 + #define DWC3_GDBGLSPMUX_ENDBC BIT(15) /* Host only */ 179 + #define DWC3_GDBGLSPMUX_HOSTSELECT(n) ((n) & 0x3fff) 180 + #define DWC3_GDBGLSPMUX_DEVSELECT(n) (((n) & 0xf) << 4) 181 + #define DWC3_GDBGLSPMUX_EPSELECT(n) ((n) & 0xf) 182 + 178 183 /* Global Debug Queue/FIFO Space Available Register */ 179 184 #define DWC3_GDBGFIFOSPACE_NUM(n) ((n) & 0x1f) 180 185 #define DWC3_GDBGFIFOSPACE_TYPE(n) (((n) << 5) & 0x1e0) 181 186 #define DWC3_GDBGFIFOSPACE_SPACE_AVAILABLE(n) (((n) >> 16) & 0xffff) 182 187 183 - #define DWC3_TXFIFOQ 0 184 - #define DWC3_RXFIFOQ 1 188 + #define DWC3_TXFIFO 0 189 + #define DWC3_RXFIFO 1 185 190 #define DWC3_TXREQQ 2 186 191 #define DWC3_RXREQQ 3 187 192 #define DWC3_RXINFOQ 4 ··· 260 253 #define DWC3_GSTS_DEVICE_IP BIT(6) 261 254 #define DWC3_GSTS_CSR_TIMEOUT BIT(5) 262 255 #define DWC3_GSTS_BUS_ERR_ADDR_VLD BIT(4) 256 + #define DWC3_GSTS_CURMOD(n) ((n) & 0x3) 257 + #define DWC3_GSTS_CURMOD_DEVICE 0 258 + #define DWC3_GSTS_CURMOD_HOST 1 263 259 264 260 /* Global USB2 PHY Configuration Register */ 265 261 #define DWC3_GUSB2PHYCFG_PHYSOFTRST BIT(31) ··· 331 321 #define DWC3_GHWPARAMS1_EN_PWROPT_HIB 2 332 322 #define DWC3_GHWPARAMS1_PWROPT(n) ((n) << 24) 333 323 #define DWC3_GHWPARAMS1_PWROPT_MASK DWC3_GHWPARAMS1_PWROPT(3) 324 + #define DWC3_GHWPARAMS1_ENDBC BIT(31) 334 325 335 326 /* Global HWPARAMS3 Register */ 336 327 #define DWC3_GHWPARAMS3_SSPHY_IFC(n) ((n) & 3) ··· 647 636 /** 648 637 * struct dwc3_ep - device side endpoint representation 649 638 * @endpoint: usb endpoint 639 + * @cancelled_list: list of cancelled requests for this endpoint 650 640 * @pending_list: list of pending requests for this endpoint 651 641 * @started_list: list of started requests on this endpoint 652 - * @wait_end_transfer: wait_queue_head_t for waiting on End Transfer complete 653 642 * @lock: spinlock for endpoint request queue traversal 654 643 * @regs: pointer to first endpoint register 655 644 * @trb_pool: array of transaction buffers ··· 667 656 * @name: a human readable name e.g. ep1out-bulk 668 657 * @direction: true for TX, false for RX 669 658 * @stream_capable: true when streams are enabled 659 + * @combo_num: the test combination BIT[15:14] of the frame number to test 660 + * isochronous START TRANSFER command failure workaround 661 + * @start_cmd_status: the status of testing START TRANSFER command with 662 + * combo_num = 'b00 670 663 */ 671 664 struct dwc3_ep { 672 665 struct usb_ep endpoint; 666 + struct list_head cancelled_list; 673 667 struct list_head pending_list; 674 668 struct list_head started_list; 675 - 676 - wait_queue_head_t wait_end_transfer; 677 669 678 670 spinlock_t lock; 679 671 void __iomem *regs; ··· 719 705 720 706 unsigned direction:1; 721 707 unsigned stream_capable:1; 708 + 709 + /* For isochronous START TRANSFER workaround only */ 710 + u8 combo_num; 711 + int start_cmd_status; 722 712 }; 723 713 724 714 enum dwc3_phy { ··· 784 766 #define DWC3_TRB_CTRL_ISP_IMI BIT(10) 785 767 #define DWC3_TRB_CTRL_IOC BIT(11) 786 768 #define DWC3_TRB_CTRL_SID_SOFN(n) (((n) & 0xffff) << 14) 769 + #define DWC3_TRB_CTRL_GET_SID_SOFN(n) (((n) & (0xffff << 14)) >> 14) 787 770 788 771 #define DWC3_TRBCTL_TYPE(n) ((n) & (0x3f << 4)) 789 772 #define DWC3_TRBCTL_NORMAL DWC3_TRB_CTRL_TRBCTL(1) ··· 866 847 * @epnum: endpoint number to which this request refers 867 848 * @trb: pointer to struct dwc3_trb 868 849 * @trb_dma: DMA address of @trb 869 - * @unaligned: true for OUT endpoints with length not divisible by maxp 850 + * @num_trbs: number of TRBs used by this request 851 + * @needs_extra_trb: true when request needs one extra TRB (either due to ZLP 852 + * or unaligned OUT) 870 853 * @direction: IN or OUT direction flag 871 854 * @mapped: true when request has been dma-mapped 872 855 * @started: request is started 873 - * @zero: wants a ZLP 874 856 */ 875 857 struct dwc3_request { 876 858 struct usb_request request; ··· 887 867 struct dwc3_trb *trb; 888 868 dma_addr_t trb_dma; 889 869 890 - unsigned unaligned:1; 870 + unsigned num_trbs; 871 + 872 + unsigned needs_extra_trb:1; 891 873 unsigned direction:1; 892 874 unsigned mapped:1; 893 875 unsigned started:1; 894 - unsigned zero:1; 895 876 }; 896 877 897 878 /* ··· 939 918 * @u1u2: only used on revisions <1.83a for workaround 940 919 * @maximum_speed: maximum speed requested (mainly for testing purposes) 941 920 * @revision: revision register contents 921 + * @version_type: VERSIONTYPE register contents, a sub release of a revision 942 922 * @dr_mode: requested mode of operation 943 923 * @current_dr_role: current role of operation when in dual-role mode 944 924 * @desired_dr_role: desired role of operation when in dual-role mode ··· 967 945 * @hwparams: copy of hwparams registers 968 946 * @root: debugfs root folder pointer 969 947 * @regset: debugfs pointer to regdump file 948 + * @dbg_lsp_select: current debug lsp mux register selection 970 949 * @test_mode: true when we're entering a USB test mode 971 950 * @test_mode_nr: test feature selector 972 951 * @lpm_nyet_threshold: LPM NYET response threshold ··· 993 970 * @pullups_connected: true when Run/Stop bit is set 994 971 * @setup_packet_pending: true when there's a Setup Packet in FIFO. Workaround 995 972 * @three_stage_setup: set if we perform a three phase setup 973 + * @dis_start_transfer_quirk: set if start_transfer failure SW workaround is 974 + * not needed for DWC_usb31 version 1.70a-ea06 and below 996 975 * @usb3_lpm_capable: set if hadrware supports Link Power Management 976 + * @usb2_lpm_disable: set to disable usb2 lpm 997 977 * @disable_scramble_quirk: set if we enable the disable scramble quirk 998 978 * @u2exit_lfps_quirk: set if we enable u2exit lfps quirk 999 979 * @u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk ··· 1121 1095 #define DWC3_REVISION_290A 0x5533290a 1122 1096 #define DWC3_REVISION_300A 0x5533300a 1123 1097 #define DWC3_REVISION_310A 0x5533310a 1098 + #define DWC3_REVISION_330A 0x5533330a 1124 1099 1125 1100 /* 1126 1101 * NOTICE: we're using bit 31 as a "is usb 3.1" flag. This is really ··· 1130 1103 #define DWC3_REVISION_IS_DWC31 0x80000000 1131 1104 #define DWC3_USB31_REVISION_110A (0x3131302a | DWC3_REVISION_IS_DWC31) 1132 1105 #define DWC3_USB31_REVISION_120A (0x3132302a | DWC3_REVISION_IS_DWC31) 1106 + #define DWC3_USB31_REVISION_160A (0x3136302a | DWC3_REVISION_IS_DWC31) 1107 + #define DWC3_USB31_REVISION_170A (0x3137302a | DWC3_REVISION_IS_DWC31) 1108 + 1109 + u32 version_type; 1110 + 1111 + #define DWC31_VERSIONTYPE_EA01 0x65613031 1112 + #define DWC31_VERSIONTYPE_EA02 0x65613032 1113 + #define DWC31_VERSIONTYPE_EA03 0x65613033 1114 + #define DWC31_VERSIONTYPE_EA04 0x65613034 1115 + #define DWC31_VERSIONTYPE_EA05 0x65613035 1116 + #define DWC31_VERSIONTYPE_EA06 0x65613036 1133 1117 1134 1118 enum dwc3_ep0_next ep0_next_event; 1135 1119 enum dwc3_ep0_state ep0state; ··· 1158 1120 struct dwc3_hwparams hwparams; 1159 1121 struct dentry *root; 1160 1122 struct debugfs_regset32 *regset; 1123 + 1124 + u32 dbg_lsp_select; 1161 1125 1162 1126 u8 test_mode; 1163 1127 u8 test_mode_nr; ··· 1185 1145 unsigned pullups_connected:1; 1186 1146 unsigned setup_packet_pending:1; 1187 1147 unsigned three_stage_setup:1; 1148 + unsigned dis_start_transfer_quirk:1; 1188 1149 unsigned usb3_lpm_capable:1; 1150 + unsigned usb2_lpm_disable:1; 1189 1151 1190 1152 unsigned disable_scramble_quirk:1; 1191 1153 unsigned u2exit_lfps_quirk:1;
+29
drivers/usb/dwc3/debug.h
··· 117 117 } 118 118 119 119 /** 120 + * dwc3_gadget_hs_link_string - returns highspeed and below link name 121 + * @link_state: link state code 122 + */ 123 + static inline const char * 124 + dwc3_gadget_hs_link_string(enum dwc3_link_state link_state) 125 + { 126 + switch (link_state) { 127 + case DWC3_LINK_STATE_U0: 128 + return "On"; 129 + case DWC3_LINK_STATE_U2: 130 + return "Sleep"; 131 + case DWC3_LINK_STATE_U3: 132 + return "Suspend"; 133 + case DWC3_LINK_STATE_SS_DIS: 134 + return "Disconnected"; 135 + case DWC3_LINK_STATE_RX_DET: 136 + return "Early Suspend"; 137 + case DWC3_LINK_STATE_RECOV: 138 + return "Recovery"; 139 + case DWC3_LINK_STATE_RESET: 140 + return "Reset"; 141 + case DWC3_LINK_STATE_RESUME: 142 + return "Resume"; 143 + default: 144 + return "UNKNOWN link state\n"; 145 + } 146 + } 147 + 148 + /** 120 149 * dwc3_trb_type_string - returns TRB type as a string 121 150 * @type: the type of the TRB 122 151 */
+187 -14
drivers/usb/dwc3/debugfs.c
··· 25 25 #include "io.h" 26 26 #include "debug.h" 27 27 28 + #define DWC3_LSP_MUX_UNSELECTED 0xfffff 29 + 28 30 #define dump_register(nm) \ 29 31 { \ 30 32 .name = __stringify(nm), \ ··· 84 82 dump_register(GDBGFIFOSPACE), 85 83 dump_register(GDBGLTSSM), 86 84 dump_register(GDBGBMU), 87 - dump_register(GDBGLSPMUX), 88 - dump_register(GDBGLSP), 89 - dump_register(GDBGEPINFO0), 90 - dump_register(GDBGEPINFO1), 91 85 dump_register(GPRTBIMAP_HS0), 92 86 dump_register(GPRTBIMAP_HS1), 93 87 dump_register(GPRTBIMAP_FS0), ··· 277 279 dump_register(OSTS), 278 280 }; 279 281 282 + static void dwc3_host_lsp(struct seq_file *s) 283 + { 284 + struct dwc3 *dwc = s->private; 285 + bool dbc_enabled; 286 + u32 sel; 287 + u32 reg; 288 + u32 val; 289 + 290 + dbc_enabled = !!(dwc->hwparams.hwparams1 & DWC3_GHWPARAMS1_ENDBC); 291 + 292 + sel = dwc->dbg_lsp_select; 293 + if (sel == DWC3_LSP_MUX_UNSELECTED) { 294 + seq_puts(s, "Write LSP selection to print for host\n"); 295 + return; 296 + } 297 + 298 + reg = DWC3_GDBGLSPMUX_HOSTSELECT(sel); 299 + 300 + dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); 301 + val = dwc3_readl(dwc->regs, DWC3_GDBGLSP); 302 + seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", sel, val); 303 + 304 + if (dbc_enabled && sel < 256) { 305 + reg |= DWC3_GDBGLSPMUX_ENDBC; 306 + dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); 307 + val = dwc3_readl(dwc->regs, DWC3_GDBGLSP); 308 + seq_printf(s, "GDBGLSP_DBC[%d] = 0x%08x\n", sel, val); 309 + } 310 + } 311 + 312 + static void dwc3_gadget_lsp(struct seq_file *s) 313 + { 314 + struct dwc3 *dwc = s->private; 315 + int i; 316 + u32 reg; 317 + 318 + for (i = 0; i < 16; i++) { 319 + reg = DWC3_GDBGLSPMUX_DEVSELECT(i); 320 + dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); 321 + reg = dwc3_readl(dwc->regs, DWC3_GDBGLSP); 322 + seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", i, reg); 323 + } 324 + } 325 + 326 + static int dwc3_lsp_show(struct seq_file *s, void *unused) 327 + { 328 + struct dwc3 *dwc = s->private; 329 + unsigned int current_mode; 330 + unsigned long flags; 331 + u32 reg; 332 + 333 + spin_lock_irqsave(&dwc->lock, flags); 334 + reg = dwc3_readl(dwc->regs, DWC3_GSTS); 335 + current_mode = DWC3_GSTS_CURMOD(reg); 336 + 337 + switch (current_mode) { 338 + case DWC3_GSTS_CURMOD_HOST: 339 + dwc3_host_lsp(s); 340 + break; 341 + case DWC3_GSTS_CURMOD_DEVICE: 342 + dwc3_gadget_lsp(s); 343 + break; 344 + default: 345 + seq_puts(s, "Mode is unknown, no LSP register printed\n"); 346 + break; 347 + } 348 + spin_unlock_irqrestore(&dwc->lock, flags); 349 + 350 + return 0; 351 + } 352 + 353 + static int dwc3_lsp_open(struct inode *inode, struct file *file) 354 + { 355 + return single_open(file, dwc3_lsp_show, inode->i_private); 356 + } 357 + 358 + static ssize_t dwc3_lsp_write(struct file *file, const char __user *ubuf, 359 + size_t count, loff_t *ppos) 360 + { 361 + struct seq_file *s = file->private_data; 362 + struct dwc3 *dwc = s->private; 363 + unsigned long flags; 364 + char buf[32] = { 0 }; 365 + u32 sel; 366 + int ret; 367 + 368 + if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 369 + return -EFAULT; 370 + 371 + ret = kstrtouint(buf, 0, &sel); 372 + if (ret) 373 + return ret; 374 + 375 + spin_lock_irqsave(&dwc->lock, flags); 376 + dwc->dbg_lsp_select = sel; 377 + spin_unlock_irqrestore(&dwc->lock, flags); 378 + 379 + return count; 380 + } 381 + 382 + static const struct file_operations dwc3_lsp_fops = { 383 + .open = dwc3_lsp_open, 384 + .write = dwc3_lsp_write, 385 + .read = seq_read, 386 + .llseek = seq_lseek, 387 + .release = single_release, 388 + }; 389 + 280 390 static int dwc3_mode_show(struct seq_file *s, void *unused) 281 391 { 282 392 struct dwc3 *dwc = s->private; ··· 539 433 unsigned long flags; 540 434 enum dwc3_link_state state; 541 435 u32 reg; 436 + u8 speed; 542 437 543 438 spin_lock_irqsave(&dwc->lock, flags); 439 + reg = dwc3_readl(dwc->regs, DWC3_GSTS); 440 + if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) { 441 + seq_puts(s, "Not available\n"); 442 + spin_unlock_irqrestore(&dwc->lock, flags); 443 + return 0; 444 + } 445 + 544 446 reg = dwc3_readl(dwc->regs, DWC3_DSTS); 545 447 state = DWC3_DSTS_USBLNKST(reg); 546 - spin_unlock_irqrestore(&dwc->lock, flags); 448 + speed = reg & DWC3_DSTS_CONNECTSPD; 547 449 548 - seq_printf(s, "%s\n", dwc3_gadget_link_string(state)); 450 + seq_printf(s, "%s\n", (speed >= DWC3_DSTS_SUPERSPEED) ? 451 + dwc3_gadget_link_string(state) : 452 + dwc3_gadget_hs_link_string(state)); 453 + spin_unlock_irqrestore(&dwc->lock, flags); 549 454 550 455 return 0; 551 456 } ··· 574 457 unsigned long flags; 575 458 enum dwc3_link_state state = 0; 576 459 char buf[32]; 460 + u32 reg; 461 + u8 speed; 577 462 578 463 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 579 464 return -EFAULT; ··· 596 477 return -EINVAL; 597 478 598 479 spin_lock_irqsave(&dwc->lock, flags); 480 + reg = dwc3_readl(dwc->regs, DWC3_GSTS); 481 + if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) { 482 + spin_unlock_irqrestore(&dwc->lock, flags); 483 + return -EINVAL; 484 + } 485 + 486 + reg = dwc3_readl(dwc->regs, DWC3_DSTS); 487 + speed = reg & DWC3_DSTS_CONNECTSPD; 488 + 489 + if (speed < DWC3_DSTS_SUPERSPEED && 490 + state != DWC3_LINK_STATE_RECOV) { 491 + spin_unlock_irqrestore(&dwc->lock, flags); 492 + return -EINVAL; 493 + } 494 + 599 495 dwc3_gadget_set_link_state(dwc, state); 600 496 spin_unlock_irqrestore(&dwc->lock, flags); 601 497 ··· 630 496 const struct file_operations *const fops; 631 497 }; 632 498 633 - static int dwc3_tx_fifo_queue_show(struct seq_file *s, void *unused) 499 + static int dwc3_tx_fifo_size_show(struct seq_file *s, void *unused) 634 500 { 635 501 struct dwc3_ep *dep = s->private; 636 502 struct dwc3 *dwc = dep->dwc; ··· 638 504 u32 val; 639 505 640 506 spin_lock_irqsave(&dwc->lock, flags); 641 - val = dwc3_core_fifo_space(dep, DWC3_TXFIFOQ); 507 + val = dwc3_core_fifo_space(dep, DWC3_TXFIFO); 508 + 509 + /* Convert to bytes */ 510 + val *= DWC3_MDWIDTH(dwc->hwparams.hwparams0); 511 + val >>= 3; 642 512 seq_printf(s, "%u\n", val); 643 513 spin_unlock_irqrestore(&dwc->lock, flags); 644 514 645 515 return 0; 646 516 } 647 517 648 - static int dwc3_rx_fifo_queue_show(struct seq_file *s, void *unused) 518 + static int dwc3_rx_fifo_size_show(struct seq_file *s, void *unused) 649 519 { 650 520 struct dwc3_ep *dep = s->private; 651 521 struct dwc3 *dwc = dep->dwc; ··· 657 519 u32 val; 658 520 659 521 spin_lock_irqsave(&dwc->lock, flags); 660 - val = dwc3_core_fifo_space(dep, DWC3_RXFIFOQ); 522 + val = dwc3_core_fifo_space(dep, DWC3_RXFIFO); 523 + 524 + /* Convert to bytes */ 525 + val *= DWC3_MDWIDTH(dwc->hwparams.hwparams0); 526 + val >>= 3; 661 527 seq_printf(s, "%u\n", val); 662 528 spin_unlock_irqrestore(&dwc->lock, flags); 663 529 ··· 817 675 return 0; 818 676 } 819 677 820 - DEFINE_SHOW_ATTRIBUTE(dwc3_tx_fifo_queue); 821 - DEFINE_SHOW_ATTRIBUTE(dwc3_rx_fifo_queue); 678 + static int dwc3_ep_info_register_show(struct seq_file *s, void *unused) 679 + { 680 + struct dwc3_ep *dep = s->private; 681 + struct dwc3 *dwc = dep->dwc; 682 + unsigned long flags; 683 + u64 ep_info; 684 + u32 lower_32_bits; 685 + u32 upper_32_bits; 686 + u32 reg; 687 + 688 + spin_lock_irqsave(&dwc->lock, flags); 689 + reg = DWC3_GDBGLSPMUX_EPSELECT(dep->number); 690 + dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); 691 + 692 + lower_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO0); 693 + upper_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO1); 694 + 695 + ep_info = ((u64)upper_32_bits << 32) | lower_32_bits; 696 + seq_printf(s, "0x%016llx\n", ep_info); 697 + spin_unlock_irqrestore(&dwc->lock, flags); 698 + 699 + return 0; 700 + } 701 + 702 + DEFINE_SHOW_ATTRIBUTE(dwc3_tx_fifo_size); 703 + DEFINE_SHOW_ATTRIBUTE(dwc3_rx_fifo_size); 822 704 DEFINE_SHOW_ATTRIBUTE(dwc3_tx_request_queue); 823 705 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_request_queue); 824 706 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_info_queue); ··· 850 684 DEFINE_SHOW_ATTRIBUTE(dwc3_event_queue); 851 685 DEFINE_SHOW_ATTRIBUTE(dwc3_transfer_type); 852 686 DEFINE_SHOW_ATTRIBUTE(dwc3_trb_ring); 687 + DEFINE_SHOW_ATTRIBUTE(dwc3_ep_info_register); 853 688 854 689 static const struct dwc3_ep_file_map dwc3_ep_file_map[] = { 855 - { "tx_fifo_queue", &dwc3_tx_fifo_queue_fops, }, 856 - { "rx_fifo_queue", &dwc3_rx_fifo_queue_fops, }, 690 + { "tx_fifo_size", &dwc3_tx_fifo_size_fops, }, 691 + { "rx_fifo_size", &dwc3_rx_fifo_size_fops, }, 857 692 { "tx_request_queue", &dwc3_tx_request_queue_fops, }, 858 693 { "rx_request_queue", &dwc3_rx_request_queue_fops, }, 859 694 { "rx_info_queue", &dwc3_rx_info_queue_fops, }, ··· 862 695 { "event_queue", &dwc3_event_queue_fops, }, 863 696 { "transfer_type", &dwc3_transfer_type_fops, }, 864 697 { "trb_ring", &dwc3_trb_ring_fops, }, 698 + { "GDBGEPINFO", &dwc3_ep_info_register_fops, }, 865 699 }; 866 700 867 701 static void dwc3_debugfs_create_endpoint_files(struct dwc3_ep *dep, ··· 910 742 if (!dwc->regset) 911 743 return; 912 744 745 + dwc->dbg_lsp_select = DWC3_LSP_MUX_UNSELECTED; 746 + 913 747 dwc->regset->regs = dwc3_regs; 914 748 dwc->regset->nregs = ARRAY_SIZE(dwc3_regs); 915 749 dwc->regset->base = dwc->regs - DWC3_GLOBALS_REGS_START; ··· 920 750 dwc->root = root; 921 751 922 752 debugfs_create_regset32("regdump", S_IRUGO, root, dwc->regset); 753 + 754 + debugfs_create_file("lsp_dump", S_IRUGO | S_IWUSR, root, dwc, 755 + &dwc3_lsp_fops); 923 756 924 757 if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)) { 925 758 debugfs_create_file("mode", S_IRUGO | S_IWUSR, root, dwc,
+13 -2
drivers/usb/dwc3/drd.c
··· 10 10 #include <linux/extcon.h> 11 11 #include <linux/of_graph.h> 12 12 #include <linux/platform_device.h> 13 + #include <linux/property.h> 13 14 14 15 #include "debug.h" 15 16 #include "core.h" ··· 446 445 struct device *dev = dwc->dev; 447 446 struct device_node *np_phy, *np_conn; 448 447 struct extcon_dev *edev; 448 + const char *name; 449 449 450 - if (of_property_read_bool(dev->of_node, "extcon")) 451 - return extcon_get_edev_by_phandle(dwc->dev, 0); 450 + if (device_property_read_bool(dev, "extcon")) 451 + return extcon_get_edev_by_phandle(dev, 0); 452 + 453 + /* 454 + * Device tree platforms should get extcon via phandle. 455 + * On ACPI platforms, we get the name from a device property. 456 + * This device property is for kernel internal use only and 457 + * is expected to be set by the glue code. 458 + */ 459 + if (device_property_read_string(dev, "linux,extcon-name", &name) == 0) 460 + return extcon_get_extcon_dev(name); 452 461 453 462 np_phy = of_parse_phandle(dev->of_node, "phys", 0); 454 463 np_conn = of_graph_get_remote_node(np_phy, -1, -1);
+4 -4
drivers/usb/dwc3/dwc3-pci.c
··· 170 170 * put the gpio descriptors again here because the phy driver 171 171 * might want to grab them, too. 172 172 */ 173 - gpio = devm_gpiod_get_optional(&pdev->dev, "cs", 174 - GPIOD_OUT_LOW); 173 + gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW); 175 174 if (IS_ERR(gpio)) 176 175 return PTR_ERR(gpio); 177 176 178 177 gpiod_set_value_cansleep(gpio, 1); 178 + gpiod_put(gpio); 179 179 180 - gpio = devm_gpiod_get_optional(&pdev->dev, "reset", 181 - GPIOD_OUT_LOW); 180 + gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW); 182 181 if (IS_ERR(gpio)) 183 182 return PTR_ERR(gpio); 184 183 185 184 if (gpio) { 186 185 gpiod_set_value_cansleep(gpio, 1); 186 + gpiod_put(gpio); 187 187 usleep_range(10000, 11000); 188 188 } 189 189 }
+224 -122
drivers/usb/dwc3/gadget.c
··· 27 27 #include "gadget.h" 28 28 #include "io.h" 29 29 30 - #define DWC3_ALIGN_FRAME(d) (((d)->frame_number + (d)->interval) \ 30 + #define DWC3_ALIGN_FRAME(d, n) (((d)->frame_number + ((d)->interval * (n))) \ 31 31 & ~((d)->interval - 1)) 32 32 33 33 /** ··· 647 647 reg |= DWC3_DALEPENA_EP(dep->number); 648 648 dwc3_writel(dwc->regs, DWC3_DALEPENA, reg); 649 649 650 - init_waitqueue_head(&dep->wait_end_transfer); 651 - 652 650 if (usb_endpoint_xfer_control(desc)) 653 651 goto out; 654 652 ··· 670 672 * Issue StartTransfer here with no-op TRB so we can always rely on No 671 673 * Response Update Transfer command. 672 674 */ 673 - if (usb_endpoint_xfer_bulk(desc) || 675 + if ((usb_endpoint_xfer_bulk(desc) && !dep->stream_capable) || 674 676 usb_endpoint_xfer_int(desc)) { 675 677 struct dwc3_gadget_ep_cmd_params params; 676 678 struct dwc3_trb *trb; ··· 917 919 struct usb_gadget *gadget = &dwc->gadget; 918 920 enum usb_device_speed speed = gadget->speed; 919 921 920 - dwc3_ep_inc_enq(dep); 921 - 922 922 trb->size = DWC3_TRB_SIZE_LENGTH(length); 923 923 trb->bpl = lower_32_bits(dma); 924 924 trb->bph = upper_32_bits(dma); ··· 986 990 usb_endpoint_type(dep->endpoint.desc)); 987 991 } 988 992 989 - /* always enable Continue on Short Packet */ 993 + /* 994 + * Enable Continue on Short Packet 995 + * when endpoint is not a stream capable 996 + */ 990 997 if (usb_endpoint_dir_out(dep->endpoint.desc)) { 991 - trb->ctrl |= DWC3_TRB_CTRL_CSP; 998 + if (!dep->stream_capable) 999 + trb->ctrl |= DWC3_TRB_CTRL_CSP; 992 1000 993 1001 if (short_not_ok) 994 1002 trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI; 995 1003 } 996 1004 997 1005 if ((!no_interrupt && !chain) || 998 - (dwc3_calc_trbs_left(dep) == 0)) 1006 + (dwc3_calc_trbs_left(dep) == 1)) 999 1007 trb->ctrl |= DWC3_TRB_CTRL_IOC; 1000 1008 1001 1009 if (chain) ··· 1009 1009 trb->ctrl |= DWC3_TRB_CTRL_SID_SOFN(stream_id); 1010 1010 1011 1011 trb->ctrl |= DWC3_TRB_CTRL_HWO; 1012 + 1013 + dwc3_ep_inc_enq(dep); 1012 1014 1013 1015 trace_dwc3_prepare_trb(dep, trb); 1014 1016 } ··· 1048 1046 req->trb_dma = dwc3_trb_dma_offset(dep, trb); 1049 1047 } 1050 1048 1049 + req->num_trbs++; 1050 + 1051 1051 __dwc3_prepare_one_trb(dep, trb, dma, length, chain, node, 1052 1052 stream_id, short_not_ok, no_interrupt); 1053 1053 } ··· 1077 1073 struct dwc3 *dwc = dep->dwc; 1078 1074 struct dwc3_trb *trb; 1079 1075 1080 - req->unaligned = true; 1076 + req->needs_extra_trb = true; 1081 1077 1082 1078 /* prepare normal TRB */ 1083 1079 dwc3_prepare_one_trb(dep, req, true, i); 1084 1080 1085 1081 /* Now prepare one extra TRB to align transfer size */ 1086 1082 trb = &dep->trb_pool[dep->trb_enqueue]; 1083 + req->num_trbs++; 1087 1084 __dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr, 1088 1085 maxp - rem, false, 1, 1089 1086 req->request.stream_id, ··· 1122 1117 struct dwc3 *dwc = dep->dwc; 1123 1118 struct dwc3_trb *trb; 1124 1119 1125 - req->unaligned = true; 1120 + req->needs_extra_trb = true; 1126 1121 1127 1122 /* prepare normal TRB */ 1128 1123 dwc3_prepare_one_trb(dep, req, true, 0); 1129 1124 1130 1125 /* Now prepare one extra TRB to align transfer size */ 1131 1126 trb = &dep->trb_pool[dep->trb_enqueue]; 1127 + req->num_trbs++; 1132 1128 __dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr, maxp - rem, 1133 1129 false, 1, req->request.stream_id, 1134 1130 req->request.short_not_ok, ··· 1139 1133 struct dwc3 *dwc = dep->dwc; 1140 1134 struct dwc3_trb *trb; 1141 1135 1142 - req->zero = true; 1136 + req->needs_extra_trb = true; 1143 1137 1144 1138 /* prepare normal TRB */ 1145 1139 dwc3_prepare_one_trb(dep, req, true, 0); 1146 1140 1147 1141 /* Now prepare one extra TRB to handle ZLP */ 1148 1142 trb = &dep->trb_pool[dep->trb_enqueue]; 1143 + req->num_trbs++; 1149 1144 __dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr, 0, 1150 1145 false, 1, req->request.stream_id, 1151 1146 req->request.short_not_ok, ··· 1239 1232 params.param1 = lower_32_bits(req->trb_dma); 1240 1233 cmd = DWC3_DEPCMD_STARTTRANSFER; 1241 1234 1235 + if (dep->stream_capable) 1236 + cmd |= DWC3_DEPCMD_PARAM(req->request.stream_id); 1237 + 1242 1238 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) 1243 1239 cmd |= DWC3_DEPCMD_PARAM(dep->frame_number); 1244 1240 } else { ··· 1273 1263 return DWC3_DSTS_SOFFN(reg); 1274 1264 } 1275 1265 1276 - static void __dwc3_gadget_start_isoc(struct dwc3_ep *dep) 1266 + /** 1267 + * dwc3_gadget_start_isoc_quirk - workaround invalid frame number 1268 + * @dep: isoc endpoint 1269 + * 1270 + * This function tests for the correct combination of BIT[15:14] from the 16-bit 1271 + * microframe number reported by the XferNotReady event for the future frame 1272 + * number to start the isoc transfer. 1273 + * 1274 + * In DWC_usb31 version 1.70a-ea06 and prior, for highspeed and fullspeed 1275 + * isochronous IN, BIT[15:14] of the 16-bit microframe number reported by the 1276 + * XferNotReady event are invalid. The driver uses this number to schedule the 1277 + * isochronous transfer and passes it to the START TRANSFER command. Because 1278 + * this number is invalid, the command may fail. If BIT[15:14] matches the 1279 + * internal 16-bit microframe, the START TRANSFER command will pass and the 1280 + * transfer will start at the scheduled time, if it is off by 1, the command 1281 + * will still pass, but the transfer will start 2 seconds in the future. For all 1282 + * other conditions, the START TRANSFER command will fail with bus-expiry. 1283 + * 1284 + * In order to workaround this issue, we can test for the correct combination of 1285 + * BIT[15:14] by sending START TRANSFER commands with different values of 1286 + * BIT[15:14]: 'b00, 'b01, 'b10, and 'b11. Each combination is 2^14 uframe apart 1287 + * (or 2 seconds). 4 seconds into the future will result in a bus-expiry status. 1288 + * As the result, within the 4 possible combinations for BIT[15:14], there will 1289 + * be 2 successful and 2 failure START COMMAND status. One of the 2 successful 1290 + * command status will result in a 2-second delay start. The smaller BIT[15:14] 1291 + * value is the correct combination. 1292 + * 1293 + * Since there are only 4 outcomes and the results are ordered, we can simply 1294 + * test 2 START TRANSFER commands with BIT[15:14] combinations 'b00 and 'b01 to 1295 + * deduce the smaller successful combination. 1296 + * 1297 + * Let test0 = test status for combination 'b00 and test1 = test status for 'b01 1298 + * of BIT[15:14]. The correct combination is as follow: 1299 + * 1300 + * if test0 fails and test1 passes, BIT[15:14] is 'b01 1301 + * if test0 fails and test1 fails, BIT[15:14] is 'b10 1302 + * if test0 passes and test1 fails, BIT[15:14] is 'b11 1303 + * if test0 passes and test1 passes, BIT[15:14] is 'b00 1304 + * 1305 + * Synopsys STAR 9001202023: Wrong microframe number for isochronous IN 1306 + * endpoints. 1307 + */ 1308 + static int dwc3_gadget_start_isoc_quirk(struct dwc3_ep *dep) 1277 1309 { 1278 - if (list_empty(&dep->pending_list)) { 1279 - dev_info(dep->dwc->dev, "%s: ran out of requests\n", 1280 - dep->name); 1281 - dep->flags |= DWC3_EP_PENDING_REQUEST; 1282 - return; 1310 + int cmd_status = 0; 1311 + bool test0; 1312 + bool test1; 1313 + 1314 + while (dep->combo_num < 2) { 1315 + struct dwc3_gadget_ep_cmd_params params; 1316 + u32 test_frame_number; 1317 + u32 cmd; 1318 + 1319 + /* 1320 + * Check if we can start isoc transfer on the next interval or 1321 + * 4 uframes in the future with BIT[15:14] as dep->combo_num 1322 + */ 1323 + test_frame_number = dep->frame_number & 0x3fff; 1324 + test_frame_number |= dep->combo_num << 14; 1325 + test_frame_number += max_t(u32, 4, dep->interval); 1326 + 1327 + params.param0 = upper_32_bits(dep->dwc->bounce_addr); 1328 + params.param1 = lower_32_bits(dep->dwc->bounce_addr); 1329 + 1330 + cmd = DWC3_DEPCMD_STARTTRANSFER; 1331 + cmd |= DWC3_DEPCMD_PARAM(test_frame_number); 1332 + cmd_status = dwc3_send_gadget_ep_cmd(dep, cmd, &params); 1333 + 1334 + /* Redo if some other failure beside bus-expiry is received */ 1335 + if (cmd_status && cmd_status != -EAGAIN) { 1336 + dep->start_cmd_status = 0; 1337 + dep->combo_num = 0; 1338 + return 0; 1339 + } 1340 + 1341 + /* Store the first test status */ 1342 + if (dep->combo_num == 0) 1343 + dep->start_cmd_status = cmd_status; 1344 + 1345 + dep->combo_num++; 1346 + 1347 + /* 1348 + * End the transfer if the START_TRANSFER command is successful 1349 + * to wait for the next XferNotReady to test the command again 1350 + */ 1351 + if (cmd_status == 0) { 1352 + dwc3_stop_active_transfer(dep, true); 1353 + return 0; 1354 + } 1283 1355 } 1284 1356 1285 - dep->frame_number = DWC3_ALIGN_FRAME(dep); 1286 - __dwc3_gadget_kick_transfer(dep); 1357 + /* test0 and test1 are both completed at this point */ 1358 + test0 = (dep->start_cmd_status == 0); 1359 + test1 = (cmd_status == 0); 1360 + 1361 + if (!test0 && test1) 1362 + dep->combo_num = 1; 1363 + else if (!test0 && !test1) 1364 + dep->combo_num = 2; 1365 + else if (test0 && !test1) 1366 + dep->combo_num = 3; 1367 + else if (test0 && test1) 1368 + dep->combo_num = 0; 1369 + 1370 + dep->frame_number &= 0x3fff; 1371 + dep->frame_number |= dep->combo_num << 14; 1372 + dep->frame_number += max_t(u32, 4, dep->interval); 1373 + 1374 + /* Reinitialize test variables */ 1375 + dep->start_cmd_status = 0; 1376 + dep->combo_num = 0; 1377 + 1378 + return __dwc3_gadget_kick_transfer(dep); 1379 + } 1380 + 1381 + static int __dwc3_gadget_start_isoc(struct dwc3_ep *dep) 1382 + { 1383 + struct dwc3 *dwc = dep->dwc; 1384 + int ret; 1385 + int i; 1386 + 1387 + if (list_empty(&dep->pending_list)) { 1388 + dep->flags |= DWC3_EP_PENDING_REQUEST; 1389 + return -EAGAIN; 1390 + } 1391 + 1392 + if (!dwc->dis_start_transfer_quirk && dwc3_is_usb31(dwc) && 1393 + (dwc->revision <= DWC3_USB31_REVISION_160A || 1394 + (dwc->revision == DWC3_USB31_REVISION_170A && 1395 + dwc->version_type >= DWC31_VERSIONTYPE_EA01 && 1396 + dwc->version_type <= DWC31_VERSIONTYPE_EA06))) { 1397 + 1398 + if (dwc->gadget.speed <= USB_SPEED_HIGH && dep->direction) 1399 + return dwc3_gadget_start_isoc_quirk(dep); 1400 + } 1401 + 1402 + for (i = 0; i < DWC3_ISOC_MAX_RETRIES; i++) { 1403 + dep->frame_number = DWC3_ALIGN_FRAME(dep, i + 1); 1404 + 1405 + ret = __dwc3_gadget_kick_transfer(dep); 1406 + if (ret != -EAGAIN) 1407 + break; 1408 + } 1409 + 1410 + return ret; 1287 1411 } 1288 1412 1289 1413 static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req) ··· 1458 1314 1459 1315 if ((dep->flags & DWC3_EP_PENDING_REQUEST)) { 1460 1316 if (!(dep->flags & DWC3_EP_TRANSFER_STARTED)) { 1461 - __dwc3_gadget_start_isoc(dep); 1462 - return 0; 1317 + return __dwc3_gadget_start_isoc(dep); 1463 1318 } 1464 1319 } 1465 1320 } ··· 1482 1339 spin_unlock_irqrestore(&dwc->lock, flags); 1483 1340 1484 1341 return ret; 1342 + } 1343 + 1344 + static void dwc3_gadget_ep_skip_trbs(struct dwc3_ep *dep, struct dwc3_request *req) 1345 + { 1346 + int i; 1347 + 1348 + /* 1349 + * If request was already started, this means we had to 1350 + * stop the transfer. With that we also need to ignore 1351 + * all TRBs used by the request, however TRBs can only 1352 + * be modified after completion of END_TRANSFER 1353 + * command. So what we do here is that we wait for 1354 + * END_TRANSFER completion and only after that, we jump 1355 + * over TRBs by clearing HWO and incrementing dequeue 1356 + * pointer. 1357 + */ 1358 + for (i = 0; i < req->num_trbs; i++) { 1359 + struct dwc3_trb *trb; 1360 + 1361 + trb = req->trb + i; 1362 + trb->ctrl &= ~DWC3_TRB_CTRL_HWO; 1363 + dwc3_ep_inc_deq(dep); 1364 + } 1365 + } 1366 + 1367 + static void dwc3_gadget_ep_cleanup_cancelled_requests(struct dwc3_ep *dep) 1368 + { 1369 + struct dwc3_request *req; 1370 + struct dwc3_request *tmp; 1371 + 1372 + list_for_each_entry_safe(req, tmp, &dep->cancelled_list, list) { 1373 + dwc3_gadget_ep_skip_trbs(dep, req); 1374 + dwc3_gadget_giveback(dep, req, -ECONNRESET); 1375 + } 1485 1376 } 1486 1377 1487 1378 static int dwc3_gadget_ep_dequeue(struct usb_ep *ep, ··· 1548 1371 /* wait until it is processed */ 1549 1372 dwc3_stop_active_transfer(dep, true); 1550 1373 1551 - /* 1552 - * If request was already started, this means we had to 1553 - * stop the transfer. With that we also need to ignore 1554 - * all TRBs used by the request, however TRBs can only 1555 - * be modified after completion of END_TRANSFER 1556 - * command. So what we do here is that we wait for 1557 - * END_TRANSFER completion and only after that, we jump 1558 - * over TRBs by clearing HWO and incrementing dequeue 1559 - * pointer. 1560 - * 1561 - * Note that we have 2 possible types of transfers here: 1562 - * 1563 - * i) Linear buffer request 1564 - * ii) SG-list based request 1565 - * 1566 - * SG-list based requests will have r->num_pending_sgs 1567 - * set to a valid number (> 0). Linear requests, 1568 - * normally use a single TRB. 1569 - * 1570 - * For each of these two cases, if r->unaligned flag is 1571 - * set, one extra TRB has been used to align transfer 1572 - * size to wMaxPacketSize. 1573 - * 1574 - * All of these cases need to be taken into 1575 - * consideration so we don't mess up our TRB ring 1576 - * pointers. 1577 - */ 1578 - wait_event_lock_irq(dep->wait_end_transfer, 1579 - !(dep->flags & DWC3_EP_END_TRANSFER_PENDING), 1580 - dwc->lock); 1581 - 1582 1374 if (!r->trb) 1583 1375 goto out0; 1584 1376 1585 - if (r->num_pending_sgs) { 1586 - struct dwc3_trb *trb; 1587 - int i = 0; 1588 - 1589 - for (i = 0; i < r->num_pending_sgs; i++) { 1590 - trb = r->trb + i; 1591 - trb->ctrl &= ~DWC3_TRB_CTRL_HWO; 1592 - dwc3_ep_inc_deq(dep); 1593 - } 1594 - 1595 - if (r->unaligned || r->zero) { 1596 - trb = r->trb + r->num_pending_sgs + 1; 1597 - trb->ctrl &= ~DWC3_TRB_CTRL_HWO; 1598 - dwc3_ep_inc_deq(dep); 1599 - } 1600 - } else { 1601 - struct dwc3_trb *trb = r->trb; 1602 - 1603 - trb->ctrl &= ~DWC3_TRB_CTRL_HWO; 1604 - dwc3_ep_inc_deq(dep); 1605 - 1606 - if (r->unaligned || r->zero) { 1607 - trb = r->trb + 1; 1608 - trb->ctrl &= ~DWC3_TRB_CTRL_HWO; 1609 - dwc3_ep_inc_deq(dep); 1610 - } 1611 - } 1612 - goto out1; 1377 + dwc3_gadget_move_cancelled_request(req); 1378 + goto out0; 1613 1379 } 1614 1380 dev_err(dwc->dev, "request %pK was not queued to %s\n", 1615 1381 request, ep->name); 1616 1382 ret = -EINVAL; 1617 1383 goto out0; 1618 1384 } 1619 - 1620 - out1: 1621 - /* giveback the request */ 1622 1385 1623 1386 dwc3_gadget_giveback(dep, req, -ECONNRESET); 1624 1387 ··· 2051 1934 { 2052 1935 struct dwc3 *dwc = gadget_to_dwc(g); 2053 1936 unsigned long flags; 2054 - int epnum; 2055 - u32 tmo_eps = 0; 2056 1937 2057 1938 spin_lock_irqsave(&dwc->lock, flags); 2058 1939 ··· 2058 1943 goto out; 2059 1944 2060 1945 __dwc3_gadget_stop(dwc); 2061 - 2062 - for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) { 2063 - struct dwc3_ep *dep = dwc->eps[epnum]; 2064 - int ret; 2065 - 2066 - if (!dep) 2067 - continue; 2068 - 2069 - if (!(dep->flags & DWC3_EP_END_TRANSFER_PENDING)) 2070 - continue; 2071 - 2072 - ret = wait_event_interruptible_lock_irq_timeout(dep->wait_end_transfer, 2073 - !(dep->flags & DWC3_EP_END_TRANSFER_PENDING), 2074 - dwc->lock, msecs_to_jiffies(5)); 2075 - 2076 - if (ret <= 0) { 2077 - /* Timed out or interrupted! There's nothing much 2078 - * we can do so we just log here and print which 2079 - * endpoints timed out at the end. 2080 - */ 2081 - tmo_eps |= 1 << epnum; 2082 - dep->flags &= DWC3_EP_END_TRANSFER_PENDING; 2083 - } 2084 - } 2085 - 2086 - if (tmo_eps) { 2087 - dev_err(dwc->dev, 2088 - "end transfer timed out on endpoints 0x%x [bitmap]\n", 2089 - tmo_eps); 2090 - } 2091 1946 2092 1947 out: 2093 1948 dwc->gadget_driver = NULL; ··· 2233 2148 dep->direction = direction; 2234 2149 dep->regs = dwc->regs + DWC3_DEP_BASE(epnum); 2235 2150 dwc->eps[epnum] = dep; 2151 + dep->combo_num = 0; 2152 + dep->start_cmd_status = 0; 2236 2153 2237 2154 snprintf(dep->name, sizeof(dep->name), "ep%u%s", num, 2238 2155 direction ? "in" : "out"); ··· 2263 2176 2264 2177 INIT_LIST_HEAD(&dep->pending_list); 2265 2178 INIT_LIST_HEAD(&dep->started_list); 2179 + INIT_LIST_HEAD(&dep->cancelled_list); 2266 2180 2267 2181 return 0; 2268 2182 } ··· 2323 2235 dwc3_ep_inc_deq(dep); 2324 2236 2325 2237 trace_dwc3_complete_trb(dep, trb); 2238 + req->num_trbs--; 2326 2239 2327 2240 /* 2328 2241 * If we're in the middle of series of chained TRBs and we ··· 2339 2250 trb->ctrl &= ~DWC3_TRB_CTRL_HWO; 2340 2251 2341 2252 /* 2253 + * For isochronous transfers, the first TRB in a service interval must 2254 + * have the Isoc-First type. Track and report its interval frame number. 2255 + */ 2256 + if (usb_endpoint_xfer_isoc(dep->endpoint.desc) && 2257 + (trb->ctrl & DWC3_TRBCTL_ISOCHRONOUS_FIRST)) { 2258 + unsigned int frame_number; 2259 + 2260 + frame_number = DWC3_TRB_CTRL_GET_SID_SOFN(trb->ctrl); 2261 + frame_number &= ~(dep->interval - 1); 2262 + req->request.frame_number = frame_number; 2263 + } 2264 + 2265 + /* 2342 2266 * If we're dealing with unaligned size OUT transfer, we will be left 2343 2267 * with one TRB pending in the ring. We need to manually clear HWO bit 2344 2268 * from that TRB. 2345 2269 */ 2346 - if ((req->zero || req->unaligned) && !(trb->ctrl & DWC3_TRB_CTRL_CHN)) { 2270 + 2271 + if (req->needs_extra_trb && !(trb->ctrl & DWC3_TRB_CTRL_CHN)) { 2347 2272 trb->ctrl &= ~DWC3_TRB_CTRL_HWO; 2348 2273 return 1; 2349 2274 } ··· 2434 2331 ret = dwc3_gadget_ep_reclaim_trb_linear(dep, req, event, 2435 2332 status); 2436 2333 2437 - if (req->unaligned || req->zero) { 2334 + if (req->needs_extra_trb) { 2438 2335 ret = dwc3_gadget_ep_reclaim_trb_linear(dep, req, event, 2439 2336 status); 2440 - req->unaligned = false; 2441 - req->zero = false; 2337 + req->needs_extra_trb = false; 2442 2338 } 2443 2339 2444 2340 req->request.actual = req->request.length - req->remaining; ··· 2532 2430 const struct dwc3_event_depevt *event) 2533 2431 { 2534 2432 dwc3_gadget_endpoint_frame_from_event(dep, event); 2535 - __dwc3_gadget_start_isoc(dep); 2433 + (void) __dwc3_gadget_start_isoc(dep); 2536 2434 } 2537 2435 2538 2436 static void dwc3_endpoint_interrupt(struct dwc3 *dwc, ··· 2570 2468 2571 2469 if (cmd == DWC3_DEPCMD_ENDTRANSFER) { 2572 2470 dep->flags &= ~DWC3_EP_END_TRANSFER_PENDING; 2573 - wake_up(&dep->wait_end_transfer); 2471 + dwc3_gadget_ep_cleanup_cancelled_requests(dep); 2574 2472 } 2575 2473 break; 2576 2474 case DWC3_DEPEVT_STREAMEVT:
+15
drivers/usb/dwc3/gadget.h
··· 79 79 list_move_tail(&req->list, &dep->started_list); 80 80 } 81 81 82 + /** 83 + * dwc3_gadget_move_cancelled_request - move @req to the cancelled_list 84 + * @req: the request to be moved 85 + * 86 + * Caller should take care of locking. This function will move @req from its 87 + * current list to the endpoint's cancelled_list. 88 + */ 89 + static inline void dwc3_gadget_move_cancelled_request(struct dwc3_request *req) 90 + { 91 + struct dwc3_ep *dep = req->dep; 92 + 93 + req->started = false; 94 + list_move_tail(&req->list, &dep->cancelled_list); 95 + } 96 + 82 97 void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, 83 98 int status); 84 99
+4 -1
drivers/usb/dwc3/host.c
··· 46 46 47 47 int dwc3_host_init(struct dwc3 *dwc) 48 48 { 49 - struct property_entry props[3]; 49 + struct property_entry props[4]; 50 50 struct platform_device *xhci; 51 51 int ret, irq; 52 52 struct resource *res; ··· 92 92 93 93 if (dwc->usb3_lpm_capable) 94 94 props[prop_idx++].name = "usb3-lpm-capable"; 95 + 96 + if (dwc->usb2_lpm_disable) 97 + props[prop_idx++].name = "usb2-lpm-disable"; 95 98 96 99 /** 97 100 * WORKAROUND: dwc3 revisions <=3.00a have a limitation
+3 -1
drivers/usb/dwc3/trace.h
··· 199 199 __entry->param2 = params->param2; 200 200 __entry->cmd_status = cmd_status; 201 201 ), 202 - TP_printk("%s: cmd '%s' [%d] params %08x %08x %08x --> status: %s", 202 + TP_printk("%s: cmd '%s' [%x] params %08x %08x %08x --> status: %s", 203 203 __get_str(name), dwc3_gadget_ep_cmd_string(__entry->cmd), 204 204 __entry->cmd, __entry->param0, 205 205 __entry->param1, __entry->param2, ··· 251 251 s = "2x "; 252 252 break; 253 253 case 3: 254 + default: 254 255 s = "3x "; 255 256 break; 256 257 } 258 + break; 257 259 default: 258 260 s = ""; 259 261 } s; }),
+108 -14
drivers/usb/gadget/function/f_fs.c
··· 18 18 #include <linux/pagemap.h> 19 19 #include <linux/export.h> 20 20 #include <linux/hid.h> 21 + #include <linux/mm.h> 21 22 #include <linux/module.h> 23 + #include <linux/scatterlist.h> 22 24 #include <linux/sched/signal.h> 23 25 #include <linux/uio.h> 26 + #include <linux/vmalloc.h> 24 27 #include <asm/unaligned.h> 25 28 29 + #include <linux/usb/ccid.h> 26 30 #include <linux/usb/composite.h> 27 31 #include <linux/usb/functionfs.h> 28 32 ··· 222 218 223 219 struct usb_ep *ep; 224 220 struct usb_request *req; 221 + struct sg_table sgt; 222 + bool use_sg; 225 223 226 224 struct ffs_data *ffs; 227 225 }; ··· 755 749 return ret; 756 750 } 757 751 752 + /* 753 + * allocate a virtually contiguous buffer and create a scatterlist describing it 754 + * @sg_table - pointer to a place to be filled with sg_table contents 755 + * @size - required buffer size 756 + */ 757 + static void *ffs_build_sg_list(struct sg_table *sgt, size_t sz) 758 + { 759 + struct page **pages; 760 + void *vaddr, *ptr; 761 + unsigned int n_pages; 762 + int i; 763 + 764 + vaddr = vmalloc(sz); 765 + if (!vaddr) 766 + return NULL; 767 + 768 + n_pages = PAGE_ALIGN(sz) >> PAGE_SHIFT; 769 + pages = kvmalloc_array(n_pages, sizeof(struct page *), GFP_KERNEL); 770 + if (!pages) { 771 + vfree(vaddr); 772 + 773 + return NULL; 774 + } 775 + for (i = 0, ptr = vaddr; i < n_pages; ++i, ptr += PAGE_SIZE) 776 + pages[i] = vmalloc_to_page(ptr); 777 + 778 + if (sg_alloc_table_from_pages(sgt, pages, n_pages, 0, sz, GFP_KERNEL)) { 779 + kvfree(pages); 780 + vfree(vaddr); 781 + 782 + return NULL; 783 + } 784 + kvfree(pages); 785 + 786 + return vaddr; 787 + } 788 + 789 + static inline void *ffs_alloc_buffer(struct ffs_io_data *io_data, 790 + size_t data_len) 791 + { 792 + if (io_data->use_sg) 793 + return ffs_build_sg_list(&io_data->sgt, data_len); 794 + 795 + return kmalloc(data_len, GFP_KERNEL); 796 + } 797 + 798 + static inline void ffs_free_buffer(struct ffs_io_data *io_data) 799 + { 800 + if (!io_data->buf) 801 + return; 802 + 803 + if (io_data->use_sg) { 804 + sg_free_table(&io_data->sgt); 805 + vfree(io_data->buf); 806 + } else { 807 + kfree(io_data->buf); 808 + } 809 + } 810 + 758 811 static void ffs_user_copy_worker(struct work_struct *work) 759 812 { 760 813 struct ffs_io_data *io_data = container_of(work, struct ffs_io_data, ··· 841 776 842 777 if (io_data->read) 843 778 kfree(io_data->to_free); 844 - kfree(io_data->buf); 779 + ffs_free_buffer(io_data); 845 780 kfree(io_data); 846 781 } 847 782 ··· 997 932 * earlier 998 933 */ 999 934 gadget = epfile->ffs->gadget; 935 + io_data->use_sg = gadget->sg_supported && data_len > PAGE_SIZE; 1000 936 1001 937 spin_lock_irq(&epfile->ffs->eps_lock); 1002 938 /* In the meantime, endpoint got disabled or changed. */ ··· 1014 948 data_len = usb_ep_align_maybe(gadget, ep->ep, data_len); 1015 949 spin_unlock_irq(&epfile->ffs->eps_lock); 1016 950 1017 - data = kmalloc(data_len, GFP_KERNEL); 951 + data = ffs_alloc_buffer(io_data, data_len); 1018 952 if (unlikely(!data)) { 1019 953 ret = -ENOMEM; 1020 954 goto error_mutex; ··· 1054 988 bool interrupted = false; 1055 989 1056 990 req = ep->req; 1057 - req->buf = data; 1058 - req->length = data_len; 991 + if (io_data->use_sg) { 992 + req->buf = NULL; 993 + req->sg = io_data->sgt.sgl; 994 + req->num_sgs = io_data->sgt.nents; 995 + } else { 996 + req->buf = data; 997 + } 998 + req->length = data_len; 999 + 1000 + io_data->buf = data; 1059 1001 1060 1002 req->context = &done; 1061 1003 req->complete = ffs_epfile_io_complete; ··· 1096 1022 } else if (!(req = usb_ep_alloc_request(ep->ep, GFP_ATOMIC))) { 1097 1023 ret = -ENOMEM; 1098 1024 } else { 1099 - req->buf = data; 1100 - req->length = data_len; 1025 + if (io_data->use_sg) { 1026 + req->buf = NULL; 1027 + req->sg = io_data->sgt.sgl; 1028 + req->num_sgs = io_data->sgt.nents; 1029 + } else { 1030 + req->buf = data; 1031 + } 1032 + req->length = data_len; 1101 1033 1102 1034 io_data->buf = data; 1103 1035 io_data->ep = ep->ep; ··· 1132 1052 error_mutex: 1133 1053 mutex_unlock(&epfile->mutex); 1134 1054 error: 1135 - kfree(data); 1055 + ffs_free_buffer(io_data); 1136 1056 return ret; 1137 1057 } 1138 1058 ··· 2006 1926 2007 1927 static int __must_check ffs_do_single_desc(char *data, unsigned len, 2008 1928 ffs_entity_callback entity, 2009 - void *priv) 1929 + void *priv, int *current_class) 2010 1930 { 2011 1931 struct usb_descriptor_header *_ds = (void *)data; 2012 1932 u8 length; ··· 2064 1984 __entity(INTERFACE, ds->bInterfaceNumber); 2065 1985 if (ds->iInterface) 2066 1986 __entity(STRING, ds->iInterface); 1987 + *current_class = ds->bInterfaceClass; 2067 1988 } 2068 1989 break; 2069 1990 ··· 2078 1997 } 2079 1998 break; 2080 1999 2081 - case HID_DT_HID: 2082 - pr_vdebug("hid descriptor\n"); 2083 - if (length != sizeof(struct hid_descriptor)) 2084 - goto inv_length; 2085 - break; 2000 + case USB_TYPE_CLASS | 0x01: 2001 + if (*current_class == USB_INTERFACE_CLASS_HID) { 2002 + pr_vdebug("hid descriptor\n"); 2003 + if (length != sizeof(struct hid_descriptor)) 2004 + goto inv_length; 2005 + break; 2006 + } else if (*current_class == USB_INTERFACE_CLASS_CCID) { 2007 + pr_vdebug("ccid descriptor\n"); 2008 + if (length != sizeof(struct ccid_descriptor)) 2009 + goto inv_length; 2010 + break; 2011 + } else { 2012 + pr_vdebug("unknown descriptor: %d for class %d\n", 2013 + _ds->bDescriptorType, *current_class); 2014 + return -EINVAL; 2015 + } 2086 2016 2087 2017 case USB_DT_OTG: 2088 2018 if (length != sizeof(struct usb_otg_descriptor)) ··· 2150 2058 { 2151 2059 const unsigned _len = len; 2152 2060 unsigned long num = 0; 2061 + int current_class = -1; 2153 2062 2154 2063 ENTER(); 2155 2064 ··· 2171 2078 if (!data) 2172 2079 return _len - len; 2173 2080 2174 - ret = ffs_do_single_desc(data, len, entity, priv); 2081 + ret = ffs_do_single_desc(data, len, entity, priv, 2082 + &current_class); 2175 2083 if (unlikely(ret < 0)) { 2176 2084 pr_debug("%s returns %d\n", __func__, ret); 2177 2085 return ret;
+1 -1
drivers/usb/gadget/function/uvc_queue.c
··· 102 102 spin_unlock_irqrestore(&queue->irqlock, flags); 103 103 } 104 104 105 - static struct vb2_ops uvc_queue_qops = { 105 + static const struct vb2_ops uvc_queue_qops = { 106 106 .queue_setup = uvc_queue_setup, 107 107 .buf_prepare = uvc_buffer_prepare, 108 108 .buf_queue = uvc_buffer_queue,
+1 -1
drivers/usb/gadget/udc/aspeed-vhub/dev.c
··· 438 438 return 0; 439 439 } 440 440 441 - static struct usb_gadget_ops ast_vhub_udc_ops = { 441 + static const struct usb_gadget_ops ast_vhub_udc_ops = { 442 442 .get_frame = ast_vhub_udc_get_frame, 443 443 .wakeup = ast_vhub_udc_wakeup, 444 444 .pullup = ast_vhub_udc_pullup,
+10 -5
drivers/usb/gadget/udc/renesas_usb3.c
··· 358 358 bool extcon_host; /* check id and set EXTCON_USB_HOST */ 359 359 bool extcon_usb; /* check vbus and set EXTCON_USB */ 360 360 bool forced_b_device; 361 + bool start_to_connect; 361 362 }; 362 363 363 364 #define gadget_to_renesas_usb3(_gadget) \ ··· 477 476 static void usb3_init_epc_registers(struct renesas_usb3 *usb3) 478 477 { 479 478 usb3_write(usb3, ~0, USB3_USB_INT_STA_1); 480 - usb3_enable_irq_1(usb3, USB_INT_1_VBUS_CNG); 479 + if (!usb3->workaround_for_vbus) 480 + usb3_enable_irq_1(usb3, USB_INT_1_VBUS_CNG); 481 481 } 482 482 483 483 static bool usb3_wakeup_usb2_phy(struct renesas_usb3 *usb3) ··· 702 700 usb3_set_mode_by_role_sw(usb3, host); 703 701 usb3_vbus_out(usb3, a_dev); 704 702 /* for A-Peripheral or forced B-device mode */ 705 - if ((!host && a_dev) || 706 - (usb3->workaround_for_vbus && usb3->forced_b_device)) 703 + if ((!host && a_dev) || usb3->start_to_connect) 707 704 usb3_connect(usb3); 708 705 spin_unlock_irqrestore(&usb3->lock, flags); 709 706 } ··· 2433 2432 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 2434 2433 return -EFAULT; 2435 2434 2436 - if (!strncmp(buf, "1", 1)) 2435 + usb3->start_to_connect = false; 2436 + if (usb3->workaround_for_vbus && usb3->forced_b_device && 2437 + !strncmp(buf, "2", 1)) 2438 + usb3->start_to_connect = true; 2439 + else if (!strncmp(buf, "1", 1)) 2437 2440 usb3->forced_b_device = true; 2438 2441 else 2439 2442 usb3->forced_b_device = false; ··· 2445 2440 if (usb3->workaround_for_vbus) 2446 2441 usb3_disconnect(usb3); 2447 2442 2448 - /* Let this driver call usb3_connect() anyway */ 2443 + /* Let this driver call usb3_connect() if needed */ 2449 2444 usb3_check_id(usb3); 2450 2445 2451 2446 return count;
+2 -15
drivers/usb/gadget/udc/s3c2410_udc.c
··· 119 119 } 120 120 #endif 121 121 122 - static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p) 122 + static int s3c2410_udc_debugfs_show(struct seq_file *m, void *p) 123 123 { 124 124 u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg; 125 125 u32 ep_int_en_reg, usb_int_en_reg, ep0_csr; ··· 168 168 169 169 return 0; 170 170 } 171 - 172 - static int s3c2410_udc_debugfs_fops_open(struct inode *inode, 173 - struct file *file) 174 - { 175 - return single_open(file, s3c2410_udc_debugfs_seq_show, NULL); 176 - } 177 - 178 - static const struct file_operations s3c2410_udc_debugfs_fops = { 179 - .open = s3c2410_udc_debugfs_fops_open, 180 - .read = seq_read, 181 - .llseek = seq_lseek, 182 - .release = single_release, 183 - .owner = THIS_MODULE, 184 - }; 171 + DEFINE_SHOW_ATTRIBUTE(s3c2410_udc_debugfs); 185 172 186 173 /* io macros */ 187 174
+1 -1
drivers/usb/mtu3/mtu3_qmu.c
··· 402 402 return; 403 403 } 404 404 405 - dev_dbg(mtu->dev, "%s send ZLP for req=%p\n", __func__, mreq); 405 + dev_dbg(mtu->dev, "%s send ZLP for req=%p\n", __func__, req); 406 406 407 407 mtu3_clrbits(mbase, MU3D_EP_TXCR0(mep->epnum), TX_DMAREQEN); 408 408
+1 -18
drivers/usb/renesas_usbhs/common.c
··· 874 874 return 0; 875 875 } 876 876 877 - static int usbhsc_runtime_nop(struct device *dev) 878 - { 879 - /* Runtime PM callback shared between ->runtime_suspend() 880 - * and ->runtime_resume(). Simply returns success. 881 - * 882 - * This driver re-initializes all registers after 883 - * pm_runtime_get_sync() anyway so there is no need 884 - * to save and restore registers here. 885 - */ 886 - return 0; 887 - } 888 - 889 - static const struct dev_pm_ops usbhsc_pm_ops = { 890 - .suspend = usbhsc_suspend, 891 - .resume = usbhsc_resume, 892 - .runtime_suspend = usbhsc_runtime_nop, 893 - .runtime_resume = usbhsc_runtime_nop, 894 - }; 877 + static SIMPLE_DEV_PM_OPS(usbhsc_pm_ops, usbhsc_suspend, usbhsc_resume); 895 878 896 879 static struct platform_driver renesas_usbhs_driver = { 897 880 .driver = {
+51
include/linux/usb/ccid.h
··· 1 + /* 2 + * Copyright (c) 2018 Vincent Pelletier 3 + */ 4 + /* 5 + * This program is free software; you can redistribute it and/or modify 6 + * it under the terms of the GNU General Public License as published by 7 + * the Free Software Foundation; either version 2 of the License, or 8 + * (at your option) any later version. 9 + * 10 + * This program is distributed in the hope that it will be useful, 11 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 + * GNU General Public License for more details. 14 + * 15 + * You should have received a copy of the GNU General Public License 16 + * along with this program; if not, write to the Free Software 17 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 + */ 19 + #ifndef __CCID_H 20 + #define __CCID_H 21 + 22 + #include <linux/types.h> 23 + 24 + #define USB_INTERFACE_CLASS_CCID 0x0b 25 + 26 + struct ccid_descriptor { 27 + __u8 bLength; 28 + __u8 bDescriptorType; 29 + __le16 bcdCCID; 30 + __u8 bMaxSlotIndex; 31 + __u8 bVoltageSupport; 32 + __le32 dwProtocols; 33 + __le32 dwDefaultClock; 34 + __le32 dwMaximumClock; 35 + __u8 bNumClockSupported; 36 + __le32 dwDataRate; 37 + __le32 dwMaxDataRate; 38 + __u8 bNumDataRatesSupported; 39 + __le32 dwMaxIFSD; 40 + __le32 dwSynchProtocols; 41 + __le32 dwMechanical; 42 + __le32 dwFeatures; 43 + __le32 dwMaxCCIDMessageLength; 44 + __u8 bClassGetResponse; 45 + __u8 bClassEnvelope; 46 + __le16 wLcdLayout; 47 + __u8 bPINSupport; 48 + __u8 bMaxCCIDBusySlots; 49 + } __attribute__ ((packed)); 50 + 51 + #endif /* __CCID_H */
+4
include/linux/usb/gadget.h
··· 61 61 * invalidated by the error may first be dequeued. 62 62 * @context: For use by the completion callback 63 63 * @list: For use by the gadget driver. 64 + * @frame_number: Reports the interval number in (micro)frame in which the 65 + * isochronous transfer was transmitted or received. 64 66 * @status: Reports completion code, zero or a negative errno. 65 67 * Normally, faults block the transfer queue from advancing until 66 68 * the completion callback returns. ··· 113 111 struct usb_request *req); 114 112 void *context; 115 113 struct list_head list; 114 + 115 + unsigned frame_number; /* ISO ONLY */ 116 116 117 117 int status; 118 118 unsigned actual;