clk: amlogic: axg-audio: revert reset implementation

The audio subsystem of axg based platform is not probing anymore.
This is due to the introduction of RESET_MESON_AUX and the config
not being enabled with the default arm64 defconfig.

This brought another discussion around proper decoupling between
the clock and reset part. While this discussion gets sorted out,
revert back to the initial implementation.

This reverts
* commit 681ed497d676 ("clk: amlogic: axg-audio: fix Kconfig dependency on RESET_MESON_AUX")
* commit 664988eb47dd ("clk: amlogic: axg-audio: use the auxiliary reset driver")

Both are reverted with single change to avoid creating more compilation
problems.

Fixes: 681ed497d676 ("clk: amlogic: axg-audio: fix Kconfig dependency on RESET_MESON_AUX")
Cc: Arnd Bergmann <arnd@arndb.de>
Reported-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20241128-clk-audio-fix-rst-missing-v2-1-cf437d1a73da@baylibre.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

Jerome Brunet and committed by

Stephen Boyd 2 years ago 5ae1a434 06fec99d

+101 -10

2 changed files

expand all

drivers

clk

meson

Kconfig

axg-audio.c

+1 -1

drivers/clk/meson/Kconfig

··· 106 106 select COMMON_CLK_MESON_SCLK_DIV 107 107 select COMMON_CLK_MESON_CLKC_UTILS 108 108 select REGMAP_MMIO 109 - depends on RESET_MESON_AUX 109 + select RESET_CONTROLLER 110 110 help 111 111 Support for the audio clock controller on AmLogic A113D devices, 112 112 aka axg, Say Y if you want audio subsystem to work.

+100 -9

drivers/clk/meson/axg-audio.c

··· 15 15 #include <linux/reset-controller.h> 16 16 #include <linux/slab.h> 17 17 18 - #include <soc/amlogic/reset-meson-aux.h> 19 - 20 18 #include "meson-clkc-utils.h" 21 19 #include "axg-audio.h" 22 20 #include "clk-regmap.h" ··· 1678 1680 &sm1_earcrx_dmac_clk, 1679 1681 }; 1680 1682 1683 + struct axg_audio_reset_data { 1684 + struct reset_controller_dev rstc; 1685 + struct regmap *map; 1686 + unsigned int offset; 1687 + }; 1688 + 1689 + static void axg_audio_reset_reg_and_bit(struct axg_audio_reset_data *rst, 1690 + unsigned long id, 1691 + unsigned int *reg, 1692 + unsigned int *bit) 1693 + { 1694 + unsigned int stride = regmap_get_reg_stride(rst->map); 1695 + 1696 + *reg = (id / (stride * BITS_PER_BYTE)) * stride; 1697 + *reg += rst->offset; 1698 + *bit = id % (stride * BITS_PER_BYTE); 1699 + } 1700 + 1701 + static int axg_audio_reset_update(struct reset_controller_dev *rcdev, 1702 + unsigned long id, bool assert) 1703 + { 1704 + struct axg_audio_reset_data *rst = 1705 + container_of(rcdev, struct axg_audio_reset_data, rstc); 1706 + unsigned int offset, bit; 1707 + 1708 + axg_audio_reset_reg_and_bit(rst, id, &offset, &bit); 1709 + 1710 + regmap_update_bits(rst->map, offset, BIT(bit), 1711 + assert ? BIT(bit) : 0); 1712 + 1713 + return 0; 1714 + } 1715 + 1716 + static int axg_audio_reset_status(struct reset_controller_dev *rcdev, 1717 + unsigned long id) 1718 + { 1719 + struct axg_audio_reset_data *rst = 1720 + container_of(rcdev, struct axg_audio_reset_data, rstc); 1721 + unsigned int val, offset, bit; 1722 + 1723 + axg_audio_reset_reg_and_bit(rst, id, &offset, &bit); 1724 + 1725 + regmap_read(rst->map, offset, &val); 1726 + 1727 + return !!(val & BIT(bit)); 1728 + } 1729 + 1730 + static int axg_audio_reset_assert(struct reset_controller_dev *rcdev, 1731 + unsigned long id) 1732 + { 1733 + return axg_audio_reset_update(rcdev, id, true); 1734 + } 1735 + 1736 + static int axg_audio_reset_deassert(struct reset_controller_dev *rcdev, 1737 + unsigned long id) 1738 + { 1739 + return axg_audio_reset_update(rcdev, id, false); 1740 + } 1741 + 1742 + static int axg_audio_reset_toggle(struct reset_controller_dev *rcdev, 1743 + unsigned long id) 1744 + { 1745 + int ret; 1746 + 1747 + ret = axg_audio_reset_assert(rcdev, id); 1748 + if (ret) 1749 + return ret; 1750 + 1751 + return axg_audio_reset_deassert(rcdev, id); 1752 + } 1753 + 1754 + static const struct reset_control_ops axg_audio_rstc_ops = { 1755 + .assert = axg_audio_reset_assert, 1756 + .deassert = axg_audio_reset_deassert, 1757 + .reset = axg_audio_reset_toggle, 1758 + .status = axg_audio_reset_status, 1759 + }; 1760 + 1681 1761 static struct regmap_config axg_audio_regmap_cfg = { 1682 1762 .reg_bits = 32, 1683 1763 .val_bits = 32, ··· 1766 1690 struct clk_regmap *const *regmap_clks; 1767 1691 unsigned int regmap_clk_num; 1768 1692 struct meson_clk_hw_data hw_clks; 1693 + unsigned int reset_offset; 1694 + unsigned int reset_num; 1769 1695 unsigned int max_register; 1770 - const char *rst_drvname; 1771 1696 }; 1772 1697 1773 1698 static int axg_audio_clkc_probe(struct platform_device *pdev) 1774 1699 { 1775 1700 struct device *dev = &pdev->dev; 1776 1701 const struct audioclk_data *data; 1702 + struct axg_audio_reset_data *rst; 1777 1703 struct regmap *map; 1778 1704 void __iomem *regs; 1779 1705 struct clk_hw *hw; ··· 1834 1756 if (ret) 1835 1757 return ret; 1836 1758 1837 - /* Register auxiliary reset driver when applicable */ 1838 - if (data->rst_drvname) 1839 - ret = devm_meson_rst_aux_register(dev, map, data->rst_drvname); 1759 + /* Stop here if there is no reset */ 1760 + if (!data->reset_num) 1761 + return 0; 1840 1762 1841 - return ret; 1763 + rst = devm_kzalloc(dev, sizeof(*rst), GFP_KERNEL); 1764 + if (!rst) 1765 + return -ENOMEM; 1766 + 1767 + rst->map = map; 1768 + rst->offset = data->reset_offset; 1769 + rst->rstc.nr_resets = data->reset_num; 1770 + rst->rstc.ops = &axg_audio_rstc_ops; 1771 + rst->rstc.of_node = dev->of_node; 1772 + rst->rstc.owner = THIS_MODULE; 1773 + 1774 + return devm_reset_controller_register(dev, &rst->rstc); 1842 1775 } 1843 1776 1844 1777 static const struct audioclk_data axg_audioclk_data = { ··· 1869 1780 .hws = g12a_audio_hw_clks, 1870 1781 .num = ARRAY_SIZE(g12a_audio_hw_clks), 1871 1782 }, 1783 + .reset_offset = AUDIO_SW_RESET, 1784 + .reset_num = 26, 1872 1785 .max_register = AUDIO_CLK_SPDIFOUT_B_CTRL, 1873 - .rst_drvname = "rst-g12a", 1874 1786 }; 1875 1787 1876 1788 static const struct audioclk_data sm1_audioclk_data = { ··· 1881 1791 .hws = sm1_audio_hw_clks, 1882 1792 .num = ARRAY_SIZE(sm1_audio_hw_clks), 1883 1793 }, 1794 + .reset_offset = AUDIO_SM1_SW_RESET0, 1795 + .reset_num = 39, 1884 1796 .max_register = AUDIO_EARCRX_DMAC_CLK_CTRL, 1885 - .rst_drvname = "rst-sm1", 1886 1797 }; 1887 1798 1888 1799 static const struct of_device_id clkc_match_table[] = {

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