Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amd/swsmu: enable Pstates profile levels for SMU v14.0.4
Enables following UMD stable Pstates profile levels
of power_dpm_force_performance_level for SMU v14.0.4.
- profile_peak
- profile_min_mclk
- profile_min_sclk
- profile_standard
Signed-off-by: Li Ma <li.ma@amd.com>
Reviewed-by: Tim Huang <tim.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Li Ma
and committed by
Alex Deucher
5ae8fb97
2fdc99b9
+15
-3
+15
-3
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c
+15
-3
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c
···
69
69
#define SMU_14_0_0_UMD_PSTATE_SOCCLK 678
70
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#define SMU_14_0_0_UMD_PSTATE_FCLK 1800
71
71
72
+
#define SMU_14_0_4_UMD_PSTATE_GFXCLK 938
73
+
#define SMU_14_0_4_UMD_PSTATE_SOCCLK 938
74
+
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#define FEATURE_MASK(feature) (1ULL << feature)
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#define SMC_DPM_FEATURE ( \
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FEATURE_MASK(FEATURE_CCLK_DPM_BIT) | \
···
1299
1296
switch (clk_type) {
1300
1297
case SMU_GFXCLK:
1301
1298
case SMU_SCLK:
1302
-
clk_limit = SMU_14_0_0_UMD_PSTATE_GFXCLK;
1299
+
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 4))
1300
+
clk_limit = SMU_14_0_4_UMD_PSTATE_GFXCLK;
1301
+
else
1302
+
clk_limit = SMU_14_0_0_UMD_PSTATE_GFXCLK;
1303
1303
if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)
1304
1304
smu_v14_0_common_get_dpm_ultimate_freq(smu, SMU_SCLK, NULL, &clk_limit);
1305
1305
else if (level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK)
1306
1306
smu_v14_0_common_get_dpm_ultimate_freq(smu, SMU_SCLK, &clk_limit, NULL);
1307
1307
break;
1308
1308
case SMU_SOCCLK:
1309
-
clk_limit = SMU_14_0_0_UMD_PSTATE_SOCCLK;
1309
+
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 4))
1310
+
clk_limit = SMU_14_0_4_UMD_PSTATE_SOCCLK;
1311
+
else
1312
+
clk_limit = SMU_14_0_0_UMD_PSTATE_SOCCLK;
1310
1313
if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)
1311
1314
smu_v14_0_common_get_dpm_ultimate_freq(smu, SMU_SOCCLK, NULL, &clk_limit);
1312
1315
break;
1313
1316
case SMU_FCLK:
1314
-
clk_limit = SMU_14_0_0_UMD_PSTATE_FCLK;
1317
+
if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(14, 0, 4))
1318
+
smu_v14_0_common_get_dpm_ultimate_freq(smu, SMU_FCLK, NULL, &clk_limit);
1319
+
else
1320
+
clk_limit = SMU_14_0_0_UMD_PSTATE_FCLK;
1315
1321
if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)
1316
1322
smu_v14_0_common_get_dpm_ultimate_freq(smu, SMU_FCLK, NULL, &clk_limit);
1317
1323
else if (level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK)