Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
clocksource/drivers/vf-pit: Consolidate calls to pit_*_disable/enable
The difference between the pit_clocksource_enable() and
pit_clocksource_disable() is only setting the TIF flag for the
clockevent. Let's group them and pass the TIF flag parameter to the
function so we save some lines of code. But as the base address is
different regarding if it is a clocksource or a clockevent, we pass
the base address in parameter instead of the struct pit_timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20250804152344.1109310-17-daniel.lezcano@linaro.org
+13
-21
+13
-21
drivers/clocksource/timer-vf-pit.c
+13
-21
drivers/clocksource/timer-vf-pit.c
···
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writel(PITMCR_MDIS, PITMCR(base));
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}
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-
static inline void pit_timer_enable(struct pit_timer *pit)
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+
static inline void pit_timer_enable(void __iomem *base, bool tie)
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{
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-
writel(PITTCTRL_TEN | PITTCTRL_TIE, PITTCTRL(pit->clkevt_base));
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+
u32 val = PITTCTRL_TEN | (tie ? PITTCTRL_TIE : 0);
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+
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+
writel(val, PITTCTRL(base));
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}
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-
static inline void pit_timer_disable(struct pit_timer *pit)
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+
static inline void pit_timer_disable(void __iomem *base)
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{
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-
writel(0, PITTCTRL(pit->clkevt_base));
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+
writel(0, PITTCTRL(base));
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}
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static inline void pit_timer_set_counter(void __iomem *base, unsigned int cnt)
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{
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writel(cnt, PITLDVAL(base));
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-
}
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-
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-
static inline void pit_clocksource_enable(struct pit_timer *pit)
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-
{
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-
writel(PITTCTRL_TEN, PITTCTRL(pit->clksrc_base));
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-
}
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-
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-
static inline void pit_clocksource_disable(struct pit_timer *pit)
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-
{
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-
pit_timer_disable(pit);
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}
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static inline void pit_irq_acknowledge(struct pit_timer *pit)
···
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pit->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
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/* set the max load value and start the clock source counter */
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-
pit_clocksource_disable(pit);
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+
pit_timer_disable(pit->clksrc_base);
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pit_timer_set_counter(pit->clksrc_base, ~0);
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-
pit_clocksource_enable(pit);
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+
pit_timer_enable(pit->clksrc_base, 0);
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sched_clock_base = pit->clksrc_base + PITCVAL_OFFSET;
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sched_clock_register(pit_read_sched_clock, 32, rate);
···
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* and the PITLAVAL should be set to delta minus one according to pit
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* hardware requirement.
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*/
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-
pit_timer_disable(pit);
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+
pit_timer_disable(pit->clkevt_base);
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pit_timer_set_counter(pit->clkevt_base, delta - 1);
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-
pit_timer_enable(pit);
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+
pit_timer_enable(pit->clkevt_base, true);
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return 0;
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}
···
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{
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struct pit_timer *pit = ced_to_pit(ced);
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-
pit_timer_disable(pit);
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+
pit_timer_disable(pit->clkevt_base);
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return 0;
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}
···
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* to stop the counter loop in ONESHOT mode.
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*/
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if (likely(clockevent_state_oneshot(ced)))
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-
pit_timer_disable(pit);
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+
pit_timer_disable(pit->clkevt_base);
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ced->event_handler(ced);
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···
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pit->clkevt_base = base + PIT_CH(3);
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pit->cycle_per_jiffy = rate / (HZ);
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-
pit_timer_disable(pit);
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+
pit_timer_disable(pit->clkevt_base);
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pit_irq_acknowledge(pit);
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