tjh.dev / kernel
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drm/i915/vrr: Implement vblank evasion with DC balancing

Add vblank evasion logic when vrr is already enabled along with
dc balance is computed.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20251223104542.2688548-14-mitulkumar.ajitkumar.golani@intel.com

authored by

Ville Syrjälä and committed by
Ankit Nautiyal 5bb6250c 5e32a46f

+53 -4
+30 -1
drivers/gpu/drm/i915/display/intel_dsb.c
··· 704 704 if (crtc_state->has_psr) 705 705 intel_dsb_emit_wait_dsl(dsb, DSB_OPCODE_WAIT_DSL_OUT, 0, 0); 706 706 707 - if (pre_commit_is_vrr_active(state, crtc)) { 707 + if (pre_commit_is_vrr_active(state, crtc) && crtc_state->vrr.dc_balance.enable) { 708 + int vblank_delay = crtc_state->set_context_latency; 709 + int vmin_vblank_start, vmax_vblank_start; 710 + 711 + vmin_vblank_start = intel_vrr_dcb_vmin_vblank_start_next(crtc_state); 712 + 713 + if (vmin_vblank_start >= 0) { 714 + end = vmin_vblank_start; 715 + start = end - vblank_delay - latency; 716 + intel_dsb_wait_scanline_out(state, dsb, start, end); 717 + } 718 + 719 + vmax_vblank_start = intel_vrr_dcb_vmax_vblank_start_next(crtc_state); 720 + 721 + if (vmax_vblank_start >= 0) { 722 + end = vmax_vblank_start; 723 + start = end - vblank_delay - latency; 724 + intel_dsb_wait_scanline_out(state, dsb, start, end); 725 + } 726 + 727 + vmin_vblank_start = intel_vrr_dcb_vmin_vblank_start_final(crtc_state); 728 + end = vmin_vblank_start; 729 + start = end - vblank_delay - latency; 730 + intel_dsb_wait_scanline_out(state, dsb, start, end); 731 + 732 + vmax_vblank_start = intel_vrr_dcb_vmax_vblank_start_final(crtc_state); 733 + end = vmax_vblank_start; 734 + start = end - vblank_delay - latency; 735 + intel_dsb_wait_scanline_out(state, dsb, start, end); 736 + } else if (pre_commit_is_vrr_active(state, crtc)) { 708 737 int vblank_delay = crtc_state->set_context_latency; 709 738 710 739 end = intel_vrr_vmin_vblank_start(crtc_state);
+23 -3
drivers/gpu/drm/i915/display/intel_vblank.c
··· 653 653 654 654 static int vrr_vblank_start(const struct intel_crtc_state *crtc_state) 655 655 { 656 - if (intel_vrr_is_push_sent(crtc_state)) 657 - return intel_vrr_vmin_vblank_start(crtc_state); 656 + bool is_push_sent = intel_vrr_is_push_sent(crtc_state); 657 + int vblank_start; 658 + 659 + if (!crtc_state->vrr.dc_balance.enable) { 660 + if (is_push_sent) 661 + return intel_vrr_vmin_vblank_start(crtc_state); 662 + else 663 + return intel_vrr_vmax_vblank_start(crtc_state); 664 + } 665 + 666 + if (is_push_sent) 667 + vblank_start = intel_vrr_dcb_vmin_vblank_start_next(crtc_state); 658 668 else 659 - return intel_vrr_vmax_vblank_start(crtc_state); 669 + vblank_start = intel_vrr_dcb_vmax_vblank_start_next(crtc_state); 670 + 671 + if (vblank_start >= 0) 672 + return vblank_start; 673 + 674 + if (is_push_sent) 675 + vblank_start = intel_vrr_dcb_vmin_vblank_start_final(crtc_state); 676 + else 677 + vblank_start = intel_vrr_dcb_vmax_vblank_start_final(crtc_state); 678 + 679 + return vblank_start; 660 680 } 661 681 662 682 void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state,