tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/amdgpu: add debugfs amdgpu_reset_level

Introduce amdgpu_reset_level debugfs in order to help debug and
test specific type of reset. Also helps blocking unwanted type of
resets.

By default, mode2 reset will not be enabled

v2: make this debugfs in adev and use debugfs_create_u32

Signed-off-by: Victor Zhao <Victor.Zhao@amd.com>
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Victor Zhao and committed by
Alex Deucher 5bd8d53f dac6b808

+18
+5
drivers/gpu/drm/amd/amdgpu/amdgpu.h
··· 274 274 #define AMDGPU_RESET_VCE (1 << 13) 275 275 #define AMDGPU_RESET_VCE1 (1 << 14) 276 276 277 + #define AMDGPU_RESET_LEVEL_SOFT_RECOVERY (1 << 0) 278 + #define AMDGPU_RESET_LEVEL_MODE2 (1 << 1) 279 + 277 280 /* max cursor sizes (in pixels) */ 278 281 #define CIK_CURSOR_WIDTH 128 279 282 #define CIK_CURSOR_HEIGHT 128 ··· 1063 1060 uint32_t scpm_status; 1064 1061 1065 1062 struct work_struct reset_work; 1063 + 1064 + uint32_t amdgpu_reset_level_mask; 1066 1065 }; 1067 1066 1068 1067 static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
··· 1786 1786 return PTR_ERR(ent); 1787 1787 } 1788 1788 1789 + debugfs_create_u32("amdgpu_reset_level", 0600, root, &adev->amdgpu_reset_level_mask); 1790 + 1789 1791 /* Register debugfs entries for amdgpu_ttm */ 1790 1792 amdgpu_ttm_debugfs_init(adev); 1791 1793 amdgpu_debugfs_pm_init(adev);
+8
drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c
··· 37 37 { 38 38 int ret = 0; 39 39 40 + adev->amdgpu_reset_level_mask = 0x1; 41 + 40 42 switch (adev->ip_versions[MP1_HWIP][0]) { 41 43 case IP_VERSION(13, 0, 2): 42 44 ret = aldebaran_reset_init(adev); ··· 76 74 { 77 75 struct amdgpu_reset_handler *reset_handler = NULL; 78 76 77 + if (!(adev->amdgpu_reset_level_mask & AMDGPU_RESET_LEVEL_MODE2)) 78 + return -ENOSYS; 79 + 79 80 if (test_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context->flags)) 80 81 return -ENOSYS; 81 82 ··· 97 92 { 98 93 int ret; 99 94 struct amdgpu_reset_handler *reset_handler = NULL; 95 + 96 + if (!(adev->amdgpu_reset_level_mask & AMDGPU_RESET_LEVEL_MODE2)) 97 + return -ENOSYS; 100 98 101 99 if (test_bit(AMDGPU_SKIP_MODE2_RESET, &reset_context->flags)) 102 100 return -ENOSYS;
+3
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
··· 405 405 { 406 406 ktime_t deadline = ktime_add_us(ktime_get(), 10000); 407 407 408 + if (!(ring->adev->amdgpu_reset_level_mask & AMDGPU_RESET_LEVEL_SOFT_RECOVERY)) 409 + return false; 410 + 408 411 if (amdgpu_sriov_vf(ring->adev) || !ring->funcs->soft_recovery || !fence) 409 412 return false; 410 413