Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
KVM: riscv: selftests: Add SBI FWFT to get-reg-list test
KVM RISC-V now supports SBI FWFT, so add it to the get-reg-list test.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20250823155947.1354229-7-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
authored by
Anup Patel
and committed by
Anup Patel
5c6d333a
48d67106
+32
+32
tools/testing/selftests/kvm/riscv/get-reg-list.c
+32
tools/testing/selftests/kvm/riscv/get-reg-list.c
···
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case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_DBCN:
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case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_SUSP:
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case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_STA:
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+
case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_FWFT:
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case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_EXPERIMENTAL:
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case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_VENDOR:
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return true;
···
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KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_DBCN),
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KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_SUSP),
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KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_STA),
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+
KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_FWFT),
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KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_EXPERIMENTAL),
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KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_VENDOR),
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};
···
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return strdup_printf("KVM_REG_RISCV_SBI_STA | %lld /* UNKNOWN */", reg_off);
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}
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+
static const char *sbi_fwft_id_to_str(__u64 reg_off)
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{
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switch (reg_off) {
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case 0: return "KVM_REG_RISCV_SBI_FWFT | KVM_REG_RISCV_SBI_FWFT_REG(misaligned_deleg.enable)";
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case 1: return "KVM_REG_RISCV_SBI_FWFT | KVM_REG_RISCV_SBI_FWFT_REG(misaligned_deleg.flags)";
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+
case 2: return "KVM_REG_RISCV_SBI_FWFT | KVM_REG_RISCV_SBI_FWFT_REG(misaligned_deleg.value)";
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+
case 3: return "KVM_REG_RISCV_SBI_FWFT | KVM_REG_RISCV_SBI_FWFT_REG(pointer_masking.enable)";
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+
case 4: return "KVM_REG_RISCV_SBI_FWFT | KVM_REG_RISCV_SBI_FWFT_REG(pointer_masking.flags)";
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+
case 5: return "KVM_REG_RISCV_SBI_FWFT | KVM_REG_RISCV_SBI_FWFT_REG(pointer_masking.value)";
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}
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return strdup_printf("KVM_REG_RISCV_SBI_FWFT | %lld /* UNKNOWN */", reg_off);
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}
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+
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static const char *sbi_id_to_str(const char *prefix, __u64 id)
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{
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__u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_SBI_STATE);
···
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switch (reg_subtype) {
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case KVM_REG_RISCV_SBI_STA:
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return sbi_sta_id_to_str(reg_off);
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+
case KVM_REG_RISCV_SBI_FWFT:
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return sbi_fwft_id_to_str(reg_off);
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}
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return strdup_printf("%lld | %lld /* UNKNOWN */", reg_subtype, reg_off);
···
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KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_STATE | KVM_REG_RISCV_SBI_STA | KVM_REG_RISCV_SBI_STA_REG(shmem_hi),
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};
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+
static __u64 sbi_fwft_regs[] = {
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KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_FWFT,
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+
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_STATE | KVM_REG_RISCV_SBI_FWFT | KVM_REG_RISCV_SBI_FWFT_REG(misaligned_deleg.enable),
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+
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_STATE | KVM_REG_RISCV_SBI_FWFT | KVM_REG_RISCV_SBI_FWFT_REG(misaligned_deleg.flags),
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+
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_STATE | KVM_REG_RISCV_SBI_FWFT | KVM_REG_RISCV_SBI_FWFT_REG(misaligned_deleg.value),
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+
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_STATE | KVM_REG_RISCV_SBI_FWFT | KVM_REG_RISCV_SBI_FWFT_REG(pointer_masking.enable),
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+
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_STATE | KVM_REG_RISCV_SBI_FWFT | KVM_REG_RISCV_SBI_FWFT_REG(pointer_masking.flags),
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+
KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_STATE | KVM_REG_RISCV_SBI_FWFT | KVM_REG_RISCV_SBI_FWFT_REG(pointer_masking.value),
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+
};
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+
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static __u64 zicbom_regs[] = {
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KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(zicbom_block_size),
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KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOM,
···
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#define SUBLIST_SBI_STA \
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{"sbi-sta", .feature_type = VCPU_FEATURE_SBI_EXT, .feature = KVM_RISCV_SBI_EXT_STA, \
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.regs = sbi_sta_regs, .regs_n = ARRAY_SIZE(sbi_sta_regs),}
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#define SUBLIST_SBI_FWFT \
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{"sbi-fwft", .feature_type = VCPU_FEATURE_SBI_EXT, .feature = KVM_RISCV_SBI_EXT_FWFT, \
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.regs = sbi_fwft_regs, .regs_n = ARRAY_SIZE(sbi_fwft_regs),}
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#define SUBLIST_ZICBOM \
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{"zicbom", .feature = KVM_RISCV_ISA_EXT_ZICBOM, .regs = zicbom_regs, .regs_n = ARRAY_SIZE(zicbom_regs),}
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#define SUBLIST_ZICBOP \
···
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KVM_SBI_EXT_SIMPLE_CONFIG(pmu, PMU);
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KVM_SBI_EXT_SIMPLE_CONFIG(dbcn, DBCN);
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KVM_SBI_EXT_SIMPLE_CONFIG(susp, SUSP);
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KVM_SBI_EXT_SUBLIST_CONFIG(fwft, FWFT);
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KVM_ISA_EXT_SUBLIST_CONFIG(aia, AIA);
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KVM_ISA_EXT_SUBLIST_CONFIG(fp_f, FP_F);
···
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&config_sbi_pmu,
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&config_sbi_dbcn,
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&config_sbi_susp,
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+
&config_sbi_fwft,
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&config_aia,
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&config_fp_f,
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&config_fp_d,