Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
coresight: etm4x: docs: Update ABI doc for new sysfs name scheme.
Recent updates to CoreSight drivers have changed the component naming
schema used in sysfs.
This updates the ABI document to reflect the new naming schema.
Signed-off-by: Mike Leach <mike.leach@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
authored by
Mike Leach
and committed by
Jonathan Corbet
5c8fac10
ff467342
+68
-68
+68
-68
Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
+68
-68
Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
···
1
-
What: /sys/bus/coresight/devices/<memory_map>.etm/enable_source
1
+
What: /sys/bus/coresight/devices/etm<N>/enable_source
2
2
Date: April 2015
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3
KernelVersion: 4.01
4
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
···
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of coresight components linking the source to the sink is
9
9
configured and managed automatically by the coresight framework.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/cpu
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+
What: /sys/bus/coresight/devices/etm<N>/cpu
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) The CPU this tracing entity is associated with.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/nr_pe_cmp
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+
What: /sys/bus/coresight/devices/etm<N>/nr_pe_cmp
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Indicates the number of PE comparator inputs that are
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available for tracing.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/nr_addr_cmp
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+
What: /sys/bus/coresight/devices/etm<N>/nr_addr_cmp
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Indicates the number of address comparator pairs that are
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available for tracing.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/nr_cntr
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+
What: /sys/bus/coresight/devices/etm<N>/nr_cntr
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Indicates the number of counters that are available for
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tracing.
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38
-
What: /sys/bus/coresight/devices/<memory_map>.etm/nr_ext_inp
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+
What: /sys/bus/coresight/devices/etm<N>/nr_ext_inp
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Indicates how many external inputs are implemented.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/numcidc
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+
What: /sys/bus/coresight/devices/etm<N>/numcidc
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Indicates the number of Context ID comparators that are
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available for tracing.
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51
-
What: /sys/bus/coresight/devices/<memory_map>.etm/numvmidc
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+
What: /sys/bus/coresight/devices/etm<N>/numvmidc
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Indicates the number of VMID comparators that are available
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for tracing.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/nrseqstate
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+
What: /sys/bus/coresight/devices/etm<N>/nrseqstate
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Indicates the number of sequencer states that are
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implemented.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/nr_resource
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+
What: /sys/bus/coresight/devices/etm<N>/nr_resource
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Indicates the number of resource selection pairs that are
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available for tracing.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/nr_ss_cmp
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+
What: /sys/bus/coresight/devices/etm<N>/nr_ss_cmp
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (R) Indicates the number of single-shot comparator controls that
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are available for tracing.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/reset
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+
What: /sys/bus/coresight/devices/etm<N>/reset
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (W) Cancels all configuration on a trace unit and set it back
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to its boot configuration.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/mode
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+
What: /sys/bus/coresight/devices/etm<N>/mode
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
···
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P0 instruction tracing, branch broadcast, cycle counting and
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context ID tracing.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/pe
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+
What: /sys/bus/coresight/devices/etm<N>/pe
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls which PE to trace.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/event
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+
What: /sys/bus/coresight/devices/etm<N>/event
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls the tracing of arbitrary events from bank 0 to 3.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/event_instren
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+
What: /sys/bus/coresight/devices/etm<N>/event_instren
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls the behavior of the events in bank 0 to 3.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/event_ts
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+
What: /sys/bus/coresight/devices/etm<N>/event_ts
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls the insertion of global timestamps in the trace
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streams.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/syncfreq
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+
What: /sys/bus/coresight/devices/etm<N>/syncfreq
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls how often trace synchronization requests occur.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/cyc_threshold
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+
What: /sys/bus/coresight/devices/etm<N>/cyc_threshold
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Sets the threshold value for cycle counting.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/bb_ctrl
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+
What: /sys/bus/coresight/devices/etm<N>/bb_ctrl
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls which regions in the memory map are enabled to
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use branch broadcasting.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/event_vinst
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+
What: /sys/bus/coresight/devices/etm<N>/event_vinst
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls instruction trace filtering.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/s_exlevel_vinst
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+
What: /sys/bus/coresight/devices/etm<N>/s_exlevel_vinst
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) In Secure state, each bit controls whether instruction
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tracing is enabled for the corresponding exception level.
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/ns_exlevel_vinst
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+
What: /sys/bus/coresight/devices/etm<N>/ns_exlevel_vinst
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) In non-secure state, each bit controls whether instruction
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tracing is enabled for the corresponding exception level.
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158
-
What: /sys/bus/coresight/devices/<memory_map>.etm/addr_idx
158
+
What: /sys/bus/coresight/devices/etm<N>/addr_idx
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Select which address comparator or pair (of comparators) to
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work with.
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165
-
What: /sys/bus/coresight/devices/<memory_map>.etm/addr_instdatatype
165
+
What: /sys/bus/coresight/devices/etm<N>/addr_instdatatype
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Controls what type of comparison the trace unit performs.
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171
-
What: /sys/bus/coresight/devices/<memory_map>.etm/addr_single
171
+
What: /sys/bus/coresight/devices/etm<N>/addr_single
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Used to setup single address comparator values.
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177
-
What: /sys/bus/coresight/devices/<memory_map>.etm/addr_range
177
+
What: /sys/bus/coresight/devices/etm<N>/addr_range
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Used to setup address range comparator values.
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183
-
What: /sys/bus/coresight/devices/<memory_map>.etm/seq_idx
183
+
What: /sys/bus/coresight/devices/etm<N>/seq_idx
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Date: April 2015
185
185
KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
187
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Description: (RW) Select which sequensor.
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189
-
What: /sys/bus/coresight/devices/<memory_map>.etm/seq_state
189
+
What: /sys/bus/coresight/devices/etm<N>/seq_state
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190
Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Use this to set, or read, the sequencer state.
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195
-
What: /sys/bus/coresight/devices/<memory_map>.etm/seq_event
195
+
What: /sys/bus/coresight/devices/etm<N>/seq_event
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196
Date: April 2015
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197
KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Moves the sequencer state to a specific state.
200
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201
-
What: /sys/bus/coresight/devices/<memory_map>.etm/seq_reset_event
201
+
What: /sys/bus/coresight/devices/etm<N>/seq_reset_event
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202
Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) Moves the sequencer to state 0 when a programmed event
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occurs.
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208
-
What: /sys/bus/coresight/devices/<memory_map>.etm/cntr_idx
208
+
What: /sys/bus/coresight/devices/etm<N>/cntr_idx
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
212
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Description: (RW) Select which counter unit to work with.
213
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214
-
What: /sys/bus/coresight/devices/<memory_map>.etm/cntrldvr
214
+
What: /sys/bus/coresight/devices/etm<N>/cntrldvr
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) This sets or returns the reload count value of the
219
219
specific counter.
220
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-
What: /sys/bus/coresight/devices/<memory_map>.etm/cntr_val
221
+
What: /sys/bus/coresight/devices/etm<N>/cntr_val
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Date: April 2015
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KernelVersion: 4.01
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Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
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Description: (RW) This sets or returns the current count value of the
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226
specific counter.
227
227
228
-
What: /sys/bus/coresight/devices/<memory_map>.etm/cntr_ctrl
228
+
What: /sys/bus/coresight/devices/etm<N>/cntr_ctrl
229
229
Date: April 2015
230
230
KernelVersion: 4.01
231
231
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
232
232
Description: (RW) Controls the operation of the selected counter.
233
233
234
-
What: /sys/bus/coresight/devices/<memory_map>.etm/res_idx
234
+
What: /sys/bus/coresight/devices/etm<N>/res_idx
235
235
Date: April 2015
236
236
KernelVersion: 4.01
237
237
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
238
238
Description: (RW) Select which resource selection unit to work with.
239
239
240
-
What: /sys/bus/coresight/devices/<memory_map>.etm/res_ctrl
240
+
What: /sys/bus/coresight/devices/etm<N>/res_ctrl
241
241
Date: April 2015
242
242
KernelVersion: 4.01
243
243
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
244
244
Description: (RW) Controls the selection of the resources in the trace unit.
245
245
246
-
What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_idx
246
+
What: /sys/bus/coresight/devices/etm<N>/ctxid_idx
247
247
Date: April 2015
248
248
KernelVersion: 4.01
249
249
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
250
250
Description: (RW) Select which context ID comparator to work with.
251
251
252
-
What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_pid
252
+
What: /sys/bus/coresight/devices/etm<N>/ctxid_pid
253
253
Date: April 2015
254
254
KernelVersion: 4.01
255
255
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
256
256
Description: (RW) Get/Set the context ID comparator value to trigger on.
257
257
258
-
What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_masks
258
+
What: /sys/bus/coresight/devices/etm<N>/ctxid_masks
259
259
Date: April 2015
260
260
KernelVersion: 4.01
261
261
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
262
262
Description: (RW) Mask for all 8 context ID comparator value
263
263
registers (if implemented).
264
264
265
-
What: /sys/bus/coresight/devices/<memory_map>.etm/vmid_idx
265
+
What: /sys/bus/coresight/devices/etm<N>/vmid_idx
266
266
Date: April 2015
267
267
KernelVersion: 4.01
268
268
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
269
269
Description: (RW) Select which virtual machine ID comparator to work with.
270
270
271
-
What: /sys/bus/coresight/devices/<memory_map>.etm/vmid_val
271
+
What: /sys/bus/coresight/devices/etm<N>/vmid_val
272
272
Date: April 2015
273
273
KernelVersion: 4.01
274
274
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
275
275
Description: (RW) Get/Set the virtual machine ID comparator value to
276
276
trigger on.
277
277
278
-
What: /sys/bus/coresight/devices/<memory_map>.etm/vmid_masks
278
+
What: /sys/bus/coresight/devices/etm<N>/vmid_masks
279
279
Date: April 2015
280
280
KernelVersion: 4.01
281
281
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
282
282
Description: (RW) Mask for all 8 virtual machine ID comparator value
283
283
registers (if implemented).
284
284
285
-
What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcoslsr
285
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcoslsr
286
286
Date: April 2015
287
287
KernelVersion: 4.01
288
288
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
289
289
Description: (R) Print the content of the OS Lock Status Register (0x304).
290
290
The value it taken directly from the HW.
291
291
292
-
What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpdcr
292
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpdcr
293
293
Date: April 2015
294
294
KernelVersion: 4.01
295
295
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
296
296
Description: (R) Print the content of the Power Down Control Register
297
297
(0x310). The value is taken directly from the HW.
298
298
299
-
What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpdsr
299
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpdsr
300
300
Date: April 2015
301
301
KernelVersion: 4.01
302
302
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
303
303
Description: (R) Print the content of the Power Down Status Register
304
304
(0x314). The value is taken directly from the HW.
305
305
306
-
What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trclsr
306
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trclsr
307
307
Date: April 2015
308
308
KernelVersion: 4.01
309
309
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
310
310
Description: (R) Print the content of the SW Lock Status Register
311
311
(0xFB4). The value is taken directly from the HW.
312
312
313
-
What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcauthstatus
313
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcauthstatus
314
314
Date: April 2015
315
315
KernelVersion: 4.01
316
316
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
317
317
Description: (R) Print the content of the Authentication Status Register
318
318
(0xFB8). The value is taken directly from the HW.
319
319
320
-
What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcdevid
320
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevid
321
321
Date: April 2015
322
322
KernelVersion: 4.01
323
323
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
324
324
Description: (R) Print the content of the Device ID Register
325
325
(0xFC8). The value is taken directly from the HW.
326
326
327
-
What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcdevtype
327
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevtype
328
328
Date: April 2015
329
329
KernelVersion: 4.01
330
330
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
331
331
Description: (R) Print the content of the Device Type Register
332
332
(0xFCC). The value is taken directly from the HW.
333
333
334
-
What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpidr0
334
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr0
335
335
Date: April 2015
336
336
KernelVersion: 4.01
337
337
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
338
338
Description: (R) Print the content of the Peripheral ID0 Register
339
339
(0xFE0). The value is taken directly from the HW.
340
340
341
-
What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpidr1
341
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr1
342
342
Date: April 2015
343
343
KernelVersion: 4.01
344
344
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
345
345
Description: (R) Print the content of the Peripheral ID1 Register
346
346
(0xFE4). The value is taken directly from the HW.
347
347
348
-
What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpidr2
348
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr2
349
349
Date: April 2015
350
350
KernelVersion: 4.01
351
351
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
352
352
Description: (R) Print the content of the Peripheral ID2 Register
353
353
(0xFE8). The value is taken directly from the HW.
354
354
355
-
What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcpidr3
355
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcpidr3
356
356
Date: April 2015
357
357
KernelVersion: 4.01
358
358
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
359
359
Description: (R) Print the content of the Peripheral ID3 Register
360
360
(0xFEC). The value is taken directly from the HW.
361
361
362
-
What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trcconfig
362
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcconfig
363
363
Date: February 2016
364
364
KernelVersion: 4.07
365
365
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
366
366
Description: (R) Print the content of the trace configuration register
367
367
(0x010) as currently set by SW.
368
368
369
-
What: /sys/bus/coresight/devices/<memory_map>.etm/mgmt/trctraceid
369
+
What: /sys/bus/coresight/devices/etm<N>/mgmt/trctraceid
370
370
Date: February 2016
371
371
KernelVersion: 4.07
372
372
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
373
373
Description: (R) Print the content of the trace ID register (0x040).
374
374
375
-
What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr0
375
+
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr0
376
376
Date: April 2015
377
377
KernelVersion: 4.01
378
378
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
379
379
Description: (R) Returns the tracing capabilities of the trace unit (0x1E0).
380
380
The value is taken directly from the HW.
381
381
382
-
What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr1
382
+
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr1
383
383
Date: April 2015
384
384
KernelVersion: 4.01
385
385
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
386
386
Description: (R) Returns the tracing capabilities of the trace unit (0x1E4).
387
387
The value is taken directly from the HW.
388
388
389
-
What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr2
389
+
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr2
390
390
Date: April 2015
391
391
KernelVersion: 4.01
392
392
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
···
394
394
VMID, context ID and instuction address in the trace unit
395
395
(0x1E8). The value is taken directly from the HW.
396
396
397
-
What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr3
397
+
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr3
398
398
Date: April 2015
399
399
KernelVersion: 4.01
400
400
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
···
403
403
architecture specification for more details (0x1E8).
404
404
The value is taken directly from the HW.
405
405
406
-
What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr4
406
+
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr4
407
407
Date: April 2015
408
408
KernelVersion: 4.01
409
409
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
410
410
Description: (R) Returns how many resources the trace unit supports (0x1F0).
411
411
The value is taken directly from the HW.
412
412
413
-
What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr5
413
+
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr5
414
414
Date: April 2015
415
415
KernelVersion: 4.01
416
416
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
417
417
Description: (R) Returns how many resources the trace unit supports (0x1F4).
418
418
The value is taken directly from the HW.
419
419
420
-
What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr8
420
+
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr8
421
421
Date: April 2015
422
422
KernelVersion: 4.01
423
423
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
424
424
Description: (R) Returns the maximum speculation depth of the instruction
425
425
trace stream. (0x180). The value is taken directly from the HW.
426
426
427
-
What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr9
427
+
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr9
428
428
Date: April 2015
429
429
KernelVersion: 4.01
430
430
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
431
431
Description: (R) Returns the number of P0 right-hand keys that the trace unit
432
432
can use (0x184). The value is taken directly from the HW.
433
433
434
-
What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr10
434
+
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr10
435
435
Date: April 2015
436
436
KernelVersion: 4.01
437
437
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
438
438
Description: (R) Returns the number of P1 right-hand keys that the trace unit
439
439
can use (0x188). The value is taken directly from the HW.
440
440
441
-
What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr11
441
+
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr11
442
442
Date: April 2015
443
443
KernelVersion: 4.01
444
444
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
···
446
446
trace unit can use (0x18C). The value is taken directly from
447
447
the HW.
448
448
449
-
What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr12
449
+
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr12
450
450
Date: April 2015
451
451
KernelVersion: 4.01
452
452
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
···
454
454
the trace unit can use (0x190). The value is taken directly
455
455
from the HW.
456
456
457
-
What: /sys/bus/coresight/devices/<memory_map>.etm/trcidr/trcidr13
457
+
What: /sys/bus/coresight/devices/etm<N>/trcidr/trcidr13
458
458
Date: April 2015
459
459
KernelVersion: 4.01
460
460
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>