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iommupt: Documentation fixes

Some adjustments pointed out by Randy:

"decodes an full 64-bit" -> "decodes the full 64 bit"

Correct the function parameter name for iova_to_phys()

Use the recommended section heading style.

Suggested-by: Randy Dunlap <rdunlap@infradead.org>
Fixes: ab0b572847ac ("genpt: Add Documentation/ files")
Fixes: 879ced2bab1b ("iommupt: Add the AMD IOMMU v1 page table format")
Fixes: 9d4c274cd7d5 ("iommupt: Add iova_to_phys op")
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
Tested-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>

authored by

Jason Gunthorpe and committed by
Joerg Roedel 5cb637d9 e4dfaf25

+5 -10
+3 -8
Documentation/driver-api/generic_pt.rst
··· 10 10 .. kernel-doc:: drivers/iommu/generic_pt/pt_defs.h 11 11 :doc: Generic Page Table Language 12 12 13 - ----- 14 13 Usage 15 - ----- 14 + ===== 16 15 17 16 Generic PT is structured as a multi-compilation system. Since each format 18 17 provides an API using a common set of names there can be only one format active ··· 60 61 The implementation will further wrap struct pt_common in its own top-level 61 62 struct, such as struct pt_iommu_amdv1. 62 63 63 - ---------------------------------------------- 64 64 Format functions at the struct pt_common level 65 65 ---------------------------------------------- 66 66 ··· 67 69 :identifiers: 68 70 .. kernel-doc:: drivers/iommu/generic_pt/pt_common.h 69 71 70 - ----------------- 71 72 Iteration Helpers 72 73 ----------------- 73 74 74 75 .. kernel-doc:: drivers/iommu/generic_pt/pt_iter.h 75 76 76 - ---------------- 77 77 Writing a Format 78 78 ---------------- 79 79 ··· 108 112 clearer failures to speed up finding the problems. Once those pass then the 109 113 entire kunit suite should be run. 110 114 111 - --------------------------- 112 115 IOMMU Invalidation Features 113 116 --------------------------- 114 117 ··· 119 124 to have changed items removed from the TLB. 120 125 121 126 PT_FEAT_FLUSH_RANGE 122 - ------------------- 127 + ~~~~~~~~~~~~~~~~~~~ 123 128 124 129 PT_FEAT_FLUSH_RANGE is the easiest scheme to understand. It tries to generate a 125 130 single range invalidation for each operation, over-invalidating if there are ··· 129 134 from the walk cache. The range can start/end at any page boundary. 130 135 131 136 PT_FEAT_FLUSH_RANGE_NO_GAPS 132 - --------------------------- 137 + ~~~~~~~~~~~~~~~~~~~~~~~~~~~ 133 138 134 139 PT_FEAT_FLUSH_RANGE_NO_GAPS is similar to PT_FEAT_FLUSH_RANGE; however, it tries 135 140 to minimize the amount of impacted VA by issuing extra flush operations. This is
+1 -1
drivers/iommu/generic_pt/Kconfig
··· 38 38 help 39 39 iommu_domain implementation for the AMD v1 page table. AMDv1 is the 40 40 "host" page table. It supports granular page sizes of almost every 41 - power of 2 and decodes an full 64-bit IOVA space. 41 + power of 2 and decodes the full 64-bit IOVA space. 42 42 43 43 Selected automatically by an IOMMU driver that uses this format. 44 44
+1 -1
drivers/iommu/generic_pt/iommu_pt.h
··· 158 158 159 159 /** 160 160 * iova_to_phys() - Return the output address for the given IOVA 161 - * @iommu_table: Table to query 161 + * @domain: Table to query 162 162 * @iova: IO virtual address to query 163 163 * 164 164 * Determine the output address from the given IOVA. @iova may have any