Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6
* 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6:
[PATCH] x86-64: increase PHB1 split transaction timeout
[PATCH] x86-64: Fix C3 timer test
+44
-2
+43
-1
arch/x86_64/kernel/pci-calgary.c
+43
-1
arch/x86_64/kernel/pci-calgary.c
···
52
52
#define ONE_BASED_CHASSIS_NUM 1
53
53
54
54
/* register offsets inside the host bridge space */
55
-
#define PHB_CSR_OFFSET 0x0110
55
+
#define CALGARY_CONFIG_REG 0x0108
56
+
#define PHB_CSR_OFFSET 0x0110 /* Channel Status */
56
57
#define PHB_PLSSR_OFFSET 0x0120
57
58
#define PHB_CONFIG_RW_OFFSET 0x0160
58
59
#define PHB_IOBASE_BAR_LOW 0x0170
···
84
83
#define TAR_VALID 0x0000000000000008UL
85
84
/* CSR (Channel/DMA Status Register) */
86
85
#define CSR_AGENT_MASK 0xffe0ffff
86
+
/* CCR (Calgary Configuration Register) */
87
+
#define CCR_2SEC_TIMEOUT 0x000000000000000EUL
87
88
88
89
#define MAX_NUM_OF_PHBS 8 /* how many PHBs in total? */
89
90
#define MAX_NUM_CHASSIS 8 /* max number of chassis */
···
735
732
}
736
733
}
737
734
735
+
static void __init calgary_increase_split_completion_timeout(void __iomem *bbar,
736
+
unsigned char busnum)
737
+
{
738
+
u64 val64;
739
+
void __iomem *target;
740
+
unsigned long phb_shift = -1;
741
+
u64 mask;
742
+
743
+
switch (busno_to_phbid(busnum)) {
744
+
case 0: phb_shift = (63 - 19);
745
+
break;
746
+
case 1: phb_shift = (63 - 23);
747
+
break;
748
+
case 2: phb_shift = (63 - 27);
749
+
break;
750
+
case 3: phb_shift = (63 - 35);
751
+
break;
752
+
default:
753
+
BUG_ON(busno_to_phbid(busnum));
754
+
}
755
+
756
+
target = calgary_reg(bbar, CALGARY_CONFIG_REG);
757
+
val64 = be64_to_cpu(readq(target));
758
+
759
+
/* zero out this PHB's timer bits */
760
+
mask = ~(0xFUL << phb_shift);
761
+
val64 &= mask;
762
+
val64 |= (CCR_2SEC_TIMEOUT << phb_shift);
763
+
writeq(cpu_to_be64(val64), target);
764
+
readq(target); /* flush */
765
+
}
766
+
738
767
static void __init calgary_enable_translation(struct pci_dev *dev)
739
768
{
740
769
u32 val32;
···
790
755
791
756
writel(cpu_to_be32(val32), target);
792
757
readl(target); /* flush */
758
+
759
+
/*
760
+
* Give split completion a longer timeout on bus 1 for aic94xx
761
+
* http://bugzilla.kernel.org/show_bug.cgi?id=7180
762
+
*/
763
+
if (busnum == 1)
764
+
calgary_increase_split_completion_timeout(bbar, busnum);
793
765
794
766
init_timer(&tbl->watchdog_timer);
795
767
tbl->watchdog_timer.function = &calgary_watchdog;
+1
-1
arch/x86_64/kernel/time.c
+1
-1
arch/x86_64/kernel/time.c
···
948
948
if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
949
949
#ifdef CONFIG_ACPI
950
950
/* But TSC doesn't tick in C3 so don't use it there */
951
-
if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 100)
951
+
if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 1000)
952
952
return 1;
953
953
#endif
954
954
return 0;