tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'rproc-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux

Pull remoteproc updates from Bjorn Andersson:
"This introduces support for the remoteproc on Mediatek MT8188, and
enables caches for MT8186 SCP. It adds support for PRU cores found on
the TI K3 AM62x SoCs.

It moves the recovery work after a firmware crash to an unbound
workqueue, to allow recovery to happen in parallel.

A new DMA API is introduced to release dma_mem for a device.

It adds support a panic handler for the Qualcomm modem remoteproc,
with the goal of having caches flushed in memory dumps for post-mortem
debugging and it introduces a mechanism to wait for the modem firmware
on SM8450 to decrypt part of its memory for post-mortem debugging.

Qualcomm sysmon is restricted to only inform remote processors about
peers that are actually running, to avoid a race where Linux tries to
notify a recovering remote processor about its peers new state. A
mechanism for waiting for the sysmon connection to be established is
also introduced, to avoid out-of-sync updates for rapidly restarting
remote processors.

A number of Devicetree binding cleanups and conversions to YAML are
introduced, to facilitate Devicetree validation. Lastly it introduces
a number of smaller fixes and cleanups in the core and a few different
drivers"

* tag 'rproc-v5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (42 commits)
remoteproc: qcom_q6v5_pas: Do not fail if regulators are not found
drivers/remoteproc: fix repeated words in comments
remoteproc: Directly use ida_alloc()/free()
remoteproc: Use unbounded workqueue for recovery work
remoteproc: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
remoteproc: qcom_q6v5_pas: Deal silently with optional px and cx regulators
remoteproc: sysmon: Send sysmon state only for running rprocs
remoteproc: sysmon: Wait for SSCTL service to come up
remoteproc: qcom: q6v5: Set q6 state to offline on receiving wdog irq
remoteproc: qcom: pas: Check if coredump is enabled
remoteproc: qcom: pas: Mark devices as wakeup capable
remoteproc: qcom: pas: Mark va as io memory
remoteproc: qcom: pas: Add decrypt shutdown support for modem
remoteproc: qcom: q6v5-mss: add powerdomains to MSM8996 config
remoteproc: qcom_q6v5: Introduce panic handler for MSS
remoteproc: qcom_q6v5_mss: Update MBA log info
remoteproc: qcom: correct kerneldoc
remoteproc: qcom_q6v5_mss: map/unmap metadata region before/after use
remoteproc: qcom: using pm_runtime_resume_and_get to simplify the code
remoteproc: mediatek: Support MT8188 SCP
...

Linus Torvalds 5d5d353b c7268761

+959 -228
+2
Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml
··· 18 18 enum: 19 19 - mediatek,mt8183-scp 20 20 - mediatek,mt8186-scp 21 + - mediatek,mt8188-scp 21 22 - mediatek,mt8192-scp 22 23 - mediatek,mt8195-scp 23 24 ··· 81 80 enum: 82 81 - mediatek,mt8183-scp 83 82 - mediatek,mt8186-scp 83 + - mediatek,mt8188-scp 84 84 then: 85 85 properties: 86 86 reg:
+28 -46
Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml
··· 67 67 minItems: 1 68 68 maxItems: 8 69 69 70 + interconnects: 71 + maxItems: 1 72 + 70 73 interrupts: 71 74 minItems: 5 72 - maxItems: 6 75 + items: 76 + - description: Watchdog interrupt 77 + - description: Fatal interrupt 78 + - description: Ready interrupt 79 + - description: Handover interrupt 80 + - description: Stop acknowledge interrupt 81 + - description: Shutdown acknowledge interrupt 73 82 74 83 interrupt-names: 75 84 minItems: 5 76 - maxItems: 6 85 + items: 86 + - const: wdog 87 + - const: fatal 88 + - const: ready 89 + - const: handover 90 + - const: stop-ack 91 + - const: shutdown-ack 77 92 78 93 resets: 79 94 minItems: 1 ··· 131 116 - description: Stop the modem 132 117 133 118 qcom,smem-state-names: 134 - $ref: /schemas/types.yaml#/definitions/string-array 135 119 description: The names of the state bits used for SMP2P output 136 120 items: 137 121 - const: stop ··· 148 134 three offsets within syscon for q6, modem and nc halt registers. 149 135 150 136 smd-edge: 151 - type: object 137 + $ref: /schemas/remoteproc/qcom,smd-edge.yaml# 152 138 description: 153 139 Qualcomm Shared Memory subnode which represents communication edge, 154 140 channels and devices related to the ADSP. 155 141 156 142 glink-edge: 157 - type: object 143 + $ref: /schemas/remoteproc/qcom,glink-edge.yaml# 158 144 description: 159 145 Qualcomm G-Link subnode which represents communication edge, channels 160 146 and devices related to the ADSP. ··· 329 315 then: 330 316 properties: 331 317 interrupts: 332 - items: 333 - - description: Watchdog interrupt 334 - - description: Fatal interrupt 335 - - description: Ready interrupt 336 - - description: Handover interrupt 337 - - description: Stop acknowledge interrupt 318 + maxItems: 5 338 319 interrupt-names: 339 - items: 340 - - const: wdog 341 - - const: fatal 342 - - const: ready 343 - - const: handover 344 - - const: stop-ack 320 + maxItems: 5 345 321 346 322 - if: 347 323 properties: ··· 349 345 then: 350 346 properties: 351 347 interrupts: 352 - items: 353 - - description: Watchdog interrupt 354 - - description: Fatal interrupt 355 - - description: Ready interrupt 356 - - description: Handover interrupt 357 - - description: Stop acknowledge interrupt 358 - - description: Shutdown acknowledge interrupt 348 + minItems: 6 359 349 interrupt-names: 360 - items: 361 - - const: wdog 362 - - const: fatal 363 - - const: ready 364 - - const: handover 365 - - const: stop-ack 366 - - const: shutdown-ack 350 + minItems: 6 367 351 368 352 - if: 369 353 properties: ··· 371 379 - qcom,msm8226-adsp-pil 372 380 - qcom,msm8996-adsp-pil 373 381 - qcom,msm8998-adsp-pas 382 + - qcom,sm8150-adsp-pas 383 + - qcom,sm8150-cdsp-pas 374 384 then: 375 385 properties: 376 386 power-domains: ··· 435 441 items: 436 442 - const: cx 437 443 - const: mx 438 - 439 - - if: 440 - properties: 441 - compatible: 442 - contains: 443 - enum: 444 - - qcom,sm8150-adsp-pas 445 - - qcom,sm8150-cdsp-pas 446 - then: 447 - properties: 448 - power-domains: 449 - items: 450 - - description: CX power domain 451 444 452 445 - if: 453 446 properties: ··· 575 594 examples: 576 595 - | 577 596 #include <dt-bindings/clock/qcom,rpmcc.h> 597 + #include <dt-bindings/interrupt-controller/arm-gic.h> 578 598 #include <dt-bindings/interrupt-controller/irq.h> 579 599 adsp { 580 600 compatible = "qcom,msm8974-adsp-pil"; 581 601 582 - interrupts-extended = <&intc 0 162 IRQ_TYPE_EDGE_RISING>, 602 + interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>, 583 603 <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 584 604 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, 585 605 <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, ··· 602 620 qcom,smem-state-names = "stop"; 603 621 604 622 smd-edge { 605 - interrupts = <0 156 IRQ_TYPE_EDGE_RISING>; 623 + interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; 606 624 607 625 qcom,ipc = <&apcs 8 8>; 608 626 qcom,smd-edge = <1>;
+25 -63
Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
··· 14 14 "qcom,msm8974-mss-pil" 15 15 "qcom,msm8996-mss-pil" 16 16 "qcom,msm8998-mss-pil" 17 - "qcom,sc7180-mss-pil" 18 - "qcom,sc7280-mss-pil" 19 17 "qcom,sdm845-mss-pil" 20 18 21 19 - reg: ··· 45 47 must be "wdog", "fatal", "ready", "handover", "stop-ack" 46 48 qcom,msm8996-mss-pil: 47 49 qcom,msm8998-mss-pil: 48 - qcom,sc7180-mss-pil: 49 - qcom,sc7280-mss-pil: 50 50 qcom,sdm845-mss-pil: 51 51 must be "wdog", "fatal", "ready", "handover", "stop-ack", 52 52 "shutdown-ack" ··· 82 86 qcom,msm8998-mss-pil: 83 87 must be "iface", "bus", "mem", "xo", "gpll0_mss", 84 88 "snoc_axi", "mnoc_axi", "qdss" 85 - qcom,sc7180-mss-pil: 86 - must be "iface", "bus", "xo", "snoc_axi", "mnoc_axi", 87 - "nav" 88 - qcom,sc7280-mss-pil: 89 - must be "iface", "xo", "snoc_axi", "offline", "pka" 90 89 qcom,sdm845-mss-pil: 91 90 must be "iface", "bus", "mem", "xo", "gpll0_mss", 92 91 "snoc_axi", "mnoc_axi", "prng" ··· 93 102 reference to the list of 3 reset-controllers for the 94 103 wcss sub-system 95 104 reference to the list of 2 reset-controllers for the modem 96 - sub-system on SC7180, SC7280, SDM845 SoCs 105 + sub-system on SDM845 SoCs 97 106 98 107 - reset-names: 99 108 Usage: required ··· 102 111 must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" 103 112 for the wcss sub-system 104 113 must be "mss_restart", "pdc_reset" for the modem 105 - sub-system on SC7180, SC7280, SDM845 SoCs 114 + sub-system on SDM845 SoCs 106 115 107 116 For devices where the mba and mpss sub-nodes are not specified, mba/mpss region 108 117 should be referenced as follows: ··· 167 176 qcom,msm8996-mss-pil: 168 177 qcom,msm8998-mss-pil: 169 178 must be "cx", "mx" 170 - qcom,sc7180-mss-pil: 171 - must be "cx", "mx", "mss" 172 - qcom,sc7280-mss-pil: 173 - must be "cx", "mss" 174 179 qcom,sdm845-mss-pil: 175 180 must be "cx", "mx", "mss" 176 181 ··· 192 205 Definition: a phandle reference to a syscon representing TCSR followed 193 206 by the three offsets within syscon for q6, modem and nc 194 207 halt registers. 195 - a phandle reference to a syscon representing TCSR followed 196 - by the four offsets within syscon for q6, modem, nc and vq6 197 - halt registers on SC7280 SoCs. 198 - 199 - For the compatible strings below the following phandle references are required: 200 - "qcom,sc7180-mss-pil" 201 - - qcom,spare-regs: 202 - Usage: required 203 - Value type: <prop-encoded-array> 204 - Definition: a phandle reference to a syscon representing TCSR followed 205 - by the offset within syscon for conn_box_spare0 register 206 - used by the modem sub-system running on SC7180 SoC. 207 - 208 - For the compatible strings below the following phandle references are required: 209 - "qcom,sc7280-mss-pil" 210 - - qcom,ext-regs: 211 - Usage: required 212 - Value type: <prop-encoded-array> 213 - Definition: two phandle references to syscons representing TCSR_REG and 214 - TCSR register space followed by the two offsets within the syscon 215 - to force_clk_en/rscc_disable and axim1_clk_off/crypto_clk_off 216 - registers respectively. 217 - 218 - - qcom,qaccept-regs: 219 - Usage: required 220 - Value type: <prop-encoded-array> 221 - Definition: a phandle reference to a syscon representing TCSR followed 222 - by the three offsets within syscon for mdm, cx and axi 223 - qaccept registers used by the modem sub-system running on 224 - SC7280 SoC. 225 208 226 209 The Hexagon node must contain iommus property as described in ../iommu/iommu.txt 227 210 on platforms which do not have TrustZone. ··· 214 257 The following example describes the resources needed to boot control the 215 258 Hexagon, as it is found on MSM8974 boards. 216 259 217 - modem-rproc@fc880000 { 218 - compatible = "qcom,q6v5-pil"; 219 - reg = <0xfc880000 0x100>, 220 - <0xfc820000 0x020>; 260 + remoteproc@fc880000 { 261 + compatible = "qcom,msm8974-mss-pil"; 262 + reg = <0xfc880000 0x100>, <0xfc820000 0x020>; 221 263 reg-names = "qdsp6", "rmb"; 222 264 223 - interrupts-extended = <&intc 0 24 1>, 224 - <&modem_smp2p_in 0 0>, 225 - <&modem_smp2p_in 1 0>, 226 - <&modem_smp2p_in 2 0>, 227 - <&modem_smp2p_in 3 0>; 228 - interrupt-names = "wdog", 229 - "fatal", 230 - "ready", 231 - "handover", 232 - "stop-ack"; 265 + interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>, 266 + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 267 + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, 268 + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, 269 + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; 270 + interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; 233 271 234 272 clocks = <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, 235 273 <&gcc GCC_MSS_CFG_AHB_CLK>, 236 - <&gcc GCC_BOOT_ROM_AHB_CLK>; 237 - clock-names = "iface", "bus", "mem"; 238 - 239 - qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>; 274 + <&gcc GCC_BOOT_ROM_AHB_CLK>, 275 + <&xo_board>; 276 + clock-names = "iface", "bus", "mem", "xo"; 240 277 241 278 resets = <&gcc GCC_MSS_RESTART>; 242 279 reset-names = "mss_restart"; ··· 239 288 mss-supply = <&pm8841_s3>; 240 289 mx-supply = <&pm8841_s1>; 241 290 pll-supply = <&pm8941_l12>; 291 + 292 + qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>; 242 293 243 294 qcom,smem-states = <&modem_smp2p_out 0>; 244 295 qcom,smem-state-names = "stop"; ··· 251 298 252 299 mpss { 253 300 memory-region = <&mpss_region>; 301 + }; 302 + 303 + smd-edge { 304 + interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>; 305 + 306 + qcom,ipc = <&apcs 8 12>; 307 + qcom,smd-edge = <0>; 308 + 309 + label = "modem"; 254 310 }; 255 311 };
-1
Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml
··· 90 90 - description: Stop the modem 91 91 92 92 qcom,smem-state-names: 93 - $ref: /schemas/types.yaml#/definitions/string 94 93 description: The names of the state bits used for SMP2P output 95 94 items: 96 95 - const: stop
+245
Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Qualcomm SC7180 MSS Peripheral Image Loader 8 + 9 + maintainers: 10 + - Sibi Sankar <quic_sibis@quicinc.com> 11 + 12 + description: 13 + This document describes the hardware for a component that loads and boots firmware 14 + on the Qualcomm Technology Inc. SC7180 Modem Hexagon Core. 15 + 16 + properties: 17 + compatible: 18 + enum: 19 + - qcom,sc7180-mss-pil 20 + 21 + reg: 22 + items: 23 + - description: MSS QDSP6 registers 24 + - description: RMB registers 25 + 26 + reg-names: 27 + items: 28 + - const: qdsp6 29 + - const: rmb 30 + 31 + iommus: 32 + items: 33 + - description: MSA Stream 1 34 + - description: MSA Stream 2 35 + 36 + interrupts: 37 + items: 38 + - description: Watchdog interrupt 39 + - description: Fatal interrupt 40 + - description: Ready interrupt 41 + - description: Handover interrupt 42 + - description: Stop acknowledge interrupt 43 + - description: Shutdown acknowledge interrupt 44 + 45 + interrupt-names: 46 + items: 47 + - const: wdog 48 + - const: fatal 49 + - const: ready 50 + - const: handover 51 + - const: stop-ack 52 + - const: shutdown-ack 53 + 54 + clocks: 55 + items: 56 + - description: GCC MSS IFACE clock 57 + - description: GCC MSS BUS clock 58 + - description: GCC MSS NAV clock 59 + - description: GCC MSS SNOC_AXI clock 60 + - description: GCC MSS MFAB_AXIS clock 61 + - description: RPMH XO clock 62 + 63 + clock-names: 64 + items: 65 + - const: iface 66 + - const: bus 67 + - const: nav 68 + - const: snoc_axi 69 + - const: mnoc_axi 70 + - const: xo 71 + 72 + power-domains: 73 + items: 74 + - description: CX power domain 75 + - description: MX power domain 76 + - description: MSS power domain 77 + 78 + power-domain-names: 79 + items: 80 + - const: cx 81 + - const: mx 82 + - const: mss 83 + 84 + resets: 85 + items: 86 + - description: AOSS restart 87 + - description: PDC reset 88 + 89 + reset-names: 90 + items: 91 + - const: mss_restart 92 + - const: pdc_reset 93 + 94 + memory-region: 95 + items: 96 + - description: MBA reserved region 97 + - description: modem reserved region 98 + 99 + firmware-name: 100 + $ref: /schemas/types.yaml#/definitions/string-array 101 + items: 102 + - description: Name of MBA firmware 103 + - description: Name of modem firmware 104 + 105 + qcom,halt-regs: 106 + $ref: /schemas/types.yaml#/definitions/phandle-array 107 + description: 108 + Halt registers are used to halt transactions of various sub-components 109 + within MSS. 110 + items: 111 + - items: 112 + - description: phandle to TCSR_MUTEX registers 113 + - description: offset to the Q6 halt register 114 + - description: offset to the modem halt register 115 + - description: offset to the nc halt register 116 + 117 + qcom,spare-regs: 118 + $ref: /schemas/types.yaml#/definitions/phandle-array 119 + description: 120 + Spare registers are multipurpose registers used for errata 121 + handling. 122 + items: 123 + - items: 124 + - description: phandle to TCSR_MUTEX registers 125 + - description: offset to the conn_box_spare0 register 126 + 127 + qcom,qmp: 128 + $ref: /schemas/types.yaml#/definitions/phandle 129 + description: Reference to the AOSS side-channel message RAM. 130 + 131 + qcom,smem-states: 132 + $ref: /schemas/types.yaml#/definitions/phandle-array 133 + description: States used by the AP to signal the Hexagon core 134 + items: 135 + - description: Stop the modem 136 + 137 + qcom,smem-state-names: 138 + description: The names of the state bits used for SMP2P output 139 + const: stop 140 + 141 + glink-edge: 142 + $ref: qcom,glink-edge.yaml# 143 + description: 144 + Qualcomm G-Link subnode which represents communication edge, channels 145 + and devices related to the DSP. 146 + 147 + properties: 148 + interrupts: 149 + items: 150 + - description: IRQ from MSS to GLINK 151 + 152 + mboxes: 153 + items: 154 + - description: Mailbox for communication between APPS and MSS 155 + 156 + label: 157 + const: modem 158 + 159 + apr: false 160 + fastrpc: false 161 + 162 + required: 163 + - compatible 164 + - reg 165 + - reg-names 166 + - iommus 167 + - interrupts 168 + - interrupt-names 169 + - clocks 170 + - clock-names 171 + - power-domains 172 + - power-domain-names 173 + - resets 174 + - reset-names 175 + - qcom,halt-regs 176 + - qcom,spare-regs 177 + - memory-region 178 + - qcom,qmp 179 + - qcom,smem-states 180 + - qcom,smem-state-names 181 + - glink-edge 182 + 183 + additionalProperties: false 184 + 185 + examples: 186 + - | 187 + #include <dt-bindings/clock/qcom,gcc-sc7180.h> 188 + #include <dt-bindings/clock/qcom,rpmh.h> 189 + #include <dt-bindings/interrupt-controller/arm-gic.h> 190 + #include <dt-bindings/power/qcom-rpmpd.h> 191 + #include <dt-bindings/reset/qcom,sdm845-aoss.h> 192 + #include <dt-bindings/reset/qcom,sdm845-pdc.h> 193 + 194 + remoteproc_mpss: remoteproc@4080000 { 195 + compatible = "qcom,sc7180-mss-pil"; 196 + reg = <0x04080000 0x10000>, <0x04180000 0x48>; 197 + reg-names = "qdsp6", "rmb"; 198 + 199 + iommus = <&apps_smmu 0x461 0x0>, <&apps_smmu 0x444 0x3>; 200 + 201 + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, 202 + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 203 + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, 204 + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, 205 + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, 206 + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; 207 + 208 + interrupt-names = "wdog", "fatal", "ready", "handover", 209 + "stop-ack", "shutdown-ack"; 210 + 211 + clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, 212 + <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>, 213 + <&gcc GCC_MSS_NAV_AXI_CLK>, 214 + <&gcc GCC_MSS_SNOC_AXI_CLK>, 215 + <&gcc GCC_MSS_MFAB_AXIS_CLK>, 216 + <&rpmhcc RPMH_CXO_CLK>; 217 + clock-names = "iface", "bus", "nav", "snoc_axi", 218 + "mnoc_axi", "xo"; 219 + 220 + power-domains = <&rpmhpd SC7180_CX>, 221 + <&rpmhpd SC7180_MX>, 222 + <&rpmhpd SC7180_MSS>; 223 + power-domain-names = "cx", "mx", "mss"; 224 + 225 + memory-region = <&mba_mem>, <&mpss_mem>; 226 + 227 + qcom,qmp = <&aoss_qmp>; 228 + 229 + qcom,smem-states = <&modem_smp2p_out 0>; 230 + qcom,smem-state-names = "stop"; 231 + 232 + resets = <&aoss_reset AOSS_CC_MSS_RESTART>, 233 + <&pdc_reset PDC_MODEM_SYNC_RESET>; 234 + reset-names = "mss_restart", "pdc_reset"; 235 + 236 + qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>; 237 + qcom,spare-regs = <&tcsr_regs 0xb3e4>; 238 + 239 + glink-edge { 240 + interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; 241 + mboxes = <&apss_shared 12>; 242 + qcom,remote-pid = <1>; 243 + label = "modem"; 244 + }; 245 + };
+266
Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Qualcomm SC7280 MSS Peripheral Image Loader 8 + 9 + maintainers: 10 + - Sibi Sankar <quic_sibis@quicinc.com> 11 + 12 + description: 13 + This document describes the hardware for a component that loads and boots firmware 14 + on the Qualcomm Technology Inc. SC7280 Modem Hexagon Core. 15 + 16 + properties: 17 + compatible: 18 + enum: 19 + - qcom,sc7280-mss-pil 20 + 21 + reg: 22 + items: 23 + - description: MSS QDSP6 registers 24 + - description: RMB registers 25 + 26 + reg-names: 27 + items: 28 + - const: qdsp6 29 + - const: rmb 30 + 31 + iommus: 32 + items: 33 + - description: MSA Stream 1 34 + - description: MSA Stream 2 35 + 36 + interconnects: 37 + items: 38 + - description: Path leading to system memory 39 + 40 + interrupts: 41 + items: 42 + - description: Watchdog interrupt 43 + - description: Fatal interrupt 44 + - description: Ready interrupt 45 + - description: Handover interrupt 46 + - description: Stop acknowledge interrupt 47 + - description: Shutdown acknowledge interrupt 48 + 49 + interrupt-names: 50 + items: 51 + - const: wdog 52 + - const: fatal 53 + - const: ready 54 + - const: handover 55 + - const: stop-ack 56 + - const: shutdown-ack 57 + 58 + clocks: 59 + items: 60 + - description: GCC MSS IFACE clock 61 + - description: GCC MSS OFFLINE clock 62 + - description: GCC MSS SNOC_AXI clock 63 + - description: RPMH PKA clock 64 + - description: RPMH XO clock 65 + 66 + clock-names: 67 + items: 68 + - const: iface 69 + - const: offline 70 + - const: snoc_axi 71 + - const: pka 72 + - const: xo 73 + 74 + power-domains: 75 + items: 76 + - description: CX power domain 77 + - description: MSS power domain 78 + 79 + power-domain-names: 80 + items: 81 + - const: cx 82 + - const: mss 83 + 84 + resets: 85 + items: 86 + - description: AOSS restart 87 + - description: PDC reset 88 + 89 + reset-names: 90 + items: 91 + - const: mss_restart 92 + - const: pdc_reset 93 + 94 + memory-region: 95 + items: 96 + - description: MBA reserved region 97 + - description: modem reserved region 98 + 99 + firmware-name: 100 + $ref: /schemas/types.yaml#/definitions/string-array 101 + items: 102 + - description: Name of MBA firmware 103 + - description: Name of modem firmware 104 + 105 + qcom,halt-regs: 106 + $ref: /schemas/types.yaml#/definitions/phandle-array 107 + description: 108 + Halt registers are used to halt transactions of various sub-components 109 + within MSS. 110 + items: 111 + - items: 112 + - description: phandle to TCSR_MUTEX registers 113 + - description: offset to the Q6 halt register 114 + - description: offset to the modem halt register 115 + - description: offset to the nc halt register 116 + - description: offset to the vq6 halt register 117 + 118 + qcom,ext-regs: 119 + $ref: /schemas/types.yaml#/definitions/phandle-array 120 + description: EXT registers are used for various power related functionality 121 + items: 122 + - items: 123 + - description: phandle to TCSR_REG registers 124 + - description: offset to the force_clk_en register 125 + - description: offset to the rscc_disable register 126 + - items: 127 + - description: phandle to TCSR_MUTEX registers 128 + - description: offset to the axim1_clk_off register 129 + - description: offset to the crypto_clk_off register 130 + 131 + qcom,qaccept-regs: 132 + $ref: /schemas/types.yaml#/definitions/phandle-array 133 + description: QACCEPT registers are used to bring up/down Q-channels 134 + items: 135 + - items: 136 + - description: phandle to TCSR_MUTEX registers 137 + - description: offset to the mdm qaccept register 138 + - description: offset to the cx qaccept register 139 + - description: offset to the axi qaccept register 140 + 141 + qcom,qmp: 142 + $ref: /schemas/types.yaml#/definitions/phandle 143 + description: Reference to the AOSS side-channel message RAM. 144 + 145 + qcom,smem-states: 146 + $ref: /schemas/types.yaml#/definitions/phandle-array 147 + description: States used by the AP to signal the Hexagon core 148 + items: 149 + - description: Stop the modem 150 + 151 + qcom,smem-state-names: 152 + description: The names of the state bits used for SMP2P output 153 + const: stop 154 + 155 + glink-edge: 156 + $ref: qcom,glink-edge.yaml# 157 + description: 158 + Qualcomm G-Link subnode which represents communication edge, channels 159 + and devices related to the DSP. 160 + 161 + properties: 162 + interrupts: 163 + items: 164 + - description: IRQ from MSS to GLINK 165 + 166 + mboxes: 167 + items: 168 + - description: Mailbox for communication between APPS and MSS 169 + 170 + label: 171 + const: modem 172 + 173 + apr: false 174 + fastrpc: false 175 + 176 + required: 177 + - compatible 178 + - reg 179 + - reg-names 180 + - iommus 181 + - interconnects 182 + - interrupts 183 + - interrupt-names 184 + - clocks 185 + - clock-names 186 + - power-domains 187 + - power-domain-names 188 + - resets 189 + - reset-names 190 + - qcom,halt-regs 191 + - qcom,ext-regs 192 + - qcom,qaccept-regs 193 + - memory-region 194 + - qcom,qmp 195 + - qcom,smem-states 196 + - qcom,smem-state-names 197 + - glink-edge 198 + 199 + additionalProperties: false 200 + 201 + examples: 202 + - | 203 + #include <dt-bindings/clock/qcom,gcc-sc7280.h> 204 + #include <dt-bindings/clock/qcom,rpmh.h> 205 + #include <dt-bindings/interconnect/qcom,sc7280.h> 206 + #include <dt-bindings/interrupt-controller/arm-gic.h> 207 + #include <dt-bindings/mailbox/qcom-ipcc.h> 208 + #include <dt-bindings/power/qcom-rpmpd.h> 209 + #include <dt-bindings/reset/qcom,sdm845-aoss.h> 210 + #include <dt-bindings/reset/qcom,sdm845-pdc.h> 211 + 212 + remoteproc_mpss: remoteproc@4080000 { 213 + compatible = "qcom,sc7280-mss-pil"; 214 + reg = <0x04080000 0x10000>, <0x04180000 0x48>; 215 + reg-names = "qdsp6", "rmb"; 216 + 217 + iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>; 218 + 219 + interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; 220 + 221 + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, 222 + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 223 + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, 224 + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, 225 + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, 226 + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; 227 + 228 + interrupt-names = "wdog", "fatal", "ready", "handover", 229 + "stop-ack", "shutdown-ack"; 230 + 231 + clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, 232 + <&gcc GCC_MSS_OFFLINE_AXI_CLK>, 233 + <&gcc GCC_MSS_SNOC_AXI_CLK>, 234 + <&rpmhcc RPMH_PKA_CLK>, 235 + <&rpmhcc RPMH_CXO_CLK>; 236 + clock-names = "iface", "offline", "snoc_axi", "pka", "xo"; 237 + 238 + power-domains = <&rpmhpd SC7280_CX>, 239 + <&rpmhpd SC7280_MSS>; 240 + power-domain-names = "cx", "mss"; 241 + 242 + memory-region = <&mba_mem>, <&mpss_mem>; 243 + 244 + qcom,qmp = <&aoss_qmp>; 245 + 246 + qcom,smem-states = <&modem_smp2p_out 0>; 247 + qcom,smem-state-names = "stop"; 248 + 249 + resets = <&aoss_reset AOSS_CC_MSS_RESTART>, 250 + <&pdc_reset PDC_MODEM_SYNC_RESET>; 251 + reset-names = "mss_restart", "pdc_reset"; 252 + 253 + qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>; 254 + qcom,ext-regs = <&tcsr 0x10000 0x10004>, <&tcsr_mutex 0x26004 0x26008>; 255 + qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>; 256 + 257 + glink-edge { 258 + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS 259 + IPCC_MPROC_SIGNAL_GLINK_QMP 260 + IRQ_TYPE_EDGE_RISING>; 261 + mboxes = <&ipcc IPCC_CLIENT_MPSS 262 + IPCC_MPROC_SIGNAL_GLINK_QMP>; 263 + label = "modem"; 264 + qcom,remote-pid = <1>; 265 + }; 266 + };
+5 -16
Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml
··· 76 76 - const: pdc_sync 77 77 78 78 memory-region: 79 - $ref: /schemas/types.yaml#/definitions/phandle 79 + maxItems: 1 80 80 description: Reference to the reserved-memory for the Hexagon core 81 81 82 82 firmware-name: ··· 102 102 - description: Stop the modem 103 103 104 104 qcom,smem-state-names: 105 - $ref: /schemas/types.yaml#/definitions/string 106 105 description: The names of the state bits used for SMP2P output 107 106 const: stop 108 107 109 108 glink-edge: 110 - type: object 111 - description: | 109 + $ref: qcom,glink-edge.yaml# 110 + description: 112 111 Qualcomm G-Link subnode which represents communication edge, channels 113 112 and devices related to the ADSP. 114 113 ··· 121 122 - description: Mailbox for communication between APPS and WPSS 122 123 123 124 label: 124 - description: The names of the state bits used for SMP2P output 125 125 items: 126 126 - const: wpss 127 127 128 - qcom,remote-pid: 129 - $ref: /schemas/types.yaml#/definitions/uint32 130 - description: ID of the shared memory used by GLINK for communication with WPSS 131 - 132 - required: 133 - - interrupts 134 - - mboxes 135 - - label 136 - - qcom,remote-pid 137 - 138 - additionalProperties: false 128 + apr: false 129 + fastrpc: false 139 130 140 131 required: 141 132 - compatible
-1
Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml
··· 90 90 - description: Stop the modem 91 91 92 92 qcom,smem-state-names: 93 - $ref: /schemas/types.yaml#/definitions/string 94 93 description: The names of the state bits used for SMP2P output 95 94 items: 96 95 - const: stop
+85
Documentation/devicetree/bindings/remoteproc/qcom,smd-edge.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/remoteproc/qcom,smd-edge.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Qualcomm SMD Edge communication channel nodes 8 + 9 + maintainers: 10 + - Bjorn Andersson <bjorn.andersson@linaro.org> 11 + 12 + description: 13 + Qualcomm SMD subnode represents a remote subsystem or a remote processor of 14 + some sort - or in SMD language an "edge". The name of the edges are not 15 + important. 16 + See also Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml 17 + 18 + properties: 19 + $nodename: 20 + const: "smd-edge" 21 + 22 + interrupts: 23 + maxItems: 1 24 + 25 + label: 26 + description: 27 + Name of the edge, used for debugging and identification purposes. The 28 + node name will be used if this is not present. 29 + 30 + mboxes: 31 + maxItems: 1 32 + description: 33 + Reference to the mailbox representing the outgoing doorbell in APCS for 34 + this client. 35 + 36 + qcom,ipc: 37 + $ref: /schemas/types.yaml#/definitions/phandle-array 38 + items: 39 + - items: 40 + - description: phandle to a syscon node representing the APCS registers 41 + - description: u32 representing offset to the register within the syscon 42 + - description: u32 representing the ipc bit within the register 43 + description: 44 + Three entries specifying the outgoing ipc bit used for signaling the 45 + remote processor. 46 + 47 + qcom,smd-edge: 48 + $ref: /schemas/types.yaml#/definitions/uint32 49 + description: 50 + The identifier of the remote processor in the smd channel allocation 51 + table. 52 + 53 + qcom,remote-pid: 54 + $ref: /schemas/types.yaml#/definitions/uint32 55 + description: 56 + The identifier for the remote processor as known by the rest of the 57 + system. 58 + 59 + required: 60 + - interrupts 61 + - qcom,smd-edge 62 + 63 + oneOf: 64 + - required: 65 + - mboxes 66 + - required: 67 + - qcom,ipc 68 + 69 + additionalProperties: true 70 + 71 + examples: 72 + - | 73 + #include <dt-bindings/interrupt-controller/arm-gic.h> 74 + #include <dt-bindings/mailbox/qcom-ipcc.h> 75 + 76 + remoteproc { 77 + // ... 78 + 79 + smd-edge { 80 + interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; 81 + 82 + qcom,ipc = <&apcs 8 8>; 83 + qcom,smd-edge = <1>; 84 + }; 85 + };
+3 -2
Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml
··· 36 36 enum: 37 37 - ti,am3356-pru # for AM335x SoC family (AM3356+ SoCs only) 38 38 - ti,am4376-pru # for AM437x SoC family (AM4376+ SoCs only) 39 + - ti,am5728-pru # for AM57xx SoC family 40 + - ti,am625-pru # for PRUs in K3 AM62x SoC family 39 41 - ti,am642-pru # for PRUs in K3 AM64x SoC family 40 42 - ti,am642-rtu # for RTUs in K3 AM64x SoC family 41 43 - ti,am642-tx-pru # for Tx_PRUs in K3 AM64x SoC family 42 - - ti,am5728-pru # for AM57xx SoC family 43 - - ti,k2g-pru # for 66AK2G SoC family 44 44 - ti,am654-pru # for PRUs in K3 AM65x SoC family 45 45 - ti,am654-rtu # for RTUs in K3 AM65x SoC family 46 46 - ti,am654-tx-pru # for Tx_PRUs in K3 AM65x SR2.0 SoCs 47 47 - ti,j721e-pru # for PRUs in K3 J721E SoC family 48 48 - ti,j721e-rtu # for RTUs in K3 J721E SoC family 49 49 - ti,j721e-tx-pru # for Tx_PRUs in K3 J721E SoC family 50 + - ti,k2g-pru # for 66AK2G SoC family 50 51 51 52 reg: 52 53 items:
+1 -49
Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml
··· 28 28 edges are not important. 29 29 30 30 properties: 31 - interrupts: 32 - maxItems: 1 33 - 34 - label: 35 - $ref: /schemas/types.yaml#/definitions/string 36 - description: 37 - Name of the edge, used for debugging and identification purposes. The 38 - node name will be used if this is not present. 39 - 40 - mboxes: 41 - maxItems: 1 42 - description: 43 - Reference to the mailbox representing the outgoing doorbell in APCS for 44 - this client. 45 - 46 - qcom,ipc: 47 - $ref: /schemas/types.yaml#/definitions/phandle-array 48 - items: 49 - - items: 50 - - description: phandle to a syscon node representing the APCS registers 51 - - description: u32 representing offset to the register within the syscon 52 - - description: u32 representing the ipc bit within the register 53 - description: 54 - Three entries specifying the outgoing ipc bit used for signaling the 55 - remote processor. 56 - 57 - qcom,smd-edge: 58 - $ref: /schemas/types.yaml#/definitions/uint32 59 - description: 60 - The identifier of the remote processor in the smd channel allocation 61 - table. 62 - 63 - qcom,remote-pid: 64 - $ref: /schemas/types.yaml#/definitions/uint32 65 - description: 66 - The identifier for the remote processor as known by the rest of the 67 - system. 68 - 69 31 rpm-requests: 70 32 type: object 71 33 description: ··· 51 89 52 90 additionalProperties: true 53 91 54 - required: 55 - - interrupts 56 - - qcom,smd-edge 57 - 58 - oneOf: 59 - - required: 60 - - mboxes 61 - - required: 62 - - qcom,ipc 63 - 64 - additionalProperties: false 92 + unevaluatedProperties: false 65 93 66 94 required: 67 95 - compatible
+4 -3
drivers/remoteproc/imx_rproc.c
··· 594 594 595 595 node = of_parse_phandle(np, "memory-region", a); 596 596 /* Not map vdevbuffer, vdevring region */ 597 - if (!strncmp(node->name, "vdev", strlen("vdev"))) 597 + if (!strncmp(node->name, "vdev", strlen("vdev"))) { 598 + of_node_put(node); 598 599 continue; 600 + } 599 601 err = of_address_to_resource(node, 0, &res); 602 + of_node_put(node); 600 603 if (err) { 601 604 dev_err(dev, "unable to resolve memory region\n"); 602 605 return err; 603 606 } 604 - 605 - of_node_put(node); 606 607 607 608 if (b >= IMX_RPROC_MEM_MAX) 608 609 break;
+1 -2
drivers/remoteproc/keystone_remoteproc.c
··· 410 410 411 411 /* enable clock for accessing DSP internal memories */ 412 412 pm_runtime_enable(dev); 413 - ret = pm_runtime_get_sync(dev); 413 + ret = pm_runtime_resume_and_get(dev); 414 414 if (ret < 0) { 415 415 dev_err(dev, "failed to enable clock, status = %d\n", ret); 416 - pm_runtime_put_noidle(dev); 417 416 goto disable_rpm; 418 417 } 419 418
+22 -1
drivers/remoteproc/mtk_scp.c
··· 401 401 writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_P1); 402 402 writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_p2); 403 403 404 + /* 405 + * Set I-cache and D-cache size before loading SCP FW. 406 + * SCP SRAM logical address may change when cache size setting differs. 407 + */ 408 + writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB, 409 + scp->reg_base + MT8183_SCP_CACHE_CON); 410 + writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON); 411 + 404 412 return 0; 405 413 } 406 414 ··· 951 943 .scp_da_to_va = mt8183_scp_da_to_va, 952 944 .host_to_scp_reg = MT8183_HOST_TO_SCP, 953 945 .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT, 954 - .ipi_buf_offset = 0x7bdb0, 946 + .ipi_buf_offset = 0x3bdb0, 947 + }; 948 + 949 + static const struct mtk_scp_of_data mt8188_of_data = { 950 + .scp_clk_get = mt8195_scp_clk_get, 951 + .scp_before_load = mt8192_scp_before_load, 952 + .scp_irq_handler = mt8192_scp_irq_handler, 953 + .scp_reset_assert = mt8192_scp_reset_assert, 954 + .scp_reset_deassert = mt8192_scp_reset_deassert, 955 + .scp_stop = mt8192_scp_stop, 956 + .scp_da_to_va = mt8192_scp_da_to_va, 957 + .host_to_scp_reg = MT8192_GIPC_IN_SET, 958 + .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT, 955 959 }; 956 960 957 961 static const struct mtk_scp_of_data mt8192_of_data = { ··· 993 973 static const struct of_device_id mtk_scp_of_match[] = { 994 974 { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data }, 995 975 { .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data }, 976 + { .compatible = "mediatek,mt8188-scp", .data = &mt8188_of_data }, 996 977 { .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data }, 997 978 { .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data }, 998 979 {},
+3 -3
drivers/remoteproc/omap_remoteproc.c
··· 243 243 * omap_rproc_ack_timer_irq() - acknowledge a timer irq 244 244 * @timer: handle to a OMAP rproc timer 245 245 * 246 - * This function is used to clear the irq associated with a watchdog timer. The 246 + * This function is used to clear the irq associated with a watchdog timer. 247 247 * The function is called by the OMAP remoteproc upon a watchdog event on the 248 248 * remote processor to clear the interrupt status of the watchdog timer. 249 249 */ ··· 303 303 * @configure: boolean flag used to acquire and configure the timer handle 304 304 * 305 305 * This function is used primarily to enable the timers associated with 306 - * a remoteproc. The configure flag is provided to allow the driver to 306 + * a remoteproc. The configure flag is provided to allow the driver 307 307 * to either acquire and start a timer (during device initialization) or 308 308 * to just start a timer (during a resume operation). 309 309 * ··· 443 443 * @configure: boolean flag used to release the timer handle 444 444 * 445 445 * This function is used primarily to disable the timers associated with 446 - * a remoteproc. The configure flag is provided to allow the driver to 446 + * a remoteproc. The configure flag is provided to allow the driver 447 447 * to either stop and release a timer (during device shutdown) or to just 448 448 * stop a timer (during a suspend operation). 449 449 *
+1
drivers/remoteproc/pru_rproc.c
··· 897 897 { .compatible = "ti,j721e-pru", .data = &k3_pru_data }, 898 898 { .compatible = "ti,j721e-rtu", .data = &k3_rtu_data }, 899 899 { .compatible = "ti,j721e-tx-pru", .data = &k3_tx_pru_data }, 900 + { .compatible = "ti,am625-pru", .data = &k3_pru_data }, 900 901 {}, 901 902 }; 902 903 MODULE_DEVICE_TABLE(of, pru_rproc_match);
+2 -2
drivers/remoteproc/qcom_common.c
··· 50 50 }; 51 51 52 52 /** 53 - * struct minidump_subsystem_toc: Subsystem's SMEM Table of content 53 + * struct minidump_subsystem - Subsystem's SMEM Table of content 54 54 * @status : Subsystem toc init status 55 55 * @enabled : if set to 1, this region would be copied during coredump 56 56 * @encryption_status: Encryption status for this subsystem ··· 68 68 }; 69 69 70 70 /** 71 - * struct minidump_global_toc: Global Table of Content 71 + * struct minidump_global_toc - Global Table of Content 72 72 * @status : Global Minidump init status 73 73 * @md_revision : Minidump revision 74 74 * @enabled : Minidump enable status
+4
drivers/remoteproc/qcom_q6v5.c
··· 112 112 else 113 113 dev_err(q6v5->dev, "watchdog without message\n"); 114 114 115 + q6v5->running = false; 115 116 rproc_report_crash(q6v5->rproc, RPROC_WATCHDOG); 116 117 117 118 return IRQ_HANDLED; ··· 123 122 struct qcom_q6v5 *q6v5 = data; 124 123 size_t len; 125 124 char *msg; 125 + 126 + if (!q6v5->running) 127 + return IRQ_HANDLED; 126 128 127 129 msg = qcom_smem_get(QCOM_SMEM_HOST_ANY, q6v5->crash_reason, &len); 128 130 if (!IS_ERR(msg) && len > 0 && msg[0])
+1 -2
drivers/remoteproc/qcom_q6v5_adsp.c
··· 175 175 176 176 for (i = 0; i < pd_count; i++) { 177 177 dev_pm_genpd_set_performance_state(pds[i], INT_MAX); 178 - ret = pm_runtime_get_sync(pds[i]); 178 + ret = pm_runtime_resume_and_get(pds[i]); 179 179 if (ret < 0) { 180 - pm_runtime_put_noidle(pds[i]); 181 180 dev_pm_genpd_set_performance_state(pds[i], 0); 182 181 goto unroll_pd_votes; 183 182 }
+48 -6
drivers/remoteproc/qcom_q6v5_mss.c
··· 10 10 #include <linux/clk.h> 11 11 #include <linux/delay.h> 12 12 #include <linux/devcoredump.h> 13 + #include <linux/dma-map-ops.h> 13 14 #include <linux/dma-mapping.h> 14 15 #include <linux/interrupt.h> 15 16 #include <linux/kernel.h> ··· 933 932 static int q6v5_mpss_init_image(struct q6v5 *qproc, const struct firmware *fw, 934 933 const char *fw_name) 935 934 { 936 - unsigned long dma_attrs = DMA_ATTR_FORCE_CONTIGUOUS; 935 + unsigned long dma_attrs = DMA_ATTR_FORCE_CONTIGUOUS | DMA_ATTR_NO_KERNEL_MAPPING; 936 + unsigned long flags = VM_DMA_COHERENT | VM_FLUSH_RESET_PERMS; 937 + struct page **pages; 938 + struct page *page; 937 939 dma_addr_t phys; 938 940 void *metadata; 939 941 int mdata_perm; 940 942 int xferop_ret; 941 943 size_t size; 942 - void *ptr; 944 + void *vaddr; 945 + int count; 943 946 int ret; 947 + int i; 944 948 945 949 metadata = qcom_mdt_read_metadata(fw, &size, fw_name, qproc->dev); 946 950 if (IS_ERR(metadata)) 947 951 return PTR_ERR(metadata); 948 952 949 - ptr = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs); 950 - if (!ptr) { 953 + page = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs); 954 + if (!page) { 951 955 kfree(metadata); 952 956 dev_err(qproc->dev, "failed to allocate mdt buffer\n"); 953 957 return -ENOMEM; 954 958 } 955 959 956 - memcpy(ptr, metadata, size); 960 + count = PAGE_ALIGN(size) >> PAGE_SHIFT; 961 + pages = kmalloc_array(count, sizeof(struct page *), GFP_KERNEL); 962 + if (!pages) { 963 + ret = -ENOMEM; 964 + goto free_dma_attrs; 965 + } 966 + 967 + for (i = 0; i < count; i++) 968 + pages[i] = nth_page(page, i); 969 + 970 + vaddr = vmap(pages, count, flags, pgprot_dmacoherent(PAGE_KERNEL)); 971 + kfree(pages); 972 + if (!vaddr) { 973 + dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", &phys, size); 974 + ret = -EBUSY; 975 + goto free_dma_attrs; 976 + } 977 + 978 + memcpy(vaddr, metadata, size); 979 + 980 + vunmap(vaddr); 957 981 958 982 /* Hypervisor mapping to access metadata by modem */ 959 983 mdata_perm = BIT(QCOM_SCM_VMID_HLOS); ··· 1008 982 "mdt buffer not reclaimed system may become unstable\n"); 1009 983 1010 984 free_dma_attrs: 1011 - dma_free_attrs(qproc->dev, size, ptr, phys, dma_attrs); 985 + dma_free_attrs(qproc->dev, size, page, phys, dma_attrs); 1012 986 kfree(metadata); 1013 987 1014 988 return ret < 0 ? ret : 0; ··· 1127 1101 ret = q6v5proc_reset(qproc); 1128 1102 if (ret) 1129 1103 goto reclaim_mba; 1104 + 1105 + if (qproc->has_mba_logs) 1106 + qcom_pil_info_store("mba", qproc->mba_phys, MBA_LOG_SIZE); 1130 1107 1131 1108 ret = q6v5_rmb_mba_wait(qproc, 0, 5000); 1132 1109 if (ret == -ETIMEDOUT) { ··· 1623 1594 return ret; 1624 1595 } 1625 1596 1597 + static unsigned long q6v5_panic(struct rproc *rproc) 1598 + { 1599 + struct q6v5 *qproc = (struct q6v5 *)rproc->priv; 1600 + 1601 + return qcom_q6v5_panic(&qproc->q6v5); 1602 + } 1603 + 1626 1604 static const struct rproc_ops q6v5_ops = { 1627 1605 .start = q6v5_start, 1628 1606 .stop = q6v5_stop, 1629 1607 .parse_fw = qcom_q6v5_register_dump_segments, 1630 1608 .load = q6v5_load, 1609 + .panic = q6v5_panic, 1631 1610 }; 1632 1611 1633 1612 static void qcom_msa_handover(struct qcom_q6v5 *q6v5) ··· 2223 2186 "gpll0_mss", 2224 2187 "snoc_axi", 2225 2188 "mnoc_axi", 2189 + NULL 2190 + }, 2191 + .proxy_pd_names = (char*[]){ 2192 + "mx", 2193 + "cx", 2226 2194 NULL 2227 2195 }, 2228 2196 .need_mem_protection = true,
+87 -18
drivers/remoteproc/qcom_q6v5_pas.c
··· 8 8 */ 9 9 10 10 #include <linux/clk.h> 11 + #include <linux/delay.h> 11 12 #include <linux/firmware.h> 12 13 #include <linux/interrupt.h> 13 14 #include <linux/kernel.h> ··· 30 29 #include "qcom_q6v5.h" 31 30 #include "remoteproc_internal.h" 32 31 32 + #define ADSP_DECRYPT_SHUTDOWN_DELAY_MS 100 33 + 33 34 struct adsp_data { 34 35 int crash_reason_smem; 35 36 const char *firmware_name; ··· 39 36 unsigned int minidump_id; 40 37 bool has_aggre2_clk; 41 38 bool auto_boot; 39 + bool decrypt_shutdown; 42 40 43 41 char **proxy_pd_names; 44 42 ··· 69 65 unsigned int minidump_id; 70 66 int crash_reason_smem; 71 67 bool has_aggre2_clk; 68 + bool decrypt_shutdown; 72 69 const char *info_name; 73 70 74 71 struct completion start_done; ··· 91 86 static void adsp_minidump(struct rproc *rproc) 92 87 { 93 88 struct qcom_adsp *adsp = rproc->priv; 89 + 90 + if (rproc->dump_conf == RPROC_COREDUMP_DISABLED) 91 + return; 94 92 95 93 qcom_minidump(rproc, adsp->minidump_id); 96 94 } ··· 134 126 dev_pm_genpd_set_performance_state(pds[i], 0); 135 127 pm_runtime_put(pds[i]); 136 128 } 129 + } 130 + 131 + static int adsp_shutdown_poll_decrypt(struct qcom_adsp *adsp) 132 + { 133 + unsigned int retry_num = 50; 134 + int ret; 135 + 136 + do { 137 + msleep(ADSP_DECRYPT_SHUTDOWN_DELAY_MS); 138 + ret = qcom_scm_pas_shutdown(adsp->pas_id); 139 + } while (ret == -EINVAL && --retry_num); 140 + 141 + return ret; 137 142 } 138 143 139 144 static int adsp_unprepare(struct rproc *rproc) ··· 206 185 if (ret) 207 186 goto disable_xo_clk; 208 187 209 - ret = regulator_enable(adsp->cx_supply); 210 - if (ret) 211 - goto disable_aggre2_clk; 188 + if (adsp->cx_supply) { 189 + ret = regulator_enable(adsp->cx_supply); 190 + if (ret) 191 + goto disable_aggre2_clk; 192 + } 212 193 213 - ret = regulator_enable(adsp->px_supply); 214 - if (ret) 215 - goto disable_cx_supply; 194 + if (adsp->px_supply) { 195 + ret = regulator_enable(adsp->px_supply); 196 + if (ret) 197 + goto disable_cx_supply; 198 + } 216 199 217 200 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id); 218 201 if (ret) { ··· 237 212 return 0; 238 213 239 214 disable_px_supply: 240 - regulator_disable(adsp->px_supply); 215 + if (adsp->px_supply) 216 + regulator_disable(adsp->px_supply); 241 217 disable_cx_supply: 242 - regulator_disable(adsp->cx_supply); 218 + if (adsp->cx_supply) 219 + regulator_disable(adsp->cx_supply); 243 220 disable_aggre2_clk: 244 221 clk_disable_unprepare(adsp->aggre2_clk); 245 222 disable_xo_clk: ··· 258 231 { 259 232 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5); 260 233 261 - regulator_disable(adsp->px_supply); 262 - regulator_disable(adsp->cx_supply); 234 + if (adsp->px_supply) 235 + regulator_disable(adsp->px_supply); 236 + if (adsp->cx_supply) 237 + regulator_disable(adsp->cx_supply); 263 238 clk_disable_unprepare(adsp->aggre2_clk); 264 239 clk_disable_unprepare(adsp->xo); 265 240 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); ··· 278 249 dev_err(adsp->dev, "timed out on wait\n"); 279 250 280 251 ret = qcom_scm_pas_shutdown(adsp->pas_id); 252 + if (ret && adsp->decrypt_shutdown) 253 + ret = adsp_shutdown_poll_decrypt(adsp); 254 + 281 255 if (ret) 282 256 dev_err(adsp->dev, "failed to shutdown: %d\n", ret); 283 257 ··· 299 267 offset = da - adsp->mem_reloc; 300 268 if (offset < 0 || offset + len > adsp->mem_size) 301 269 return NULL; 270 + 271 + if (is_iomem) 272 + *is_iomem = true; 302 273 303 274 return adsp->mem_region + offset; 304 275 } ··· 361 326 362 327 static int adsp_init_regulator(struct qcom_adsp *adsp) 363 328 { 364 - adsp->cx_supply = devm_regulator_get(adsp->dev, "cx"); 365 - if (IS_ERR(adsp->cx_supply)) 366 - return PTR_ERR(adsp->cx_supply); 329 + adsp->cx_supply = devm_regulator_get_optional(adsp->dev, "cx"); 330 + if (IS_ERR(adsp->cx_supply)) { 331 + if (PTR_ERR(adsp->cx_supply) == -ENODEV) 332 + adsp->cx_supply = NULL; 333 + else 334 + return PTR_ERR(adsp->cx_supply); 335 + } 367 336 368 - regulator_set_load(adsp->cx_supply, 100000); 337 + if (adsp->cx_supply) 338 + regulator_set_load(adsp->cx_supply, 100000); 369 339 370 - adsp->px_supply = devm_regulator_get(adsp->dev, "px"); 371 - return PTR_ERR_OR_ZERO(adsp->px_supply); 340 + adsp->px_supply = devm_regulator_get_optional(adsp->dev, "px"); 341 + if (IS_ERR(adsp->px_supply)) { 342 + if (PTR_ERR(adsp->px_supply) == -ENODEV) 343 + adsp->px_supply = NULL; 344 + else 345 + return PTR_ERR(adsp->px_supply); 346 + } 347 + 348 + return 0; 372 349 } 373 350 374 351 static int adsp_pds_attach(struct device *dev, struct device **devs, ··· 506 459 adsp->pas_id = desc->pas_id; 507 460 adsp->has_aggre2_clk = desc->has_aggre2_clk; 508 461 adsp->info_name = desc->sysmon_name; 462 + adsp->decrypt_shutdown = desc->decrypt_shutdown; 509 463 platform_set_drvdata(pdev, adsp); 510 464 511 - device_wakeup_enable(adsp->dev); 465 + ret = device_init_wakeup(adsp->dev, true); 466 + if (ret) 467 + goto free_rproc; 512 468 513 469 ret = adsp_alloc_memory_region(adsp); 514 470 if (ret) ··· 927 877 .ssctl_id = 0x22, 928 878 }; 929 879 880 + static const struct adsp_data sm8450_mpss_resource = { 881 + .crash_reason_smem = 421, 882 + .firmware_name = "modem.mdt", 883 + .pas_id = 4, 884 + .minidump_id = 3, 885 + .has_aggre2_clk = false, 886 + .auto_boot = false, 887 + .decrypt_shutdown = true, 888 + .proxy_pd_names = (char*[]){ 889 + "cx", 890 + "mss", 891 + NULL 892 + }, 893 + .load_state = "modem", 894 + .ssr_name = "mpss", 895 + .sysmon_name = "modem", 896 + .ssctl_id = 0x12, 897 + }; 898 + 930 899 static const struct of_device_id adsp_of_match[] = { 931 900 { .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init}, 932 901 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init}, ··· 985 916 { .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource}, 986 917 { .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource}, 987 918 { .compatible = "qcom,sm8450-slpi-pas", .data = &sm8350_slpi_resource}, 988 - { .compatible = "qcom,sm8450-mpss-pas", .data = &mpss_resource_init}, 919 + { .compatible = "qcom,sm8450-mpss-pas", .data = &sm8450_mpss_resource}, 989 920 { }, 990 921 }; 991 922 MODULE_DEVICE_TABLE(of, adsp_of_match);
+15 -3
drivers/remoteproc/qcom_sysmon.c
··· 41 41 struct completion comp; 42 42 struct completion ind_comp; 43 43 struct completion shutdown_comp; 44 + struct completion ssctl_comp; 44 45 struct mutex lock; 45 46 46 47 bool ssr_ack; ··· 446 445 447 446 svc->priv = sysmon; 448 447 448 + complete(&sysmon->ssctl_comp); 449 + 449 450 return 0; 450 451 } 451 452 ··· 504 501 .ssr_event = SSCTL_SSR_EVENT_AFTER_POWERUP 505 502 }; 506 503 504 + reinit_completion(&sysmon->ssctl_comp); 507 505 mutex_lock(&sysmon->state_lock); 508 506 sysmon->state = SSCTL_SSR_EVENT_AFTER_POWERUP; 509 507 blocking_notifier_call_chain(&sysmon_notifiers, 0, (void *)&event); ··· 512 508 513 509 mutex_lock(&sysmon_lock); 514 510 list_for_each_entry(target, &sysmon_list, node) { 515 - if (target == sysmon) 516 - continue; 517 - 518 511 mutex_lock(&target->state_lock); 512 + if (target == sysmon || target->state != SSCTL_SSR_EVENT_AFTER_POWERUP) { 513 + mutex_unlock(&target->state_lock); 514 + continue; 515 + } 516 + 519 517 event.subsys_name = target->name; 520 518 event.ssr_event = target->state; 521 519 ··· 550 544 /* Don't request graceful shutdown if we've crashed */ 551 545 if (crashed) 552 546 return; 547 + 548 + if (sysmon->ssctl_instance) { 549 + if (!wait_for_completion_timeout(&sysmon->ssctl_comp, HZ / 2)) 550 + dev_err(sysmon->dev, "timeout waiting for ssctl service\n"); 551 + } 553 552 554 553 if (sysmon->ssctl_version) 555 554 sysmon->shutdown_acked = ssctl_request_shutdown(sysmon); ··· 642 631 init_completion(&sysmon->comp); 643 632 init_completion(&sysmon->ind_comp); 644 633 init_completion(&sysmon->shutdown_comp); 634 + init_completion(&sysmon->ssctl_comp); 645 635 mutex_init(&sysmon->lock); 646 636 mutex_init(&sysmon->state_lock); 647 637
+8 -2
drivers/remoteproc/qcom_wcnss.c
··· 467 467 irq_handler_t thread_fn) 468 468 { 469 469 int ret; 470 + int irq_number; 470 471 471 472 ret = platform_get_irq_byname(pdev, name); 472 473 if (ret < 0 && optional) { ··· 478 477 return ret; 479 478 } 480 479 480 + irq_number = ret; 481 + 481 482 ret = devm_request_threaded_irq(&pdev->dev, ret, 482 483 NULL, thread_fn, 483 484 IRQF_TRIGGER_RISING | IRQF_ONESHOT, 484 485 "wcnss", wcnss); 485 - if (ret) 486 + if (ret) { 486 487 dev_err(&pdev->dev, "request %s IRQ failed\n", name); 488 + return ret; 489 + } 487 490 488 - return ret; 491 + /* Return the IRQ number if the IRQ was successfully acquired */ 492 + return irq_number; 489 493 } 490 494 491 495 static int wcnss_alloc_memory_region(struct qcom_wcnss *wcnss)
+18 -6
drivers/remoteproc/remoteproc_core.c
··· 59 59 60 60 /* Unique indices for remoteproc devices */ 61 61 static DEFINE_IDA(rproc_dev_index); 62 + static struct workqueue_struct *rproc_recovery_wq; 62 63 63 64 static const char * const rproc_crash_names[] = { 64 65 [RPROC_MMUFAULT] = "mmufault", ··· 462 461 struct rproc_vdev *rvdev = container_of(dev, struct rproc_vdev, dev); 463 462 464 463 of_reserved_mem_device_release(dev); 464 + dma_release_coherent_memory(dev); 465 465 466 466 kfree(rvdev); 467 467 } ··· 972 970 return 0; 973 971 } 974 972 975 - /* Register carveout in in list */ 973 + /* Register carveout in list */ 976 974 carveout = rproc_mem_entry_init(dev, NULL, 0, rsc->len, rsc->da, 977 975 rproc_alloc_carveout, 978 976 rproc_release_carveout, rsc->name); ··· 2436 2434 idr_destroy(&rproc->notifyids); 2437 2435 2438 2436 if (rproc->index >= 0) 2439 - ida_simple_remove(&rproc_dev_index, rproc->index); 2437 + ida_free(&rproc_dev_index, rproc->index); 2440 2438 2441 2439 kfree_const(rproc->firmware); 2442 2440 kfree_const(rproc->name); ··· 2553 2551 goto put_device; 2554 2552 2555 2553 /* Assign a unique device index and name */ 2556 - rproc->index = ida_simple_get(&rproc_dev_index, 0, 0, GFP_KERNEL); 2554 + rproc->index = ida_alloc(&rproc_dev_index, GFP_KERNEL); 2557 2555 if (rproc->index < 0) { 2558 - dev_err(dev, "ida_simple_get failed: %d\n", rproc->index); 2556 + dev_err(dev, "ida_alloc failed: %d\n", rproc->index); 2559 2557 goto put_device; 2560 2558 } 2561 2559 ··· 2764 2762 dev_err(&rproc->dev, "crash detected in %s: type %s\n", 2765 2763 rproc->name, rproc_crash_to_string(type)); 2766 2764 2767 - /* Have a worker handle the error; ensure system is not suspended */ 2768 - queue_work(system_freezable_wq, &rproc->crash_handler); 2765 + queue_work(rproc_recovery_wq, &rproc->crash_handler); 2769 2766 } 2770 2767 EXPORT_SYMBOL(rproc_report_crash); 2771 2768 ··· 2813 2812 2814 2813 static int __init remoteproc_init(void) 2815 2814 { 2815 + rproc_recovery_wq = alloc_workqueue("rproc_recovery_wq", 2816 + WQ_UNBOUND | WQ_FREEZABLE, 0); 2817 + if (!rproc_recovery_wq) { 2818 + pr_err("remoteproc: creation of rproc_recovery_wq failed\n"); 2819 + return -ENOMEM; 2820 + } 2821 + 2816 2822 rproc_init_sysfs(); 2817 2823 rproc_init_debugfs(); 2818 2824 rproc_init_cdev(); ··· 2833 2825 { 2834 2826 ida_destroy(&rproc_dev_index); 2835 2827 2828 + if (!rproc_recovery_wq) 2829 + return; 2830 + 2836 2831 rproc_exit_panic(); 2837 2832 rproc_exit_debugfs(); 2838 2833 rproc_exit_sysfs(); 2834 + destroy_workqueue(rproc_recovery_wq); 2839 2835 } 2840 2836 module_exit(remoteproc_exit); 2841 2837
+2
drivers/remoteproc/ti_k3_r5_remoteproc.c
··· 1655 1655 if (!cpdev) { 1656 1656 ret = -ENODEV; 1657 1657 dev_err(dev, "could not get R5 core platform device\n"); 1658 + of_node_put(child); 1658 1659 goto fail; 1659 1660 } 1660 1661 ··· 1664 1663 dev_err(dev, "k3_r5_core_of_init failed, ret = %d\n", 1665 1664 ret); 1666 1665 put_device(&cpdev->dev); 1666 + of_node_put(child); 1667 1667 goto fail; 1668 1668 } 1669 1669
+3
include/linux/dma-map-ops.h
··· 177 177 #ifdef CONFIG_DMA_DECLARE_COHERENT 178 178 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, 179 179 dma_addr_t device_addr, size_t size); 180 + void dma_release_coherent_memory(struct device *dev); 180 181 int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size, 181 182 dma_addr_t *dma_handle, void **ret); 182 183 int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr); ··· 189 188 { 190 189 return -ENOSYS; 191 190 } 191 + 192 192 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0) 193 193 #define dma_release_from_dev_coherent(dev, order, vaddr) (0) 194 194 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0) 195 + static inline void dma_release_coherent_memory(struct device *dev) { } 195 196 #endif /* CONFIG_DMA_DECLARE_COHERENT */ 196 197 197 198 #ifdef CONFIG_DMA_GLOBAL_POOL
+8 -2
kernel/dma/coherent.c
··· 74 74 return ERR_PTR(-ENOMEM); 75 75 } 76 76 77 - static void dma_release_coherent_memory(struct dma_coherent_mem *mem) 77 + static void _dma_release_coherent_memory(struct dma_coherent_mem *mem) 78 78 { 79 79 if (!mem) 80 80 return; ··· 126 126 127 127 ret = dma_assign_coherent_memory(dev, mem); 128 128 if (ret) 129 - dma_release_coherent_memory(mem); 129 + _dma_release_coherent_memory(mem); 130 130 return ret; 131 + } 132 + 133 + void dma_release_coherent_memory(struct device *dev) 134 + { 135 + if (dev) 136 + _dma_release_coherent_memory(dev->dma_mem); 131 137 } 132 138 133 139 static void *__dma_alloc_from_coherent(struct device *dev,