tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'gpio-updates-for-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio updates from Bartosz Golaszewski:
"We mostly have various improvements and refactoring all over the place
but also some interesting new features - like the virtio GPIO driver
that allows guest VMs to use host's GPIOs. We also have a new/old GPIO
driver for rockchip - this one has been split out of the pinctrl
driver.

Summary:

- new driver: gpio-virtio allowing a guest VM running linux to access
GPIO lines provided by the host

- split the GPIO driver out of the rockchip pin control driver

- add support for a new model to gpio-aspeed-sgpio, refactor the
driver and use generic device property interfaces, improve property
sanitization

- add ACPI support to gpio-tegra186

- improve the code setting the line names to support multiple GPIO
banks per device

- constify a bunch of OF functions in the core GPIO code and make the
declaration for one of the core OF functions we use consistent
within its header

- use software nodes in intel_quark_i2c_gpio

- add support for the gpio-line-names property in gpio-mt7621

- use the standard GPIO function for setting the GPIO names in
gpio-brcmstb

- fix a bunch of leaks and other bugs in gpio-mpc8xxx

- use generic pm callbacks in gpio-ml-ioh

- improve resource management and PM handling in gpio-mlxbf2

- modernize and improve the gpio-dwapb driver

- coding style improvements in gpio-rcar

- documentation fixes and improvements

- update the MAINTAINERS entry for gpio-zynq

- minor tweaks in several drivers"

* tag 'gpio-updates-for-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (35 commits)
gpio: mpc8xxx: Use 'devm_gpiochip_add_data()' to simplify the code and avoid a leak
gpio: mpc8xxx: Fix a potential double iounmap call in 'mpc8xxx_probe()'
gpio: mpc8xxx: Fix a resources leak in the error handling path of 'mpc8xxx_probe()'
gpio: viperboard: remove platform_set_drvdata() call in probe
gpio: virtio: Add missing mailings lists in MAINTAINERS entry
gpio: virtio: Fix sparse warnings
gpio: remove the obsolete MX35 3DS BOARD MC9S08DZ60 GPIO functions
gpio: max730x: Use the right include
gpio: Add virtio-gpio driver
gpio: mlxbf2: Use DEFINE_RES_MEM_NAMED() helper macro
gpio: mlxbf2: Use devm_platform_ioremap_resource()
gpio: mlxbf2: Drop wrong use of ACPI_PTR()
gpio: mlxbf2: Convert to device PM ops
gpio: dwapb: Get rid of legacy platform data
mfd: intel_quark_i2c_gpio: Convert GPIO to use software nodes
gpio: dwapb: Read GPIO base from gpio-base property
gpio: dwapb: Unify ACPI enumeration checks in get_irq() and configure_irqs()
gpiolib: Deduplicate forward declaration in the consumer.h header
MAINTAINERS: update gpio-zynq.yaml reference
gpio: tegra186: Add ACPI support
...

Linus Torvalds 5e6a5845 75b96f0e

+752 -447
+9 -1
Documentation/driver-api/gpio/consumer.rst
··· 72 72 * GPIOD_OUT_HIGH_OPEN_DRAIN same as GPIOD_OUT_HIGH but also enforce the line 73 73 to be electrically used with open drain. 74 74 75 + Note that the initial value is *logical* and the physical line level depends on 76 + whether the line is configured active high or active low (see 77 + :ref:`active_low_semantics`). 78 + 75 79 The two last flags are used for use cases where open drain is mandatory, such 76 80 as I2C: if the line is not already configured as open drain in the mappings 77 81 (see board.txt), then open drain will be enforced anyway and a warning will be ··· 256 252 spinlock-safe calls. 257 253 258 254 255 + .. _active_low_semantics: 256 + 259 257 The active low and open drain semantics 260 258 --------------------------------------- 261 259 As a consumer should not have to care about the physical line level, all of the ··· 315 309 void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value) 316 310 int gpiod_direction_output_raw(struct gpio_desc *desc, int value) 317 311 318 - The active low state of a GPIO can also be queried using the following call:: 312 + The active low state of a GPIO can also be queried and toggled using the 313 + following calls:: 319 314 320 315 int gpiod_is_active_low(const struct gpio_desc *desc) 316 + void gpiod_toggle_active_low(struct gpio_desc *desc) 321 317 322 318 Note that these functions should only be used with great moderation; a driver 323 319 should not have to care about the physical line level or open drain semantics.
+4 -7
Documentation/driver-api/gpio/driver.rst
··· 547 547 the irqchip can initialize. E.g. .dev and .can_sleep shall be set up 548 548 properly. 549 549 550 - - Nominally set all handlers to handle_bad_irq() in the setup call and pass 551 - handle_bad_irq() as flow handler parameter in gpiochip_irqchip_add() if it is 552 - expected for GPIO driver that irqchip .set_type() callback will be called 553 - before using/enabling each GPIO IRQ. Then set the handler to 554 - handle_level_irq() and/or handle_edge_irq() in the irqchip .set_type() 555 - callback depending on what your controller supports and what is requested 556 - by the consumer. 550 + - Nominally set gpio_irq_chip.handler to handle_bad_irq. Then, if your irqchip 551 + is cascaded, set the handler to handle_level_irq() and/or handle_edge_irq() 552 + in the irqchip .set_type() callback depending on what your controller 553 + supports and what is requested by the consumer. 557 554 558 555 559 556 Locking IRQ usage
+10 -1
MAINTAINERS
··· 19852 19852 F: fs/fuse/virtio_fs.c 19853 19853 F: include/uapi/linux/virtio_fs.h 19854 19854 19855 + VIRTIO GPIO DRIVER 19856 + M: Enrico Weigelt, metux IT consult <info@metux.net> 19857 + M: Viresh Kumar <vireshk@kernel.org> 19858 + L: linux-gpio@vger.kernel.org 19859 + L: virtualization@lists.linux-foundation.org 19860 + S: Maintained 19861 + F: drivers/gpio/gpio-virtio.c 19862 + F: include/uapi/linux/virtio_gpio.h 19863 + 19855 19864 VIRTIO GPU DRIVER 19856 19865 M: David Airlie <airlied@linux.ie> 19857 19866 M: Gerd Hoffmann <kraxel@redhat.com> ··· 20555 20546 R: Michal Simek <michal.simek@xilinx.com> 20556 20547 S: Maintained 20557 20548 F: Documentation/devicetree/bindings/gpio/gpio-xilinx.txt 20558 - F: Documentation/devicetree/bindings/gpio/gpio-zynq.txt 20549 + F: Documentation/devicetree/bindings/gpio/gpio-zynq.yaml 20559 20550 F: drivers/gpio/gpio-xilinx.c 20560 20551 F: drivers/gpio/gpio-zynq.c 20561 20552
+9 -6
drivers/gpio/Kconfig
··· 1018 1018 Say yes here to enable the max732x to be used as an interrupt 1019 1019 controller. It requires the driver to be built in the kernel. 1020 1020 1021 - config GPIO_MC9S08DZ60 1022 - bool "MX35 3DS BOARD MC9S08DZ60 GPIO functions" 1023 - depends on I2C=y && MACH_MX35_3DS 1024 - help 1025 - Select this to enable the MC9S08DZ60 GPIO driver 1026 - 1027 1021 config GPIO_PCA953X 1028 1022 tristate "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports" 1029 1023 select REGMAP_I2C ··· 1670 1676 User could use it through the script in 1671 1677 tools/testing/selftests/gpio/gpio-mockup.sh. Reference the usage in 1672 1678 it. 1679 + 1680 + config GPIO_VIRTIO 1681 + tristate "VirtIO GPIO support" 1682 + depends on VIRTIO 1683 + help 1684 + Say Y here to enable guest support for virtio-based GPIO controllers. 1685 + 1686 + These virtual GPIOs can be routed to real GPIOs or attached to 1687 + simulators on the host (like QEMU). 1673 1688 1674 1689 endmenu 1675 1690
+1 -1
drivers/gpio/Makefile
··· 92 92 obj-$(CONFIG_GPIO_MAX77650) += gpio-max77650.o 93 93 obj-$(CONFIG_GPIO_MB86S7X) += gpio-mb86s7x.o 94 94 obj-$(CONFIG_GPIO_MC33880) += gpio-mc33880.o 95 - obj-$(CONFIG_GPIO_MC9S08DZ60) += gpio-mc9s08dz60.o 96 95 obj-$(CONFIG_GPIO_MENZ127) += gpio-menz127.o 97 96 obj-$(CONFIG_GPIO_MERRIFIELD) += gpio-merrifield.o 98 97 obj-$(CONFIG_GPIO_ML_IOH) += gpio-ml-ioh.o ··· 165 166 obj-$(CONFIG_GPIO_UNIPHIER) += gpio-uniphier.o 166 167 obj-$(CONFIG_GPIO_VF610) += gpio-vf610.o 167 168 obj-$(CONFIG_GPIO_VIPERBOARD) += gpio-viperboard.o 169 + obj-$(CONFIG_GPIO_VIRTIO) += gpio-virtio.o 168 170 obj-$(CONFIG_GPIO_VISCONTI) += gpio-visconti.o 169 171 obj-$(CONFIG_GPIO_VR41XX) += gpio-vr41xx.o 170 172 obj-$(CONFIG_GPIO_VX855) += gpio-vx855.o
+110 -68
drivers/gpio/gpio-aspeed-sgpio.c
··· 17 17 #include <linux/spinlock.h> 18 18 #include <linux/string.h> 19 19 20 - /* 21 - * MAX_NR_HW_GPIO represents the number of actual hardware-supported GPIOs (ie, 22 - * slots within the clocked serial GPIO data). Since each HW GPIO is both an 23 - * input and an output, we provide MAX_NR_HW_GPIO * 2 lines on our gpiochip 24 - * device. 25 - * 26 - * We use SGPIO_OUTPUT_OFFSET to define the split between the inputs and 27 - * outputs; the inputs start at line 0, the outputs start at OUTPUT_OFFSET. 28 - */ 29 - #define MAX_NR_HW_SGPIO 80 30 - #define SGPIO_OUTPUT_OFFSET MAX_NR_HW_SGPIO 31 - 32 20 #define ASPEED_SGPIO_CTRL 0x54 33 21 34 - #define ASPEED_SGPIO_PINS_MASK GENMASK(9, 6) 35 22 #define ASPEED_SGPIO_CLK_DIV_MASK GENMASK(31, 16) 36 23 #define ASPEED_SGPIO_ENABLE BIT(0) 24 + #define ASPEED_SGPIO_PINS_SHIFT 6 25 + 26 + struct aspeed_sgpio_pdata { 27 + const u32 pin_mask; 28 + }; 37 29 38 30 struct aspeed_sgpio { 39 31 struct gpio_chip chip; 32 + struct irq_chip intc; 40 33 struct clk *pclk; 41 34 spinlock_t lock; 42 35 void __iomem *base; 43 36 int irq; 44 - int n_sgpio; 45 37 }; 46 38 47 39 struct aspeed_sgpio_bank { 48 - uint16_t val_regs; 49 - uint16_t rdata_reg; 50 - uint16_t irq_regs; 40 + u16 val_regs; 41 + u16 rdata_reg; 42 + u16 irq_regs; 43 + u16 tolerance_regs; 51 44 const char names[4][3]; 52 45 }; 53 46 ··· 56 63 .val_regs = 0x0000, 57 64 .rdata_reg = 0x0070, 58 65 .irq_regs = 0x0004, 66 + .tolerance_regs = 0x0018, 59 67 .names = { "A", "B", "C", "D" }, 60 68 }, 61 69 { 62 70 .val_regs = 0x001C, 63 71 .rdata_reg = 0x0074, 64 72 .irq_regs = 0x0020, 73 + .tolerance_regs = 0x0034, 65 74 .names = { "E", "F", "G", "H" }, 66 75 }, 67 76 { 68 77 .val_regs = 0x0038, 69 78 .rdata_reg = 0x0078, 70 79 .irq_regs = 0x003C, 71 - .names = { "I", "J" }, 80 + .tolerance_regs = 0x0050, 81 + .names = { "I", "J", "K", "L" }, 82 + }, 83 + { 84 + .val_regs = 0x0090, 85 + .rdata_reg = 0x007C, 86 + .irq_regs = 0x0094, 87 + .tolerance_regs = 0x00A8, 88 + .names = { "M", "N", "O", "P" }, 72 89 }, 73 90 }; 74 91 ··· 90 87 reg_irq_type1, 91 88 reg_irq_type2, 92 89 reg_irq_status, 90 + reg_tolerance, 93 91 }; 94 92 95 93 #define GPIO_VAL_VALUE 0x00 ··· 119 115 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2; 120 116 case reg_irq_status: 121 117 return gpio->base + bank->irq_regs + GPIO_IRQ_STATUS; 118 + case reg_tolerance: 119 + return gpio->base + bank->tolerance_regs; 122 120 default: 123 121 /* acturally if code runs to here, it's an error case */ 124 122 BUG(); 125 123 } 126 124 } 127 125 128 - #define GPIO_BANK(x) ((x % SGPIO_OUTPUT_OFFSET) >> 5) 129 - #define GPIO_OFFSET(x) ((x % SGPIO_OUTPUT_OFFSET) & 0x1f) 130 - #define GPIO_BIT(x) BIT(GPIO_OFFSET(x)) 126 + #define GPIO_BANK(x) ((x) >> 6) 127 + #define GPIO_OFFSET(x) ((x) & GENMASK(5, 0)) 128 + #define GPIO_BIT(x) BIT(GPIO_OFFSET(x) >> 1) 131 129 132 130 static const struct aspeed_sgpio_bank *to_bank(unsigned int offset) 133 131 { ··· 144 138 static int aspeed_sgpio_init_valid_mask(struct gpio_chip *gc, 145 139 unsigned long *valid_mask, unsigned int ngpios) 146 140 { 147 - struct aspeed_sgpio *sgpio = gpiochip_get_data(gc); 148 - int n = sgpio->n_sgpio; 149 - int c = SGPIO_OUTPUT_OFFSET - n; 150 - 151 - WARN_ON(ngpios < MAX_NR_HW_SGPIO * 2); 152 - 153 - /* input GPIOs in the lower range */ 154 - bitmap_set(valid_mask, 0, n); 155 - bitmap_clear(valid_mask, n, c); 156 - 157 - /* output GPIOS above SGPIO_OUTPUT_OFFSET */ 158 - bitmap_set(valid_mask, SGPIO_OUTPUT_OFFSET, n); 159 - bitmap_clear(valid_mask, SGPIO_OUTPUT_OFFSET + n, c); 160 - 141 + bitmap_set(valid_mask, 0, ngpios); 161 142 return 0; 162 143 } 163 144 164 145 static void aspeed_sgpio_irq_init_valid_mask(struct gpio_chip *gc, 165 146 unsigned long *valid_mask, unsigned int ngpios) 166 147 { 167 - struct aspeed_sgpio *sgpio = gpiochip_get_data(gc); 168 - int n = sgpio->n_sgpio; 148 + unsigned int i; 169 149 170 - WARN_ON(ngpios < MAX_NR_HW_SGPIO * 2); 171 - 172 - /* input GPIOs in the lower range */ 173 - bitmap_set(valid_mask, 0, n); 174 - bitmap_clear(valid_mask, n, ngpios - n); 150 + /* input GPIOs are even bits */ 151 + for (i = 0; i < ngpios; i++) { 152 + if (i % 2) 153 + clear_bit(i, valid_mask); 154 + } 175 155 } 176 156 177 157 static bool aspeed_sgpio_is_input(unsigned int offset) 178 158 { 179 - return offset < SGPIO_OUTPUT_OFFSET; 159 + return !(offset % 2); 180 160 } 181 161 182 162 static int aspeed_sgpio_get(struct gpio_chip *gc, unsigned int offset) ··· 401 409 chained_irq_exit(ic, desc); 402 410 } 403 411 404 - static struct irq_chip aspeed_sgpio_irqchip = { 405 - .name = "aspeed-sgpio", 406 - .irq_ack = aspeed_sgpio_irq_ack, 407 - .irq_mask = aspeed_sgpio_irq_mask, 408 - .irq_unmask = aspeed_sgpio_irq_unmask, 409 - .irq_set_type = aspeed_sgpio_set_type, 410 - }; 411 - 412 412 static int aspeed_sgpio_setup_irqs(struct aspeed_sgpio *gpio, 413 413 struct platform_device *pdev) 414 414 { ··· 423 439 iowrite32(0xffffffff, bank_reg(gpio, bank, reg_irq_status)); 424 440 } 425 441 442 + gpio->intc.name = dev_name(&pdev->dev); 443 + gpio->intc.irq_ack = aspeed_sgpio_irq_ack; 444 + gpio->intc.irq_mask = aspeed_sgpio_irq_mask; 445 + gpio->intc.irq_unmask = aspeed_sgpio_irq_unmask; 446 + gpio->intc.irq_set_type = aspeed_sgpio_set_type; 447 + 426 448 irq = &gpio->chip.irq; 427 - irq->chip = &aspeed_sgpio_irqchip; 449 + irq->chip = &gpio->intc; 428 450 irq->init_valid_mask = aspeed_sgpio_irq_init_valid_mask; 429 451 irq->handler = handle_bad_irq; 430 452 irq->default_type = IRQ_TYPE_NONE; ··· 453 463 return 0; 454 464 } 455 465 466 + static const struct aspeed_sgpio_pdata ast2400_sgpio_pdata = { 467 + .pin_mask = GENMASK(9, 6), 468 + }; 469 + 470 + static int aspeed_sgpio_reset_tolerance(struct gpio_chip *chip, 471 + unsigned int offset, bool enable) 472 + { 473 + struct aspeed_sgpio *gpio = gpiochip_get_data(chip); 474 + unsigned long flags; 475 + void __iomem *reg; 476 + u32 val; 477 + 478 + reg = bank_reg(gpio, to_bank(offset), reg_tolerance); 479 + 480 + spin_lock_irqsave(&gpio->lock, flags); 481 + 482 + val = readl(reg); 483 + 484 + if (enable) 485 + val |= GPIO_BIT(offset); 486 + else 487 + val &= ~GPIO_BIT(offset); 488 + 489 + writel(val, reg); 490 + 491 + spin_unlock_irqrestore(&gpio->lock, flags); 492 + 493 + return 0; 494 + } 495 + 496 + static int aspeed_sgpio_set_config(struct gpio_chip *chip, unsigned int offset, 497 + unsigned long config) 498 + { 499 + unsigned long param = pinconf_to_config_param(config); 500 + u32 arg = pinconf_to_config_argument(config); 501 + 502 + if (param == PIN_CONFIG_PERSIST_STATE) 503 + return aspeed_sgpio_reset_tolerance(chip, offset, arg); 504 + 505 + return -ENOTSUPP; 506 + } 507 + 508 + static const struct aspeed_sgpio_pdata ast2600_sgpiom_pdata = { 509 + .pin_mask = GENMASK(10, 6), 510 + }; 511 + 456 512 static const struct of_device_id aspeed_sgpio_of_table[] = { 457 - { .compatible = "aspeed,ast2400-sgpio" }, 458 - { .compatible = "aspeed,ast2500-sgpio" }, 513 + { .compatible = "aspeed,ast2400-sgpio", .data = &ast2400_sgpio_pdata, }, 514 + { .compatible = "aspeed,ast2500-sgpio", .data = &ast2400_sgpio_pdata, }, 515 + { .compatible = "aspeed,ast2600-sgpiom", .data = &ast2600_sgpiom_pdata, }, 459 516 {} 460 517 }; 461 518 ··· 510 473 511 474 static int __init aspeed_sgpio_probe(struct platform_device *pdev) 512 475 { 476 + u32 nr_gpios, sgpio_freq, sgpio_clk_div, gpio_cnt_regval, pin_mask; 477 + const struct aspeed_sgpio_pdata *pdata; 513 478 struct aspeed_sgpio *gpio; 514 - u32 nr_gpios, sgpio_freq, sgpio_clk_div; 515 - int rc; 516 479 unsigned long apb_freq; 480 + int rc; 517 481 518 482 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); 519 483 if (!gpio) ··· 524 486 if (IS_ERR(gpio->base)) 525 487 return PTR_ERR(gpio->base); 526 488 527 - rc = of_property_read_u32(pdev->dev.of_node, "ngpios", &nr_gpios); 489 + pdata = device_get_match_data(&pdev->dev); 490 + if (!pdata) 491 + return -EINVAL; 492 + 493 + pin_mask = pdata->pin_mask; 494 + 495 + rc = device_property_read_u32(&pdev->dev, "ngpios", &nr_gpios); 528 496 if (rc < 0) { 529 497 dev_err(&pdev->dev, "Could not read ngpios property\n"); 530 498 return -EINVAL; 531 - } else if (nr_gpios > MAX_NR_HW_SGPIO) { 532 - dev_err(&pdev->dev, "Number of GPIOs exceeds the maximum of %d: %d\n", 533 - MAX_NR_HW_SGPIO, nr_gpios); 499 + } else if (nr_gpios % 8) { 500 + dev_err(&pdev->dev, "Number of GPIOs not multiple of 8: %d\n", 501 + nr_gpios); 534 502 return -EINVAL; 535 503 } 536 - gpio->n_sgpio = nr_gpios; 537 504 538 - rc = of_property_read_u32(pdev->dev.of_node, "bus-frequency", &sgpio_freq); 505 + rc = device_property_read_u32(&pdev->dev, "bus-frequency", &sgpio_freq); 539 506 if (rc < 0) { 540 507 dev_err(&pdev->dev, "Could not read bus-frequency property\n"); 541 508 return -EINVAL; ··· 571 528 if (sgpio_clk_div > (1 << 16) - 1) 572 529 return -EINVAL; 573 530 574 - iowrite32(FIELD_PREP(ASPEED_SGPIO_CLK_DIV_MASK, sgpio_clk_div) | 575 - FIELD_PREP(ASPEED_SGPIO_PINS_MASK, (nr_gpios / 8)) | 576 - ASPEED_SGPIO_ENABLE, 577 - gpio->base + ASPEED_SGPIO_CTRL); 531 + gpio_cnt_regval = ((nr_gpios / 8) << ASPEED_SGPIO_PINS_SHIFT) & pin_mask; 532 + iowrite32(FIELD_PREP(ASPEED_SGPIO_CLK_DIV_MASK, sgpio_clk_div) | gpio_cnt_regval | 533 + ASPEED_SGPIO_ENABLE, gpio->base + ASPEED_SGPIO_CTRL); 578 534 579 535 spin_lock_init(&gpio->lock); 580 536 581 537 gpio->chip.parent = &pdev->dev; 582 - gpio->chip.ngpio = MAX_NR_HW_SGPIO * 2; 538 + gpio->chip.ngpio = nr_gpios * 2; 583 539 gpio->chip.init_valid_mask = aspeed_sgpio_init_valid_mask; 584 540 gpio->chip.direction_input = aspeed_sgpio_dir_in; 585 541 gpio->chip.direction_output = aspeed_sgpio_dir_out; ··· 587 545 gpio->chip.free = NULL; 588 546 gpio->chip.get = aspeed_sgpio_get; 589 547 gpio->chip.set = aspeed_sgpio_set; 590 - gpio->chip.set_config = NULL; 548 + gpio->chip.set_config = aspeed_sgpio_set_config; 591 549 gpio->chip.label = dev_name(&pdev->dev); 592 550 gpio->chip.base = -1; 593 551
+1 -44
drivers/gpio/gpio-brcmstb.c
··· 602 602 .resume_noirq = brcmstb_gpio_resume, 603 603 }; 604 604 605 - static void brcmstb_gpio_set_names(struct device *dev, 606 - struct brcmstb_gpio_bank *bank) 607 - { 608 - struct device_node *np = dev->of_node; 609 - const char **names; 610 - int nstrings, base; 611 - unsigned int i; 612 - 613 - base = bank->id * MAX_GPIO_PER_BANK; 614 - 615 - nstrings = of_property_count_strings(np, "gpio-line-names"); 616 - if (nstrings <= base) 617 - /* Line names not present */ 618 - return; 619 - 620 - names = devm_kcalloc(dev, MAX_GPIO_PER_BANK, sizeof(*names), 621 - GFP_KERNEL); 622 - if (!names) 623 - return; 624 - 625 - /* 626 - * Make sure to not index beyond the end of the number of descriptors 627 - * of the GPIO device. 628 - */ 629 - for (i = 0; i < bank->width; i++) { 630 - const char *name; 631 - int ret; 632 - 633 - ret = of_property_read_string_index(np, "gpio-line-names", 634 - base + i, &name); 635 - if (ret) { 636 - if (ret != -ENODATA) 637 - dev_err(dev, "unable to name line %d: %d\n", 638 - base + i, ret); 639 - break; 640 - } 641 - if (*name) 642 - names[i] = name; 643 - } 644 - 645 - bank->gc.names = names; 646 - } 647 - 648 605 static int brcmstb_gpio_probe(struct platform_device *pdev) 649 606 { 650 607 struct device *dev = &pdev->dev; ··· 715 758 gc->of_xlate = brcmstb_gpio_of_xlate; 716 759 /* not all ngpio lines are valid, will use bank width later */ 717 760 gc->ngpio = MAX_GPIO_PER_BANK; 761 + gc->offset = bank->id * MAX_GPIO_PER_BANK; 718 762 if (priv->parent_irq > 0) 719 763 gc->to_irq = brcmstb_gpio_to_irq; 720 764 ··· 726 768 need_wakeup_event |= !!__brcmstb_gpio_get_active_irqs(bank); 727 769 gc->write_reg(reg_base + GIO_MASK(bank->id), 0); 728 770 729 - brcmstb_gpio_set_names(dev, bank); 730 771 err = gpiochip_add_data(gc, bank); 731 772 if (err) { 732 773 dev_err(dev, "Could not add gpiochip for bank %d\n",
+34 -22
drivers/gpio/gpio-dwapb.c
··· 16 16 #include <linux/mod_devicetable.h> 17 17 #include <linux/module.h> 18 18 #include <linux/of.h> 19 - #include <linux/platform_data/gpio-dwapb.h> 20 19 #include <linux/platform_device.h> 21 20 #include <linux/property.h> 22 21 #include <linux/reset.h> ··· 47 48 48 49 #define DWAPB_DRIVER_NAME "gpio-dwapb" 49 50 #define DWAPB_MAX_PORTS 4 51 + #define DWAPB_MAX_GPIOS 32 50 52 51 53 #define GPIO_EXT_PORT_STRIDE 0x04 /* register stride 32 bits */ 52 54 #define GPIO_SWPORT_DR_STRIDE 0x0c /* register stride 3*32 bits */ ··· 64 64 #define DWAPB_NR_CLOCKS 2 65 65 66 66 struct dwapb_gpio; 67 + 68 + struct dwapb_port_property { 69 + struct fwnode_handle *fwnode; 70 + unsigned int idx; 71 + unsigned int ngpio; 72 + unsigned int gpio_base; 73 + int irq[DWAPB_MAX_GPIOS]; 74 + }; 75 + 76 + struct dwapb_platform_data { 77 + struct dwapb_port_property *properties; 78 + unsigned int nports; 79 + }; 67 80 68 81 #ifdef CONFIG_PM_SLEEP 69 82 /* Store GPIO context across system-wide suspend/resume transitions */ ··· 449 436 pirq->irqchip.irq_set_wake = dwapb_irq_set_wake; 450 437 #endif 451 438 452 - if (!pp->irq_shared) { 453 - girq->num_parents = pirq->nr_irqs; 454 - girq->parents = pirq->irq; 455 - girq->parent_handler_data = gpio; 456 - girq->parent_handler = dwapb_irq_handler; 457 - } else { 458 - /* This will let us handle the parent IRQ in the driver */ 439 + /* 440 + * Intel ACPI-based platforms mostly have the DesignWare APB GPIO 441 + * IRQ lane shared between several devices. In that case the parental 442 + * IRQ has to be handled in the shared way so to be properly delivered 443 + * to all the connected devices. 444 + */ 445 + if (has_acpi_companion(gpio->dev)) { 459 446 girq->num_parents = 0; 460 447 girq->parents = NULL; 461 448 girq->parent_handler = NULL; 462 449 463 - /* 464 - * Request a shared IRQ since where MFD would have devices 465 - * using the same irq pin 466 - */ 467 450 err = devm_request_irq(gpio->dev, pp->irq[0], 468 451 dwapb_irq_handler_mfd, 469 452 IRQF_SHARED, DWAPB_DRIVER_NAME, gpio); ··· 467 458 dev_err(gpio->dev, "error requesting IRQ\n"); 468 459 goto err_kfree_pirq; 469 460 } 461 + } else { 462 + girq->num_parents = pirq->nr_irqs; 463 + girq->parents = pirq->irq; 464 + girq->parent_handler_data = gpio; 465 + girq->parent_handler = dwapb_irq_handler; 470 466 } 471 467 472 468 girq->chip = &pirq->irqchip; ··· 595 581 pp->ngpio = DWAPB_MAX_GPIOS; 596 582 } 597 583 598 - pp->irq_shared = false; 599 584 pp->gpio_base = -1; 585 + 586 + /* For internal use only, new platforms mustn't exercise this */ 587 + if (is_software_node(fwnode)) 588 + fwnode_property_read_u32(fwnode, "gpio-base", &pp->gpio_base); 600 589 601 590 /* 602 591 * Only port A can provide interrupts in all configurations of ··· 687 670 unsigned int i; 688 671 struct dwapb_gpio *gpio; 689 672 int err; 673 + struct dwapb_platform_data *pdata; 690 674 struct device *dev = &pdev->dev; 691 - struct dwapb_platform_data *pdata = dev_get_platdata(dev); 692 675 693 - if (!pdata) { 694 - pdata = dwapb_gpio_get_pdata(dev); 695 - if (IS_ERR(pdata)) 696 - return PTR_ERR(pdata); 697 - } 698 - 699 - if (!pdata->nports) 700 - return -ENODEV; 676 + pdata = dwapb_gpio_get_pdata(dev); 677 + if (IS_ERR(pdata)) 678 + return PTR_ERR(pdata); 701 679 702 680 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); 703 681 if (!gpio)
-112
drivers/gpio/gpio-mc9s08dz60.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-or-later 2 - /* 3 - * Copyright 2009-2012 Freescale Semiconductor, Inc. All Rights Reserved. 4 - * 5 - * Author: Wu Guoxing <b39297@freescale.com> 6 - */ 7 - 8 - #include <linux/kernel.h> 9 - #include <linux/init.h> 10 - #include <linux/slab.h> 11 - #include <linux/i2c.h> 12 - #include <linux/gpio/driver.h> 13 - 14 - #define GPIO_GROUP_NUM 2 15 - #define GPIO_NUM_PER_GROUP 8 16 - #define GPIO_NUM (GPIO_GROUP_NUM*GPIO_NUM_PER_GROUP) 17 - 18 - struct mc9s08dz60 { 19 - struct i2c_client *client; 20 - struct gpio_chip chip; 21 - }; 22 - 23 - static void mc9s_gpio_to_reg_and_bit(int offset, u8 *reg, u8 *bit) 24 - { 25 - *reg = 0x20 + offset / GPIO_NUM_PER_GROUP; 26 - *bit = offset % GPIO_NUM_PER_GROUP; 27 - } 28 - 29 - static int mc9s08dz60_get_value(struct gpio_chip *gc, unsigned offset) 30 - { 31 - u8 reg, bit; 32 - s32 value; 33 - struct mc9s08dz60 *mc9s = gpiochip_get_data(gc); 34 - 35 - mc9s_gpio_to_reg_and_bit(offset, &reg, &bit); 36 - value = i2c_smbus_read_byte_data(mc9s->client, reg); 37 - 38 - return (value >= 0) ? (value >> bit) & 0x1 : 0; 39 - } 40 - 41 - static int mc9s08dz60_set(struct mc9s08dz60 *mc9s, unsigned offset, int val) 42 - { 43 - u8 reg, bit; 44 - s32 value; 45 - 46 - mc9s_gpio_to_reg_and_bit(offset, &reg, &bit); 47 - value = i2c_smbus_read_byte_data(mc9s->client, reg); 48 - if (value >= 0) { 49 - if (val) 50 - value |= 1 << bit; 51 - else 52 - value &= ~(1 << bit); 53 - 54 - return i2c_smbus_write_byte_data(mc9s->client, reg, value); 55 - } else 56 - return value; 57 - 58 - } 59 - 60 - 61 - static void mc9s08dz60_set_value(struct gpio_chip *gc, unsigned offset, int val) 62 - { 63 - struct mc9s08dz60 *mc9s = gpiochip_get_data(gc); 64 - 65 - mc9s08dz60_set(mc9s, offset, val); 66 - } 67 - 68 - static int mc9s08dz60_direction_output(struct gpio_chip *gc, 69 - unsigned offset, int val) 70 - { 71 - struct mc9s08dz60 *mc9s = gpiochip_get_data(gc); 72 - 73 - return mc9s08dz60_set(mc9s, offset, val); 74 - } 75 - 76 - static int mc9s08dz60_probe(struct i2c_client *client, 77 - const struct i2c_device_id *id) 78 - { 79 - struct mc9s08dz60 *mc9s; 80 - 81 - mc9s = devm_kzalloc(&client->dev, sizeof(*mc9s), GFP_KERNEL); 82 - if (!mc9s) 83 - return -ENOMEM; 84 - 85 - mc9s->chip.label = client->name; 86 - mc9s->chip.base = -1; 87 - mc9s->chip.parent = &client->dev; 88 - mc9s->chip.owner = THIS_MODULE; 89 - mc9s->chip.ngpio = GPIO_NUM; 90 - mc9s->chip.can_sleep = true; 91 - mc9s->chip.get = mc9s08dz60_get_value; 92 - mc9s->chip.set = mc9s08dz60_set_value; 93 - mc9s->chip.direction_output = mc9s08dz60_direction_output; 94 - mc9s->client = client; 95 - i2c_set_clientdata(client, mc9s); 96 - 97 - return devm_gpiochip_add_data(&client->dev, &mc9s->chip, mc9s); 98 - } 99 - 100 - static const struct i2c_device_id mc9s08dz60_id[] = { 101 - {"mc9s08dz60", 0}, 102 - {}, 103 - }; 104 - 105 - static struct i2c_driver mc9s08dz60_i2c_driver = { 106 - .driver = { 107 - .name = "mc9s08dz60", 108 - }, 109 - .probe = mc9s08dz60_probe, 110 - .id_table = mc9s08dz60_id, 111 - }; 112 - builtin_i2c_driver(mc9s08dz60_i2c_driver);
+11 -38
drivers/gpio/gpio-ml-ioh.c
··· 155 155 return 0; 156 156 } 157 157 158 - #ifdef CONFIG_PM 159 158 /* 160 159 * Save register configuration and disable interrupts. 161 160 */ 162 - static void ioh_gpio_save_reg_conf(struct ioh_gpio *chip) 161 + static void __maybe_unused ioh_gpio_save_reg_conf(struct ioh_gpio *chip) 163 162 { 164 163 int i; 165 164 ··· 184 185 /* 185 186 * This function restores the register configuration of the GPIO device. 186 187 */ 187 - static void ioh_gpio_restore_reg_conf(struct ioh_gpio *chip) 188 + static void __maybe_unused ioh_gpio_restore_reg_conf(struct ioh_gpio *chip) 188 189 { 189 190 int i; 190 191 ··· 206 207 &chip->reg->ioh_sel_reg[i]); 207 208 } 208 209 } 209 - #endif 210 210 211 211 static int ioh_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) 212 212 { ··· 520 522 kfree(chip); 521 523 } 522 524 523 - #ifdef CONFIG_PM 524 - static int ioh_gpio_suspend(struct pci_dev *pdev, pm_message_t state) 525 + static int __maybe_unused ioh_gpio_suspend(struct device *dev) 525 526 { 526 - s32 ret; 527 - struct ioh_gpio *chip = pci_get_drvdata(pdev); 527 + struct ioh_gpio *chip = dev_get_drvdata(dev); 528 528 unsigned long flags; 529 529 530 530 spin_lock_irqsave(&chip->spinlock, flags); 531 531 ioh_gpio_save_reg_conf(chip); 532 532 spin_unlock_irqrestore(&chip->spinlock, flags); 533 533 534 - ret = pci_save_state(pdev); 535 - if (ret) { 536 - dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret); 537 - return ret; 538 - } 539 - pci_disable_device(pdev); 540 - pci_set_power_state(pdev, PCI_D0); 541 - ret = pci_enable_wake(pdev, PCI_D0, 1); 542 - if (ret) 543 - dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret); 544 - 545 534 return 0; 546 535 } 547 536 548 - static int ioh_gpio_resume(struct pci_dev *pdev) 537 + static int __maybe_unused ioh_gpio_resume(struct device *dev) 549 538 { 550 - s32 ret; 551 - struct ioh_gpio *chip = pci_get_drvdata(pdev); 539 + struct ioh_gpio *chip = dev_get_drvdata(dev); 552 540 unsigned long flags; 553 - 554 - ret = pci_enable_wake(pdev, PCI_D0, 0); 555 - 556 - pci_set_power_state(pdev, PCI_D0); 557 - ret = pci_enable_device(pdev); 558 - if (ret) { 559 - dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret); 560 - return ret; 561 - } 562 - pci_restore_state(pdev); 563 541 564 542 spin_lock_irqsave(&chip->spinlock, flags); 565 543 iowrite32(0x01, &chip->reg->srst); ··· 545 571 546 572 return 0; 547 573 } 548 - #else 549 - #define ioh_gpio_suspend NULL 550 - #define ioh_gpio_resume NULL 551 - #endif 574 + 575 + static SIMPLE_DEV_PM_OPS(ioh_gpio_pm_ops, ioh_gpio_suspend, ioh_gpio_resume); 552 576 553 577 static const struct pci_device_id ioh_gpio_pcidev_id[] = { 554 578 { PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x802E) }, ··· 559 587 .id_table = ioh_gpio_pcidev_id, 560 588 .probe = ioh_gpio_probe, 561 589 .remove = ioh_gpio_remove, 562 - .suspend = ioh_gpio_suspend, 563 - .resume = ioh_gpio_resume 590 + .driver = { 591 + .pm = &ioh_gpio_pm_ops, 592 + }, 564 593 }; 565 594 566 595 module_pci_driver(ioh_gpio_driver);
+13 -30
drivers/gpio/gpio-mlxbf2.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 3 - #include <linux/acpi.h> 4 3 #include <linux/bitfield.h> 5 4 #include <linux/bitops.h> 6 5 #include <linux/device.h> ··· 7 8 #include <linux/io.h> 8 9 #include <linux/ioport.h> 9 10 #include <linux/kernel.h> 11 + #include <linux/mod_devicetable.h> 10 12 #include <linux/module.h> 11 13 #include <linux/platform_device.h> 12 14 #include <linux/pm.h> ··· 47 47 #define YU_GPIO_MODE0_SET 0x54 48 48 #define YU_GPIO_MODE0_CLEAR 0x58 49 49 50 - #ifdef CONFIG_PM 51 50 struct mlxbf2_gpio_context_save_regs { 52 51 u32 gpio_mode0; 53 52 u32 gpio_mode1; 54 53 }; 55 - #endif 56 54 57 55 /* BlueField-2 gpio block context structure. */ 58 56 struct mlxbf2_gpio_context { ··· 59 61 /* YU GPIO blocks address */ 60 62 void __iomem *gpio_io; 61 63 62 - #ifdef CONFIG_PM 63 64 struct mlxbf2_gpio_context_save_regs *csave_regs; 64 - #endif 65 65 }; 66 66 67 67 /* BlueField-2 gpio shared structure. */ ··· 69 73 struct mutex *lock; 70 74 }; 71 75 72 - static struct resource yu_arm_gpio_lock_res = { 73 - .start = YU_ARM_GPIO_LOCK_ADDR, 74 - .end = YU_ARM_GPIO_LOCK_ADDR + YU_ARM_GPIO_LOCK_SIZE - 1, 75 - .name = "YU_ARM_GPIO_LOCK", 76 - }; 76 + static struct resource yu_arm_gpio_lock_res = 77 + DEFINE_RES_MEM_NAMED(YU_ARM_GPIO_LOCK_ADDR, YU_ARM_GPIO_LOCK_SIZE, "YU_ARM_GPIO_LOCK"); 77 78 78 79 static DEFINE_MUTEX(yu_arm_gpio_lock_mutex); 79 80 ··· 225 232 struct mlxbf2_gpio_context *gs; 226 233 struct device *dev = &pdev->dev; 227 234 struct gpio_chip *gc; 228 - struct resource *res; 229 235 unsigned int npins; 230 236 int ret; 231 237 ··· 233 241 return -ENOMEM; 234 242 235 243 /* YU GPIO block address */ 236 - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 237 - if (!res) 238 - return -ENODEV; 239 - 240 - gs->gpio_io = devm_ioremap(dev, res->start, resource_size(res)); 241 - if (!gs->gpio_io) 242 - return -ENOMEM; 244 + gs->gpio_io = devm_platform_ioremap_resource(pdev, 0); 245 + if (IS_ERR(gs->gpio_io)) 246 + return PTR_ERR(gs->gpio_io); 243 247 244 248 ret = mlxbf2_gpio_get_lock_res(pdev); 245 249 if (ret) { ··· 272 284 return 0; 273 285 } 274 286 275 - #ifdef CONFIG_PM 276 - static int mlxbf2_gpio_suspend(struct platform_device *pdev, 277 - pm_message_t state) 287 + static int __maybe_unused mlxbf2_gpio_suspend(struct device *dev) 278 288 { 279 - struct mlxbf2_gpio_context *gs = platform_get_drvdata(pdev); 289 + struct mlxbf2_gpio_context *gs = dev_get_drvdata(dev); 280 290 281 291 gs->csave_regs->gpio_mode0 = readl(gs->gpio_io + 282 292 YU_GPIO_MODE0); ··· 284 298 return 0; 285 299 } 286 300 287 - static int mlxbf2_gpio_resume(struct platform_device *pdev) 301 + static int __maybe_unused mlxbf2_gpio_resume(struct device *dev) 288 302 { 289 - struct mlxbf2_gpio_context *gs = platform_get_drvdata(pdev); 303 + struct mlxbf2_gpio_context *gs = dev_get_drvdata(dev); 290 304 291 305 writel(gs->csave_regs->gpio_mode0, gs->gpio_io + 292 306 YU_GPIO_MODE0); ··· 295 309 296 310 return 0; 297 311 } 298 - #endif 312 + static SIMPLE_DEV_PM_OPS(mlxbf2_pm_ops, mlxbf2_gpio_suspend, mlxbf2_gpio_resume); 299 313 300 314 static const struct acpi_device_id __maybe_unused mlxbf2_gpio_acpi_match[] = { 301 315 { "MLNXBF22", 0 }, ··· 306 320 static struct platform_driver mlxbf2_gpio_driver = { 307 321 .driver = { 308 322 .name = "mlxbf2_gpio", 309 - .acpi_match_table = ACPI_PTR(mlxbf2_gpio_acpi_match), 323 + .acpi_match_table = mlxbf2_gpio_acpi_match, 324 + .pm = &mlxbf2_pm_ops, 310 325 }, 311 326 .probe = mlxbf2_gpio_probe, 312 - #ifdef CONFIG_PM 313 - .suspend = mlxbf2_gpio_suspend, 314 - .resume = mlxbf2_gpio_resume, 315 - #endif 316 327 }; 317 328 318 329 module_platform_driver(mlxbf2_gpio_driver);
+5 -8
drivers/gpio/gpio-mpc8xxx.c
··· 332 332 mpc8xxx_gc->regs + GPIO_DIR, NULL, 333 333 BGPIOF_BIG_ENDIAN); 334 334 if (ret) 335 - goto err; 335 + return ret; 336 336 dev_dbg(&pdev->dev, "GPIO registers are LITTLE endian\n"); 337 337 } else { 338 338 ret = bgpio_init(gc, &pdev->dev, 4, ··· 342 342 BGPIOF_BIG_ENDIAN 343 343 | BGPIOF_BIG_ENDIAN_BYTE_ORDER); 344 344 if (ret) 345 - goto err; 345 + return ret; 346 346 dev_dbg(&pdev->dev, "GPIO registers are BIG endian\n"); 347 347 } 348 348 ··· 380 380 is_acpi_node(fwnode)) 381 381 gc->write_reg(mpc8xxx_gc->regs + GPIO_IBE, 0xffffffff); 382 382 383 - ret = gpiochip_add_data(gc, mpc8xxx_gc); 383 + ret = devm_gpiochip_add_data(&pdev->dev, gc, mpc8xxx_gc); 384 384 if (ret) { 385 385 dev_err(&pdev->dev, 386 386 "GPIO chip registration failed with status %d\n", ret); 387 - goto err; 387 + return ret; 388 388 } 389 389 390 390 mpc8xxx_gc->irqn = platform_get_irq(pdev, 0); ··· 416 416 417 417 return 0; 418 418 err: 419 - iounmap(mpc8xxx_gc->regs); 419 + irq_domain_remove(mpc8xxx_gc->irq); 420 420 return ret; 421 421 } 422 422 ··· 428 428 irq_set_chained_handler_and_data(mpc8xxx_gc->irqn, NULL, NULL); 429 429 irq_domain_remove(mpc8xxx_gc->irq); 430 430 } 431 - 432 - gpiochip_remove(&mpc8xxx_gc->gc); 433 - iounmap(mpc8xxx_gc->regs); 434 431 435 432 return 0; 436 433 }
+1
drivers/gpio/gpio-mt7621.c
··· 239 239 if (!rg->chip.label) 240 240 return -ENOMEM; 241 241 242 + rg->chip.offset = bank * MTK_BANK_WIDTH; 242 243 rg->irq_chip.name = dev_name(dev); 243 244 rg->irq_chip.parent_device = dev; 244 245 rg->irq_chip.irq_unmask = mediatek_gpio_irq_unmask;
+2 -2
drivers/gpio/gpio-rcar.c
··· 564 564 } 565 565 566 566 if (p->info.has_inen) { 567 - pm_runtime_get_sync(p->dev); 567 + pm_runtime_get_sync(dev); 568 568 gpio_rcar_enable_inputs(p); 569 - pm_runtime_put(p->dev); 569 + pm_runtime_put(dev); 570 570 } 571 571 572 572 dev_info(dev, "driving %d GPIOs\n", npins);
+24 -6
drivers/gpio/gpio-tegra186.c
··· 607 607 if (!gpio) 608 608 return -ENOMEM; 609 609 610 - gpio->soc = of_device_get_match_data(&pdev->dev); 610 + gpio->soc = device_get_match_data(&pdev->dev); 611 611 612 612 gpio->secure = devm_platform_ioremap_resource_byname(pdev, "security"); 613 - if (IS_ERR(gpio->secure)) 614 - return PTR_ERR(gpio->secure); 613 + if (IS_ERR(gpio->secure)) { 614 + gpio->secure = devm_platform_ioremap_resource(pdev, 0); 615 + if (IS_ERR(gpio->secure)) 616 + return PTR_ERR(gpio->secure); 617 + } 615 618 616 619 gpio->base = devm_platform_ioremap_resource_byname(pdev, "gpio"); 617 - if (IS_ERR(gpio->base)) 618 - return PTR_ERR(gpio->base); 620 + if (IS_ERR(gpio->base)) { 621 + gpio->base = devm_platform_ioremap_resource(pdev, 1); 622 + if (IS_ERR(gpio->base)) 623 + return PTR_ERR(gpio->base); 624 + } 619 625 620 626 err = platform_irq_count(pdev); 621 627 if (err < 0) ··· 683 677 684 678 gpio->gpio.names = (const char * const *)names; 685 679 680 + #if defined(CONFIG_OF_GPIO) 686 681 gpio->gpio.of_node = pdev->dev.of_node; 687 682 gpio->gpio.of_gpio_n_cells = 2; 688 683 gpio->gpio.of_xlate = tegra186_gpio_of_xlate; 684 + #endif /* CONFIG_OF_GPIO */ 689 685 690 - gpio->intc.name = pdev->dev.of_node->name; 686 + gpio->intc.name = dev_name(&pdev->dev); 691 687 gpio->intc.irq_ack = tegra186_irq_ack; 692 688 gpio->intc.irq_mask = tegra186_irq_mask; 693 689 gpio->intc.irq_unmask = tegra186_irq_unmask; ··· 901 893 }; 902 894 MODULE_DEVICE_TABLE(of, tegra186_gpio_of_match); 903 895 896 + static const struct acpi_device_id tegra186_gpio_acpi_match[] = { 897 + { .id = "NVDA0108", .driver_data = (kernel_ulong_t)&tegra186_main_soc }, 898 + { .id = "NVDA0208", .driver_data = (kernel_ulong_t)&tegra186_aon_soc }, 899 + { .id = "NVDA0308", .driver_data = (kernel_ulong_t)&tegra194_main_soc }, 900 + { .id = "NVDA0408", .driver_data = (kernel_ulong_t)&tegra194_aon_soc }, 901 + {} 902 + }; 903 + MODULE_DEVICE_TABLE(acpi, tegra186_gpio_acpi_match); 904 + 904 905 static struct platform_driver tegra186_gpio_driver = { 905 906 .driver = { 906 907 .name = "tegra186-gpio", 907 908 .of_match_table = tegra186_gpio_of_match, 909 + .acpi_match_table = tegra186_gpio_acpi_match, 908 910 }, 909 911 .probe = tegra186_gpio_probe, 910 912 };
+3 -11
drivers/gpio/gpio-viperboard.c
··· 404 404 vb_gpio->gpioa.get = vprbrd_gpioa_get; 405 405 vb_gpio->gpioa.direction_input = vprbrd_gpioa_direction_input; 406 406 vb_gpio->gpioa.direction_output = vprbrd_gpioa_direction_output; 407 + 407 408 ret = devm_gpiochip_add_data(&pdev->dev, &vb_gpio->gpioa, vb_gpio); 408 - if (ret < 0) { 409 - dev_err(vb_gpio->gpioa.parent, "could not add gpio a"); 409 + if (ret < 0) 410 410 return ret; 411 - } 412 411 413 412 /* registering gpio b */ 414 413 vb_gpio->gpiob.label = "viperboard gpio b"; ··· 420 421 vb_gpio->gpiob.get = vprbrd_gpiob_get; 421 422 vb_gpio->gpiob.direction_input = vprbrd_gpiob_direction_input; 422 423 vb_gpio->gpiob.direction_output = vprbrd_gpiob_direction_output; 423 - ret = devm_gpiochip_add_data(&pdev->dev, &vb_gpio->gpiob, vb_gpio); 424 - if (ret < 0) { 425 - dev_err(vb_gpio->gpiob.parent, "could not add gpio b"); 426 - return ret; 427 - } 428 424 429 - platform_set_drvdata(pdev, vb_gpio); 430 - 431 - return ret; 425 + return devm_gpiochip_add_data(&pdev->dev, &vb_gpio->gpiob, vb_gpio); 432 426 } 433 427 434 428 static struct platform_driver vprbrd_gpio_driver = {
+374
drivers/gpio/gpio-virtio.c
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + /* 3 + * GPIO driver for virtio-based virtual GPIO controllers 4 + * 5 + * Copyright (C) 2021 metux IT consult 6 + * Enrico Weigelt, metux IT consult <info@metux.net> 7 + * 8 + * Copyright (C) 2021 Linaro. 9 + * Viresh Kumar <viresh.kumar@linaro.org> 10 + */ 11 + 12 + #include <linux/completion.h> 13 + #include <linux/err.h> 14 + #include <linux/gpio/driver.h> 15 + #include <linux/io.h> 16 + #include <linux/kernel.h> 17 + #include <linux/module.h> 18 + #include <linux/mutex.h> 19 + #include <linux/virtio_config.h> 20 + #include <uapi/linux/virtio_gpio.h> 21 + #include <uapi/linux/virtio_ids.h> 22 + 23 + struct virtio_gpio_line { 24 + struct mutex lock; /* Protects line operation */ 25 + struct completion completion; 26 + struct virtio_gpio_request req ____cacheline_aligned; 27 + struct virtio_gpio_response res ____cacheline_aligned; 28 + unsigned int rxlen; 29 + }; 30 + 31 + struct virtio_gpio { 32 + struct virtio_device *vdev; 33 + struct mutex lock; /* Protects virtqueue operation */ 34 + struct gpio_chip gc; 35 + struct virtio_gpio_line *lines; 36 + struct virtqueue *request_vq; 37 + }; 38 + 39 + static int _virtio_gpio_req(struct virtio_gpio *vgpio, u16 type, u16 gpio, 40 + u8 txvalue, u8 *rxvalue, void *response, u32 rxlen) 41 + { 42 + struct virtio_gpio_line *line = &vgpio->lines[gpio]; 43 + struct virtio_gpio_request *req = &line->req; 44 + struct virtio_gpio_response *res = response; 45 + struct scatterlist *sgs[2], req_sg, res_sg; 46 + struct device *dev = &vgpio->vdev->dev; 47 + int ret; 48 + 49 + /* 50 + * Prevent concurrent requests for the same line since we have 51 + * pre-allocated request/response buffers for each GPIO line. Moreover 52 + * Linux always accesses a GPIO line sequentially, so this locking shall 53 + * always go through without any delays. 54 + */ 55 + mutex_lock(&line->lock); 56 + 57 + req->type = cpu_to_le16(type); 58 + req->gpio = cpu_to_le16(gpio); 59 + req->value = cpu_to_le32(txvalue); 60 + 61 + sg_init_one(&req_sg, req, sizeof(*req)); 62 + sg_init_one(&res_sg, res, rxlen); 63 + sgs[0] = &req_sg; 64 + sgs[1] = &res_sg; 65 + 66 + line->rxlen = 0; 67 + reinit_completion(&line->completion); 68 + 69 + /* 70 + * Virtqueue callers need to ensure they don't call its APIs with other 71 + * virtqueue operations at the same time. 72 + */ 73 + mutex_lock(&vgpio->lock); 74 + ret = virtqueue_add_sgs(vgpio->request_vq, sgs, 1, 1, line, GFP_KERNEL); 75 + if (ret) { 76 + dev_err(dev, "failed to add request to vq\n"); 77 + mutex_unlock(&vgpio->lock); 78 + goto out; 79 + } 80 + 81 + virtqueue_kick(vgpio->request_vq); 82 + mutex_unlock(&vgpio->lock); 83 + 84 + if (!wait_for_completion_timeout(&line->completion, HZ)) { 85 + dev_err(dev, "GPIO operation timed out\n"); 86 + ret = -ETIMEDOUT; 87 + goto out; 88 + } 89 + 90 + if (unlikely(res->status != VIRTIO_GPIO_STATUS_OK)) { 91 + dev_err(dev, "GPIO request failed: %d\n", gpio); 92 + ret = -EINVAL; 93 + goto out; 94 + } 95 + 96 + if (unlikely(line->rxlen != rxlen)) { 97 + dev_err(dev, "GPIO operation returned incorrect len (%u : %u)\n", 98 + rxlen, line->rxlen); 99 + ret = -EINVAL; 100 + goto out; 101 + } 102 + 103 + if (rxvalue) 104 + *rxvalue = res->value; 105 + 106 + out: 107 + mutex_unlock(&line->lock); 108 + return ret; 109 + } 110 + 111 + static int virtio_gpio_req(struct virtio_gpio *vgpio, u16 type, u16 gpio, 112 + u8 txvalue, u8 *rxvalue) 113 + { 114 + struct virtio_gpio_line *line = &vgpio->lines[gpio]; 115 + struct virtio_gpio_response *res = &line->res; 116 + 117 + return _virtio_gpio_req(vgpio, type, gpio, txvalue, rxvalue, res, 118 + sizeof(*res)); 119 + } 120 + 121 + static void virtio_gpio_free(struct gpio_chip *gc, unsigned int gpio) 122 + { 123 + struct virtio_gpio *vgpio = gpiochip_get_data(gc); 124 + 125 + virtio_gpio_req(vgpio, VIRTIO_GPIO_MSG_SET_DIRECTION, gpio, 126 + VIRTIO_GPIO_DIRECTION_NONE, NULL); 127 + } 128 + 129 + static int virtio_gpio_get_direction(struct gpio_chip *gc, unsigned int gpio) 130 + { 131 + struct virtio_gpio *vgpio = gpiochip_get_data(gc); 132 + u8 direction; 133 + int ret; 134 + 135 + ret = virtio_gpio_req(vgpio, VIRTIO_GPIO_MSG_GET_DIRECTION, gpio, 0, 136 + &direction); 137 + if (ret) 138 + return ret; 139 + 140 + switch (direction) { 141 + case VIRTIO_GPIO_DIRECTION_IN: 142 + return GPIO_LINE_DIRECTION_IN; 143 + case VIRTIO_GPIO_DIRECTION_OUT: 144 + return GPIO_LINE_DIRECTION_OUT; 145 + default: 146 + return -EINVAL; 147 + } 148 + } 149 + 150 + static int virtio_gpio_direction_input(struct gpio_chip *gc, unsigned int gpio) 151 + { 152 + struct virtio_gpio *vgpio = gpiochip_get_data(gc); 153 + 154 + return virtio_gpio_req(vgpio, VIRTIO_GPIO_MSG_SET_DIRECTION, gpio, 155 + VIRTIO_GPIO_DIRECTION_IN, NULL); 156 + } 157 + 158 + static int virtio_gpio_direction_output(struct gpio_chip *gc, unsigned int gpio, 159 + int value) 160 + { 161 + struct virtio_gpio *vgpio = gpiochip_get_data(gc); 162 + int ret; 163 + 164 + ret = virtio_gpio_req(vgpio, VIRTIO_GPIO_MSG_SET_VALUE, gpio, value, NULL); 165 + if (ret) 166 + return ret; 167 + 168 + return virtio_gpio_req(vgpio, VIRTIO_GPIO_MSG_SET_DIRECTION, gpio, 169 + VIRTIO_GPIO_DIRECTION_OUT, NULL); 170 + } 171 + 172 + static int virtio_gpio_get(struct gpio_chip *gc, unsigned int gpio) 173 + { 174 + struct virtio_gpio *vgpio = gpiochip_get_data(gc); 175 + u8 value; 176 + int ret; 177 + 178 + ret = virtio_gpio_req(vgpio, VIRTIO_GPIO_MSG_GET_VALUE, gpio, 0, &value); 179 + return ret ? ret : value; 180 + } 181 + 182 + static void virtio_gpio_set(struct gpio_chip *gc, unsigned int gpio, int value) 183 + { 184 + struct virtio_gpio *vgpio = gpiochip_get_data(gc); 185 + 186 + virtio_gpio_req(vgpio, VIRTIO_GPIO_MSG_SET_VALUE, gpio, value, NULL); 187 + } 188 + 189 + static void virtio_gpio_request_vq(struct virtqueue *vq) 190 + { 191 + struct virtio_gpio_line *line; 192 + unsigned int len; 193 + 194 + do { 195 + line = virtqueue_get_buf(vq, &len); 196 + if (!line) 197 + return; 198 + 199 + line->rxlen = len; 200 + complete(&line->completion); 201 + } while (1); 202 + } 203 + 204 + static void virtio_gpio_free_vqs(struct virtio_device *vdev) 205 + { 206 + vdev->config->reset(vdev); 207 + vdev->config->del_vqs(vdev); 208 + } 209 + 210 + static int virtio_gpio_alloc_vqs(struct virtio_gpio *vgpio, 211 + struct virtio_device *vdev) 212 + { 213 + const char * const names[] = { "requestq" }; 214 + vq_callback_t *cbs[] = { 215 + virtio_gpio_request_vq, 216 + }; 217 + struct virtqueue *vqs[1] = { NULL }; 218 + int ret; 219 + 220 + ret = virtio_find_vqs(vdev, 1, vqs, cbs, names, NULL); 221 + if (ret) { 222 + dev_err(&vdev->dev, "failed to find vqs: %d\n", ret); 223 + return ret; 224 + } 225 + 226 + if (!vqs[0]) { 227 + dev_err(&vdev->dev, "failed to find requestq vq\n"); 228 + return -ENODEV; 229 + } 230 + vgpio->request_vq = vqs[0]; 231 + 232 + return 0; 233 + } 234 + 235 + static const char **virtio_gpio_get_names(struct virtio_gpio *vgpio, 236 + u32 gpio_names_size, u16 ngpio) 237 + { 238 + struct virtio_gpio_response_get_names *res; 239 + struct device *dev = &vgpio->vdev->dev; 240 + u8 *gpio_names, *str; 241 + const char **names; 242 + int i, ret, len; 243 + 244 + if (!gpio_names_size) 245 + return NULL; 246 + 247 + len = sizeof(*res) + gpio_names_size; 248 + res = devm_kzalloc(dev, len, GFP_KERNEL); 249 + if (!res) 250 + return NULL; 251 + gpio_names = res->value; 252 + 253 + ret = _virtio_gpio_req(vgpio, VIRTIO_GPIO_MSG_GET_NAMES, 0, 0, NULL, 254 + res, len); 255 + if (ret) { 256 + dev_err(dev, "Failed to get GPIO names: %d\n", ret); 257 + return NULL; 258 + } 259 + 260 + names = devm_kcalloc(dev, ngpio, sizeof(*names), GFP_KERNEL); 261 + if (!names) 262 + return NULL; 263 + 264 + /* NULL terminate the string instead of checking it */ 265 + gpio_names[gpio_names_size - 1] = '\0'; 266 + 267 + for (i = 0, str = gpio_names; i < ngpio; i++) { 268 + names[i] = str; 269 + str += strlen(str) + 1; /* zero-length strings are allowed */ 270 + 271 + if (str > gpio_names + gpio_names_size) { 272 + dev_err(dev, "gpio_names block is too short (%d)\n", i); 273 + return NULL; 274 + } 275 + } 276 + 277 + return names; 278 + } 279 + 280 + static int virtio_gpio_probe(struct virtio_device *vdev) 281 + { 282 + struct virtio_gpio_config config; 283 + struct device *dev = &vdev->dev; 284 + struct virtio_gpio *vgpio; 285 + u32 gpio_names_size; 286 + u16 ngpio; 287 + int ret, i; 288 + 289 + vgpio = devm_kzalloc(dev, sizeof(*vgpio), GFP_KERNEL); 290 + if (!vgpio) 291 + return -ENOMEM; 292 + 293 + /* Read configuration */ 294 + virtio_cread_bytes(vdev, 0, &config, sizeof(config)); 295 + gpio_names_size = le32_to_cpu(config.gpio_names_size); 296 + ngpio = le16_to_cpu(config.ngpio); 297 + if (!ngpio) { 298 + dev_err(dev, "Number of GPIOs can't be zero\n"); 299 + return -EINVAL; 300 + } 301 + 302 + vgpio->lines = devm_kcalloc(dev, ngpio, sizeof(*vgpio->lines), GFP_KERNEL); 303 + if (!vgpio->lines) 304 + return -ENOMEM; 305 + 306 + for (i = 0; i < ngpio; i++) { 307 + mutex_init(&vgpio->lines[i].lock); 308 + init_completion(&vgpio->lines[i].completion); 309 + } 310 + 311 + mutex_init(&vgpio->lock); 312 + vdev->priv = vgpio; 313 + 314 + vgpio->vdev = vdev; 315 + vgpio->gc.free = virtio_gpio_free; 316 + vgpio->gc.get_direction = virtio_gpio_get_direction; 317 + vgpio->gc.direction_input = virtio_gpio_direction_input; 318 + vgpio->gc.direction_output = virtio_gpio_direction_output; 319 + vgpio->gc.get = virtio_gpio_get; 320 + vgpio->gc.set = virtio_gpio_set; 321 + vgpio->gc.ngpio = ngpio; 322 + vgpio->gc.base = -1; /* Allocate base dynamically */ 323 + vgpio->gc.label = dev_name(dev); 324 + vgpio->gc.parent = dev; 325 + vgpio->gc.owner = THIS_MODULE; 326 + vgpio->gc.can_sleep = true; 327 + 328 + ret = virtio_gpio_alloc_vqs(vgpio, vdev); 329 + if (ret) 330 + return ret; 331 + 332 + /* Mark the device ready to perform operations from within probe() */ 333 + virtio_device_ready(vdev); 334 + 335 + vgpio->gc.names = virtio_gpio_get_names(vgpio, gpio_names_size, ngpio); 336 + 337 + ret = gpiochip_add_data(&vgpio->gc, vgpio); 338 + if (ret) { 339 + virtio_gpio_free_vqs(vdev); 340 + dev_err(dev, "Failed to add virtio-gpio controller\n"); 341 + } 342 + 343 + return ret; 344 + } 345 + 346 + static void virtio_gpio_remove(struct virtio_device *vdev) 347 + { 348 + struct virtio_gpio *vgpio = vdev->priv; 349 + 350 + gpiochip_remove(&vgpio->gc); 351 + virtio_gpio_free_vqs(vdev); 352 + } 353 + 354 + static const struct virtio_device_id id_table[] = { 355 + { VIRTIO_ID_GPIO, VIRTIO_DEV_ANY_ID }, 356 + {}, 357 + }; 358 + MODULE_DEVICE_TABLE(virtio, id_table); 359 + 360 + static struct virtio_driver virtio_gpio_driver = { 361 + .id_table = id_table, 362 + .probe = virtio_gpio_probe, 363 + .remove = virtio_gpio_remove, 364 + .driver = { 365 + .name = KBUILD_MODNAME, 366 + .owner = THIS_MODULE, 367 + }, 368 + }; 369 + module_virtio_driver(virtio_gpio_driver); 370 + 371 + MODULE_AUTHOR("Enrico Weigelt, metux IT consult <info@metux.net>"); 372 + MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>"); 373 + MODULE_DESCRIPTION("VirtIO GPIO driver"); 374 + MODULE_LICENSE("GPL");
+1 -1
drivers/gpio/gpiolib-devres.c
··· 145 145 * In case of error an ERR_PTR() is returned. 146 146 */ 147 147 struct gpio_desc *devm_gpiod_get_from_of_node(struct device *dev, 148 - struct device_node *node, 148 + const struct device_node *node, 149 149 const char *propname, int index, 150 150 enum gpiod_flags dflags, 151 151 const char *label)
+8 -8
drivers/gpio/gpiolib-of.c
··· 122 122 bool of_gpio_need_valid_mask(const struct gpio_chip *gc) 123 123 { 124 124 int size; 125 - struct device_node *np = gc->of_node; 125 + const struct device_node *np = gc->of_node; 126 126 127 127 size = of_property_count_u32_elems(np, "gpio-reserved-ranges"); 128 128 if (size > 0 && size % 2 == 0) ··· 130 130 return false; 131 131 } 132 132 133 - static void of_gpio_flags_quirks(struct device_node *np, 133 + static void of_gpio_flags_quirks(const struct device_node *np, 134 134 const char *propname, 135 135 enum of_gpio_flags *flags, 136 136 int index) ··· 236 236 * value on the error condition. If @flags is not NULL the function also fills 237 237 * in flags for the GPIO. 238 238 */ 239 - static struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np, 239 + static struct gpio_desc *of_get_named_gpiod_flags(const struct device_node *np, 240 240 const char *propname, int index, enum of_gpio_flags *flags) 241 241 { 242 242 struct of_phandle_args gpiospec; ··· 275 275 return desc; 276 276 } 277 277 278 - int of_get_named_gpio_flags(struct device_node *np, const char *list_name, 278 + int of_get_named_gpio_flags(const struct device_node *np, const char *list_name, 279 279 int index, enum of_gpio_flags *flags) 280 280 { 281 281 struct gpio_desc *desc; ··· 303 303 * 304 304 * In case of error an ERR_PTR() is returned. 305 305 */ 306 - struct gpio_desc *gpiod_get_from_of_node(struct device_node *node, 306 + struct gpio_desc *gpiod_get_from_of_node(const struct device_node *node, 307 307 const char *propname, int index, 308 308 enum gpiod_flags dflags, 309 309 const char *label) ··· 373 373 enum of_gpio_flags *of_flags) 374 374 { 375 375 char prop_name[32]; /* 32 is max size of property name */ 376 - struct device_node *np = dev->of_node; 376 + const struct device_node *np = dev->of_node; 377 377 struct gpio_desc *desc; 378 378 379 379 /* ··· 404 404 unsigned int idx, 405 405 unsigned long *flags) 406 406 { 407 - struct device_node *np = dev->of_node; 407 + const struct device_node *np = dev->of_node; 408 408 409 409 if (!IS_ENABLED(CONFIG_SPI_MASTER)) 410 410 return ERR_PTR(-ENOENT); ··· 440 440 "wlf,ldo1ena", /* WM8994 */ 441 441 "wlf,ldo2ena", /* WM8994 */ 442 442 }; 443 - struct device_node *np = dev->of_node; 443 + const struct device_node *np = dev->of_node; 444 444 struct gpio_desc *desc; 445 445 int i; 446 446
+27 -5
drivers/gpio/gpiolib.c
··· 382 382 if (count < 0) 383 383 return 0; 384 384 385 - if (count > gdev->ngpio) { 386 - dev_warn(&gdev->dev, "gpio-line-names is length %d but should be at most length %d", 387 - count, gdev->ngpio); 388 - count = gdev->ngpio; 385 + /* 386 + * When offset is set in the driver side we assume the driver internally 387 + * is using more than one gpiochip per the same device. We have to stop 388 + * setting friendly names if the specified ones with 'gpio-line-names' 389 + * are less than the offset in the device itself. This means all the 390 + * lines are not present for every single pin within all the internal 391 + * gpiochips. 392 + */ 393 + if (count <= chip->offset) { 394 + dev_warn(&gdev->dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n", 395 + count, chip->offset); 396 + return 0; 389 397 } 390 398 391 399 names = kcalloc(count, sizeof(*names), GFP_KERNEL); ··· 408 400 return ret; 409 401 } 410 402 403 + /* 404 + * When more that one gpiochip per device is used, 'count' can 405 + * contain at most number gpiochips x chip->ngpio. We have to 406 + * correctly distribute all defined lines taking into account 407 + * chip->offset as starting point from where we will assign 408 + * the names to pins from the 'names' array. Since property 409 + * 'gpio-line-names' cannot contains gaps, we have to be sure 410 + * we only assign those pins that really exists since chip->ngpio 411 + * can be different of the chip->offset. 412 + */ 413 + count = (count > chip->offset) ? count - chip->offset : count; 414 + if (count > chip->ngpio) 415 + count = chip->ngpio; 416 + 411 417 for (i = 0; i < count; i++) 412 - gdev->descs[i].name = names[i]; 418 + gdev->descs[i].name = names[chip->offset + i]; 413 419 414 420 kfree(names); 415 421
+37 -34
drivers/mfd/intel_quark_i2c_gpio.c
··· 17 17 #include <linux/clk-provider.h> 18 18 #include <linux/dmi.h> 19 19 #include <linux/i2c.h> 20 - #include <linux/platform_data/gpio-dwapb.h> 21 20 #include <linux/property.h> 22 21 23 22 /* PCI BAR for register base address */ ··· 26 27 /* ACPI _ADR value to match the child node */ 27 28 #define MFD_ACPI_MATCH_GPIO 0ULL 28 29 #define MFD_ACPI_MATCH_I2C 1ULL 29 - 30 - /* The base GPIO number under GPIOLIB framework */ 31 - #define INTEL_QUARK_MFD_GPIO_BASE 8 32 - 33 - /* The default number of South-Cluster GPIO on Quark. */ 34 - #define INTEL_QUARK_MFD_NGPIO 8 35 - 36 - /* The DesignWare GPIO ports on Quark. */ 37 - #define INTEL_QUARK_GPIO_NPORTS 1 38 30 39 31 #define INTEL_QUARK_IORES_MEM 0 40 32 #define INTEL_QUARK_IORES_IRQ 1 ··· 101 111 [INTEL_QUARK_IORES_MEM] = { 102 112 .flags = IORESOURCE_MEM, 103 113 }, 114 + [INTEL_QUARK_IORES_IRQ] = { 115 + .flags = IORESOURCE_IRQ, 116 + }, 104 117 }; 105 118 106 119 static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = { 107 120 .adr = MFD_ACPI_MATCH_GPIO, 121 + }; 122 + 123 + static const struct software_node intel_quark_gpio_controller_node = { 124 + .name = "intel-quark-gpio-controller", 125 + }; 126 + 127 + static const struct property_entry intel_quark_gpio_portA_properties[] = { 128 + PROPERTY_ENTRY_U32("reg", 0), 129 + PROPERTY_ENTRY_U32("snps,nr-gpios", 8), 130 + PROPERTY_ENTRY_U32("gpio-base", 8), 131 + { } 132 + }; 133 + 134 + static const struct software_node intel_quark_gpio_portA_node = { 135 + .name = "portA", 136 + .parent = &intel_quark_gpio_controller_node, 137 + .properties = intel_quark_gpio_portA_properties, 138 + }; 139 + 140 + static const struct software_node *intel_quark_gpio_node_group[] = { 141 + &intel_quark_gpio_controller_node, 142 + &intel_quark_gpio_portA_node, 143 + NULL 108 144 }; 109 145 110 146 static struct mfd_cell intel_quark_mfd_cells[] = { ··· 219 203 { 220 204 struct mfd_cell *cell = &intel_quark_mfd_cells[MFD_GPIO_BAR]; 221 205 struct resource *res = intel_quark_gpio_res; 222 - struct dwapb_platform_data *pdata; 223 - struct device *dev = &pdev->dev; 206 + int ret; 224 207 225 208 res[INTEL_QUARK_IORES_MEM].start = pci_resource_start(pdev, MFD_GPIO_BAR); 226 209 res[INTEL_QUARK_IORES_MEM].end = pci_resource_end(pdev, MFD_GPIO_BAR); 227 210 228 - pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 229 - if (!pdata) 230 - return -ENOMEM; 211 + res[INTEL_QUARK_IORES_IRQ].start = pci_irq_vector(pdev, 0); 212 + res[INTEL_QUARK_IORES_IRQ].end = pci_irq_vector(pdev, 0); 231 213 232 - /* For intel quark x1000, it has only one port: portA */ 233 - pdata->nports = INTEL_QUARK_GPIO_NPORTS; 234 - pdata->properties = devm_kcalloc(dev, pdata->nports, 235 - sizeof(*pdata->properties), 236 - GFP_KERNEL); 237 - if (!pdata->properties) 238 - return -ENOMEM; 214 + ret = software_node_register_node_group(intel_quark_gpio_node_group); 215 + if (ret) 216 + return ret; 239 217 240 - /* Set the properties for portA */ 241 - pdata->properties->fwnode = NULL; 242 - pdata->properties->idx = 0; 243 - pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO; 244 - pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE; 245 - pdata->properties->irq[0] = pci_irq_vector(pdev, 0); 246 - pdata->properties->irq_shared = true; 247 - 248 - cell->platform_data = pdata; 249 - cell->pdata_size = sizeof(*pdata); 250 - 218 + cell->swnode = &intel_quark_gpio_controller_node; 251 219 return 0; 252 220 } 253 221 ··· 274 274 ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0, 275 275 NULL); 276 276 if (ret) 277 - goto err_free_irq_vectors; 277 + goto err_unregister_gpio_node_group; 278 278 279 279 return 0; 280 280 281 + err_unregister_gpio_node_group: 282 + software_node_unregister_node_group(intel_quark_gpio_node_group); 281 283 err_free_irq_vectors: 282 284 pci_free_irq_vectors(pdev); 283 285 err_unregister_i2c_clk: ··· 290 288 static void intel_quark_mfd_remove(struct pci_dev *pdev) 291 289 { 292 290 mfd_remove_devices(&pdev->dev); 291 + software_node_unregister_node_group(intel_quark_gpio_node_group); 293 292 pci_free_irq_vectors(pdev); 294 293 intel_quark_unregister_i2c_clk(&pdev->dev); 295 294 }
+6 -8
include/linux/gpio/consumer.h
··· 609 609 #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_OF_GPIO) 610 610 struct device_node; 611 611 612 - struct gpio_desc *gpiod_get_from_of_node(struct device_node *node, 612 + struct gpio_desc *gpiod_get_from_of_node(const struct device_node *node, 613 613 const char *propname, int index, 614 614 enum gpiod_flags dflags, 615 615 const char *label); ··· 619 619 struct device_node; 620 620 621 621 static inline 622 - struct gpio_desc *gpiod_get_from_of_node(struct device_node *node, 622 + struct gpio_desc *gpiod_get_from_of_node(const struct device_node *node, 623 623 const char *propname, int index, 624 624 enum gpiod_flags dflags, 625 625 const char *label) ··· 633 633 struct device_node; 634 634 635 635 struct gpio_desc *devm_gpiod_get_from_of_node(struct device *dev, 636 - struct device_node *node, 636 + const struct device_node *node, 637 637 const char *propname, int index, 638 638 enum gpiod_flags dflags, 639 639 const char *label); ··· 644 644 645 645 static inline 646 646 struct gpio_desc *devm_gpiod_get_from_of_node(struct device *dev, 647 - struct device_node *node, 647 + const struct device_node *node, 648 648 const char *propname, int index, 649 649 enum gpiod_flags dflags, 650 650 const char *label) ··· 680 680 unsigned int quirks; 681 681 }; 682 682 683 - #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_ACPI) 684 - 685 683 struct acpi_device; 684 + 685 + #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_ACPI) 686 686 687 687 int acpi_dev_add_driver_gpios(struct acpi_device *adev, 688 688 const struct acpi_gpio_mapping *gpios); ··· 695 695 struct gpio_desc *acpi_get_and_request_gpiod(char *path, int pin, char *label); 696 696 697 697 #else /* CONFIG_GPIOLIB && CONFIG_ACPI */ 698 - 699 - struct acpi_device; 700 698 701 699 static inline int acpi_dev_add_driver_gpios(struct acpi_device *adev, 702 700 const struct acpi_gpio_mapping *gpios)
+4
include/linux/gpio/driver.h
··· 312 312 * get rid of the static GPIO number space in the long run. 313 313 * @ngpio: the number of GPIOs handled by this controller; the last GPIO 314 314 * handled is (base + ngpio - 1). 315 + * @offset: when multiple gpio chips belong to the same device this 316 + * can be used as offset within the device so friendly names can 317 + * be properly assigned. 315 318 * @names: if set, must be an array of strings to use as alternative 316 319 * names for the GPIOs in this chip. Any entry in the array 317 320 * may be NULL if there is no alias for the GPIO, however the ··· 401 398 402 399 int base; 403 400 u16 ngpio; 401 + u16 offset; 404 402 const char *const *names; 405 403 bool can_sleep; 406 404
+1 -1
include/linux/of.h
··· 896 896 return -ENOSYS; 897 897 } 898 898 899 - static inline int of_count_phandle_with_args(struct device_node *np, 899 + static inline int of_count_phandle_with_args(const struct device_node *np, 900 900 const char *list_name, 901 901 const char *cells_name) 902 902 {
+8 -7
include/linux/of_gpio.h
··· 49 49 return container_of(gc, struct of_mm_gpio_chip, gc); 50 50 } 51 51 52 - extern int of_get_named_gpio_flags(struct device_node *np, 52 + extern int of_get_named_gpio_flags(const struct device_node *np, 53 53 const char *list_name, int index, enum of_gpio_flags *flags); 54 54 55 55 extern int of_mm_gpiochip_add_data(struct device_node *np, ··· 67 67 #include <linux/errno.h> 68 68 69 69 /* Drivers may not strictly depend on the GPIO support, so let them link. */ 70 - static inline int of_get_named_gpio_flags(struct device_node *np, 70 + static inline int of_get_named_gpio_flags(const struct device_node *np, 71 71 const char *list_name, int index, enum of_gpio_flags *flags) 72 72 { 73 73 if (flags) ··· 98 98 * The above example defines four GPIOs, two of which are not specified. 99 99 * This function will return '4' 100 100 */ 101 - static inline int of_gpio_named_count(struct device_node *np, const char* propname) 101 + static inline int of_gpio_named_count(const struct device_node *np, 102 + const char *propname) 102 103 { 103 104 return of_count_phandle_with_args(np, propname, "#gpio-cells"); 104 105 } ··· 110 109 * 111 110 * Same as of_gpio_named_count, but hard coded to use the 'gpios' property 112 111 */ 113 - static inline int of_gpio_count(struct device_node *np) 112 + static inline int of_gpio_count(const struct device_node *np) 114 113 { 115 114 return of_gpio_named_count(np, "gpios"); 116 115 } 117 116 118 - static inline int of_get_gpio_flags(struct device_node *np, int index, 117 + static inline int of_get_gpio_flags(const struct device_node *np, int index, 119 118 enum of_gpio_flags *flags) 120 119 { 121 120 return of_get_named_gpio_flags(np, "gpios", index, flags); ··· 130 129 * Returns GPIO number to use with Linux generic GPIO API, or one of the errno 131 130 * value on the error condition. 132 131 */ 133 - static inline int of_get_named_gpio(struct device_node *np, 132 + static inline int of_get_named_gpio(const struct device_node *np, 134 133 const char *propname, int index) 135 134 { 136 135 return of_get_named_gpio_flags(np, propname, index, NULL); ··· 144 143 * Returns GPIO number to use with Linux generic GPIO API, or one of the errno 145 144 * value on the error condition. 146 145 */ 147 - static inline int of_get_gpio(struct device_node *np, int index) 146 + static inline int of_get_gpio(const struct device_node *np, int index) 148 147 { 149 148 return of_get_gpio_flags(np, index, NULL); 150 149 }
-25
include/linux/platform_data/gpio-dwapb.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * Copyright(c) 2014 Intel Corporation. 4 - */ 5 - 6 - #ifndef GPIO_DW_APB_H 7 - #define GPIO_DW_APB_H 8 - 9 - #define DWAPB_MAX_GPIOS 32 10 - 11 - struct dwapb_port_property { 12 - struct fwnode_handle *fwnode; 13 - unsigned int idx; 14 - unsigned int ngpio; 15 - unsigned int gpio_base; 16 - int irq[DWAPB_MAX_GPIOS]; 17 - bool irq_shared; 18 - }; 19 - 20 - struct dwapb_platform_data { 21 - struct dwapb_port_property *properties; 22 - unsigned int nports; 23 - }; 24 - 25 - #endif
+1 -1
include/linux/spi/max7301.h
··· 2 2 #ifndef LINUX_SPI_MAX7301_H 3 3 #define LINUX_SPI_MAX7301_H 4 4 5 - #include <linux/gpio.h> 5 + #include <linux/gpio/driver.h> 6 6 7 7 /* 8 8 * Some registers must be read back to modify.
+47
include/uapi/linux/virtio_gpio.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 + 3 + #ifndef _LINUX_VIRTIO_GPIO_H 4 + #define _LINUX_VIRTIO_GPIO_H 5 + 6 + #include <linux/types.h> 7 + 8 + /* Virtio GPIO request types */ 9 + #define VIRTIO_GPIO_MSG_GET_NAMES 0x0001 10 + #define VIRTIO_GPIO_MSG_GET_DIRECTION 0x0002 11 + #define VIRTIO_GPIO_MSG_SET_DIRECTION 0x0003 12 + #define VIRTIO_GPIO_MSG_GET_VALUE 0x0004 13 + #define VIRTIO_GPIO_MSG_SET_VALUE 0x0005 14 + 15 + /* Possible values of the status field */ 16 + #define VIRTIO_GPIO_STATUS_OK 0x0 17 + #define VIRTIO_GPIO_STATUS_ERR 0x1 18 + 19 + /* Direction types */ 20 + #define VIRTIO_GPIO_DIRECTION_NONE 0x00 21 + #define VIRTIO_GPIO_DIRECTION_OUT 0x01 22 + #define VIRTIO_GPIO_DIRECTION_IN 0x02 23 + 24 + struct virtio_gpio_config { 25 + __le16 ngpio; 26 + __u8 padding[2]; 27 + __le32 gpio_names_size; 28 + } __packed; 29 + 30 + /* Virtio GPIO Request / Response */ 31 + struct virtio_gpio_request { 32 + __le16 type; 33 + __le16 gpio; 34 + __le32 value; 35 + }; 36 + 37 + struct virtio_gpio_response { 38 + __u8 status; 39 + __u8 value; 40 + }; 41 + 42 + struct virtio_gpio_response_get_names { 43 + __u8 status; 44 + __u8 value[]; 45 + }; 46 + 47 + #endif /* _LINUX_VIRTIO_GPIO_H */
+1
include/uapi/linux/virtio_ids.h
··· 58 58 #define VIRTIO_ID_SCMI 32 /* virtio SCMI */ 59 59 #define VIRTIO_ID_I2C_ADAPTER 34 /* virtio i2c adapter */ 60 60 #define VIRTIO_ID_BT 40 /* virtio bluetooth */ 61 + #define VIRTIO_ID_GPIO 41 /* virtio gpio */ 61 62 62 63 /* 63 64 * Virtio Transitional IDs