Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'rtc-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux
Pull RTC updates from Alexandre Belloni:
- loongson: Loongson-2K0300 support
- s35390a: nvmem support
- zynqmp: rework calibration
* tag 'rtc-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
rtc: ds1390: fix number of bytes read from RTC
rtc: class: Remove duplicate check for alarm
rtc: optee: simplify OP-TEE context match
rtc: interface: Alarm race handling should not discard preceding error
rtc: s35390a: implement nvmem support
rtc: loongson: Add Loongson-2K0300 support
dt-bindings: rtc: loongson: Document Loongson-2K0300 compatible
dt-bindings: rtc: loongson: Correct Loongson-1C interrupts property
dt-bindings: rtc: renesas,rz-rtca3: Add RZ/V2N support
dt-bindings: rtc: cpcap: convert to schema
rtc: zynqmp: use dynamic max and min offset ranges
rtc: zynqmp: rework set_offset
rtc: zynqmp: rework read_offset
rtc: zynqmp: check calibration max value
rtc: zynqmp: correct frequency value
rtc: amlogic-a4: Remove IRQF_ONESHOT
rtc: pcf8563: use correct of_node for output clock
rtc: max31335: use correct CONFIG symbol in IS_REACHABLE()
rtc: nvvrs: Add ARCH_TEGRA to the NV VRS RTC driver
+178
-88
-18
Documentation/devicetree/bindings/rtc/cpcap-rtc.txt
-18
Documentation/devicetree/bindings/rtc/cpcap-rtc.txt
···
1
-
Motorola CPCAP PMIC RTC
2
-
-----------------------
3
-
4
-
This module is part of the CPCAP. For more details about the whole
5
-
chip see Documentation/devicetree/bindings/mfd/motorola-cpcap.txt.
6
-
7
-
Requires node properties:
8
-
- compatible: should contain "motorola,cpcap-rtc"
9
-
- interrupts: An interrupt specifier for alarm and 1 Hz irq
10
-
11
-
Example:
12
-
13
-
&cpcap {
14
-
cpcap_rtc: rtc {
15
-
compatible = "motorola,cpcap-rtc";
16
-
interrupts = <39 IRQ_TYPE_NONE>, <26 IRQ_TYPE_NONE>;
17
-
};
18
-
};
+13
Documentation/devicetree/bindings/rtc/loongson,rtc.yaml
+13
Documentation/devicetree/bindings/rtc/loongson,rtc.yaml
···
23
23
- loongson,ls1b-rtc
24
24
- loongson,ls1c-rtc
25
25
- loongson,ls7a-rtc
26
+
- loongson,ls2k0300-rtc
26
27
- loongson,ls2k1000-rtc
27
28
- items:
28
29
- enum:
···
42
41
- reg
43
42
44
43
unevaluatedProperties: false
44
+
45
+
if:
46
+
properties:
47
+
compatible:
48
+
contains:
49
+
enum:
50
+
- loongson,ls1c-rtc
51
+
- loongson,ls2k0300-rtc
52
+
53
+
then:
54
+
properties:
55
+
interrupts: false
45
56
46
57
examples:
47
58
- |
+32
Documentation/devicetree/bindings/rtc/motorola,cpcap-rtc.yaml
+32
Documentation/devicetree/bindings/rtc/motorola,cpcap-rtc.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/rtc/motorola,cpcap-rtc.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Motorola CPCAP PMIC RTC
8
+
9
+
maintainers:
10
+
- Svyatoslav Ryhel <clamor95@gmail.com>
11
+
12
+
description:
13
+
This module is part of the Motorola CPCAP MFD device. For more details
14
+
see Documentation/devicetree/bindings/mfd/motorola,cpcap.yaml. The
15
+
RTC is represented as a sub-node of the PMIC node on the device tree.
16
+
17
+
properties:
18
+
compatible:
19
+
const: motorola,cpcap-rtc
20
+
21
+
interrupts:
22
+
items:
23
+
- description: alarm interrupt
24
+
- description: 1 Hz interrupt
25
+
26
+
required:
27
+
- compatible
28
+
- interrupts
29
+
30
+
additionalProperties: false
31
+
32
+
...
+4
-1
Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
+4
-1
Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml
···
14
14
items:
15
15
- enum:
16
16
- renesas,r9a08g045-rtca3 # RZ/G3S
17
+
- renesas,r9a09g056-rtca3 # RZ/V2N
17
18
- renesas,r9a09g057-rtca3 # RZ/V2H
18
19
- const: renesas,rz-rtca3
19
20
···
83
82
properties:
84
83
compatible:
85
84
contains:
86
-
const: renesas,r9a09g057-rtca3
85
+
enum:
86
+
- renesas,r9a09g056-rtca3
87
+
- renesas,r9a09g057-rtca3
87
88
then:
88
89
properties:
89
90
resets:
+1
drivers/rtc/Kconfig
+1
drivers/rtc/Kconfig
···
418
418
419
419
config RTC_DRV_NVIDIA_VRS10
420
420
tristate "NVIDIA VRS10 RTC device"
421
+
depends on ARCH_TEGRA || COMPILE_TEST
421
422
help
422
423
If you say yes here you will get support for the battery backed RTC device
423
424
of NVIDIA VRS (Voltage Regulator Specification). The RTC is connected via
+1
-1
drivers/rtc/class.c
+1
-1
drivers/rtc/class.c
+1
-1
drivers/rtc/interface.c
+1
-1
drivers/rtc/interface.c
+1
-1
drivers/rtc/rtc-ds1390.c
+1
-1
drivers/rtc/rtc-ds1390.c
+47
-24
drivers/rtc/rtc-loongson.c
+47
-24
drivers/rtc/rtc-loongson.c
···
66
66
* According to the LS1C manual, RTC_CTRL and alarm-related registers are not defined.
67
67
* Accessing the relevant registers will cause the system to hang.
68
68
*/
69
-
#define LS1C_RTC_CTRL_WORKAROUND BIT(0)
69
+
#define LOONGSON_RTC_CTRL_WORKAROUND BIT(0)
70
+
#define LOONGSON_RTC_ALARM_WORKAROUND BIT(1)
70
71
71
72
struct loongson_rtc_config {
72
73
u32 pm_offset; /* Offset of PM domain, for RTC alarm wakeup */
···
90
89
91
90
static const struct loongson_rtc_config ls1c_rtc_config = {
92
91
.pm_offset = 0,
93
-
.flags = LS1C_RTC_CTRL_WORKAROUND,
92
+
.flags = LOONGSON_RTC_CTRL_WORKAROUND | LOONGSON_RTC_ALARM_WORKAROUND,
94
93
};
95
94
96
95
static const struct loongson_rtc_config generic_rtc_config = {
97
96
.pm_offset = 0x100,
98
97
.flags = 0,
98
+
};
99
+
100
+
static const struct loongson_rtc_config ls2k0300_rtc_config = {
101
+
.pm_offset = 0x0,
102
+
.flags = LOONGSON_RTC_ALARM_WORKAROUND,
99
103
};
100
104
101
105
static const struct loongson_rtc_config ls2k1000_rtc_config = {
···
159
153
{
160
154
struct loongson_rtc_priv *priv = dev_get_drvdata(dev);
161
155
162
-
if (priv->config->flags & LS1C_RTC_CTRL_WORKAROUND)
156
+
if (priv->config->flags & LOONGSON_RTC_CTRL_WORKAROUND)
163
157
return 0;
164
158
165
159
/* Enable RTC TOY counters and crystal */
···
173
167
u32 ctrl_data;
174
168
struct loongson_rtc_priv *priv = dev_get_drvdata(dev);
175
169
176
-
if (priv->config->flags & LS1C_RTC_CTRL_WORKAROUND)
170
+
if (priv->config->flags & LOONGSON_RTC_CTRL_WORKAROUND)
177
171
return true;
178
172
179
173
ret = regmap_read(priv->regmap, RTC_CTRL_REG, &ctrl_data);
···
305
299
.alarm_irq_enable = loongson_rtc_alarm_irq_enable,
306
300
};
307
301
302
+
static int loongson_rtc_alarm_setting(struct platform_device *pdev, void __iomem *regs)
303
+
{
304
+
int ret = 0, alarm_irq;
305
+
struct device *dev = &pdev->dev;
306
+
struct loongson_rtc_priv *priv = dev_get_drvdata(dev);
307
+
308
+
if (priv->config->flags & LOONGSON_RTC_ALARM_WORKAROUND) {
309
+
/* Loongson-1C/Loongson-2K0300 RTC does not support alarm */
310
+
clear_bit(RTC_FEATURE_ALARM, priv->rtcdev->features);
311
+
return 0;
312
+
}
313
+
314
+
/* Get RTC alarm irq */
315
+
alarm_irq = platform_get_irq(pdev, 0);
316
+
if (alarm_irq < 0)
317
+
return alarm_irq;
318
+
319
+
ret = devm_request_irq(dev, alarm_irq, loongson_rtc_isr, 0, "loongson-alarm",
320
+
priv);
321
+
if (ret < 0)
322
+
return ret;
323
+
324
+
priv->pm_base = regs - priv->config->pm_offset;
325
+
device_init_wakeup(dev, true);
326
+
327
+
if (has_acpi_companion(dev))
328
+
acpi_install_fixed_event_handler(ACPI_EVENT_RTC,
329
+
loongson_rtc_handler, priv);
330
+
331
+
return ret;
332
+
}
333
+
308
334
static int loongson_rtc_probe(struct platform_device *pdev)
309
335
{
310
-
int ret, alarm_irq;
336
+
int ret;
311
337
void __iomem *regs;
312
338
struct loongson_rtc_priv *priv;
313
339
struct device *dev = &pdev->dev;
···
368
330
return dev_err_probe(dev, PTR_ERR(priv->rtcdev),
369
331
"devm_rtc_allocate_device failed\n");
370
332
371
-
/* Get RTC alarm irq */
372
-
alarm_irq = platform_get_irq(pdev, 0);
373
-
if (alarm_irq > 0) {
374
-
ret = devm_request_irq(dev, alarm_irq, loongson_rtc_isr,
375
-
0, "loongson-alarm", priv);
376
-
if (ret < 0)
377
-
return dev_err_probe(dev, ret, "Unable to request irq %d\n",
378
-
alarm_irq);
379
-
380
-
priv->pm_base = regs - priv->config->pm_offset;
381
-
device_init_wakeup(dev, true);
382
-
383
-
if (has_acpi_companion(dev))
384
-
acpi_install_fixed_event_handler(ACPI_EVENT_RTC,
385
-
loongson_rtc_handler, priv);
386
-
} else {
387
-
/* Loongson-1C RTC does not support alarm */
388
-
clear_bit(RTC_FEATURE_ALARM, priv->rtcdev->features);
389
-
}
333
+
ret = loongson_rtc_alarm_setting(pdev, regs);
334
+
if (ret)
335
+
return ret;
390
336
391
337
/* Loongson RTC does not support UIE */
392
338
clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, priv->rtcdev->features);
···
401
379
{ .compatible = "loongson,ls1b-rtc", .data = &ls1b_rtc_config },
402
380
{ .compatible = "loongson,ls1c-rtc", .data = &ls1c_rtc_config },
403
381
{ .compatible = "loongson,ls7a-rtc", .data = &generic_rtc_config },
382
+
{ .compatible = "loongson,ls2k0300-rtc", .data = &ls2k0300_rtc_config },
404
383
{ .compatible = "loongson,ls2k1000-rtc", .data = &ls2k1000_rtc_config },
405
384
{ /* sentinel */ }
406
385
};
+3
-3
drivers/rtc/rtc-max31335.c
+3
-3
drivers/rtc/rtc-max31335.c
···
591
591
.size = MAX31335_RAM_SIZE,
592
592
};
593
593
594
-
#if IS_REACHABLE(HWMON)
594
+
#if IS_REACHABLE(CONFIG_HWMON)
595
595
static int max31335_read_temp(struct device *dev, enum hwmon_sensor_types type,
596
596
u32 attr, int channel, long *val)
597
597
{
···
672
672
static int max31335_probe(struct i2c_client *client)
673
673
{
674
674
struct max31335_data *max31335;
675
-
#if IS_REACHABLE(HWMON)
675
+
#if IS_REACHABLE(CONFIG_HWMON)
676
676
struct device *hwmon;
677
677
#endif
678
678
const struct chip_desc *match;
···
727
727
return dev_err_probe(&client->dev, ret,
728
728
"cannot register rtc nvmem\n");
729
729
730
-
#if IS_REACHABLE(HWMON)
730
+
#if IS_REACHABLE(CONFIG_HWMON)
731
731
if (max31335->chip->temp_reg) {
732
732
hwmon = devm_hwmon_device_register_with_info(&client->dev, client->name, max31335,
733
733
&max31335_chip_info, NULL);
+1
-4
drivers/rtc/rtc-optee.c
+1
-4
drivers/rtc/rtc-optee.c
···
541
541
542
542
static int optee_ctx_match(struct tee_ioctl_version_data *ver, const void *data)
543
543
{
544
-
if (ver->impl_id == TEE_IMPL_ID_OPTEE)
545
-
return 1;
546
-
else
547
-
return 0;
544
+
return (ver->impl_id == TEE_IMPL_ID_OPTEE);
548
545
}
549
546
550
547
static int optee_rtc_probe(struct tee_client_device *rtc_device)
+1
-1
drivers/rtc/rtc-pcf8563.c
+1
-1
drivers/rtc/rtc-pcf8563.c
···
424
424
425
425
static struct clk *pcf8563_clkout_register_clk(struct pcf8563 *pcf8563)
426
426
{
427
-
struct device_node *node = pcf8563->rtc->dev.of_node;
427
+
struct device_node *node = pcf8563->rtc->dev.parent->of_node;
428
428
struct clk_init_data init;
429
429
struct clk *clk;
430
430
int ret;
+32
drivers/rtc/rtc-s35390a.c
+32
drivers/rtc/rtc-s35390a.c
···
18
18
#define S35390A_CMD_TIME1 2
19
19
#define S35390A_CMD_TIME2 3
20
20
#define S35390A_CMD_INT2_REG1 5
21
+
#define S35390A_CMD_FREE_REG 7
21
22
22
23
#define S35390A_BYTE_YEAR 0
23
24
#define S35390A_BYTE_MONTH 1
···
417
416
.ioctl = s35390a_rtc_ioctl,
418
417
};
419
418
419
+
static int s35390a_nvmem_read(void *priv, unsigned int offset, void *val,
420
+
size_t bytes)
421
+
{
422
+
struct s35390a *s35390a = priv;
423
+
424
+
/* The offset is ignored because the NVMEM region is only 1 byte */
425
+
return s35390a_get_reg(s35390a, S35390A_CMD_FREE_REG, val, bytes);
426
+
}
427
+
428
+
static int s35390a_nvmem_write(void *priv, unsigned int offset, void *val,
429
+
size_t bytes)
430
+
{
431
+
struct s35390a *s35390a = priv;
432
+
433
+
return s35390a_set_reg(s35390a, S35390A_CMD_FREE_REG, val, bytes);
434
+
}
435
+
420
436
static int s35390a_probe(struct i2c_client *client)
421
437
{
422
438
int err, err_read;
···
442
424
struct rtc_device *rtc;
443
425
u8 buf, status1;
444
426
struct device *dev = &client->dev;
427
+
struct nvmem_config nvmem_cfg = {
428
+
.name = "s35390a_nvram",
429
+
.type = NVMEM_TYPE_BATTERY_BACKED,
430
+
.word_size = 1,
431
+
.stride = 1,
432
+
.size = 1,
433
+
.reg_read = s35390a_nvmem_read,
434
+
.reg_write = s35390a_nvmem_write,
435
+
};
445
436
446
437
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
447
438
return -ENODEV;
···
516
489
517
490
if (status1 & S35390A_FLAG_INT2)
518
491
rtc_update_irq(rtc, 1, RTC_AF);
492
+
493
+
nvmem_cfg.priv = s35390a;
494
+
err = devm_rtc_nvmem_register(rtc, &nvmem_cfg);
495
+
if (err)
496
+
return err;
519
497
520
498
return devm_rtc_register_device(rtc);
521
499
}
+41
-34
drivers/rtc/rtc-zynqmp.c
+41
-34
drivers/rtc/rtc-zynqmp.c
···
43
43
#define RTC_MSEC 1000
44
44
#define RTC_FR_MASK 0xF0000
45
45
#define RTC_FR_MAX_TICKS 16
46
-
#define RTC_PPB 1000000000LL
47
-
#define RTC_MIN_OFFSET -32768000
48
-
#define RTC_MAX_OFFSET 32767000
46
+
#define RTC_PPB 1000000000
49
47
50
48
struct xlnx_rtc_dev {
51
49
struct rtc_device *rtc;
···
176
178
static int xlnx_rtc_read_offset(struct device *dev, long *offset)
177
179
{
178
180
struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev);
179
-
unsigned long long rtc_ppb = RTC_PPB;
180
-
unsigned int tick_mult = do_div(rtc_ppb, xrtcdev->freq);
181
-
unsigned int calibval;
181
+
unsigned int calibval, fract_data, fract_part;
182
+
int freq = xrtcdev->freq;
183
+
int max_tick, tick_mult;
182
184
long offset_val;
185
+
186
+
/* Tick to offset multiplier */
187
+
tick_mult = DIV_ROUND_CLOSEST(RTC_PPB, freq);
183
188
184
189
calibval = readl(xrtcdev->reg_base + RTC_CALIB_RD);
185
190
/* Offset with seconds ticks */
186
-
offset_val = calibval & RTC_TICK_MASK;
187
-
offset_val = offset_val - RTC_CALIB_DEF;
188
-
offset_val = offset_val * tick_mult;
191
+
max_tick = calibval & RTC_TICK_MASK;
192
+
offset_val = max_tick - freq;
193
+
/* Convert to ppb */
194
+
offset_val *= tick_mult;
189
195
190
196
/* Offset with fractional ticks */
191
-
if (calibval & RTC_FR_EN)
192
-
offset_val += ((calibval & RTC_FR_MASK) >> RTC_FR_DATSHIFT)
193
-
* (tick_mult / RTC_FR_MAX_TICKS);
197
+
if (calibval & RTC_FR_EN) {
198
+
fract_data = (calibval & RTC_FR_MASK) >> RTC_FR_DATSHIFT;
199
+
fract_part = DIV_ROUND_UP(tick_mult, RTC_FR_MAX_TICKS);
200
+
offset_val += (fract_part * fract_data);
201
+
}
202
+
194
203
*offset = offset_val;
195
204
196
205
return 0;
···
206
201
static int xlnx_rtc_set_offset(struct device *dev, long offset)
207
202
{
208
203
struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev);
209
-
unsigned long long rtc_ppb = RTC_PPB;
210
-
unsigned int tick_mult = do_div(rtc_ppb, xrtcdev->freq);
211
-
unsigned char fract_tick = 0;
204
+
int max_tick, tick_mult, fract_offset, fract_part;
205
+
int freq = xrtcdev->freq;
212
206
unsigned int calibval;
213
-
short int max_tick;
214
-
int fract_offset;
207
+
int fract_data = 0;
215
208
216
-
if (offset < RTC_MIN_OFFSET || offset > RTC_MAX_OFFSET)
217
-
return -ERANGE;
209
+
/* Tick to offset multiplier */
210
+
tick_mult = DIV_ROUND_CLOSEST(RTC_PPB, freq);
218
211
219
212
/* Number ticks for given offset */
220
213
max_tick = div_s64_rem(offset, tick_mult, &fract_offset);
221
214
215
+
if (freq + max_tick > RTC_TICK_MASK || (freq + max_tick < 1))
216
+
return -ERANGE;
217
+
222
218
/* Number fractional ticks for given offset */
223
219
if (fract_offset) {
224
-
if (fract_offset < 0) {
225
-
fract_offset = fract_offset + tick_mult;
220
+
fract_part = DIV_ROUND_UP(tick_mult, RTC_FR_MAX_TICKS);
221
+
fract_data = fract_offset / fract_part;
222
+
/* Subtract one from max_tick while adding fract_offset */
223
+
if (fract_offset < 0 && fract_data) {
226
224
max_tick--;
227
-
}
228
-
if (fract_offset > (tick_mult / RTC_FR_MAX_TICKS)) {
229
-
for (fract_tick = 1; fract_tick < 16; fract_tick++) {
230
-
if (fract_offset <=
231
-
(fract_tick *
232
-
(tick_mult / RTC_FR_MAX_TICKS)))
233
-
break;
234
-
}
225
+
fract_data += RTC_FR_MAX_TICKS;
235
226
}
236
227
}
237
228
238
229
/* Zynqmp RTC uses second and fractional tick
239
230
* counters for compensation
240
231
*/
241
-
calibval = max_tick + RTC_CALIB_DEF;
232
+
calibval = max_tick + freq;
242
233
243
-
if (fract_tick)
244
-
calibval |= RTC_FR_EN;
245
-
246
-
calibval |= (fract_tick << RTC_FR_DATSHIFT);
234
+
if (fract_data)
235
+
calibval |= (RTC_FR_EN | (fract_data << RTC_FR_DATSHIFT));
247
236
248
237
writel(calibval, (xrtcdev->reg_base + RTC_CALIB_WR));
249
238
···
344
345
&xrtcdev->freq);
345
346
if (ret)
346
347
xrtcdev->freq = RTC_CALIB_DEF;
348
+
} else {
349
+
xrtcdev->freq--;
347
350
}
351
+
352
+
if (xrtcdev->freq > RTC_TICK_MASK) {
353
+
dev_err(&pdev->dev, "Invalid RTC calibration value\n");
354
+
return -EINVAL;
355
+
}
356
+
348
357
ret = readl(xrtcdev->reg_base + RTC_CALIB_RD);
349
358
if (!ret)
350
359
writel(xrtcdev->freq, (xrtcdev->reg_base + RTC_CALIB_WR));