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Docs: Fixing spelling errors in Documentation/devicetree/bindings/

Revised patch fixing six spelling errors within
Documentation/devicetree/bindings/. "specfied" replaced with "specified"
in all three files modified. "atleast" seperated into "at least" three
times in samsung-pinctrl.txt. This should remove any confusion that a
reader might have.

Signed-off-by: Marlon Rac Cambasis <marlonrc08@gmail.com>
Link: https://lore.kernel.org/r/20201007071705.GA11381@marlonpc-debian
Signed-off-by: Rob Herring <robh@kernel.org>

authored by

Marlon Rac Cambasis and committed by
Rob Herring 5f3ae016 12d1f4c3

+5 -5
+3 -3
Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
··· 65 65 66 66 - Pin mux/config groups as child nodes: The pin mux (selecting pin function 67 67 mode) and pin config (pull up/down, driver strength) settings are represented 68 - as child nodes of the pin-controller node. There should be atleast one 68 + as child nodes of the pin-controller node. There should be at least one 69 69 child node and there is no limit on the count of these child nodes. It is 70 70 also possible for a child node to consist of several further child nodes 71 71 to allow grouping multiple pinctrl groups into one. The format of second ··· 75 75 The child node should contain a list of pin(s) on which a particular pin 76 76 function selection or pin configuration (or both) have to applied. This 77 77 list of pins is specified using the property name "samsung,pins". There 78 - should be atleast one pin specfied for this property and there is no upper 78 + should be at least one pin specified for this property and there is no upper 79 79 limit on the count of pins that can be specified. The pins are specified 80 80 using pin names which are derived from the hardware manual of the SoC. As 81 81 an example, the pins in GPA0 bank of the pin controller can be represented ··· 107 107 hardware manual and these values are programmed as-is into the pin 108 108 pull up/down and driver strength register of the pin-controller. 109 109 110 - Note: A child should include atleast a pin function selection property or 110 + Note: A child should include at least a pin function selection property or 111 111 pin configuration property (one or more) or both. 112 112 113 113 The client nodes that require a particular pin function selection and/or
+1 -1
Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt
··· 9 9 - nuvoton,sw-reset-number - Contains the software reset number to restart the SoC. 10 10 NPCM7xx contain four software reset that represent numbers 1 to 4. 11 11 12 - If 'nuvoton,sw-reset-number' is not specfied software reset is disabled. 12 + If 'nuvoton,sw-reset-number' is not specified software reset is disabled. 13 13 14 14 Example: 15 15 rstc: rstc@f0801000 {
+1 -1
Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
··· 20 20 This is useful in situations where another watchdog engine on chip is 21 21 to perform the reset. 22 22 23 - If 'aspeed,reset-type=' is not specfied the default is to enable system 23 + If 'aspeed,reset-type=' is not specified the default is to enable system 24 24 reset. 25 25 26 26 Reset types: