+5

Documentation/admin-guide/kernel-parameters.txt

reviewed

··· 1050 1050 them frequently to increase the rate of SLB faults 1051 1051 on kernel addresses. 1052 1052 1053 1053 + stress_hpt [PPC] 1054 1054 + Limits the number of kernel HPT entries in the hash 1055 1055 + page table to increase the rate of hash page table 1056 1056 + faults on kernel addresses. 1057 1057 + 1053 1058 disable= [IPV6] 1054 1059 See Documentation/networking/ipv6.rst. 1055 1060

+13

Documentation/powerpc/cpu_families.rst

reviewed

··· 10 10 ------------------ 11 11 12 12 - Hash MMU (except 603 and e300) 13 13 + - Radix MMU (POWER9 and later) 13 14 - Software loaded TLB (603 and e300) 14 15 - Selectable Software loaded TLB in addition to hash MMU (755, 7450, e600) 15 16 - Mix of 32 & 64 bit:: ··· 101 100 v 102 101 +--------------+ 103 102 | POWER8 | 103 103 + +--------------+ 104 104 + | 105 105 + | 106 106 + v 107 107 + +--------------+ 108 108 + | POWER9 | 109 109 + +--------------+ 110 110 + | 111 111 + | 112 112 + v 113 113 + +--------------+ 114 114 + | POWER10 | 104 115 +--------------+ 105 116 106 117

+3 -1

Makefile

reviewed

··· 933 933 endif 934 934 endif 935 935 ifdef CONFIG_FTRACE_MCOUNT_USE_OBJTOOL 936 936 - CC_FLAGS_USING += -DCC_USING_NOP_MCOUNT 936 936 + ifdef CONFIG_HAVE_OBJTOOL_NOP_MCOUNT 937 937 + CC_FLAGS_USING += -DCC_USING_NOP_MCOUNT 938 938 + endif 937 939 endif 938 940 ifdef CONFIG_FTRACE_MCOUNT_USE_RECORDMCOUNT 939 941 ifdef CONFIG_HAVE_C_RECORDMCOUNT

+36 -15

arch/powerpc/Kconfig

reviewed

··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 2 source "arch/powerpc/platforms/Kconfig.cputype" 3 3 4 4 + config CC_HAS_ELFV2 5 5 + def_bool PPC64 && $(cc-option, -mabi=elfv2) 6 6 + 4 7 config 32BIT 5 8 bool 6 9 default y if PPC32 ··· 99 96 config GENERIC_LOCKBREAK 100 97 bool 101 98 default y 102 102 - depends on SMP && PREEMPTION 99 99 + depends on SMP && PREEMPTION && !PPC_QUEUED_SPINLOCKS 103 100 104 101 config GENERIC_HWEIGHT 105 102 bool ··· 158 155 select ARCH_USE_CMPXCHG_LOCKREF if PPC64 159 156 select ARCH_USE_MEMTEST 160 157 select ARCH_USE_QUEUED_RWLOCKS if PPC_QUEUED_SPINLOCKS 161 161 - select ARCH_USE_QUEUED_SPINLOCKS if PPC_QUEUED_SPINLOCKS 162 158 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT 163 159 select ARCH_WANT_IPC_PARSE_VERSION 164 160 select ARCH_WANT_IRQS_OFF_ACTIVATE_MM ··· 241 239 select HAVE_MOD_ARCH_SPECIFIC 242 240 select HAVE_NMI if PERF_EVENTS || (PPC64 && PPC_BOOK3S) 243 241 select HAVE_OPTPROBES 242 242 + select HAVE_OBJTOOL if PPC32 || MPROFILE_KERNEL 243 243 + select HAVE_OBJTOOL_MCOUNT if HAVE_OBJTOOL 244 244 select HAVE_PERF_EVENTS 245 245 select HAVE_PERF_EVENTS_NMI if PPC64 246 246 select HAVE_PERF_REGS ··· 297 293 bool 298 294 default y 299 295 depends on PPC_BOOK3S_64 || PPC_E500 296 296 + 297 297 + config PPC_HAS_LBARX_LHARX 298 298 + bool 300 299 301 300 config EARLY_PRINTK 302 301 bool ··· 536 529 537 530 Say N if you are unsure. 538 531 532 532 + config INTERRUPT_SANITIZE_REGISTERS 533 533 + bool "Clear gprs on interrupt arrival" 534 534 + depends on PPC64 && ARCH_HAS_SYSCALL_WRAPPER 535 535 + default PPC_BOOK3E_64 || PPC_PSERIES || PPC_POWERNV 536 536 + help 537 537 + Reduce the influence of user register state on interrupt handlers and 538 538 + syscalls through clearing user state from registers before handling 539 539 + the exception. 540 540 + 539 541 config PPC_QUEUED_SPINLOCKS 540 542 bool "Queued spinlocks" if EXPERT 541 543 depends on SMP ··· 598 582 599 583 config ARCH_HAS_KEXEC_PURGATORY 600 584 def_bool KEXEC_FILE 585 585 + 586 586 + config PPC64_BIG_ENDIAN_ELF_ABI_V2 587 587 + bool "Build big-endian kernel using ELF ABI V2 (EXPERIMENTAL)" 588 588 + depends on PPC64 && CPU_BIG_ENDIAN 589 589 + depends on CC_HAS_ELFV2 590 590 + depends on LD_IS_BFD && LD_VERSION >= 22400 591 591 + default n 592 592 + help 593 593 + This builds the kernel image using the "Power Architecture 64-Bit ELF 594 594 + V2 ABI Specification", which has a reduced stack overhead and faster 595 595 + function calls. This internal kernel ABI option does not affect 596 596 + userspace compatibility. 597 597 + 598 598 + The V2 ABI is standard for 64-bit little-endian, but for big-endian 599 599 + it is less well tested by kernel and toolchain. However some distros 600 600 + build userspace this way, and it can produce a functioning kernel. 601 601 + 602 602 + This requires GCC and binutils 2.24 or newer. 601 603 602 604 config RELOCATABLE 603 605 bool "Build a relocatable kernel" ··· 1045 1011 These variables are exposed to userspace via sysfs to enable 1046 1012 read/write operations on these variables. Say Y if you have 1047 1013 secure boot enabled and want to expose variables to userspace. 1048 1048 - 1049 1049 - config PPC_RTAS_FILTER 1050 1050 - bool "Enable filtering of RTAS syscalls" 1051 1051 - default y 1052 1052 - depends on PPC_RTAS 1053 1053 - help 1054 1054 - The RTAS syscall API has security issues that could be used to 1055 1055 - compromise system integrity. This option enforces restrictions on the 1056 1056 - RTAS calls and arguments passed by userspace programs to mitigate 1057 1057 - these issues. 1058 1058 - 1059 1059 - Say Y unless you know what you are doing and the filter is causing 1060 1060 - problems for you. 1061 1014 1062 1015 endmenu 1063 1016

+1 -1

arch/powerpc/boot/dts/fsl/t1024qds.dts

reviewed

··· 151 151 }; 152 152 153 153 i2c@118000 { 154 154 - pca9547@77 { 154 154 + i2c-mux@77 { 155 155 compatible = "nxp,pca9547"; 156 156 reg = <0x77>; 157 157 #address-cells = <1>;

+1 -1

arch/powerpc/boot/dts/fsl/t1024rdb.dts

reviewed

··· 165 165 }; 166 166 167 167 i2c@118100 { 168 168 - pca9546@77 { 168 168 + i2c-mux@77 { 169 169 compatible = "nxp,pca9546"; 170 170 reg = <0x77>; 171 171 #address-cells = <1>;

+1 -1

arch/powerpc/boot/dts/fsl/t104xqds.dtsi

reviewed

··· 268 268 }; 269 269 270 270 i2c@118000 { 271 271 - pca9547@77 { 271 271 + i2c-mux@77 { 272 272 compatible = "nxp,pca9547"; 273 273 reg = <0x77>; 274 274 };

+1 -1

arch/powerpc/boot/dts/fsl/t104xrdb.dtsi

reviewed

··· 128 128 }; 129 129 130 130 i2c@118100 { 131 131 - pca9546@77 { 131 131 + i2c-mux@77 { 132 132 compatible = "nxp,pca9546"; 133 133 reg = <0x77>; 134 134 #address-cells = <1>;

+1 -1

arch/powerpc/boot/dts/fsl/t208xqds.dtsi

reviewed

··· 135 135 }; 136 136 137 137 i2c@118000 { 138 138 - pca9547@77 { 138 138 + i2c-mux@77 { 139 139 compatible = "nxp,pca9547"; 140 140 reg = <0x77>; 141 141 #address-cells = <1>;

+1 -1

arch/powerpc/boot/dts/fsl/t208xrdb.dtsi

reviewed

··· 138 138 }; 139 139 140 140 i2c@118100 { 141 141 - pca9546@77 { 141 141 + i2c-mux@77 { 142 142 compatible = "nxp,pca9546"; 143 143 reg = <0x77>; 144 144 };

+22

arch/powerpc/boot/dts/microwatt.dts

reviewed

··· 21 21 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; 22 22 }; 23 23 24 24 + clocks { 25 25 + sys_clk: litex_sys_clk { 26 26 + #clock-cells = <0>; 27 27 + compatible = "fixed-clock"; 28 28 + clock-frequency = <100000000>; 29 29 + }; 30 30 + }; 31 31 + 24 32 cpus { 25 33 #size-cells = <0x00>; 26 34 #address-cells = <0x01>; ··· 148 140 litex,tx-slots = <2>; 149 141 litex,slot-size = <0x800>; 150 142 interrupts = <0x11 0x1>; 143 143 + }; 144 144 + 145 145 + mmc@8040000 { 146 146 + compatible = "litex,mmc"; 147 147 + reg = <0x8042800 0x800 148 148 + 0x8041000 0x800 149 149 + 0x8040800 0x800 150 150 + 0x8042000 0x800 151 151 + 0x8041800 0x800>; 152 152 + reg-names = "phy", "core", "reader", "writer", "irq"; 153 153 + bus-width = <4>; 154 154 + interrupts = <0x13 1>; 155 155 + cap-sd-highspeed; 156 156 + clocks = <&sys_clk>; 151 157 }; 152 158 }; 153 159

+14

arch/powerpc/boot/dts/turris1x.dts

reviewed

··· 69 69 interrupt-parent = <&gpio>; 70 70 interrupts = <12 IRQ_TYPE_LEVEL_LOW>, /* GPIO12 - ALERT pin */ 71 71 <13 IRQ_TYPE_LEVEL_LOW>; /* GPIO13 - CRIT pin */ 72 72 + #address-cells = <1>; 73 73 + #size-cells = <0>; 74 74 + 75 75 + /* Local temperature sensor (SA56004ED internal) */ 76 76 + channel@0 { 77 77 + reg = <0>; 78 78 + label = "board"; 79 79 + }; 80 80 + 81 81 + /* Remote temperature sensor (D+/D- connected to P2020 CPU Temperature Diode) */ 82 82 + channel@1 { 83 83 + reg = <1>; 84 84 + label = "cpu"; 85 85 + }; 72 86 }; 73 87 74 88 /* DDR3 SPD/EEPROM */

+1 -3

arch/powerpc/boot/dts/warp.dts

reviewed

··· 258 258 }; 259 259 260 260 power-leds { 261 261 - compatible = "gpio-leds"; 261 261 + compatible = "warp-power-leds"; 262 262 green { 263 263 gpios = <&GPIO1 0 0>; 264 264 - default-state = "keep"; 265 264 }; 266 265 red { 267 266 gpios = <&GPIO1 1 0>; 268 268 - default-state = "keep"; 269 267 }; 270 268 }; 271 269

+15 -2

arch/powerpc/boot/wrapper

reviewed

··· 215 215 }' 216 216 } 217 217 218 218 + ld_is_lld() 219 219 + { 220 220 + ${CROSS}ld -V 2>&1 | grep -q LLD 221 221 + } 222 222 + 218 223 # Do not include PT_INTERP segment when linking pie. Non-pie linking 219 224 # just ignores this option. 220 225 LD_VERSION=$(${CROSS}ld --version | ld_version) 221 226 LD_NO_DL_MIN_VERSION=$(echo 2.26 | ld_version) 222 227 if [ "$LD_VERSION" -ge "$LD_NO_DL_MIN_VERSION" ] ; then 223 228 nodl="--no-dynamic-linker" 229 229 + fi 230 230 + 231 231 + # suppress some warnings in recent ld versions 232 232 + nowarn="-z noexecstack" 233 233 + if ! ld_is_lld; then 234 234 + if [ "$LD_VERSION" -ge "$(echo 2.39 | ld_version)" ]; then 235 235 + nowarn="$nowarn --no-warn-rwx-segments" 236 236 + fi 224 237 fi 225 238 226 239 platformo=$object/"$platform".o ··· 517 504 text_start="-Ttext $link_address" 518 505 fi 519 506 #link everything 520 520 - ${CROSS}ld -m $format -T $lds $text_start $pie $nodl $rodynamic $notext -o "$ofile" $map \ 507 507 + ${CROSS}ld -m $format -T $lds $text_start $pie $nodl $nowarn $rodynamic $notext -o "$ofile" $map \ 521 508 $platformo $tmp $object/wrapper.a 522 509 rm $tmp 523 510 fi ··· 594 581 # reached, then enter the system reset vector of the partially decompressed 595 582 # image. No warning is issued. 596 583 rm -f "$odir"/{otheros,otheros-too-big}.bld 597 597 - size=$(${CROSS}nm --no-sort --radix=d "$ofile" | egrep ' _end$' | cut -d' ' -f1) 584 584 + size=$(${CROSS}nm --no-sort --radix=d "$ofile" | grep -E ' _end$' | cut -d' ' -f1) 598 585 bld="otheros.bld" 599 586 if [ $size -gt $((0x1000000)) ]; then 600 587 bld="otheros-too-big.bld"

+7

arch/powerpc/include/asm/asm.h

reviewed

··· 1 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 2 + #ifndef _ASM_POWERPC_ASM_H 3 3 + #define _ASM_POWERPC_ASM_H 4 4 + 5 5 + #define _ASM_PTR " .long " 6 6 + 7 7 + #endif /* _ASM_POWERPC_ASM_H */

+9

arch/powerpc/include/asm/book3s/32/tlbflush.h

reviewed

··· 2 2 #ifndef _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H 3 3 #define _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H 4 4 5 5 + #include <linux/build_bug.h> 6 6 + 5 7 #define MMU_NO_CONTEXT (0) 6 8 /* 7 9 * TLB flushing for "classic" hash-MMU 32-bit CPUs, 6xx, 7xx, 7xxx ··· 76 74 { 77 75 flush_tlb_page(vma, vmaddr); 78 76 } 77 77 + 78 78 + static inline void local_flush_tlb_page_psize(struct mm_struct *mm, 79 79 + unsigned long vmaddr, int psize) 80 80 + { 81 81 + BUILD_BUG(); 82 82 + } 83 83 + 79 84 static inline void local_flush_tlb_mm(struct mm_struct *mm) 80 85 { 81 86 flush_tlb_mm(mm);

-50

arch/powerpc/include/asm/book3s/64/tlbflush-hash.h

reviewed

··· 65 65 extern void flush_hash_hugepage(unsigned long vsid, unsigned long addr, 66 66 pmd_t *pmdp, unsigned int psize, int ssize, 67 67 unsigned long flags); 68 68 - static inline void hash__local_flush_tlb_mm(struct mm_struct *mm) 69 69 - { 70 70 - } 71 71 - 72 72 - static inline void hash__flush_tlb_mm(struct mm_struct *mm) 73 73 - { 74 74 - } 75 75 - 76 76 - static inline void hash__local_flush_all_mm(struct mm_struct *mm) 77 77 - { 78 78 - /* 79 79 - * There's no Page Walk Cache for hash, so what is needed is 80 80 - * the same as flush_tlb_mm(), which doesn't really make sense 81 81 - * with hash. So the only thing we could do is flush the 82 82 - * entire LPID! Punt for now, as it's not being used. 83 83 - */ 84 84 - WARN_ON_ONCE(1); 85 85 - } 86 86 - 87 87 - static inline void hash__flush_all_mm(struct mm_struct *mm) 88 88 - { 89 89 - /* 90 90 - * There's no Page Walk Cache for hash, so what is needed is 91 91 - * the same as flush_tlb_mm(), which doesn't really make sense 92 92 - * with hash. So the only thing we could do is flush the 93 93 - * entire LPID! Punt for now, as it's not being used. 94 94 - */ 95 95 - WARN_ON_ONCE(1); 96 96 - } 97 97 - 98 98 - static inline void hash__local_flush_tlb_page(struct vm_area_struct *vma, 99 99 - unsigned long vmaddr) 100 100 - { 101 101 - } 102 102 - 103 103 - static inline void hash__flush_tlb_page(struct vm_area_struct *vma, 104 104 - unsigned long vmaddr) 105 105 - { 106 106 - } 107 107 - 108 108 - static inline void hash__flush_tlb_range(struct vm_area_struct *vma, 109 109 - unsigned long start, unsigned long end) 110 110 - { 111 111 - } 112 112 - 113 113 - static inline void hash__flush_tlb_kernel_range(unsigned long start, 114 114 - unsigned long end) 115 115 - { 116 116 - } 117 117 - 118 68 119 69 struct mmu_gather; 120 70 extern void hash__tlb_flush(struct mmu_gather *tlb);

+12 -29

arch/powerpc/include/asm/book3s/64/tlbflush.h

reviewed

··· 47 47 unsigned long start, unsigned long end) 48 48 { 49 49 if (radix_enabled()) 50 50 - return radix__flush_pmd_tlb_range(vma, start, end); 51 51 - return hash__flush_tlb_range(vma, start, end); 50 50 + radix__flush_pmd_tlb_range(vma, start, end); 52 51 } 53 52 54 53 #define __HAVE_ARCH_FLUSH_HUGETLB_TLB_RANGE ··· 56 57 unsigned long end) 57 58 { 58 59 if (radix_enabled()) 59 59 - return radix__flush_hugetlb_tlb_range(vma, start, end); 60 60 - return hash__flush_tlb_range(vma, start, end); 60 60 + radix__flush_hugetlb_tlb_range(vma, start, end); 61 61 } 62 62 63 63 static inline void flush_tlb_range(struct vm_area_struct *vma, 64 64 unsigned long start, unsigned long end) 65 65 { 66 66 if (radix_enabled()) 67 67 - return radix__flush_tlb_range(vma, start, end); 68 68 - return hash__flush_tlb_range(vma, start, end); 67 67 + radix__flush_tlb_range(vma, start, end); 69 68 } 70 69 71 70 static inline void flush_tlb_kernel_range(unsigned long start, 72 71 unsigned long end) 73 72 { 74 73 if (radix_enabled()) 75 75 - return radix__flush_tlb_kernel_range(start, end); 76 76 - return hash__flush_tlb_kernel_range(start, end); 74 74 + radix__flush_tlb_kernel_range(start, end); 77 75 } 78 76 79 77 static inline void local_flush_tlb_mm(struct mm_struct *mm) 80 78 { 81 79 if (radix_enabled()) 82 82 - return radix__local_flush_tlb_mm(mm); 83 83 - return hash__local_flush_tlb_mm(mm); 80 80 + radix__local_flush_tlb_mm(mm); 84 81 } 85 82 86 83 static inline void local_flush_tlb_page(struct vm_area_struct *vma, 87 84 unsigned long vmaddr) 88 85 { 89 86 if (radix_enabled()) 90 90 - return radix__local_flush_tlb_page(vma, vmaddr); 91 91 - return hash__local_flush_tlb_page(vma, vmaddr); 87 87 + radix__local_flush_tlb_page(vma, vmaddr); 92 88 } 93 89 94 94 - static inline void local_flush_all_mm(struct mm_struct *mm) 90 90 + static inline void local_flush_tlb_page_psize(struct mm_struct *mm, 91 91 + unsigned long vmaddr, int psize) 95 92 { 96 93 if (radix_enabled()) 97 97 - return radix__local_flush_all_mm(mm); 98 98 - return hash__local_flush_all_mm(mm); 94 94 + radix__local_flush_tlb_page_psize(mm, vmaddr, psize); 99 95 } 100 96 101 97 static inline void tlb_flush(struct mmu_gather *tlb) 102 98 { 103 99 if (radix_enabled()) 104 104 - return radix__tlb_flush(tlb); 105 105 - return hash__tlb_flush(tlb); 100 100 + radix__tlb_flush(tlb); 106 101 } 107 102 108 103 #ifdef CONFIG_SMP 109 104 static inline void flush_tlb_mm(struct mm_struct *mm) 110 105 { 111 106 if (radix_enabled()) 112 112 - return radix__flush_tlb_mm(mm); 113 113 - return hash__flush_tlb_mm(mm); 107 107 + radix__flush_tlb_mm(mm); 114 108 } 115 109 116 110 static inline void flush_tlb_page(struct vm_area_struct *vma, 117 111 unsigned long vmaddr) 118 112 { 119 113 if (radix_enabled()) 120 120 - return radix__flush_tlb_page(vma, vmaddr); 121 121 - return hash__flush_tlb_page(vma, vmaddr); 122 122 - } 123 123 - 124 124 - static inline void flush_all_mm(struct mm_struct *mm) 125 125 - { 126 126 - if (radix_enabled()) 127 127 - return radix__flush_all_mm(mm); 128 128 - return hash__flush_all_mm(mm); 114 114 + radix__flush_tlb_page(vma, vmaddr); 129 115 } 130 116 #else 131 117 #define flush_tlb_mm(mm) local_flush_tlb_mm(mm) 132 118 #define flush_tlb_page(vma, addr) local_flush_tlb_page(vma, addr) 133 133 - #define flush_all_mm(mm) local_flush_all_mm(mm) 134 119 #endif /* CONFIG_SMP */ 135 120 136 121 #define flush_tlb_fix_spurious_fault flush_tlb_fix_spurious_fault

+2 -1

arch/powerpc/include/asm/bug.h

reviewed

··· 99 99 __label__ __label_warn_on; \ 100 100 \ 101 101 WARN_ENTRY("twi 31, 0, 0", BUGFLAG_WARNING | (flags), __label_warn_on); \ 102 102 - unreachable(); \ 102 102 + barrier_before_unreachable(); \ 103 103 + __builtin_unreachable(); \ 103 104 \ 104 105 __label_warn_on: \ 105 106 break; \

+230 -1

arch/powerpc/include/asm/cmpxchg.h

reviewed

··· 77 77 * the previous value stored there. 78 78 */ 79 79 80 80 + #ifndef CONFIG_PPC_HAS_LBARX_LHARX 80 81 XCHG_GEN(u8, _local, "memory"); 81 82 XCHG_GEN(u8, _relaxed, "cc"); 82 83 XCHG_GEN(u16, _local, "memory"); 83 84 XCHG_GEN(u16, _relaxed, "cc"); 85 85 + #else 86 86 + static __always_inline unsigned long 87 87 + __xchg_u8_local(volatile void *p, unsigned long val) 88 88 + { 89 89 + unsigned long prev; 90 90 + 91 91 + __asm__ __volatile__( 92 92 + "1: lbarx %0,0,%2 # __xchg_u8_local\n" 93 93 + " stbcx. %3,0,%2 \n" 94 94 + " bne- 1b" 95 95 + : "=&r" (prev), "+m" (*(volatile unsigned char *)p) 96 96 + : "r" (p), "r" (val) 97 97 + : "cc", "memory"); 98 98 + 99 99 + return prev; 100 100 + } 101 101 + 102 102 + static __always_inline unsigned long 103 103 + __xchg_u8_relaxed(u8 *p, unsigned long val) 104 104 + { 105 105 + unsigned long prev; 106 106 + 107 107 + __asm__ __volatile__( 108 108 + "1: lbarx %0,0,%2 # __xchg_u8_relaxed\n" 109 109 + " stbcx. %3,0,%2\n" 110 110 + " bne- 1b" 111 111 + : "=&r" (prev), "+m" (*p) 112 112 + : "r" (p), "r" (val) 113 113 + : "cc"); 114 114 + 115 115 + return prev; 116 116 + } 117 117 + 118 118 + static __always_inline unsigned long 119 119 + __xchg_u16_local(volatile void *p, unsigned long val) 120 120 + { 121 121 + unsigned long prev; 122 122 + 123 123 + __asm__ __volatile__( 124 124 + "1: lharx %0,0,%2 # __xchg_u16_local\n" 125 125 + " sthcx. %3,0,%2\n" 126 126 + " bne- 1b" 127 127 + : "=&r" (prev), "+m" (*(volatile unsigned short *)p) 128 128 + : "r" (p), "r" (val) 129 129 + : "cc", "memory"); 130 130 + 131 131 + return prev; 132 132 + } 133 133 + 134 134 + static __always_inline unsigned long 135 135 + __xchg_u16_relaxed(u16 *p, unsigned long val) 136 136 + { 137 137 + unsigned long prev; 138 138 + 139 139 + __asm__ __volatile__( 140 140 + "1: lharx %0,0,%2 # __xchg_u16_relaxed\n" 141 141 + " sthcx. %3,0,%2\n" 142 142 + " bne- 1b" 143 143 + : "=&r" (prev), "+m" (*p) 144 144 + : "r" (p), "r" (val) 145 145 + : "cc"); 146 146 + 147 147 + return prev; 148 148 + } 149 149 + #endif 84 150 85 151 static __always_inline unsigned long 86 152 __xchg_u32_local(volatile void *p, unsigned long val) ··· 264 198 (__typeof__(*(ptr))) __xchg_relaxed((ptr), \ 265 199 (unsigned long)_x_, sizeof(*(ptr))); \ 266 200 }) 201 201 + 267 202 /* 268 203 * Compare and exchange - if *p == old, set it to new, 269 204 * and return the old value of *p. 270 205 */ 271 271 - 206 206 + #ifndef CONFIG_PPC_HAS_LBARX_LHARX 272 207 CMPXCHG_GEN(u8, , PPC_ATOMIC_ENTRY_BARRIER, PPC_ATOMIC_EXIT_BARRIER, "memory"); 273 208 CMPXCHG_GEN(u8, _local, , , "memory"); 274 209 CMPXCHG_GEN(u8, _acquire, , PPC_ACQUIRE_BARRIER, "memory"); ··· 278 211 CMPXCHG_GEN(u16, _local, , , "memory"); 279 212 CMPXCHG_GEN(u16, _acquire, , PPC_ACQUIRE_BARRIER, "memory"); 280 213 CMPXCHG_GEN(u16, _relaxed, , , "cc"); 214 214 + #else 215 215 + static __always_inline unsigned long 216 216 + __cmpxchg_u8(volatile unsigned char *p, unsigned long old, unsigned long new) 217 217 + { 218 218 + unsigned int prev; 219 219 + 220 220 + __asm__ __volatile__ ( 221 221 + PPC_ATOMIC_ENTRY_BARRIER 222 222 + "1: lbarx %0,0,%2 # __cmpxchg_u8\n" 223 223 + " cmpw 0,%0,%3\n" 224 224 + " bne- 2f\n" 225 225 + " stbcx. %4,0,%2\n" 226 226 + " bne- 1b" 227 227 + PPC_ATOMIC_EXIT_BARRIER 228 228 + "\n\ 229 229 + 2:" 230 230 + : "=&r" (prev), "+m" (*p) 231 231 + : "r" (p), "r" (old), "r" (new) 232 232 + : "cc", "memory"); 233 233 + 234 234 + return prev; 235 235 + } 236 236 + 237 237 + static __always_inline unsigned long 238 238 + __cmpxchg_u8_local(volatile unsigned char *p, unsigned long old, 239 239 + unsigned long new) 240 240 + { 241 241 + unsigned int prev; 242 242 + 243 243 + __asm__ __volatile__ ( 244 244 + "1: lbarx %0,0,%2 # __cmpxchg_u8_local\n" 245 245 + " cmpw 0,%0,%3\n" 246 246 + " bne- 2f\n" 247 247 + " stbcx. %4,0,%2\n" 248 248 + " bne- 1b\n" 249 249 + "2:" 250 250 + : "=&r" (prev), "+m" (*p) 251 251 + : "r" (p), "r" (old), "r" (new) 252 252 + : "cc", "memory"); 253 253 + 254 254 + return prev; 255 255 + } 256 256 + 257 257 + static __always_inline unsigned long 258 258 + __cmpxchg_u8_relaxed(u8 *p, unsigned long old, unsigned long new) 259 259 + { 260 260 + unsigned long prev; 261 261 + 262 262 + __asm__ __volatile__ ( 263 263 + "1: lbarx %0,0,%2 # __cmpxchg_u8_relaxed\n" 264 264 + " cmpw 0,%0,%3\n" 265 265 + " bne- 2f\n" 266 266 + " stbcx. %4,0,%2\n" 267 267 + " bne- 1b\n" 268 268 + "2:" 269 269 + : "=&r" (prev), "+m" (*p) 270 270 + : "r" (p), "r" (old), "r" (new) 271 271 + : "cc"); 272 272 + 273 273 + return prev; 274 274 + } 275 275 + 276 276 + static __always_inline unsigned long 277 277 + __cmpxchg_u8_acquire(u8 *p, unsigned long old, unsigned long new) 278 278 + { 279 279 + unsigned long prev; 280 280 + 281 281 + __asm__ __volatile__ ( 282 282 + "1: lbarx %0,0,%2 # __cmpxchg_u8_acquire\n" 283 283 + " cmpw 0,%0,%3\n" 284 284 + " bne- 2f\n" 285 285 + " stbcx. %4,0,%2\n" 286 286 + " bne- 1b\n" 287 287 + PPC_ACQUIRE_BARRIER 288 288 + "2:" 289 289 + : "=&r" (prev), "+m" (*p) 290 290 + : "r" (p), "r" (old), "r" (new) 291 291 + : "cc", "memory"); 292 292 + 293 293 + return prev; 294 294 + } 295 295 + 296 296 + static __always_inline unsigned long 297 297 + __cmpxchg_u16(volatile unsigned short *p, unsigned long old, unsigned long new) 298 298 + { 299 299 + unsigned int prev; 300 300 + 301 301 + __asm__ __volatile__ ( 302 302 + PPC_ATOMIC_ENTRY_BARRIER 303 303 + "1: lharx %0,0,%2 # __cmpxchg_u16\n" 304 304 + " cmpw 0,%0,%3\n" 305 305 + " bne- 2f\n" 306 306 + " sthcx. %4,0,%2\n" 307 307 + " bne- 1b\n" 308 308 + PPC_ATOMIC_EXIT_BARRIER 309 309 + "2:" 310 310 + : "=&r" (prev), "+m" (*p) 311 311 + : "r" (p), "r" (old), "r" (new) 312 312 + : "cc", "memory"); 313 313 + 314 314 + return prev; 315 315 + } 316 316 + 317 317 + static __always_inline unsigned long 318 318 + __cmpxchg_u16_local(volatile unsigned short *p, unsigned long old, 319 319 + unsigned long new) 320 320 + { 321 321 + unsigned int prev; 322 322 + 323 323 + __asm__ __volatile__ ( 324 324 + "1: lharx %0,0,%2 # __cmpxchg_u16_local\n" 325 325 + " cmpw 0,%0,%3\n" 326 326 + " bne- 2f\n" 327 327 + " sthcx. %4,0,%2\n" 328 328 + " bne- 1b" 329 329 + "2:" 330 330 + : "=&r" (prev), "+m" (*p) 331 331 + : "r" (p), "r" (old), "r" (new) 332 332 + : "cc", "memory"); 333 333 + 334 334 + return prev; 335 335 + } 336 336 + 337 337 + static __always_inline unsigned long 338 338 + __cmpxchg_u16_relaxed(u16 *p, unsigned long old, unsigned long new) 339 339 + { 340 340 + unsigned long prev; 341 341 + 342 342 + __asm__ __volatile__ ( 343 343 + "1: lharx %0,0,%2 # __cmpxchg_u16_relaxed\n" 344 344 + " cmpw 0,%0,%3\n" 345 345 + " bne- 2f\n" 346 346 + " sthcx. %4,0,%2\n" 347 347 + " bne- 1b\n" 348 348 + "2:" 349 349 + : "=&r" (prev), "+m" (*p) 350 350 + : "r" (p), "r" (old), "r" (new) 351 351 + : "cc"); 352 352 + 353 353 + return prev; 354 354 + } 355 355 + 356 356 + static __always_inline unsigned long 357 357 + __cmpxchg_u16_acquire(u16 *p, unsigned long old, unsigned long new) 358 358 + { 359 359 + unsigned long prev; 360 360 + 361 361 + __asm__ __volatile__ ( 362 362 + "1: lharx %0,0,%2 # __cmpxchg_u16_acquire\n" 363 363 + " cmpw 0,%0,%3\n" 364 364 + " bne- 2f\n" 365 365 + " sthcx. %4,0,%2\n" 366 366 + " bne- 1b\n" 367 367 + PPC_ACQUIRE_BARRIER 368 368 + "2:" 369 369 + : "=&r" (prev), "+m" (*p) 370 370 + : "r" (p), "r" (old), "r" (new) 371 371 + : "cc", "memory"); 372 372 + 373 373 + return prev; 374 374 + } 375 375 + #endif 281 376 282 377 static __always_inline unsigned long 283 378 __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)

-2

arch/powerpc/include/asm/code-patching.h

reviewed

··· 22 22 #define BRANCH_SET_LINK 0x1 23 23 #define BRANCH_ABSOLUTE 0x2 24 24 25 25 - DECLARE_STATIC_KEY_FALSE(init_mem_is_free); 26 26 - 27 25 /* 28 26 * Powerpc branch instruction is : 29 27 *

+1 -16

arch/powerpc/include/asm/cputime.h

reviewed

··· 21 21 #include <asm/param.h> 22 22 #include <asm/firmware.h> 23 23 24 24 - typedef u64 __nocast cputime_t; 25 25 - typedef u64 __nocast cputime64_t; 26 26 - 27 27 - #define cmpxchg_cputime(ptr, old, new) cmpxchg(ptr, old, new) 28 28 - 29 24 #ifdef __KERNEL__ 30 30 - /* 31 31 - * Convert cputime <-> microseconds 32 32 - */ 33 33 - extern u64 __cputime_usec_factor; 34 34 - 35 35 - static inline unsigned long cputime_to_usecs(const cputime_t ct) 36 36 - { 37 37 - return mulhdu((__force u64) ct, __cputime_usec_factor); 38 38 - } 39 39 - 40 40 - #define cputime_to_nsecs(cputime) tb_to_ns((__force u64)cputime) 25 25 + #define cputime_to_nsecs(cputime) tb_to_ns(cputime) 41 26 42 27 /* 43 28 * PPC64 uses PACA which is task independent for storing accounting data while

+2

arch/powerpc/include/asm/debug.h

reviewed

··· 46 46 #endif 47 47 48 48 void __set_breakpoint(int nr, struct arch_hw_breakpoint *brk); 49 49 + void suspend_breakpoints(void); 50 50 + void restore_breakpoints(void); 49 51 bool ppc_breakpoint_available(void); 50 52 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 51 53 extern void do_send_trap(struct pt_regs *regs, unsigned long address,

+7 -12

arch/powerpc/include/asm/ftrace.h

reviewed

··· 10 10 11 11 #define HAVE_FUNCTION_GRAPH_RET_ADDR_PTR 12 12 13 13 + /* Ignore unused weak functions which will have larger offsets */ 14 14 + #ifdef CONFIG_MPROFILE_KERNEL 15 15 + #define FTRACE_MCOUNT_MAX_OFFSET 12 16 16 + #elif defined(CONFIG_PPC32) 17 17 + #define FTRACE_MCOUNT_MAX_OFFSET 8 18 18 + #endif 19 19 + 13 20 #ifndef __ASSEMBLY__ 14 21 extern void _mcount(void); 15 22 ··· 91 84 * those. 92 85 */ 93 86 #define ARCH_HAS_SYSCALL_MATCH_SYM_NAME 94 94 - #ifdef CONFIG_PPC64_ELF_ABI_V1 95 95 - static inline bool arch_syscall_match_sym_name(const char *sym, const char *name) 96 96 - { 97 97 - /* We need to skip past the initial dot, and the __se_sys alias */ 98 98 - return !strcmp(sym + 1, name) || 99 99 - (!strncmp(sym, ".__se_sys", 9) && !strcmp(sym + 6, name)) || 100 100 - (!strncmp(sym, ".ppc_", 5) && !strcmp(sym + 5, name + 4)) || 101 101 - (!strncmp(sym, ".ppc32_", 7) && !strcmp(sym + 7, name + 4)) || 102 102 - (!strncmp(sym, ".ppc64_", 7) && !strcmp(sym + 7, name + 4)); 103 103 - } 104 104 - #else 105 87 static inline bool arch_syscall_match_sym_name(const char *sym, const char *name) 106 88 { 107 89 return !strcmp(sym, name) || ··· 99 103 (!strncmp(sym, "ppc32_", 6) && !strcmp(sym + 6, name + 4)) || 100 104 (!strncmp(sym, "ppc64_", 6) && !strcmp(sym + 6, name + 4)); 101 105 } 102 102 - #endif /* CONFIG_PPC64_ELF_ABI_V1 */ 103 106 #endif /* CONFIG_FTRACE_SYSCALLS */ 104 107 105 108 #if defined(CONFIG_PPC64) && defined(CONFIG_FUNCTION_TRACER)

+1 -2

arch/powerpc/include/asm/hvcall.h

reviewed

··· 79 79 #define H_NOT_ENOUGH_RESOURCES -44 80 80 #define H_R_STATE -45 81 81 #define H_RESCINDED -46 82 82 - #define H_P1 -54 82 82 + #define H_ABORTED -54 83 83 #define H_P2 -55 84 84 #define H_P3 -56 85 85 #define H_P4 -57 ··· 100 100 #define H_COP_HW -74 101 101 #define H_STATE -75 102 102 #define H_IN_USE -77 103 103 - #define H_ABORTED -78 104 103 #define H_UNSUPPORTED_FLAG_START -256 105 104 #define H_UNSUPPORTED_FLAG_END -511 106 105 #define H_MULTI_THREADS_ACTIVE -9005

-58

arch/powerpc/include/asm/irqflags.h

reviewed

··· 11 11 */ 12 12 #include <asm/hw_irq.h> 13 13 14 14 - #else 15 15 - #ifdef CONFIG_TRACE_IRQFLAGS 16 16 - #ifdef CONFIG_IRQSOFF_TRACER 17 17 - /* 18 18 - * Since the ftrace irqsoff latency trace checks CALLER_ADDR1, 19 19 - * which is the stack frame here, we need to force a stack frame 20 20 - * in case we came from user space. 21 21 - */ 22 22 - #define TRACE_WITH_FRAME_BUFFER(func) \ 23 23 - mflr r0; \ 24 24 - stdu r1, -STACK_FRAME_OVERHEAD(r1); \ 25 25 - std r0, 16(r1); \ 26 26 - stdu r1, -STACK_FRAME_OVERHEAD(r1); \ 27 27 - bl func; \ 28 28 - ld r1, 0(r1); \ 29 29 - ld r1, 0(r1); 30 30 - #else 31 31 - #define TRACE_WITH_FRAME_BUFFER(func) \ 32 32 - bl func; 33 33 - #endif 34 34 - 35 35 - /* 36 36 - * These are calls to C code, so the caller must be prepared for volatiles to 37 37 - * be clobbered. 38 38 - */ 39 39 - #define TRACE_ENABLE_INTS TRACE_WITH_FRAME_BUFFER(trace_hardirqs_on) 40 40 - #define TRACE_DISABLE_INTS TRACE_WITH_FRAME_BUFFER(trace_hardirqs_off) 41 41 - 42 42 - /* 43 43 - * This is used by assembly code to soft-disable interrupts first and 44 44 - * reconcile irq state. 45 45 - * 46 46 - * NB: This may call C code, so the caller must be prepared for volatiles to 47 47 - * be clobbered. 48 48 - */ 49 49 - #define RECONCILE_IRQ_STATE(__rA, __rB) \ 50 50 - lbz __rA,PACAIRQSOFTMASK(r13); \ 51 51 - lbz __rB,PACAIRQHAPPENED(r13); \ 52 52 - andi. __rA,__rA,IRQS_DISABLED; \ 53 53 - li __rA,IRQS_DISABLED; \ 54 54 - ori __rB,__rB,PACA_IRQ_HARD_DIS; \ 55 55 - stb __rB,PACAIRQHAPPENED(r13); \ 56 56 - bne 44f; \ 57 57 - stb __rA,PACAIRQSOFTMASK(r13); \ 58 58 - TRACE_DISABLE_INTS; \ 59 59 - 44: 60 60 - 61 61 - #else 62 62 - #define TRACE_ENABLE_INTS 63 63 - #define TRACE_DISABLE_INTS 64 64 - 65 65 - #define RECONCILE_IRQ_STATE(__rA, __rB) \ 66 66 - lbz __rA,PACAIRQHAPPENED(r13); \ 67 67 - li __rB,IRQS_DISABLED; \ 68 68 - ori __rA,__rA,PACA_IRQ_HARD_DIS; \ 69 69 - stb __rB,PACAIRQSOFTMASK(r13); \ 70 70 - stb __rA,PACAIRQHAPPENED(r13) 71 71 - #endif 72 14 #endif 73 15 74 16 #endif

+1 -1

arch/powerpc/include/asm/kvm_book3s_asm.h

reviewed

··· 105 105 void __iomem *xive_tima_virt; 106 106 u32 saved_xirr; 107 107 u64 dabr; 108 108 - u64 host_mmcr[10]; /* MMCR 0,1,A, SIAR, SDAR, MMCR2, SIER, MMCR3, SIER2/3 */ 108 108 + u64 host_mmcr[7]; /* MMCR 0,1,A, SIAR, SDAR, MMCR2, SIER */ 109 109 u32 host_pmc[8]; 110 110 u64 host_purr; 111 111 u64 host_spurr;

+12

arch/powerpc/include/asm/kvm_ppc.h

reviewed

··· 1014 1014 #endif 1015 1015 } 1016 1016 1017 1017 + static inline void kvmppc_fix_ee_after_exit(void) 1018 1018 + { 1019 1019 + #ifdef CONFIG_PPC64 1020 1020 + /* Only need to enable IRQs by hard enabling them after this */ 1021 1021 + local_paca->irq_happened = PACA_IRQ_HARD_DIS; 1022 1022 + irq_soft_mask_set(IRQS_ALL_DISABLED); 1023 1023 + #endif 1024 1024 + 1025 1025 + trace_hardirqs_off(); 1026 1026 + } 1027 1027 + 1028 1028 + 1017 1029 static inline ulong kvmppc_get_ea_indexed(struct kvm_vcpu *vcpu, int ra, int rb) 1018 1030 { 1019 1031 ulong ea;

+3

arch/powerpc/include/asm/linkage.h

reviewed

··· 4 4 5 5 #include <asm/types.h> 6 6 7 7 + #define __ALIGN .align 2 8 8 + #define __ALIGN_STR ".align 2" 9 9 + 7 10 #ifdef CONFIG_PPC64_ELF_ABI_V1 8 11 #define cond_syscall(x) \ 9 12 asm ("\t.weak " #x "\n\t.set " #x ", sys_ni_syscall\n" \

+3 -3

arch/powerpc/include/asm/mmu_context.h

reviewed

··· 151 151 * nMMU and/or PSL need to be cleaned up. 152 152 * 153 153 * Both the 'copros' and 'active_cpus' counts are looked at in 154 154 - * flush_all_mm() to determine the scope (local/global) of the 155 155 - * TLBIs, so we need to flush first before decrementing 154 154 + * radix__flush_all_mm() to determine the scope (local/global) 155 155 + * of the TLBIs, so we need to flush first before decrementing 156 156 * 'copros'. If this API is used by several callers for the 157 157 * same context, it can lead to over-flushing. It's hopefully 158 158 * not common enough to be a problem. ··· 164 164 * in-between. 165 165 */ 166 166 if (radix_enabled()) { 167 167 - flush_all_mm(mm); 167 167 + radix__flush_all_mm(mm); 168 168 169 169 c = atomic_dec_if_positive(&mm->context.copros); 170 170 /* Detect imbalance between add and remove */

+8 -2

arch/powerpc/include/asm/nohash/32/pgtable.h

reviewed

··· 256 256 257 257 num = number_of_cells_per_pte(pmd, new, huge); 258 258 259 259 - for (i = 0; i < num; i++, entry++, new += SZ_4K) 260 260 - *entry = new; 259 259 + for (i = 0; i < num; i += PAGE_SIZE / SZ_4K, new += PAGE_SIZE) { 260 260 + *entry++ = new; 261 261 + if (IS_ENABLED(CONFIG_PPC_16K_PAGES) && num != 1) { 262 262 + *entry++ = new; 263 263 + *entry++ = new; 264 264 + *entry++ = new; 265 265 + } 266 266 + } 261 267 262 268 return old; 263 269 }

+1 -1

arch/powerpc/include/asm/nohash/pgtable.h

reviewed

··· 183 183 * cases, and 32-bit non-hash with 32-bit PTEs. 184 184 */ 185 185 #if defined(CONFIG_PPC_8xx) && defined(CONFIG_PPC_16K_PAGES) 186 186 - ptep->pte = ptep->pte1 = ptep->pte2 = ptep->pte3 = pte_val(pte); 186 186 + ptep->pte3 = ptep->pte2 = ptep->pte1 = ptep->pte = pte_val(pte); 187 187 #else 188 188 *ptep = pte; 189 189 #endif

+7

arch/powerpc/include/asm/nohash/tlbflush.h

reviewed

··· 45 45 asm volatile ("tlbie %0; sync" : : "r" (vmaddr) : "memory"); 46 46 } 47 47 48 48 + static inline void local_flush_tlb_page_psize(struct mm_struct *mm, 49 49 + unsigned long vmaddr, int psize) 50 50 + { 51 51 + asm volatile ("tlbie %0; sync" : : "r" (vmaddr) : "memory"); 52 52 + } 53 53 + 48 54 static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end) 49 55 { 50 56 start &= PAGE_MASK; ··· 64 58 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); 65 59 extern void local_flush_tlb_mm(struct mm_struct *mm); 66 60 extern void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr); 61 61 + void local_flush_tlb_page_psize(struct mm_struct *mm, unsigned long vmaddr, int psize); 67 62 68 63 extern void __local_flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr, 69 64 int tsize, int ind);

+19

arch/powerpc/include/asm/ppc_asm.h

reviewed

··· 74 74 #define SAVE_GPR(n, base) SAVE_GPRS(n, n, base) 75 75 #define REST_GPR(n, base) REST_GPRS(n, n, base) 76 76 77 77 + /* macros for handling user register sanitisation */ 78 78 + #ifdef CONFIG_INTERRUPT_SANITIZE_REGISTERS 79 79 + #define SANITIZE_SYSCALL_GPRS() ZEROIZE_GPR(0); \ 80 80 + ZEROIZE_GPRS(5, 12); \ 81 81 + ZEROIZE_NVGPRS() 82 82 + #define SANITIZE_GPR(n) ZEROIZE_GPR(n) 83 83 + #define SANITIZE_GPRS(start, end) ZEROIZE_GPRS(start, end) 84 84 + #define SANITIZE_NVGPRS() ZEROIZE_NVGPRS() 85 85 + #define SANITIZE_RESTORE_NVGPRS() REST_NVGPRS(r1) 86 86 + #define HANDLER_RESTORE_NVGPRS() 87 87 + #else 88 88 + #define SANITIZE_SYSCALL_GPRS() 89 89 + #define SANITIZE_GPR(n) 90 90 + #define SANITIZE_GPRS(start, end) 91 91 + #define SANITIZE_NVGPRS() 92 92 + #define SANITIZE_RESTORE_NVGPRS() 93 93 + #define HANDLER_RESTORE_NVGPRS() REST_NVGPRS(r1) 94 94 + #endif /* CONFIG_INTERRUPT_SANITIZE_REGISTERS */ 95 95 + 77 96 #define SAVE_FPR(n, base) stfd n,8*TS_FPRWIDTH*(n)(base) 78 97 #define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base) 79 98 #define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)

+12 -3

arch/powerpc/include/asm/processor.h

reviewed

··· 374 374 375 375 #endif 376 376 377 377 - /* Check that a certain kernel stack pointer is valid in task_struct p */ 378 378 - int validate_sp(unsigned long sp, struct task_struct *p, 379 379 - unsigned long nbytes); 377 377 + /* 378 378 + * Check that a certain kernel stack pointer is a valid (minimum sized) 379 379 + * stack frame in task_struct p. 380 380 + */ 381 381 + int validate_sp(unsigned long sp, struct task_struct *p); 382 382 + 383 383 + /* 384 384 + * validate the stack frame of a particular minimum size, used for when we are 385 385 + * looking at a certain object in the stack beyond the minimum. 386 386 + */ 387 387 + int validate_sp_size(unsigned long sp, struct task_struct *p, 388 388 + unsigned long nbytes); 380 389 381 390 /* 382 391 * Prefetch macros.

+1

arch/powerpc/include/asm/prom.h

reviewed

··· 85 85 extern int of_read_drc_info_cell(struct property **prop, 86 86 const __be32 **curval, struct of_drc_info *data); 87 87 88 88 + extern unsigned int boot_cpu_node_count; 88 89 89 90 /* 90 91 * There are two methods for telling firmware what our capabilities are.

-4

arch/powerpc/include/asm/ps3.h

reviewed

··· 425 425 return dev_get_drvdata(&dev->core); 426 426 } 427 427 428 428 - /* These two need global scope for get_arch_dma_ops(). */ 429 429 - 430 430 - extern struct bus_type ps3_system_bus_type; 431 431 - 432 428 /* system manager */ 433 429 434 430 struct ps3_sys_manager_ops {

-25

arch/powerpc/include/asm/pte-walk.h

reviewed

··· 60 60 return pa; 61 61 } 62 62 63 63 - /* 64 64 - * This is what we should always use. Any other lockless page table lookup needs 65 65 - * careful audit against THP split. 66 66 - */ 67 67 - static inline pte_t *find_current_mm_pte(pgd_t *pgdir, unsigned long ea, 68 68 - bool *is_thp, unsigned *hshift) 69 69 - { 70 70 - pte_t *pte; 71 71 - 72 72 - VM_WARN(!arch_irqs_disabled(), "%s called with irq enabled\n", __func__); 73 73 - VM_WARN(pgdir != current->mm->pgd, 74 74 - "%s lock less page table lookup called on wrong mm\n", __func__); 75 75 - pte = __find_linux_pte(pgdir, ea, is_thp, hshift); 76 76 - 77 77 - #if defined(CONFIG_DEBUG_VM) && \ 78 78 - !(defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)) 79 79 - /* 80 80 - * We should not find huge page if these configs are not enabled. 81 81 - */ 82 82 - if (hshift) 83 83 - WARN_ON(*hshift); 84 84 - #endif 85 85 - return pte; 86 86 - } 87 87 - 88 63 #endif /* _ASM_POWERPC_PTE_WALK_H */

+25 -11

arch/powerpc/include/asm/ptrace.h

reviewed

··· 97 97 #endif 98 98 99 99 100 100 - #define STACK_FRAME_WITH_PT_REGS (STACK_FRAME_OVERHEAD + sizeof(struct pt_regs)) 101 101 - 102 100 // Always displays as "REGS" in memory dumps 103 101 #ifdef CONFIG_CPU_BIG_ENDIAN 104 102 #define STACK_FRAME_REGS_MARKER ASM_CONST(0x52454753) ··· 118 120 #define USER_REDZONE_SIZE 512 119 121 #define KERNEL_REDZONE_SIZE 288 120 122 121 121 - #define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */ 122 123 #define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */ 123 123 - #define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \ 124 124 - STACK_FRAME_OVERHEAD + KERNEL_REDZONE_SIZE) 125 125 - #define STACK_FRAME_MARKER 12 126 124 127 125 #ifdef CONFIG_PPC64_ELF_ABI_V2 128 126 #define STACK_FRAME_MIN_SIZE 32 127 127 + #define STACK_USER_INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_MIN_SIZE + 16) 128 128 + #define STACK_INT_FRAME_REGS (STACK_FRAME_MIN_SIZE + 16) 129 129 + #define STACK_INT_FRAME_MARKER STACK_FRAME_MIN_SIZE 130 130 + #define STACK_SWITCH_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_MIN_SIZE + 16) 131 131 + #define STACK_SWITCH_FRAME_REGS (STACK_FRAME_MIN_SIZE + 16) 129 132 #else 130 130 - #define STACK_FRAME_MIN_SIZE STACK_FRAME_OVERHEAD 133 133 + /* 134 134 + * The ELFv1 ABI specifies 48 bytes plus a minimum 64 byte parameter save 135 135 + * area. This parameter area is not used by calls to C from interrupt entry, 136 136 + * so the second from last one of those is used for the frame marker. 137 137 + */ 138 138 + #define STACK_FRAME_MIN_SIZE 112 139 139 + #define STACK_USER_INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_MIN_SIZE) 140 140 + #define STACK_INT_FRAME_REGS STACK_FRAME_MIN_SIZE 141 141 + #define STACK_INT_FRAME_MARKER (STACK_FRAME_MIN_SIZE - 16) 142 142 + #define STACK_SWITCH_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_MIN_SIZE) 143 143 + #define STACK_SWITCH_FRAME_REGS STACK_FRAME_MIN_SIZE 131 144 #endif 132 145 133 146 /* Size of dummy stack frame allocated when calling signal handler. */ ··· 149 140 150 141 #define USER_REDZONE_SIZE 0 151 142 #define KERNEL_REDZONE_SIZE 0 152 152 - #define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */ 143 143 + #define STACK_FRAME_MIN_SIZE 16 153 144 #define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */ 154 154 - #define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD) 155 155 - #define STACK_FRAME_MARKER 2 156 156 - #define STACK_FRAME_MIN_SIZE STACK_FRAME_OVERHEAD 145 145 + #define STACK_USER_INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_MIN_SIZE) 146 146 + #define STACK_INT_FRAME_REGS STACK_FRAME_MIN_SIZE 147 147 + #define STACK_INT_FRAME_MARKER (STACK_FRAME_MIN_SIZE - 8) 148 148 + #define STACK_SWITCH_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_MIN_SIZE) 149 149 + #define STACK_SWITCH_FRAME_REGS STACK_FRAME_MIN_SIZE 157 150 158 151 /* Size of stack frame allocated when calling signal handler. */ 159 152 #define __SIGNAL_FRAMESIZE 64 160 153 161 154 #endif /* __powerpc64__ */ 155 155 + 156 156 + #define STACK_INT_FRAME_SIZE (KERNEL_REDZONE_SIZE + STACK_USER_INT_FRAME_SIZE) 157 157 + #define STACK_INT_FRAME_MARKER_LONGS (STACK_INT_FRAME_MARKER/sizeof(long)) 162 158 163 159 #ifndef __ASSEMBLY__ 164 160 #include <asm/paca.h>

+160 -70

arch/powerpc/include/asm/qspinlock.h

reviewed

··· 2 2 #ifndef _ASM_POWERPC_QSPINLOCK_H 3 3 #define _ASM_POWERPC_QSPINLOCK_H 4 4 5 5 - #include <asm-generic/qspinlock_types.h> 5 5 + #include <linux/compiler.h> 6 6 + #include <asm/qspinlock_types.h> 6 7 #include <asm/paravirt.h> 7 8 8 8 - #define _Q_PENDING_LOOPS (1 << 9) /* not tuned */ 9 9 - 10 10 - #ifdef CONFIG_PARAVIRT_SPINLOCKS 11 11 - extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val); 12 12 - extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val); 13 13 - extern void __pv_queued_spin_unlock(struct qspinlock *lock); 14 14 - 15 15 - static __always_inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val) 16 16 - { 17 17 - if (!is_shared_processor()) 18 18 - native_queued_spin_lock_slowpath(lock, val); 19 19 - else 20 20 - __pv_queued_spin_lock_slowpath(lock, val); 21 21 - } 22 22 - 23 23 - #define queued_spin_unlock queued_spin_unlock 24 24 - static inline void queued_spin_unlock(struct qspinlock *lock) 25 25 - { 26 26 - if (!is_shared_processor()) 27 27 - smp_store_release(&lock->locked, 0); 28 28 - else 29 29 - __pv_queued_spin_unlock(lock); 30 30 - } 31 31 - 9 9 + #ifdef CONFIG_PPC64 10 10 + /* 11 11 + * Use the EH=1 hint for accesses that result in the lock being acquired. 12 12 + * The hardware is supposed to optimise this pattern by holding the lock 13 13 + * cacheline longer, and releasing when a store to the same memory (the 14 14 + * unlock) is performed. 15 15 + */ 16 16 + #define _Q_SPIN_EH_HINT 1 32 17 #else 33 33 - extern void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val); 34 34 - #endif 35 35 - 36 36 - static __always_inline void queued_spin_lock(struct qspinlock *lock) 37 37 - { 38 38 - u32 val = 0; 39 39 - 40 40 - if (likely(arch_atomic_try_cmpxchg_lock(&lock->val, &val, _Q_LOCKED_VAL))) 41 41 - return; 42 42 - 43 43 - queued_spin_lock_slowpath(lock, val); 44 44 - } 45 45 - #define queued_spin_lock queued_spin_lock 46 46 - 47 47 - #ifdef CONFIG_PARAVIRT_SPINLOCKS 48 48 - #define SPIN_THRESHOLD (1<<15) /* not tuned */ 49 49 - 50 50 - static __always_inline void pv_wait(u8 *ptr, u8 val) 51 51 - { 52 52 - if (*ptr != val) 53 53 - return; 54 54 - yield_to_any(); 55 55 - /* 56 56 - * We could pass in a CPU here if waiting in the queue and yield to 57 57 - * the previous CPU in the queue. 58 58 - */ 59 59 - } 60 60 - 61 61 - static __always_inline void pv_kick(int cpu) 62 62 - { 63 63 - prod_cpu(cpu); 64 64 - } 65 65 - 66 66 - extern void __pv_init_lock_hash(void); 67 67 - 68 68 - static inline void pv_spinlocks_init(void) 69 69 - { 70 70 - __pv_init_lock_hash(); 71 71 - } 72 72 - 18 18 + #define _Q_SPIN_EH_HINT 0 73 19 #endif 74 20 75 21 /* 76 76 - * Queued spinlocks rely heavily on smp_cond_load_relaxed() to busy-wait, 77 77 - * which was found to have performance problems if implemented with 78 78 - * the preferred spin_begin()/spin_end() SMT priority pattern. Use the 79 79 - * generic version instead. 22 22 + * The trylock itself may steal. This makes trylocks slightly stronger, and 23 23 + * makes locks slightly more efficient when stealing. 24 24 + * 25 25 + * This is compile-time, so if true then there may always be stealers, so the 26 26 + * nosteal paths become unused. 80 27 */ 28 28 + #define _Q_SPIN_TRY_LOCK_STEAL 1 81 29 82 82 - #include <asm-generic/qspinlock.h> 30 30 + /* 31 31 + * Put a speculation barrier after testing the lock/node and finding it 32 32 + * busy. Try to prevent pointless speculation in slow paths. 33 33 + * 34 34 + * Slows down the lockstorm microbenchmark with no stealing, where locking 35 35 + * is purely FIFO through the queue. May have more benefit in real workload 36 36 + * where speculating into the wrong place could have a greater cost. 37 37 + */ 38 38 + #define _Q_SPIN_SPEC_BARRIER 0 39 39 + 40 40 + #ifdef CONFIG_PPC64 41 41 + /* 42 42 + * Execute a miso instruction after passing the MCS lock ownership to the 43 43 + * queue head. Miso is intended to make stores visible to other CPUs sooner. 44 44 + * 45 45 + * This seems to make the lockstorm microbenchmark nospin test go slightly 46 46 + * faster on POWER10, but disable for now. 47 47 + */ 48 48 + #define _Q_SPIN_MISO 0 49 49 + #else 50 50 + #define _Q_SPIN_MISO 0 51 51 + #endif 52 52 + 53 53 + #ifdef CONFIG_PPC64 54 54 + /* 55 55 + * This executes miso after an unlock of the lock word, having ownership 56 56 + * pass to the next CPU sooner. This will slow the uncontended path to some 57 57 + * degree. Not evidence it helps yet. 58 58 + */ 59 59 + #define _Q_SPIN_MISO_UNLOCK 0 60 60 + #else 61 61 + #define _Q_SPIN_MISO_UNLOCK 0 62 62 + #endif 63 63 + 64 64 + /* 65 65 + * Seems to slow down lockstorm microbenchmark, suspect queue node just 66 66 + * has to become shared again right afterwards when its waiter spins on 67 67 + * the lock field. 68 68 + */ 69 69 + #define _Q_SPIN_PREFETCH_NEXT 0 70 70 + 71 71 + static __always_inline int queued_spin_is_locked(struct qspinlock *lock) 72 72 + { 73 73 + return READ_ONCE(lock->val); 74 74 + } 75 75 + 76 76 + static __always_inline int queued_spin_value_unlocked(struct qspinlock lock) 77 77 + { 78 78 + return !lock.val; 79 79 + } 80 80 + 81 81 + static __always_inline int queued_spin_is_contended(struct qspinlock *lock) 82 82 + { 83 83 + return !!(READ_ONCE(lock->val) & _Q_TAIL_CPU_MASK); 84 84 + } 85 85 + 86 86 + static __always_inline u32 queued_spin_encode_locked_val(void) 87 87 + { 88 88 + /* XXX: make this use lock value in paca like simple spinlocks? */ 89 89 + return _Q_LOCKED_VAL | (smp_processor_id() << _Q_OWNER_CPU_OFFSET); 90 90 + } 91 91 + 92 92 + static __always_inline int __queued_spin_trylock_nosteal(struct qspinlock *lock) 93 93 + { 94 94 + u32 new = queued_spin_encode_locked_val(); 95 95 + u32 prev; 96 96 + 97 97 + /* Trylock succeeds only when unlocked and no queued nodes */ 98 98 + asm volatile( 99 99 + "1: lwarx %0,0,%1,%3 # __queued_spin_trylock_nosteal \n" 100 100 + " cmpwi 0,%0,0 \n" 101 101 + " bne- 2f \n" 102 102 + " stwcx. %2,0,%1 \n" 103 103 + " bne- 1b \n" 104 104 + "\t" PPC_ACQUIRE_BARRIER " \n" 105 105 + "2: \n" 106 106 + : "=&r" (prev) 107 107 + : "r" (&lock->val), "r" (new), 108 108 + "i" (_Q_SPIN_EH_HINT) 109 109 + : "cr0", "memory"); 110 110 + 111 111 + return likely(prev == 0); 112 112 + } 113 113 + 114 114 + static __always_inline int __queued_spin_trylock_steal(struct qspinlock *lock) 115 115 + { 116 116 + u32 new = queued_spin_encode_locked_val(); 117 117 + u32 prev, tmp; 118 118 + 119 119 + /* Trylock may get ahead of queued nodes if it finds unlocked */ 120 120 + asm volatile( 121 121 + "1: lwarx %0,0,%2,%5 # __queued_spin_trylock_steal \n" 122 122 + " andc. %1,%0,%4 \n" 123 123 + " bne- 2f \n" 124 124 + " and %1,%0,%4 \n" 125 125 + " or %1,%1,%3 \n" 126 126 + " stwcx. %1,0,%2 \n" 127 127 + " bne- 1b \n" 128 128 + "\t" PPC_ACQUIRE_BARRIER " \n" 129 129 + "2: \n" 130 130 + : "=&r" (prev), "=&r" (tmp) 131 131 + : "r" (&lock->val), "r" (new), "r" (_Q_TAIL_CPU_MASK), 132 132 + "i" (_Q_SPIN_EH_HINT) 133 133 + : "cr0", "memory"); 134 134 + 135 135 + return likely(!(prev & ~_Q_TAIL_CPU_MASK)); 136 136 + } 137 137 + 138 138 + static __always_inline int queued_spin_trylock(struct qspinlock *lock) 139 139 + { 140 140 + if (!_Q_SPIN_TRY_LOCK_STEAL) 141 141 + return __queued_spin_trylock_nosteal(lock); 142 142 + else 143 143 + return __queued_spin_trylock_steal(lock); 144 144 + } 145 145 + 146 146 + void queued_spin_lock_slowpath(struct qspinlock *lock); 147 147 + 148 148 + static __always_inline void queued_spin_lock(struct qspinlock *lock) 149 149 + { 150 150 + if (!queued_spin_trylock(lock)) 151 151 + queued_spin_lock_slowpath(lock); 152 152 + } 153 153 + 154 154 + static inline void queued_spin_unlock(struct qspinlock *lock) 155 155 + { 156 156 + smp_store_release(&lock->locked, 0); 157 157 + if (_Q_SPIN_MISO_UNLOCK) 158 158 + asm volatile("miso" ::: "memory"); 159 159 + } 160 160 + 161 161 + #define arch_spin_is_locked(l) queued_spin_is_locked(l) 162 162 + #define arch_spin_is_contended(l) queued_spin_is_contended(l) 163 163 + #define arch_spin_value_unlocked(l) queued_spin_value_unlocked(l) 164 164 + #define arch_spin_lock(l) queued_spin_lock(l) 165 165 + #define arch_spin_trylock(l) queued_spin_trylock(l) 166 166 + #define arch_spin_unlock(l) queued_spin_unlock(l) 167 167 + 168 168 + #ifdef CONFIG_PARAVIRT_SPINLOCKS 169 169 + void pv_spinlocks_init(void); 170 170 + #else 171 171 + static inline void pv_spinlocks_init(void) { } 172 172 + #endif 83 173 84 174 #endif /* _ASM_POWERPC_QSPINLOCK_H */

-7

arch/powerpc/include/asm/qspinlock_paravirt.h

reviewed

··· 1 1 - /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 2 - #ifndef _ASM_POWERPC_QSPINLOCK_PARAVIRT_H 3 3 - #define _ASM_POWERPC_QSPINLOCK_PARAVIRT_H 4 4 - 5 5 - EXPORT_SYMBOL(__pv_queued_spin_unlock); 6 6 - 7 7 - #endif /* _ASM_POWERPC_QSPINLOCK_PARAVIRT_H */

+72

arch/powerpc/include/asm/qspinlock_types.h

reviewed

··· 1 1 + /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 2 + #ifndef _ASM_POWERPC_QSPINLOCK_TYPES_H 3 3 + #define _ASM_POWERPC_QSPINLOCK_TYPES_H 4 4 + 5 5 + #include <linux/types.h> 6 6 + #include <asm/byteorder.h> 7 7 + 8 8 + typedef struct qspinlock { 9 9 + union { 10 10 + u32 val; 11 11 + 12 12 + #ifdef __LITTLE_ENDIAN 13 13 + struct { 14 14 + u16 locked; 15 15 + u8 reserved[2]; 16 16 + }; 17 17 + #else 18 18 + struct { 19 19 + u8 reserved[2]; 20 20 + u16 locked; 21 21 + }; 22 22 + #endif 23 23 + }; 24 24 + } arch_spinlock_t; 25 25 + 26 26 + #define __ARCH_SPIN_LOCK_UNLOCKED { { .val = 0 } } 27 27 + 28 28 + /* 29 29 + * Bitfields in the lock word: 30 30 + * 31 31 + * 0: locked bit 32 32 + * 1-14: lock holder cpu 33 33 + * 15: lock owner or queuer vcpus observed to be preempted bit 34 34 + * 16: must queue bit 35 35 + * 17-31: tail cpu (+1) 36 36 + */ 37 37 + #define _Q_SET_MASK(type) (((1U << _Q_ ## type ## _BITS) - 1)\ 38 38 + << _Q_ ## type ## _OFFSET) 39 39 + /* 0x00000001 */ 40 40 + #define _Q_LOCKED_OFFSET 0 41 41 + #define _Q_LOCKED_BITS 1 42 42 + #define _Q_LOCKED_VAL (1U << _Q_LOCKED_OFFSET) 43 43 + 44 44 + /* 0x00007ffe */ 45 45 + #define _Q_OWNER_CPU_OFFSET 1 46 46 + #define _Q_OWNER_CPU_BITS 14 47 47 + #define _Q_OWNER_CPU_MASK _Q_SET_MASK(OWNER_CPU) 48 48 + 49 49 + #if CONFIG_NR_CPUS > (1U << _Q_OWNER_CPU_BITS) 50 50 + #error "qspinlock does not support such large CONFIG_NR_CPUS" 51 51 + #endif 52 52 + 53 53 + /* 0x00008000 */ 54 54 + #define _Q_SLEEPY_OFFSET 15 55 55 + #define _Q_SLEEPY_BITS 1 56 56 + #define _Q_SLEEPY_VAL (1U << _Q_SLEEPY_OFFSET) 57 57 + 58 58 + /* 0x00010000 */ 59 59 + #define _Q_MUST_Q_OFFSET 16 60 60 + #define _Q_MUST_Q_BITS 1 61 61 + #define _Q_MUST_Q_VAL (1U << _Q_MUST_Q_OFFSET) 62 62 + 63 63 + /* 0xfffe0000 */ 64 64 + #define _Q_TAIL_CPU_OFFSET 17 65 65 + #define _Q_TAIL_CPU_BITS 15 66 66 + #define _Q_TAIL_CPU_MASK _Q_SET_MASK(TAIL_CPU) 67 67 + 68 68 + #if CONFIG_NR_CPUS >= (1U << _Q_TAIL_CPU_BITS) 69 69 + #error "qspinlock does not support such large CONFIG_NR_CPUS" 70 70 + #endif 71 71 + 72 72 + #endif /* _ASM_POWERPC_QSPINLOCK_TYPES_H */

-15

arch/powerpc/include/asm/rtas.h

reviewed

··· 33 33 #define RTAS_THREADS_ACTIVE -9005 /* Multiple processor threads active */ 34 34 #define RTAS_OUTSTANDING_COPROC -9006 /* Outstanding coprocessor operations */ 35 35 36 36 - /* 37 37 - * In general to call RTAS use rtas_token("string") to lookup 38 38 - * an RTAS token for the given string (e.g. "event-scan"). 39 39 - * To actually perform the call use 40 40 - * ret = rtas_call(token, n_in, n_out, ...) 41 41 - * Where n_in is the number of input parameters and 42 42 - * n_out is the number of output parameters 43 43 - * 44 44 - * If the "string" is invalid on this system, RTAS_UNKNOWN_SERVICE 45 45 - * will be returned as a token. rtas_call() does look for this 46 46 - * token and error out gracefully so rtas_call(rtas_token("str"), ...) 47 47 - * may be safely used for one-shot calls to RTAS. 48 48 - * 49 49 - */ 50 50 - 51 36 /* RTAS event classes */ 52 37 #define RTAS_INTERNAL_ERROR 0x80000000 /* set bit 0 */ 53 38 #define RTAS_EPOW_WARNING 0x40000000 /* set bit 1 */

+1 -1

arch/powerpc/include/asm/spinlock.h

reviewed

··· 13 13 /* See include/linux/spinlock.h */ 14 14 #define smp_mb__after_spinlock() smp_mb() 15 15 16 16 - #ifndef CONFIG_PARAVIRT_SPINLOCKS 16 16 + #ifndef CONFIG_PPC_QUEUED_SPINLOCKS 17 17 static inline void pv_spinlocks_init(void) { } 18 18 #endif 19 19

+1 -1

arch/powerpc/include/asm/spinlock_types.h

reviewed

··· 7 7 #endif 8 8 9 9 #ifdef CONFIG_PPC_QUEUED_SPINLOCKS 10 10 - #include <asm-generic/qspinlock_types.h> 10 10 + #include <asm/qspinlock_types.h> 11 11 #include <asm-generic/qrwlock_types.h> 12 12 #else 13 13 #include <asm/simple_spinlock_types.h>

+4 -30

arch/powerpc/kernel/asm-offsets.c

reviewed

··· 72 72 #endif 73 73 74 74 #define STACK_PT_REGS_OFFSET(sym, val) \ 75 75 - DEFINE(sym, STACK_FRAME_OVERHEAD + offsetof(struct pt_regs, val)) 75 75 + DEFINE(sym, STACK_INT_FRAME_REGS + offsetof(struct pt_regs, val)) 76 76 77 77 int main(void) 78 78 { ··· 167 167 OFFSET(THREAD_CKVRSTATE, thread_struct, ckvr_state.vr); 168 168 OFFSET(THREAD_CKVRSAVE, thread_struct, ckvrsave); 169 169 OFFSET(THREAD_CKFPSTATE, thread_struct, ckfp_state.fpr); 170 170 - /* Local pt_regs on stack for Transactional Memory funcs. */ 171 171 - DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD + 172 172 - sizeof(struct pt_regs) + 16); 170 170 + /* Local pt_regs on stack in int frame form, plus 16 bytes for TM */ 171 171 + DEFINE(TM_FRAME_SIZE, STACK_INT_FRAME_SIZE + 16); 173 172 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */ 174 173 175 174 OFFSET(TI_LOCAL_FLAGS, thread_info, local_flags); ··· 260 261 261 262 /* Interrupt register frame */ 262 263 DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE); 263 263 - DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_WITH_PT_REGS); 264 264 + DEFINE(SWITCH_FRAME_SIZE, STACK_SWITCH_FRAME_SIZE); 264 265 STACK_PT_REGS_OFFSET(GPR0, gpr[0]); 265 266 STACK_PT_REGS_OFFSET(GPR1, gpr[1]); 266 267 STACK_PT_REGS_OFFSET(GPR2, gpr[2]); ··· 417 418 418 419 /* book3s */ 419 420 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 420 420 - OFFSET(KVM_TLB_SETS, kvm, arch.tlb_sets); 421 421 OFFSET(KVM_SDR1, kvm, arch.sdr1); 422 422 OFFSET(KVM_HOST_LPID, kvm, arch.host_lpid); 423 423 OFFSET(KVM_HOST_LPCR, kvm, arch.host_lpcr); 424 424 OFFSET(KVM_HOST_SDR1, kvm, arch.host_sdr1); 425 425 OFFSET(KVM_ENABLED_HCALLS, kvm, arch.enabled_hcalls); 426 426 OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v); 427 427 - OFFSET(KVM_RADIX, kvm, arch.radix); 428 427 OFFSET(KVM_SECURE_GUEST, kvm, arch.secure_guest); 429 428 OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr); 430 429 OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar); 431 430 OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr); 432 431 OFFSET(VCPU_VPA_DIRTY, kvm_vcpu, arch.vpa.dirty); 433 432 OFFSET(VCPU_HEIR, kvm_vcpu, arch.emul_inst); 434 434 - OFFSET(VCPU_NESTED, kvm_vcpu, arch.nested); 435 433 OFFSET(VCPU_CPU, kvm_vcpu, cpu); 436 434 OFFSET(VCPU_THREAD_CPU, kvm_vcpu, arch.thread_cpu); 437 435 #endif ··· 445 449 OFFSET(VCPU_DABRX, kvm_vcpu, arch.dabrx); 446 450 OFFSET(VCPU_DAWR0, kvm_vcpu, arch.dawr0); 447 451 OFFSET(VCPU_DAWRX0, kvm_vcpu, arch.dawrx0); 448 448 - OFFSET(VCPU_DAWR1, kvm_vcpu, arch.dawr1); 449 449 - OFFSET(VCPU_DAWRX1, kvm_vcpu, arch.dawrx1); 450 452 OFFSET(VCPU_CIABR, kvm_vcpu, arch.ciabr); 451 453 OFFSET(VCPU_HFLAGS, kvm_vcpu, arch.hflags); 452 454 OFFSET(VCPU_DEC_EXPIRES, kvm_vcpu, arch.dec_expires); 453 455 OFFSET(VCPU_PENDING_EXC, kvm_vcpu, arch.pending_exceptions); 454 456 OFFSET(VCPU_CEDED, kvm_vcpu, arch.ceded); 455 457 OFFSET(VCPU_PRODDED, kvm_vcpu, arch.prodded); 456 456 - OFFSET(VCPU_IRQ_PENDING, kvm_vcpu, arch.irq_pending); 457 457 - OFFSET(VCPU_DBELL_REQ, kvm_vcpu, arch.doorbell_request); 458 458 OFFSET(VCPU_MMCR, kvm_vcpu, arch.mmcr); 459 459 OFFSET(VCPU_MMCRA, kvm_vcpu, arch.mmcra); 460 460 OFFSET(VCPU_MMCRS, kvm_vcpu, arch.mmcrs); ··· 478 486 OFFSET(VCPU_TCSCR, kvm_vcpu, arch.tcscr); 479 487 OFFSET(VCPU_ACOP, kvm_vcpu, arch.acop); 480 488 OFFSET(VCPU_WORT, kvm_vcpu, arch.wort); 481 481 - OFFSET(VCPU_TID, kvm_vcpu, arch.tid); 482 482 - OFFSET(VCPU_PSSCR, kvm_vcpu, arch.psscr); 483 489 OFFSET(VCPU_HFSCR, kvm_vcpu, arch.hfscr); 484 490 OFFSET(VCORE_ENTRY_EXIT, kvmppc_vcore, entry_exit_map); 485 491 OFFSET(VCORE_IN_GUEST, kvmppc_vcore, in_guest); ··· 572 582 HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state); 573 583 HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu); 574 584 HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore); 575 575 - HSTATE_FIELD(HSTATE_XIVE_TIMA_PHYS, xive_tima_phys); 576 576 - HSTATE_FIELD(HSTATE_XIVE_TIMA_VIRT, xive_tima_virt); 577 585 HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi); 578 586 HSTATE_FIELD(HSTATE_PTID, ptid); 579 587 HSTATE_FIELD(HSTATE_FAKE_SUSPEND, fake_suspend); ··· 582 594 HSTATE_FIELD(HSTATE_SDAR, host_mmcr[4]); 583 595 HSTATE_FIELD(HSTATE_MMCR2, host_mmcr[5]); 584 596 HSTATE_FIELD(HSTATE_SIER, host_mmcr[6]); 585 585 - HSTATE_FIELD(HSTATE_MMCR3, host_mmcr[7]); 586 586 - HSTATE_FIELD(HSTATE_SIER2, host_mmcr[8]); 587 587 - HSTATE_FIELD(HSTATE_SIER3, host_mmcr[9]); 588 597 HSTATE_FIELD(HSTATE_PMC1, host_pmc[0]); 589 598 HSTATE_FIELD(HSTATE_PMC2, host_pmc[1]); 590 599 HSTATE_FIELD(HSTATE_PMC3, host_pmc[2]); ··· 655 670 #ifdef CONFIG_KVM_BOOKE_HV 656 671 OFFSET(VCPU_HOST_MAS4, kvm_vcpu, arch.host_mas4); 657 672 OFFSET(VCPU_HOST_MAS6, kvm_vcpu, arch.host_mas6); 658 658 - #endif 659 659 - 660 660 - #ifdef CONFIG_KVM_XICS 661 661 - DEFINE(VCPU_XIVE_SAVED_STATE, offsetof(struct kvm_vcpu, 662 662 - arch.xive_saved_state)); 663 663 - DEFINE(VCPU_XIVE_CAM_WORD, offsetof(struct kvm_vcpu, 664 664 - arch.xive_cam_word)); 665 665 - DEFINE(VCPU_XIVE_PUSHED, offsetof(struct kvm_vcpu, arch.xive_pushed)); 666 666 - DEFINE(VCPU_XIVE_ESC_ON, offsetof(struct kvm_vcpu, arch.xive_esc_on)); 667 667 - DEFINE(VCPU_XIVE_ESC_RADDR, offsetof(struct kvm_vcpu, arch.xive_esc_raddr)); 668 668 - DEFINE(VCPU_XIVE_ESC_VADDR, offsetof(struct kvm_vcpu, arch.xive_esc_vaddr)); 669 673 #endif 670 674 671 675 #ifdef CONFIG_KVM_EXIT_TIMING

+18 -8

arch/powerpc/kernel/cpu_setup_6xx.S

reviewed

··· 4 4 * Copyright (C) 2003 Benjamin Herrenschmidt (benh@kernel.crashing.org) 5 5 */ 6 6 7 7 + #include <linux/linkage.h> 8 8 + 7 9 #include <asm/processor.h> 8 10 #include <asm/page.h> 9 11 #include <asm/cputable.h> ··· 83 81 blr 84 82 85 83 /* Enable caches for 603's, 604, 750 & 7400 */ 86 86 - setup_common_caches: 84 84 + SYM_FUNC_START_LOCAL(setup_common_caches) 87 85 mfspr r11,SPRN_HID0 88 86 andi. r0,r11,HID0_DCE 89 87 ori r11,r11,HID0_ICE|HID0_DCE ··· 97 95 sync 98 96 isync 99 97 blr 98 98 + SYM_FUNC_END(setup_common_caches) 100 99 101 100 /* 604, 604e, 604ev, ... 102 101 * Enable superscalar execution & branch history table 103 102 */ 104 104 - setup_604_hid0: 103 103 + SYM_FUNC_START_LOCAL(setup_604_hid0) 105 104 mfspr r11,SPRN_HID0 106 105 ori r11,r11,HID0_SIED|HID0_BHTE 107 106 ori r8,r11,HID0_BTCD ··· 113 110 sync 114 111 isync 115 112 blr 113 113 + SYM_FUNC_END(setup_604_hid0) 116 114 117 115 /* 7400 <= rev 2.7 and 7410 rev = 1.0 suffer from some 118 116 * erratas we work around here. ··· 129 125 * needed once we have applied workaround #5 (though it's 130 126 * not set by Apple's firmware at least). 131 127 */ 132 132 - setup_7400_workarounds: 128 128 + SYM_FUNC_START_LOCAL(setup_7400_workarounds) 133 129 mfpvr r3 134 130 rlwinm r3,r3,0,20,31 135 131 cmpwi 0,r3,0x0207 136 132 ble 1f 137 133 blr 138 138 - setup_7410_workarounds: 134 134 + SYM_FUNC_END(setup_7400_workarounds) 135 135 + SYM_FUNC_START_LOCAL(setup_7410_workarounds) 139 136 mfpvr r3 140 137 rlwinm r3,r3,0,20,31 141 138 cmpwi 0,r3,0x0100 ··· 156 151 sync 157 152 isync 158 153 blr 154 154 + SYM_FUNC_END(setup_7410_workarounds) 159 155 160 156 /* 740/750/7400/7410 161 157 * Enable Store Gathering (SGE), Address Broadcast (ABE), ··· 164 158 * Dynamic Power Management (DPM), Speculative (SPD) 165 159 * Clear Instruction cache throttling (ICTC) 166 160 */ 167 167 - setup_750_7400_hid0: 161 161 + SYM_FUNC_START_LOCAL(setup_750_7400_hid0) 168 162 mfspr r11,SPRN_HID0 169 163 ori r11,r11,HID0_SGE | HID0_ABE | HID0_BHTE | HID0_BTIC 170 164 oris r11,r11,HID0_DPM@h ··· 183 177 sync 184 178 isync 185 179 blr 180 180 + SYM_FUNC_END(setup_750_7400_hid0) 186 181 187 182 /* 750cx specific 188 183 * Looks like we have to disable NAP feature for some PLL settings... 189 184 * (waiting for confirmation) 190 185 */ 191 191 - setup_750cx: 186 186 + SYM_FUNC_START_LOCAL(setup_750cx) 192 187 mfspr r10, SPRN_HID1 193 188 rlwinm r10,r10,4,28,31 194 189 cmpwi cr0,r10,7 ··· 203 196 andc r6,r6,r7 204 197 stw r6,CPU_SPEC_FEATURES(r4) 205 198 blr 199 199 + SYM_FUNC_END(setup_750cx) 206 200 207 201 /* 750fx specific 208 202 */ 209 209 - setup_750fx: 203 203 + SYM_FUNC_START_LOCAL(setup_750fx) 210 204 blr 205 205 + SYM_FUNC_END(setup_750fx) 211 206 212 207 /* MPC 745x 213 208 * Enable Store Gathering (SGE), Branch Folding (FOLD) ··· 221 212 * Clear Instruction cache throttling (ICTC) 222 213 * Enable L2 HW prefetch 223 214 */ 224 224 - setup_745x_specifics: 215 215 + SYM_FUNC_START_LOCAL(setup_745x_specifics) 225 216 /* We check for the presence of an L3 cache setup by 226 217 * the firmware. If any, we disable NAP capability as 227 218 * it's known to be bogus on rev 2.1 and earlier ··· 279 270 sync 280 271 isync 281 272 blr 273 273 + SYM_FUNC_END(setup_745x_specifics) 282 274 283 275 /* 284 276 * Initialize the FPU registers. This is needed to work around an errata

+6 -2

arch/powerpc/kernel/cpu_setup_e500.S

reviewed

··· 8 8 * Benjamin Herrenschmidt <benh@kernel.crashing.org> 9 9 */ 10 10 11 11 + #include <linux/linkage.h> 12 12 + 11 13 #include <asm/page.h> 12 14 #include <asm/processor.h> 13 15 #include <asm/cputable.h> ··· 276 274 277 275 blr 278 276 279 279 - has_L2_cache: 277 277 + SYM_FUNC_START_LOCAL(has_L2_cache) 280 278 /* skip L2 cache on P2040/P2040E as they have no L2 cache */ 281 279 mfspr r3, SPRN_SVR 282 280 /* shift right by 8 bits and clear E bit of SVR */ ··· 292 290 1: 293 291 li r3, 0 294 292 blr 293 293 + SYM_FUNC_END(has_L2_cache) 295 294 296 295 /* flush backside L2 cache */ 297 297 - flush_backside_L2_cache: 296 296 + SYM_FUNC_START_LOCAL(flush_backside_L2_cache) 298 297 mflr r10 299 298 bl has_L2_cache 300 299 mtlr r10 ··· 316 313 bne 1b 317 314 2: 318 315 blr 316 316 + SYM_FUNC_END(flush_backside_L2_cache) 319 317 320 318 _GLOBAL(cpu_down_flush_e500v2) 321 319 mflr r0

+13 -10

arch/powerpc/kernel/entry_32.S

reviewed

··· 18 18 #include <linux/err.h> 19 19 #include <linux/sys.h> 20 20 #include <linux/threads.h> 21 21 + #include <linux/linkage.h> 22 22 + 21 23 #include <asm/reg.h> 22 24 #include <asm/page.h> 23 25 #include <asm/mmu.h> ··· 76 74 #endif /* CONFIG_PPC_BOOK3S_32 || CONFIG_PPC_E500 */ 77 75 78 76 #if defined(CONFIG_PPC_KUEP) && defined(CONFIG_PPC_BOOK3S_32) 79 79 - .globl __kuep_lock 80 80 - __kuep_lock: 77 77 + SYM_FUNC_START(__kuep_lock) 81 78 lwz r9, THREAD+THSR0(r2) 82 79 update_user_segments_by_4 r9, r10, r11, r12 83 80 blr 81 81 + SYM_FUNC_END(__kuep_lock) 84 82 85 85 - __kuep_unlock: 83 83 + SYM_FUNC_START_LOCAL(__kuep_unlock) 86 84 lwz r9, THREAD+THSR0(r2) 87 85 rlwinm r9,r9,0,~SR_NX 88 86 update_user_segments_by_4 r9, r10, r11, r12 89 87 blr 88 88 + SYM_FUNC_END(__kuep_unlock) 90 89 91 90 .macro kuep_lock 92 91 bl __kuep_lock ··· 117 114 addi r12,r12,STACK_FRAME_REGS_MARKER@l 118 115 stw r9,_MSR(r1) 119 116 li r2, INTERRUPT_SYSCALL 120 120 - stw r12,8(r1) 117 117 + stw r12,STACK_INT_FRAME_MARKER(r1) 121 118 stw r2,_TRAP(r1) 122 119 SAVE_GPR(0, r1) 123 120 SAVE_GPRS(3, 8, r1) ··· 126 123 kuep_lock 127 124 128 125 /* Calling convention has r3 = regs, r4 = orig r0 */ 129 129 - addi r3,r1,STACK_FRAME_OVERHEAD 126 126 + addi r3,r1,STACK_INT_FRAME_REGS 130 127 mr r4,r0 131 128 bl system_call_exception 132 129 133 130 ret_from_syscall: 134 134 - addi r4,r1,STACK_FRAME_OVERHEAD 131 131 + addi r4,r1,STACK_INT_FRAME_REGS 135 132 li r5,0 136 133 bl syscall_exit_prepare 137 134 #ifdef CONFIG_PPC_47x ··· 218 215 * in arch/ppc/kernel/process.c 219 216 */ 220 217 _GLOBAL(_switch) 221 221 - stwu r1,-INT_FRAME_SIZE(r1) 218 218 + stwu r1,-SWITCH_FRAME_SIZE(r1) 222 219 mflr r0 223 223 - stw r0,INT_FRAME_SIZE+4(r1) 220 220 + stw r0,SWITCH_FRAME_SIZE+4(r1) 224 221 /* r3-r12 are caller saved -- Cort */ 225 222 SAVE_NVGPRS(r1) 226 223 stw r0,_NIP(r1) /* Return to switch caller */ ··· 251 248 252 249 lwz r4,_NIP(r1) /* Return to _switch caller in new task */ 253 250 mtlr r4 254 254 - addi r1,r1,INT_FRAME_SIZE 251 251 + addi r1,r1,SWITCH_FRAME_SIZE 255 252 blr 256 253 257 254 .globl fast_exception_return ··· 296 293 .globl interrupt_return 297 294 interrupt_return: 298 295 lwz r4,_MSR(r1) 299 299 - addi r3,r1,STACK_FRAME_OVERHEAD 296 296 + addi r3,r1,STACK_INT_FRAME_REGS 300 297 andi. r0,r4,MSR_PR 301 298 beq .Lkernel_interrupt_return 302 299 bl interrupt_exit_user_prepare

+2

arch/powerpc/kernel/entry_64.S

reviewed

··· 14 14 * code, and exception/interrupt return code for PowerPC. 15 15 */ 16 16 17 17 + #include <linux/objtool.h> 17 18 #include <linux/errno.h> 18 19 #include <linux/err.h> 19 20 #include <asm/cache.h> ··· 74 73 75 74 // Flush the link stack 76 75 .rept 64 76 76 + ANNOTATE_INTRA_FUNCTION_CALL 77 77 bl .+4 78 78 .endr 79 79 b 1f

+24 -24

arch/powerpc/kernel/exceptions-64e.S

reviewed

··· 358 358 std r14,PACA_EXMC+EX_R14(r13); \ 359 359 std r15,PACA_EXMC+EX_R15(r13) 360 360 361 361 - 362 361 /* Core exception code for all exceptions except TLB misses. */ 363 362 #define EXCEPTION_COMMON_LVL(n, scratch, excf) \ 364 363 exc_##n##_common: \ ··· 390 391 std r10,_CCR(r1); /* store orig CR in stackframe */ \ 391 392 std r9,GPR1(r1); /* store stack frame back link */ \ 392 393 std r11,SOFTE(r1); /* and save it to stackframe */ \ 393 393 - std r12,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \ 394 394 + std r12,STACK_INT_FRAME_MARKER(r1); /* mark the frame */ \ 394 395 std r3,_TRAP(r1); /* set trap number */ \ 395 396 std r0,RESULT(r1); /* clear regs->result */ \ 396 396 - SAVE_NVGPRS(r1); 397 397 + SAVE_NVGPRS(r1); \ 398 398 + SANITIZE_NVGPRS(); /* minimise speculation influence */ 397 399 398 400 #define EXCEPTION_COMMON(n) \ 399 401 EXCEPTION_COMMON_LVL(n, SPRN_SPRG_GEN_SCRATCH, PACA_EXGEN) ··· 455 455 EXCEPTION_COMMON(trapnum) \ 456 456 ack(r8); \ 457 457 CHECK_NAPPING(); \ 458 458 - addi r3,r1,STACK_FRAME_OVERHEAD; \ 458 458 + addi r3,r1,STACK_INT_FRAME_REGS; \ 459 459 bl hdlr; \ 460 460 b interrupt_return 461 461 ··· 504 504 EXCEPTION_COMMON_CRIT(0x100) 505 505 bl special_reg_save 506 506 CHECK_NAPPING(); 507 507 - addi r3,r1,STACK_FRAME_OVERHEAD 507 507 + addi r3,r1,STACK_INT_FRAME_REGS 508 508 bl unknown_nmi_exception 509 509 b ret_from_crit_except 510 510 ··· 515 515 EXCEPTION_COMMON_MC(0x000) 516 516 bl special_reg_save 517 517 CHECK_NAPPING(); 518 518 - addi r3,r1,STACK_FRAME_OVERHEAD 518 518 + addi r3,r1,STACK_INT_FRAME_REGS 519 519 bl machine_check_exception 520 520 b ret_from_mc_except 521 521 ··· 570 570 std r14,_ESR(r1) 571 571 ld r14,PACA_EXGEN+EX_R14(r13) 572 572 EXCEPTION_COMMON(0x700) 573 573 - addi r3,r1,STACK_FRAME_OVERHEAD 573 573 + addi r3,r1,STACK_INT_FRAME_REGS 574 574 bl program_check_exception 575 575 REST_NVGPRS(r1) 576 576 b interrupt_return ··· 586 586 beq- 1f 587 587 bl load_up_fpu 588 588 b fast_interrupt_return 589 589 - 1: addi r3,r1,STACK_FRAME_OVERHEAD 589 589 + 1: addi r3,r1,STACK_INT_FRAME_REGS 590 590 bl kernel_fp_unavailable_exception 591 591 b interrupt_return 592 592 ··· 606 606 1: 607 607 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 608 608 #endif 609 609 - addi r3,r1,STACK_FRAME_OVERHEAD 609 609 + addi r3,r1,STACK_INT_FRAME_REGS 610 610 bl altivec_unavailable_exception 611 611 b interrupt_return 612 612 ··· 616 616 BOOKE_INTERRUPT_ALTIVEC_ASSIST, 617 617 PROLOG_ADDITION_NONE) 618 618 EXCEPTION_COMMON(0x220) 619 619 - addi r3,r1,STACK_FRAME_OVERHEAD 619 619 + addi r3,r1,STACK_INT_FRAME_REGS 620 620 #ifdef CONFIG_ALTIVEC 621 621 BEGIN_FTR_SECTION 622 622 bl altivec_assist_exception ··· 643 643 EXCEPTION_COMMON_CRIT(0x9f0) 644 644 bl special_reg_save 645 645 CHECK_NAPPING(); 646 646 - addi r3,r1,STACK_FRAME_OVERHEAD 646 646 + addi r3,r1,STACK_INT_FRAME_REGS 647 647 #ifdef CONFIG_BOOKE_WDT 648 648 bl WatchdogException 649 649 #else ··· 664 664 NORMAL_EXCEPTION_PROLOG(0xf20, BOOKE_INTERRUPT_AP_UNAVAIL, 665 665 PROLOG_ADDITION_NONE) 666 666 EXCEPTION_COMMON(0xf20) 667 667 - addi r3,r1,STACK_FRAME_OVERHEAD 667 667 + addi r3,r1,STACK_INT_FRAME_REGS 668 668 bl unknown_exception 669 669 b interrupt_return 670 670 ··· 731 731 ld r14,PACA_EXCRIT+EX_R14(r13) 732 732 ld r15,PACA_EXCRIT+EX_R15(r13) 733 733 EXCEPTION_COMMON_CRIT(0xd00) 734 734 - addi r3,r1,STACK_FRAME_OVERHEAD 734 734 + addi r3,r1,STACK_INT_FRAME_REGS 735 735 bl DebugException 736 736 REST_NVGPRS(r1) 737 737 b interrupt_return ··· 802 802 ld r14,PACA_EXDBG+EX_R14(r13) 803 803 ld r15,PACA_EXDBG+EX_R15(r13) 804 804 EXCEPTION_COMMON_DBG(0xd08) 805 805 - addi r3,r1,STACK_FRAME_OVERHEAD 805 805 + addi r3,r1,STACK_INT_FRAME_REGS 806 806 bl DebugException 807 807 REST_NVGPRS(r1) 808 808 b interrupt_return ··· 812 812 PROLOG_ADDITION_NONE) 813 813 EXCEPTION_COMMON(0x260) 814 814 CHECK_NAPPING() 815 815 - addi r3,r1,STACK_FRAME_OVERHEAD 815 815 + addi r3,r1,STACK_INT_FRAME_REGS 816 816 /* 817 817 * XXX: Returning from performance_monitor_exception taken as a 818 818 * soft-NMI (Linux irqs disabled) may be risky to use interrupt_return ··· 834 834 EXCEPTION_COMMON_CRIT(0x2a0) 835 835 bl special_reg_save 836 836 CHECK_NAPPING(); 837 837 - addi r3,r1,STACK_FRAME_OVERHEAD 837 837 + addi r3,r1,STACK_INT_FRAME_REGS 838 838 bl unknown_nmi_exception 839 839 b ret_from_crit_except 840 840 ··· 846 846 GDBELL_EXCEPTION_PROLOG(0x2c0, BOOKE_INTERRUPT_GUEST_DBELL, 847 847 PROLOG_ADDITION_NONE) 848 848 EXCEPTION_COMMON(0x2c0) 849 849 - addi r3,r1,STACK_FRAME_OVERHEAD 849 849 + addi r3,r1,STACK_INT_FRAME_REGS 850 850 bl unknown_exception 851 851 b interrupt_return 852 852 ··· 857 857 EXCEPTION_COMMON_CRIT(0x2e0) 858 858 bl special_reg_save 859 859 CHECK_NAPPING(); 860 860 - addi r3,r1,STACK_FRAME_OVERHEAD 860 860 + addi r3,r1,STACK_INT_FRAME_REGS 861 861 bl unknown_nmi_exception 862 862 b ret_from_crit_except 863 863 ··· 866 866 NORMAL_EXCEPTION_PROLOG(0x310, BOOKE_INTERRUPT_HV_SYSCALL, 867 867 PROLOG_ADDITION_NONE) 868 868 EXCEPTION_COMMON(0x310) 869 869 - addi r3,r1,STACK_FRAME_OVERHEAD 869 869 + addi r3,r1,STACK_INT_FRAME_REGS 870 870 bl unknown_exception 871 871 b interrupt_return 872 872 ··· 875 875 NORMAL_EXCEPTION_PROLOG(0x320, BOOKE_INTERRUPT_HV_PRIV, 876 876 PROLOG_ADDITION_NONE) 877 877 EXCEPTION_COMMON(0x320) 878 878 - addi r3,r1,STACK_FRAME_OVERHEAD 878 878 + addi r3,r1,STACK_INT_FRAME_REGS 879 879 bl unknown_exception 880 880 b interrupt_return 881 881 ··· 884 884 NORMAL_EXCEPTION_PROLOG(0x340, BOOKE_INTERRUPT_LRAT_ERROR, 885 885 PROLOG_ADDITION_NONE) 886 886 EXCEPTION_COMMON(0x340) 887 887 - addi r3,r1,STACK_FRAME_OVERHEAD 887 887 + addi r3,r1,STACK_INT_FRAME_REGS 888 888 bl unknown_exception 889 889 b interrupt_return 890 890 ··· 979 979 * original values stashed away in the PACA 980 980 */ 981 981 storage_fault_common: 982 982 - addi r3,r1,STACK_FRAME_OVERHEAD 982 982 + addi r3,r1,STACK_INT_FRAME_REGS 983 983 bl do_page_fault 984 984 b interrupt_return 985 985 ··· 988 988 * continues here. 989 989 */ 990 990 alignment_more: 991 991 - addi r3,r1,STACK_FRAME_OVERHEAD 991 991 + addi r3,r1,STACK_INT_FRAME_REGS 992 992 bl alignment_exception 993 993 REST_NVGPRS(r1) 994 994 b interrupt_return ··· 1069 1069 ZEROIZE_GPR(12) 1070 1070 std r12,0(r11) 1071 1071 LOAD_PACA_TOC() 1072 1072 - 1: addi r3,r1,STACK_FRAME_OVERHEAD 1072 1072 + 1: addi r3,r1,STACK_INT_FRAME_REGS 1073 1073 bl kernel_bad_stack 1074 1074 b 1b 1075 1075

+69 -51

arch/powerpc/kernel/exceptions-64s.S

reviewed

··· 13 13 * 14 14 */ 15 15 16 16 + #include <linux/linkage.h> 16 17 #include <asm/hw_irq.h> 17 18 #include <asm/exception-64s.h> 18 19 #include <asm/ptrace.h> ··· 112 111 #define ISTACK .L_ISTACK_\name\() /* Set regular kernel stack */ 113 112 #define __ISTACK(name) .L_ISTACK_ ## name 114 113 #define IKUAP .L_IKUAP_\name\() /* Do KUAP lock */ 114 114 + #define IMSR_R12 .L_IMSR_R12_\name\() /* Assumes MSR saved to r12 */ 115 115 116 116 #define INT_DEFINE_BEGIN(n) \ 117 117 .macro int_define_ ## n name ··· 177 175 .endif 178 176 .ifndef IKUAP 179 177 IKUAP=1 178 178 + .endif 179 179 + .ifndef IMSR_R12 180 180 + IMSR_R12=0 180 181 .endif 181 182 .endm 182 183 ··· 507 502 std r10,0(r1) /* make stack chain pointer */ 508 503 std r0,GPR0(r1) /* save r0 in stackframe */ 509 504 std r10,GPR1(r1) /* save r1 in stackframe */ 505 505 + SANITIZE_GPR(0) 510 506 511 507 /* Mark our [H]SRRs valid for return */ 512 508 li r10,1 ··· 550 544 std r9,GPR11(r1) 551 545 std r10,GPR12(r1) 552 546 std r11,GPR13(r1) 547 547 + .if !IMSR_R12 548 548 + SANITIZE_GPRS(9, 12) 549 549 + .else 550 550 + SANITIZE_GPRS(9, 11) 551 551 + .endif 553 552 554 553 SAVE_NVGPRS(r1) 554 554 + SANITIZE_NVGPRS() 555 555 556 556 .if IDAR 557 557 .if IISIDE ··· 589 577 END_FTR_SECTION_IFSET(CPU_FTR_CFAR) 590 578 ld r10,IAREA+EX_CTR(r13) 591 579 std r10,_CTR(r1) 592 592 - std r2,GPR2(r1) /* save r2 in stackframe */ 593 593 - SAVE_GPRS(3, 8, r1) /* save r3 - r8 in stackframe */ 580 580 + SAVE_GPRS(2, 8, r1) /* save r2 - r8 in stackframe */ 581 581 + SANITIZE_GPRS(2, 8) 594 582 mflr r9 /* Get LR, later save to stack */ 595 583 LOAD_PACA_TOC() /* get kernel TOC into r2 */ 596 584 std r9,_LINK(r1) ··· 603 591 li r10,0 604 592 LOAD_REG_IMMEDIATE(r11, STACK_FRAME_REGS_MARKER) 605 593 std r10,RESULT(r1) /* clear regs->result */ 606 606 - std r11,STACK_FRAME_OVERHEAD-16(r1) /* mark the frame */ 594 594 + std r11,STACK_INT_FRAME_MARKER(r1) /* mark the frame */ 607 595 .endm 608 596 609 597 /* ··· 708 696 mtlr r9 709 697 ld r9,_CCR(r1) 710 698 mtcr r9 699 699 + SANITIZE_RESTORE_NVGPRS() 711 700 REST_GPRS(2, 13, r1) 712 701 REST_GPR(0, r1) 713 702 /* restore original r1. */ ··· 1074 1061 subi r1,r1,INT_FRAME_SIZE 1075 1062 __GEN_COMMON_BODY system_reset 1076 1063 1077 1077 - addi r3,r1,STACK_FRAME_OVERHEAD 1064 1064 + addi r3,r1,STACK_INT_FRAME_REGS 1078 1065 bl system_reset_exception 1079 1066 1080 1067 /* Clear MSR_RI before setting SRR0 and SRR1. */ ··· 1221 1208 BEGIN_FTR_SECTION 1222 1209 bl enable_machine_check 1223 1210 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) 1224 1224 - addi r3,r1,STACK_FRAME_OVERHEAD 1211 1211 + addi r3,r1,STACK_INT_FRAME_REGS 1225 1212 BEGIN_FTR_SECTION 1226 1213 bl machine_check_early_boot 1227 1214 END_FTR_SECTION(0, 1) // nop out after boot ··· 1311 1298 * save area: PACA_EXMC instead of PACA_EXGEN. 1312 1299 */ 1313 1300 GEN_COMMON machine_check 1314 1314 - addi r3,r1,STACK_FRAME_OVERHEAD 1301 1301 + addi r3,r1,STACK_INT_FRAME_REGS 1315 1302 bl machine_check_exception_async 1316 1303 b interrupt_return_srr 1317 1304 ··· 1377 1364 * This is the NMI version of the handler because we are called from 1378 1365 * the early handler which is a true NMI. 1379 1366 */ 1380 1380 - addi r3,r1,STACK_FRAME_OVERHEAD 1367 1367 + addi r3,r1,STACK_INT_FRAME_REGS 1381 1368 bl machine_check_exception 1382 1369 1383 1370 /* 1384 1371 * We will not reach here. Even if we did, there is no way out. 1385 1372 * Call unrecoverable_exception and die. 1386 1373 */ 1387 1387 - addi r3,r1,STACK_FRAME_OVERHEAD 1374 1374 + addi r3,r1,STACK_INT_FRAME_REGS 1388 1375 bl unrecoverable_exception 1389 1376 b . 1390 1377 ··· 1435 1422 EXC_COMMON_BEGIN(data_access_common) 1436 1423 GEN_COMMON data_access 1437 1424 ld r4,_DSISR(r1) 1438 1438 - addi r3,r1,STACK_FRAME_OVERHEAD 1425 1425 + addi r3,r1,STACK_INT_FRAME_REGS 1439 1426 andis. r0,r4,DSISR_DABRMATCH@h 1440 1427 bne- 1f 1441 1428 #ifdef CONFIG_PPC_64S_HASH_MMU ··· 1454 1441 * do_break() may have changed the NV GPRS while handling a breakpoint. 1455 1442 * If so, we need to restore them with their updated values. 1456 1443 */ 1457 1457 - REST_NVGPRS(r1) 1444 1444 + HANDLER_RESTORE_NVGPRS() 1458 1445 b interrupt_return_srr 1459 1446 1460 1447 ··· 1492 1479 #ifdef CONFIG_PPC_64S_HASH_MMU 1493 1480 BEGIN_MMU_FTR_SECTION 1494 1481 /* HPT case, do SLB fault */ 1495 1495 - addi r3,r1,STACK_FRAME_OVERHEAD 1482 1482 + addi r3,r1,STACK_INT_FRAME_REGS 1496 1483 bl do_slb_fault 1497 1484 cmpdi r3,0 1498 1485 bne- 1f ··· 1506 1493 li r3,-EFAULT 1507 1494 #endif 1508 1495 std r3,RESULT(r1) 1509 1509 - addi r3,r1,STACK_FRAME_OVERHEAD 1496 1496 + addi r3,r1,STACK_INT_FRAME_REGS 1510 1497 bl do_bad_segment_interrupt 1511 1498 b interrupt_return_srr 1512 1499 ··· 1538 1525 EXC_VIRT_END(instruction_access, 0x4400, 0x80) 1539 1526 EXC_COMMON_BEGIN(instruction_access_common) 1540 1527 GEN_COMMON instruction_access 1541 1541 - addi r3,r1,STACK_FRAME_OVERHEAD 1528 1528 + addi r3,r1,STACK_INT_FRAME_REGS 1542 1529 #ifdef CONFIG_PPC_64S_HASH_MMU 1543 1530 BEGIN_MMU_FTR_SECTION 1544 1531 bl do_hash_fault ··· 1580 1567 #ifdef CONFIG_PPC_64S_HASH_MMU 1581 1568 BEGIN_MMU_FTR_SECTION 1582 1569 /* HPT case, do SLB fault */ 1583 1583 - addi r3,r1,STACK_FRAME_OVERHEAD 1570 1570 + addi r3,r1,STACK_INT_FRAME_REGS 1584 1571 bl do_slb_fault 1585 1572 cmpdi r3,0 1586 1573 bne- 1f ··· 1594 1581 li r3,-EFAULT 1595 1582 #endif 1596 1583 std r3,RESULT(r1) 1597 1597 - addi r3,r1,STACK_FRAME_OVERHEAD 1584 1584 + addi r3,r1,STACK_INT_FRAME_REGS 1598 1585 bl do_bad_segment_interrupt 1599 1586 b interrupt_return_srr 1600 1587 ··· 1648 1635 EXC_VIRT_END(hardware_interrupt, 0x4500, 0x100) 1649 1636 EXC_COMMON_BEGIN(hardware_interrupt_common) 1650 1637 GEN_COMMON hardware_interrupt 1651 1651 - addi r3,r1,STACK_FRAME_OVERHEAD 1638 1638 + addi r3,r1,STACK_INT_FRAME_REGS 1652 1639 bl do_IRQ 1653 1640 BEGIN_FTR_SECTION 1654 1641 b interrupt_return_hsrr ··· 1678 1665 EXC_VIRT_END(alignment, 0x4600, 0x100) 1679 1666 EXC_COMMON_BEGIN(alignment_common) 1680 1667 GEN_COMMON alignment 1681 1681 - addi r3,r1,STACK_FRAME_OVERHEAD 1668 1668 + addi r3,r1,STACK_INT_FRAME_REGS 1682 1669 bl alignment_exception 1683 1683 - REST_NVGPRS(r1) /* instruction emulation may change GPRs */ 1670 1670 + HANDLER_RESTORE_NVGPRS() /* instruction emulation may change GPRs */ 1684 1671 b interrupt_return_srr 1685 1672 1686 1673 ··· 1744 1731 __GEN_COMMON_BODY program_check 1745 1732 1746 1733 .Ldo_program_check: 1747 1747 - addi r3,r1,STACK_FRAME_OVERHEAD 1734 1734 + addi r3,r1,STACK_INT_FRAME_REGS 1748 1735 bl program_check_exception 1749 1749 - REST_NVGPRS(r1) /* instruction emulation may change GPRs */ 1736 1736 + HANDLER_RESTORE_NVGPRS() /* instruction emulation may change GPRs */ 1750 1737 b interrupt_return_srr 1751 1738 1752 1739 ··· 1764 1751 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 1765 1752 IKVM_REAL=1 1766 1753 #endif 1754 1754 + IMSR_R12=1 1767 1755 INT_DEFINE_END(fp_unavailable) 1768 1756 1769 1757 EXC_REAL_BEGIN(fp_unavailable, 0x800, 0x100) ··· 1776 1762 EXC_COMMON_BEGIN(fp_unavailable_common) 1777 1763 GEN_COMMON fp_unavailable 1778 1764 bne 1f /* if from user, just load it up */ 1779 1779 - addi r3,r1,STACK_FRAME_OVERHEAD 1765 1765 + addi r3,r1,STACK_INT_FRAME_REGS 1780 1766 bl kernel_fp_unavailable_exception 1781 1767 0: trap 1782 1768 EMIT_BUG_ENTRY 0b, __FILE__, __LINE__, 0 ··· 1794 1780 b fast_interrupt_return_srr 1795 1781 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1796 1782 2: /* User process was in a transaction */ 1797 1797 - addi r3,r1,STACK_FRAME_OVERHEAD 1783 1783 + addi r3,r1,STACK_INT_FRAME_REGS 1798 1784 bl fp_unavailable_tm 1799 1785 b interrupt_return_srr 1800 1786 #endif ··· 1838 1824 EXC_VIRT_END(decrementer, 0x4900, 0x80) 1839 1825 EXC_COMMON_BEGIN(decrementer_common) 1840 1826 GEN_COMMON decrementer 1841 1841 - addi r3,r1,STACK_FRAME_OVERHEAD 1827 1827 + addi r3,r1,STACK_INT_FRAME_REGS 1842 1828 bl timer_interrupt 1843 1829 b interrupt_return_srr 1844 1830 ··· 1923 1909 EXC_VIRT_END(doorbell_super, 0x4a00, 0x100) 1924 1910 EXC_COMMON_BEGIN(doorbell_super_common) 1925 1911 GEN_COMMON doorbell_super 1926 1926 - addi r3,r1,STACK_FRAME_OVERHEAD 1912 1912 + addi r3,r1,STACK_INT_FRAME_REGS 1927 1913 #ifdef CONFIG_PPC_DOORBELL 1928 1914 bl doorbell_exception 1929 1915 #else ··· 2090 2076 EXC_VIRT_END(single_step, 0x4d00, 0x100) 2091 2077 EXC_COMMON_BEGIN(single_step_common) 2092 2078 GEN_COMMON single_step 2093 2093 - addi r3,r1,STACK_FRAME_OVERHEAD 2079 2079 + addi r3,r1,STACK_INT_FRAME_REGS 2094 2080 bl single_step_exception 2095 2081 b interrupt_return_srr 2096 2082 ··· 2124 2110 EXC_VIRT_END(h_data_storage, 0x4e00, 0x20) 2125 2111 EXC_COMMON_BEGIN(h_data_storage_common) 2126 2112 GEN_COMMON h_data_storage 2127 2127 - addi r3,r1,STACK_FRAME_OVERHEAD 2113 2113 + addi r3,r1,STACK_INT_FRAME_REGS 2128 2114 BEGIN_MMU_FTR_SECTION 2129 2115 bl do_bad_page_fault_segv 2130 2116 MMU_FTR_SECTION_ELSE ··· 2153 2139 EXC_VIRT_END(h_instr_storage, 0x4e20, 0x20) 2154 2140 EXC_COMMON_BEGIN(h_instr_storage_common) 2155 2141 GEN_COMMON h_instr_storage 2156 2156 - addi r3,r1,STACK_FRAME_OVERHEAD 2142 2142 + addi r3,r1,STACK_INT_FRAME_REGS 2157 2143 bl unknown_exception 2158 2144 b interrupt_return_hsrr 2159 2145 ··· 2176 2162 EXC_VIRT_END(emulation_assist, 0x4e40, 0x20) 2177 2163 EXC_COMMON_BEGIN(emulation_assist_common) 2178 2164 GEN_COMMON emulation_assist 2179 2179 - addi r3,r1,STACK_FRAME_OVERHEAD 2165 2165 + addi r3,r1,STACK_INT_FRAME_REGS 2180 2166 bl emulation_assist_interrupt 2181 2181 - REST_NVGPRS(r1) /* instruction emulation may change GPRs */ 2167 2167 + HANDLER_RESTORE_NVGPRS() /* instruction emulation may change GPRs */ 2182 2168 b interrupt_return_hsrr 2183 2169 2184 2170 ··· 2236 2222 2237 2223 __GEN_COMMON_BODY hmi_exception_early 2238 2224 2239 2239 - addi r3,r1,STACK_FRAME_OVERHEAD 2225 2225 + addi r3,r1,STACK_INT_FRAME_REGS 2240 2226 bl hmi_exception_realmode 2241 2227 cmpdi cr0,r3,0 2242 2228 bne 1f ··· 2254 2240 2255 2241 EXC_COMMON_BEGIN(hmi_exception_common) 2256 2242 GEN_COMMON hmi_exception 2257 2257 - addi r3,r1,STACK_FRAME_OVERHEAD 2243 2243 + addi r3,r1,STACK_INT_FRAME_REGS 2258 2244 bl handle_hmi_exception 2259 2245 b interrupt_return_hsrr 2260 2246 ··· 2288 2274 EXC_VIRT_END(h_doorbell, 0x4e80, 0x20) 2289 2275 EXC_COMMON_BEGIN(h_doorbell_common) 2290 2276 GEN_COMMON h_doorbell 2291 2291 - addi r3,r1,STACK_FRAME_OVERHEAD 2277 2277 + addi r3,r1,STACK_INT_FRAME_REGS 2292 2278 #ifdef CONFIG_PPC_DOORBELL 2293 2279 bl doorbell_exception 2294 2280 #else ··· 2324 2310 EXC_VIRT_END(h_virt_irq, 0x4ea0, 0x20) 2325 2311 EXC_COMMON_BEGIN(h_virt_irq_common) 2326 2312 GEN_COMMON h_virt_irq 2327 2327 - addi r3,r1,STACK_FRAME_OVERHEAD 2313 2313 + addi r3,r1,STACK_INT_FRAME_REGS 2328 2314 bl do_IRQ 2329 2315 b interrupt_return_hsrr 2330 2316 ··· 2370 2356 EXC_VIRT_END(performance_monitor, 0x4f00, 0x20) 2371 2357 EXC_COMMON_BEGIN(performance_monitor_common) 2372 2358 GEN_COMMON performance_monitor 2373 2373 - addi r3,r1,STACK_FRAME_OVERHEAD 2359 2359 + addi r3,r1,STACK_INT_FRAME_REGS 2374 2360 lbz r4,PACAIRQSOFTMASK(r13) 2375 2361 cmpdi r4,IRQS_ENABLED 2376 2362 bne 1f ··· 2398 2384 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 2399 2385 IKVM_REAL=1 2400 2386 #endif 2387 2387 + IMSR_R12=1 2401 2388 INT_DEFINE_END(altivec_unavailable) 2402 2389 2403 2390 EXC_REAL_BEGIN(altivec_unavailable, 0xf20, 0x20) ··· 2425 2410 b fast_interrupt_return_srr 2426 2411 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2427 2412 2: /* User process was in a transaction */ 2428 2428 - addi r3,r1,STACK_FRAME_OVERHEAD 2413 2413 + addi r3,r1,STACK_INT_FRAME_REGS 2429 2414 bl altivec_unavailable_tm 2430 2415 b interrupt_return_srr 2431 2416 #endif 2432 2417 1: 2433 2418 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 2434 2419 #endif 2435 2435 - addi r3,r1,STACK_FRAME_OVERHEAD 2420 2420 + addi r3,r1,STACK_INT_FRAME_REGS 2436 2421 bl altivec_unavailable_exception 2437 2422 b interrupt_return_srr 2438 2423 ··· 2448 2433 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 2449 2434 IKVM_REAL=1 2450 2435 #endif 2436 2436 + IMSR_R12=1 2451 2437 INT_DEFINE_END(vsx_unavailable) 2452 2438 2453 2439 EXC_REAL_BEGIN(vsx_unavailable, 0xf40, 0x20) ··· 2474 2458 b load_up_vsx 2475 2459 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2476 2460 2: /* User process was in a transaction */ 2477 2477 - addi r3,r1,STACK_FRAME_OVERHEAD 2461 2461 + addi r3,r1,STACK_INT_FRAME_REGS 2478 2462 bl vsx_unavailable_tm 2479 2463 b interrupt_return_srr 2480 2464 #endif 2481 2465 1: 2482 2466 END_FTR_SECTION_IFSET(CPU_FTR_VSX) 2483 2467 #endif 2484 2484 - addi r3,r1,STACK_FRAME_OVERHEAD 2468 2468 + addi r3,r1,STACK_INT_FRAME_REGS 2485 2469 bl vsx_unavailable_exception 2486 2470 b interrupt_return_srr 2487 2471 ··· 2508 2492 EXC_VIRT_END(facility_unavailable, 0x4f60, 0x20) 2509 2493 EXC_COMMON_BEGIN(facility_unavailable_common) 2510 2494 GEN_COMMON facility_unavailable 2511 2511 - addi r3,r1,STACK_FRAME_OVERHEAD 2495 2495 + addi r3,r1,STACK_INT_FRAME_REGS 2512 2496 bl facility_unavailable_exception 2513 2513 - REST_NVGPRS(r1) /* instruction emulation may change GPRs */ 2497 2497 + HANDLER_RESTORE_NVGPRS() /* instruction emulation may change GPRs */ 2514 2498 b interrupt_return_srr 2515 2499 2516 2500 ··· 2536 2520 EXC_VIRT_END(h_facility_unavailable, 0x4f80, 0x20) 2537 2521 EXC_COMMON_BEGIN(h_facility_unavailable_common) 2538 2522 GEN_COMMON h_facility_unavailable 2539 2539 - addi r3,r1,STACK_FRAME_OVERHEAD 2523 2523 + addi r3,r1,STACK_INT_FRAME_REGS 2540 2524 bl facility_unavailable_exception 2541 2541 - REST_NVGPRS(r1) /* XXX Shouldn't be necessary in practice */ 2525 2525 + /* XXX Shouldn't be necessary in practice */ 2526 2526 + HANDLER_RESTORE_NVGPRS() 2542 2527 b interrupt_return_hsrr 2543 2528 2544 2529 ··· 2567 2550 EXC_VIRT_NONE(0x5200, 0x100) 2568 2551 EXC_COMMON_BEGIN(cbe_system_error_common) 2569 2552 GEN_COMMON cbe_system_error 2570 2570 - addi r3,r1,STACK_FRAME_OVERHEAD 2553 2553 + addi r3,r1,STACK_INT_FRAME_REGS 2571 2554 bl cbe_system_error_exception 2572 2555 b interrupt_return_hsrr 2573 2556 ··· 2598 2581 EXC_VIRT_END(instruction_breakpoint, 0x5300, 0x100) 2599 2582 EXC_COMMON_BEGIN(instruction_breakpoint_common) 2600 2583 GEN_COMMON instruction_breakpoint 2601 2601 - addi r3,r1,STACK_FRAME_OVERHEAD 2584 2584 + addi r3,r1,STACK_INT_FRAME_REGS 2602 2585 bl instruction_breakpoint_exception 2603 2586 b interrupt_return_srr 2604 2587 ··· 2720 2703 2721 2704 EXC_COMMON_BEGIN(denorm_exception_common) 2722 2705 GEN_COMMON denorm_exception 2723 2723 - addi r3,r1,STACK_FRAME_OVERHEAD 2706 2706 + addi r3,r1,STACK_INT_FRAME_REGS 2724 2707 bl unknown_exception 2725 2708 b interrupt_return_hsrr 2726 2709 ··· 2737 2720 EXC_VIRT_NONE(0x5600, 0x100) 2738 2721 EXC_COMMON_BEGIN(cbe_maintenance_common) 2739 2722 GEN_COMMON cbe_maintenance 2740 2740 - addi r3,r1,STACK_FRAME_OVERHEAD 2723 2723 + addi r3,r1,STACK_INT_FRAME_REGS 2741 2724 bl cbe_maintenance_exception 2742 2725 b interrupt_return_hsrr 2743 2726 ··· 2762 2745 EXC_VIRT_END(altivec_assist, 0x5700, 0x100) 2763 2746 EXC_COMMON_BEGIN(altivec_assist_common) 2764 2747 GEN_COMMON altivec_assist 2765 2765 - addi r3,r1,STACK_FRAME_OVERHEAD 2748 2748 + addi r3,r1,STACK_INT_FRAME_REGS 2766 2749 #ifdef CONFIG_ALTIVEC 2767 2750 bl altivec_assist_exception 2768 2768 - REST_NVGPRS(r1) /* instruction emulation may change GPRs */ 2751 2751 + HANDLER_RESTORE_NVGPRS() /* instruction emulation may change GPRs */ 2769 2752 #else 2770 2753 bl unknown_exception 2771 2754 #endif ··· 2784 2767 EXC_VIRT_NONE(0x5800, 0x100) 2785 2768 EXC_COMMON_BEGIN(cbe_thermal_common) 2786 2769 GEN_COMMON cbe_thermal 2787 2787 - addi r3,r1,STACK_FRAME_OVERHEAD 2770 2770 + addi r3,r1,STACK_INT_FRAME_REGS 2788 2771 bl cbe_thermal_exception 2789 2772 b interrupt_return_hsrr 2790 2773 ··· 2817 2800 subi r1,r1,INT_FRAME_SIZE 2818 2801 __GEN_COMMON_BODY soft_nmi 2819 2802 2820 2820 - addi r3,r1,STACK_FRAME_OVERHEAD 2803 2803 + addi r3,r1,STACK_INT_FRAME_REGS 2821 2804 bl soft_nmi_interrupt 2822 2805 2823 2806 /* Clear MSR_RI before setting SRR0 and SRR1. */ ··· 3141 3124 blr 3142 3125 3143 3126 /* MSR[RI] should be clear because this uses SRR[01] */ 3144 3144 - disable_machine_check: 3127 3127 + SYM_FUNC_START_LOCAL(disable_machine_check) 3145 3128 mflr r0 3146 3129 bcl 20,31,$+4 3147 3130 0: mflr r3 ··· 3154 3137 RFI_TO_KERNEL 3155 3138 1: mtlr r0 3156 3139 blr 3140 3140 + SYM_FUNC_END(disable_machine_check)

+2 -2

arch/powerpc/kernel/head_32.h

reviewed

··· 112 112 stw r0,GPR0(r1) 113 113 lis r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */ 114 114 addi r10,r10,STACK_FRAME_REGS_MARKER@l 115 115 - stw r10,8(r1) 115 115 + stw r10,STACK_INT_FRAME_MARKER(r1) 116 116 li r10, \trapno 117 117 stw r10,_TRAP(r1) 118 118 SAVE_GPRS(3, 8, r1) ··· 127 127 mfspr r10,SPRN_XER 128 128 addi r2, r2, -THREAD 129 129 stw r10,_XER(r1) 130 130 - addi r3,r1,STACK_FRAME_OVERHEAD 130 130 + addi r3,r1,STACK_INT_FRAME_REGS 131 131 .endm 132 132 133 133 .macro prepare_transfer_to_handler

+5 -2

arch/powerpc/kernel/head_40x.S

reviewed

··· 28 28 #include <linux/init.h> 29 29 #include <linux/pgtable.h> 30 30 #include <linux/sizes.h> 31 31 + #include <linux/linkage.h> 32 32 + 31 33 #include <asm/processor.h> 32 34 #include <asm/page.h> 33 35 #include <asm/mmu.h> ··· 604 602 lis r1,init_thread_union@ha 605 603 addi r1,r1,init_thread_union@l 606 604 li r0,0 607 607 - stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1) 605 605 + stwu r0,THREAD_SIZE-STACK_FRAME_MIN_SIZE(r1) 608 606 609 607 bl early_init /* We have to do this with MMU on */ 610 608 ··· 664 662 * kernel initialization. This maps the first 32 MBytes of memory 1:1 665 663 * virtual to physical and more importantly sets the cache mode. 666 664 */ 667 667 - initial_mmu: 665 665 + SYM_FUNC_START_LOCAL(initial_mmu) 668 666 tlbia /* Invalidate all TLB entries */ 669 667 isync 670 668 ··· 713 711 mtspr SPRN_EVPR,r0 714 712 715 713 blr 714 714 + SYM_FUNC_END(initial_mmu) 716 715 717 716 _GLOBAL(abort) 718 717 mfspr r13,SPRN_DBCR0

+3 -3

arch/powerpc/kernel/head_44x.S

reviewed

··· 109 109 lis r1,init_thread_union@h 110 110 ori r1,r1,init_thread_union@l 111 111 li r0,0 112 112 - stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1) 112 112 + stwu r0,THREAD_SIZE-STACK_FRAME_MIN_SIZE(r1) 113 113 114 114 bl early_init 115 115 ··· 1012 1012 */ 1013 1013 lis r1,temp_boot_stack@h 1014 1014 ori r1,r1,temp_boot_stack@l 1015 1015 - addi r1,r1,1024-STACK_FRAME_OVERHEAD 1015 1015 + addi r1,r1,1024-STACK_FRAME_MIN_SIZE 1016 1016 li r0,0 1017 1017 stw r0,0(r1) 1018 1018 bl mmu_init_secondary ··· 1025 1025 lwz r1,TASK_STACK(r2) 1026 1026 1027 1027 /* Current stack pointer */ 1028 1028 - addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD 1028 1028 + addi r1,r1,THREAD_SIZE-STACK_FRAME_MIN_SIZE 1029 1029 li r0,0 1030 1030 stw r0,0(r1) 1031 1031

+8 -5

arch/powerpc/kernel/head_64.S

reviewed

··· 18 18 * variants. 19 19 */ 20 20 21 21 + #include <linux/linkage.h> 21 22 #include <linux/threads.h> 22 23 #include <linux/init.h> 23 24 #include <asm/reg.h> ··· 425 424 426 425 /* Create a temp kernel stack for use before relocation is on. */ 427 426 ld r1,PACAEMERGSP(r13) 428 428 - subi r1,r1,STACK_FRAME_OVERHEAD 427 427 + subi r1,r1,STACK_FRAME_MIN_SIZE 429 428 430 429 /* See if we need to call a cpu state restore handler */ 431 430 LOAD_REG_ADDR(r23, cur_cpu_spec) ··· 463 462 * Assumes we're mapped EA == RA if the MMU is on. 464 463 */ 465 464 #ifdef CONFIG_PPC_BOOK3S 466 466 - __mmu_off: 465 465 + SYM_FUNC_START_LOCAL(__mmu_off) 467 466 mfmsr r3 468 467 andi. r0,r3,MSR_IR|MSR_DR 469 468 beqlr ··· 474 473 sync 475 474 rfid 476 475 b . /* prevent speculative execution */ 476 476 + SYM_FUNC_END(__mmu_off) 477 477 #endif 478 478 479 479 ··· 782 780 783 781 /* Create a temp kernel stack for use before relocation is on. */ 784 782 ld r1,PACAEMERGSP(r13) 785 785 - subi r1,r1,STACK_FRAME_OVERHEAD 783 783 + subi r1,r1,STACK_FRAME_MIN_SIZE 786 784 787 785 b __secondary_start 788 786 ··· 871 869 /* 872 870 * This subroutine clobbers r11 and r12 873 871 */ 874 874 - enable_64b_mode: 872 872 + SYM_FUNC_START_LOCAL(enable_64b_mode) 875 873 mfmsr r11 /* grab the current MSR */ 876 874 #ifdef CONFIG_PPC_BOOK3E_64 877 875 oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */ ··· 883 881 isync 884 882 #endif 885 883 blr 884 884 + SYM_FUNC_END(enable_64b_mode) 886 885 887 886 /* 888 887 * This puts the TOC pointer into r2, offset by 0x8000 (as expected ··· 961 958 LOAD_REG_IMMEDIATE(r1,THREAD_SIZE) 962 959 add r1,r3,r1 963 960 li r0,0 964 964 - stdu r0,-STACK_FRAME_OVERHEAD(r1) 961 961 + stdu r0,-STACK_FRAME_MIN_SIZE(r1) 965 962 966 963 /* 967 964 * Do very early kernel initializations, including initial hash table

+8 -5

arch/powerpc/kernel/head_85xx.S

reviewed

··· 29 29 #include <linux/init.h> 30 30 #include <linux/threads.h> 31 31 #include <linux/pgtable.h> 32 32 + #include <linux/linkage.h> 33 33 + 32 34 #include <asm/processor.h> 33 35 #include <asm/page.h> 34 36 #include <asm/mmu.h> ··· 231 229 lis r1,init_thread_union@h 232 230 ori r1,r1,init_thread_union@l 233 231 li r0,0 234 234 - stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1) 232 232 + stwu r0,THREAD_SIZE-STACK_FRAME_MIN_SIZE(r1) 235 233 236 234 #ifdef CONFIG_SMP 237 235 stw r24, TASK_CPU(r2) ··· 887 885 * Translate the effec addr in r3 to phys addr. The phys addr will be put 888 886 * into r3(higher 32bit) and r4(lower 32bit) 889 887 */ 890 890 - get_phys_addr: 888 888 + SYM_FUNC_START_LOCAL(get_phys_addr) 891 889 mfmsr r8 892 890 mfspr r9,SPRN_PID 893 891 rlwinm r9,r9,16,0x3fff0000 /* turn PID into MAS6[SPID] */ ··· 909 907 mfspr r3,SPRN_MAS7 910 908 #endif 911 909 blr 910 910 + SYM_FUNC_END(get_phys_addr) 912 911 913 912 /* 914 913 * Global functions ··· 975 972 li r4,THREAD_ACC 976 973 evstddx evr6, r4, r3 /* save off accumulator */ 977 974 beq 1f 978 978 - lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5) 975 975 + lwz r4,_MSR-STACK_INT_FRAME_REGS(r5) 979 976 lis r3,MSR_SPE@h 980 977 andc r4,r4,r3 /* disable SPE for previous task */ 981 981 - stw r4,_MSR-STACK_FRAME_OVERHEAD(r5) 978 978 + stw r4,_MSR-STACK_INT_FRAME_REGS(r5) 982 979 1: 983 980 blr 984 981 #endif /* CONFIG_SPE */ ··· 1047 1044 lwz r1,TASK_STACK(r2) 1048 1045 1049 1046 /* stack */ 1050 1050 - addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD 1047 1047 + addi r1,r1,THREAD_SIZE-STACK_FRAME_MIN_SIZE 1051 1048 li r0,0 1052 1049 stw r0,0(r1) 1053 1050

+5 -2

arch/powerpc/kernel/head_8xx.S

reviewed

··· 18 18 #include <linux/magic.h> 19 19 #include <linux/pgtable.h> 20 20 #include <linux/sizes.h> 21 21 + #include <linux/linkage.h> 22 22 + 21 23 #include <asm/processor.h> 22 24 #include <asm/page.h> 23 25 #include <asm/mmu.h> ··· 539 537 ori r0, r0, STACK_END_MAGIC@l 540 538 stw r0, 0(r1) 541 539 li r0,0 542 542 - stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1) 540 540 + stwu r0,THREAD_SIZE-STACK_FRAME_MIN_SIZE(r1) 543 541 544 542 lis r6, swapper_pg_dir@ha 545 543 tophys(r6,r6) ··· 627 625 * 24 Mbytes of data, and the 512k IMMR space. Anything not covered by 628 626 * these mappings is mapped by page tables. 629 627 */ 630 630 - initial_mmu: 628 628 + SYM_FUNC_START_LOCAL(initial_mmu) 631 629 li r8, 0 632 630 mtspr SPRN_MI_CTR, r8 /* remove PINNED ITLB entries */ 633 631 lis r10, MD_TWAM@h ··· 688 686 #endif 689 687 mtspr SPRN_DER, r8 690 688 blr 689 689 + SYM_FUNC_END(initial_mmu) 691 690 692 691 _GLOBAL(mmu_pin_tlb) 693 692 lis r9, (1f - PAGE_OFFSET)@h

+22 -11

arch/powerpc/kernel/head_book3s_32.S

reviewed

··· 18 18 19 19 #include <linux/init.h> 20 20 #include <linux/pgtable.h> 21 21 + #include <linux/linkage.h> 22 22 + 21 23 #include <asm/reg.h> 22 24 #include <asm/page.h> 23 25 #include <asm/mmu.h> ··· 842 840 lwz r1,TASK_STACK(r1) 843 841 844 842 /* stack */ 845 845 - addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD 843 843 + addi r1,r1,THREAD_SIZE-STACK_FRAME_MIN_SIZE 846 844 li r0,0 847 845 tophys(r3,r1) 848 846 stw r0,0(r3) ··· 879 877 * Load stuff into the MMU. Intended to be called with 880 878 * IR=0 and DR=0. 881 879 */ 882 882 - early_hash_table: 880 880 + SYM_FUNC_START_LOCAL(early_hash_table) 883 881 sync /* Force all PTE updates to finish */ 884 882 isync 885 883 tlbia /* Clear all TLB entries */ ··· 890 888 ori r6, r6, 3 /* 256kB table */ 891 889 mtspr SPRN_SDR1, r6 892 890 blr 891 891 + SYM_FUNC_END(early_hash_table) 893 892 894 894 - load_up_mmu: 893 893 + SYM_FUNC_START_LOCAL(load_up_mmu) 895 894 sync /* Force all PTE updates to finish */ 896 895 isync 897 896 tlbia /* Clear all TLB entries */ ··· 921 918 LOAD_BAT(7,r3,r4,r5) 922 919 END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS) 923 920 blr 921 921 + SYM_FUNC_END(load_up_mmu) 924 922 925 923 _GLOBAL(load_segment_registers) 926 924 li r0, NUM_USER_SEGMENTS /* load up user segment register values */ ··· 970 966 lis r1,init_thread_union@ha 971 967 addi r1,r1,init_thread_union@l 972 968 li r0,0 973 973 - stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1) 969 969 + stwu r0,THREAD_SIZE-STACK_FRAME_MIN_SIZE(r1) 974 970 /* 975 971 * Do early platform-specific initialization, 976 972 * and set up the MMU. ··· 1032 1028 * this makes sure it's done. 1033 1029 * -- Cort 1034 1030 */ 1035 1035 - clear_bats: 1031 1031 + SYM_FUNC_START_LOCAL(clear_bats) 1036 1032 li r10,0 1037 1033 1038 1034 mtspr SPRN_DBAT0U,r10 ··· 1076 1072 mtspr SPRN_IBAT7L,r10 1077 1073 END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS) 1078 1074 blr 1075 1075 + SYM_FUNC_END(clear_bats) 1079 1076 1080 1077 _GLOBAL(update_bats) 1081 1078 lis r4, 1f@h ··· 1113 1108 mtspr SPRN_SRR1, r6 1114 1109 rfi 1115 1110 1116 1116 - flush_tlbs: 1111 1111 + SYM_FUNC_START_LOCAL(flush_tlbs) 1117 1112 lis r10, 0x40 1118 1113 1: addic. r10, r10, -0x1000 1119 1114 tlbie r10 1120 1115 bgt 1b 1121 1116 sync 1122 1117 blr 1118 1118 + SYM_FUNC_END(flush_tlbs) 1123 1119 1124 1124 - mmu_off: 1120 1120 + SYM_FUNC_START_LOCAL(mmu_off) 1125 1121 addi r4, r3, __after_mmu_off - _start 1126 1122 mfmsr r3 1127 1123 andi. r0,r3,MSR_DR|MSR_IR /* MMU enabled? */ ··· 1134 1128 mtspr SPRN_SRR1,r3 1135 1129 sync 1136 1130 rfi 1131 1131 + SYM_FUNC_END(mmu_off) 1137 1132 1138 1133 /* We use one BAT to map up to 256M of RAM at _PAGE_OFFSET */ 1139 1139 - initial_bats: 1134 1134 + SYM_FUNC_START_LOCAL(initial_bats) 1140 1135 lis r11,PAGE_OFFSET@h 1141 1136 tophys(r8,r11) 1142 1137 #ifdef CONFIG_SMP ··· 1153 1146 mtspr SPRN_IBAT0U,r11 1154 1147 isync 1155 1148 blr 1149 1149 + SYM_FUNC_END(initial_bats) 1156 1150 1157 1151 #ifdef CONFIG_BOOTX_TEXT 1158 1158 - setup_disp_bat: 1152 1152 + SYM_FUNC_START_LOCAL(setup_disp_bat) 1159 1153 /* 1160 1154 * setup the display bat prepared for us in prom.c 1161 1155 */ ··· 1172 1164 mtspr SPRN_DBAT3L,r8 1173 1165 mtspr SPRN_DBAT3U,r11 1174 1166 blr 1167 1167 + SYM_FUNC_END(setup_disp_bat) 1175 1168 #endif /* CONFIG_BOOTX_TEXT */ 1176 1169 1177 1170 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM 1178 1178 - setup_cpm_bat: 1171 1171 + SYM_FUNC_START_LOCAL(setup_cpm_bat) 1179 1172 lis r8, 0xf000 1180 1173 ori r8, r8, 0x002a 1181 1174 mtspr SPRN_DBAT1L, r8 ··· 1186 1177 mtspr SPRN_DBAT1U, r11 1187 1178 1188 1179 blr 1180 1180 + SYM_FUNC_END(setup_cpm_bat) 1189 1181 #endif 1190 1182 1191 1183 #ifdef CONFIG_PPC_EARLY_DEBUG_USBGECKO 1192 1192 - setup_usbgecko_bat: 1184 1184 + SYM_FUNC_START_LOCAL(setup_usbgecko_bat) 1193 1185 /* prepare a BAT for early io */ 1194 1186 #if defined(CONFIG_GAMECUBE) 1195 1187 lis r8, 0x0c00 ··· 1209 1199 mtspr SPRN_DBAT1L, r8 1210 1200 mtspr SPRN_DBAT1U, r11 1211 1201 blr 1202 1202 + SYM_FUNC_END(setup_usbgecko_bat) 1212 1203 #endif 1213 1204 1214 1205 .data

+2 -2

arch/powerpc/kernel/head_booke.h

reviewed

··· 84 84 stw r0,GPR0(r1) 85 85 lis r10, STACK_FRAME_REGS_MARKER@ha /* exception frame marker */ 86 86 addi r10, r10, STACK_FRAME_REGS_MARKER@l 87 87 - stw r10, 8(r1) 87 87 + stw r10, STACK_INT_FRAME_MARKER(r1) 88 88 li r10, \trapno 89 89 stw r10,_TRAP(r1) 90 90 SAVE_GPRS(3, 8, r1) ··· 99 99 mfspr r10,SPRN_XER 100 100 addi r2, r2, -THREAD 101 101 stw r10,_XER(r1) 102 102 - addi r3,r1,STACK_FRAME_OVERHEAD 102 102 + addi r3,r1,STACK_INT_FRAME_REGS 103 103 .endm 104 104 105 105 .macro prepare_transfer_to_handler

+1 -1

arch/powerpc/kernel/hw_breakpoint.c

reviewed

··· 646 646 ppc_inst_t instr = ppc_inst(0); 647 647 int type = 0; 648 648 int size = 0; 649 649 - unsigned long ea; 649 649 + unsigned long ea = 0; 650 650 651 651 /* Disable breakpoints during exception handling */ 652 652 hw_breakpoint_disable();

+38 -20

arch/powerpc/kernel/interrupt_64.S

reviewed

··· 77 77 std r11,_TRAP(r1) 78 78 std r12,_CCR(r1) 79 79 std r3,ORIG_GPR3(r1) 80 80 - /* Calling convention has r3 = regs, r4 = orig r0 */ 81 81 - addi r3,r1,STACK_FRAME_OVERHEAD 82 82 - mr r4,r0 83 80 LOAD_REG_IMMEDIATE(r11, STACK_FRAME_REGS_MARKER) 84 84 - std r11,-16(r3) /* "regshere" marker */ 81 81 + std r11,STACK_INT_FRAME_MARKER(r1) /* "regs" marker */ 82 82 + /* Calling convention has r3 = regs, r4 = orig r0 */ 83 83 + addi r3,r1,STACK_INT_FRAME_REGS 84 84 + mr r4,r0 85 85 86 86 BEGIN_FTR_SECTION 87 87 HMT_MEDIUM ··· 96 96 * but this is the best we can do. 97 97 */ 98 98 99 99 + /* 100 100 + * Zero user registers to prevent influencing speculative execution 101 101 + * state of kernel code. 102 102 + */ 103 103 + SANITIZE_SYSCALL_GPRS() 99 104 bl system_call_exception 100 105 101 106 .Lsyscall_vectored_\name\()_exit: 102 102 - addi r4,r1,STACK_FRAME_OVERHEAD 107 107 + addi r4,r1,STACK_INT_FRAME_REGS 103 108 li r5,1 /* scv */ 104 109 bl syscall_exit_prepare 105 110 std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */ ··· 129 124 HMT_MEDIUM_LOW 130 125 END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR) 131 126 127 127 + SANITIZE_RESTORE_NVGPRS() 132 128 cmpdi r3,0 133 129 bne .Lsyscall_vectored_\name\()_restore_regs 134 130 ··· 165 159 ld r4,_LINK(r1) 166 160 ld r5,_XER(r1) 167 161 168 168 - REST_NVGPRS(r1) 162 162 + HANDLER_RESTORE_NVGPRS() 169 163 REST_GPR(0, r1) 170 164 mtcr r2 171 165 mtctr r3 ··· 182 176 ld r1,PACA_EXIT_SAVE_R1(r13) 183 177 LOAD_PACA_TOC() 184 178 ld r3,RESULT(r1) 185 185 - addi r4,r1,STACK_FRAME_OVERHEAD 179 179 + addi r4,r1,STACK_INT_FRAME_REGS 186 180 li r11,IRQS_ALL_DISABLED 187 181 stb r11,PACAIRQSOFTMASK(r13) 188 182 bl syscall_exit_restart ··· 256 250 std r11,_TRAP(r1) 257 251 std r12,_CCR(r1) 258 252 std r3,ORIG_GPR3(r1) 259 259 - /* Calling convention has r3 = regs, r4 = orig r0 */ 260 260 - addi r3,r1,STACK_FRAME_OVERHEAD 261 261 - mr r4,r0 262 253 LOAD_REG_IMMEDIATE(r11, STACK_FRAME_REGS_MARKER) 263 263 - std r11,-16(r3) /* "regshere" marker */ 254 254 + std r11,STACK_INT_FRAME_MARKER(r1) /* "regs" marker */ 255 255 + /* Calling convention has r3 = regs, r4 = orig r0 */ 256 256 + addi r3,r1,STACK_INT_FRAME_REGS 257 257 + mr r4,r0 264 258 265 259 #ifdef CONFIG_PPC_BOOK3S 266 260 li r11,1 ··· 281 275 wrteei 1 282 276 #endif 283 277 278 278 + /* 279 279 + * Zero user registers to prevent influencing speculative execution 280 280 + * state of kernel code. 281 281 + */ 282 282 + SANITIZE_SYSCALL_GPRS() 284 283 bl system_call_exception 285 284 286 285 .Lsyscall_exit: 287 287 - addi r4,r1,STACK_FRAME_OVERHEAD 286 286 + addi r4,r1,STACK_INT_FRAME_REGS 288 287 li r5,0 /* !scv */ 289 288 bl syscall_exit_prepare 290 289 std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */ ··· 326 315 stdcx. r0,0,r1 /* to clear the reservation */ 327 316 END_FTR_SECTION_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS) 328 317 318 318 + SANITIZE_RESTORE_NVGPRS() 329 319 cmpdi r3,0 330 320 bne .Lsyscall_restore_regs 331 321 /* Zero volatile regs that may contain sensitive kernel data */ ··· 354 342 .Lsyscall_restore_regs: 355 343 ld r3,_CTR(r1) 356 344 ld r4,_XER(r1) 357 357 - REST_NVGPRS(r1) 345 345 + HANDLER_RESTORE_NVGPRS() 358 346 mtctr r3 359 347 mtspr SPRN_XER,r4 360 348 REST_GPR(0, r1) ··· 369 357 ld r1,PACA_EXIT_SAVE_R1(r13) 370 358 LOAD_PACA_TOC() 371 359 ld r3,RESULT(r1) 372 372 - addi r4,r1,STACK_FRAME_OVERHEAD 360 360 + addi r4,r1,STACK_INT_FRAME_REGS 373 361 li r11,IRQS_ALL_DISABLED 374 362 stb r11,PACAIRQSOFTMASK(r13) 375 363 bl syscall_exit_restart ··· 400 388 andi. r0,r5,MSR_RI 401 389 li r3,0 /* 0 return value, no EMULATE_STACK_STORE */ 402 390 bne+ .Lfast_kernel_interrupt_return_srr 403 403 - addi r3,r1,STACK_FRAME_OVERHEAD 391 391 + addi r3,r1,STACK_INT_FRAME_REGS 404 392 bl unrecoverable_exception 405 393 b . /* should not get here */ 406 394 #else ··· 418 406 beq interrupt_return_\srr\()_kernel 419 407 interrupt_return_\srr\()_user: /* make backtraces match the _kernel variant */ 420 408 _ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_user) 421 421 - addi r3,r1,STACK_FRAME_OVERHEAD 409 409 + addi r3,r1,STACK_INT_FRAME_REGS 422 410 bl interrupt_exit_user_prepare 411 411 + #ifndef CONFIG_INTERRUPT_SANITIZE_REGISTERS 423 412 cmpdi r3,0 424 413 bne- .Lrestore_nvgprs_\srr 425 414 .Lrestore_nvgprs_\srr\()_cont: 415 415 + #endif 426 416 std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */ 427 417 #ifdef CONFIG_PPC_BOOK3S 428 418 .Linterrupt_return_\srr\()_user_rst_start: ··· 438 424 stb r11,PACAIRQHAPPENED(r13) # clear out possible HARD_DIS 439 425 440 426 .Lfast_user_interrupt_return_\srr\(): 427 427 + SANITIZE_RESTORE_NVGPRS() 441 428 #ifdef CONFIG_PPC_BOOK3S 442 429 .ifc \srr,srr 443 430 lbz r4,PACASRR_VALID(r13) ··· 508 493 b . /* prevent speculative execution */ 509 494 .Linterrupt_return_\srr\()_user_rst_end: 510 495 496 496 + #ifndef CONFIG_INTERRUPT_SANITIZE_REGISTERS 511 497 .Lrestore_nvgprs_\srr\(): 512 498 REST_NVGPRS(r1) 513 499 b .Lrestore_nvgprs_\srr\()_cont 500 500 + #endif 514 501 515 502 #ifdef CONFIG_PPC_BOOK3S 516 503 interrupt_return_\srr\()_user_restart: ··· 520 503 GET_PACA(r13) 521 504 ld r1,PACA_EXIT_SAVE_R1(r13) 522 505 LOAD_PACA_TOC() 523 523 - addi r3,r1,STACK_FRAME_OVERHEAD 506 506 + addi r3,r1,STACK_INT_FRAME_REGS 524 507 li r11,IRQS_ALL_DISABLED 525 508 stb r11,PACAIRQSOFTMASK(r13) 526 509 bl interrupt_exit_user_restart ··· 535 518 .balign IFETCH_ALIGN_BYTES 536 519 interrupt_return_\srr\()_kernel: 537 520 _ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_kernel) 538 538 - addi r3,r1,STACK_FRAME_OVERHEAD 521 521 + addi r3,r1,STACK_INT_FRAME_REGS 539 522 bl interrupt_exit_kernel_prepare 540 523 541 524 std r1,PACA_EXIT_SAVE_R1(r13) /* save r1 for restart */ ··· 602 585 stb r11,PACAIRQHAPPENED(r13) // clear the possible HARD_DIS 603 586 604 587 .Lfast_kernel_interrupt_return_\srr\(): 588 588 + SANITIZE_RESTORE_NVGPRS() 605 589 cmpdi cr1,r3,0 606 590 #ifdef CONFIG_PPC_BOOK3S 607 591 .ifc \srr,srr ··· 655 637 * Leaving a stale STACK_FRAME_REGS_MARKER on the stack can confuse 656 638 * the reliable stack unwinder later on. Clear it. 657 639 */ 658 658 - std r0,STACK_FRAME_OVERHEAD-16(r1) 640 640 + std r0,STACK_INT_FRAME_MARKER(r1) 659 641 660 642 REST_GPRS(2, 5, r1) 661 643 ··· 702 684 GET_PACA(r13) 703 685 ld r1,PACA_EXIT_SAVE_R1(r13) 704 686 LOAD_PACA_TOC() 705 705 - addi r3,r1,STACK_FRAME_OVERHEAD 687 687 + addi r3,r1,STACK_INT_FRAME_REGS 706 688 li r11,IRQS_ALL_DISABLED 707 689 stb r11,PACAIRQSOFTMASK(r13) 708 690 bl interrupt_exit_kernel_restart

+2 -2

arch/powerpc/kernel/irq.c

reviewed

··· 210 210 PPC_LL " %%r1, 0(%%r1) ;" 211 211 : // Outputs 212 212 : // Inputs 213 213 - [sp] "b" (sp), [offset] "i" (THREAD_SIZE - STACK_FRAME_OVERHEAD), 213 213 + [sp] "b" (sp), [offset] "i" (THREAD_SIZE - STACK_FRAME_MIN_SIZE), 214 214 [callee] "i" (__do_softirq) 215 215 : // Clobbers 216 216 "lr", "xer", "ctr", "memory", "cr0", "cr1", "cr5", "cr6", ··· 264 264 : // Outputs 265 265 "+r" (r3) 266 266 : // Inputs 267 267 - [sp] "b" (sp), [offset] "i" (THREAD_SIZE - STACK_FRAME_OVERHEAD), 267 267 + [sp] "b" (sp), [offset] "i" (THREAD_SIZE - STACK_FRAME_MIN_SIZE), 268 268 [callee] "i" (__do_irq) 269 269 : // Clobbers 270 270 "lr", "xer", "ctr", "memory", "cr0", "cr1", "cr5", "cr6",

+1 -1

arch/powerpc/kernel/kgdb.c

reviewed

··· 191 191 void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) 192 192 { 193 193 struct pt_regs *regs = (struct pt_regs *)(p->thread.ksp + 194 194 - STACK_FRAME_OVERHEAD); 194 194 + STACK_INT_FRAME_REGS); 195 195 unsigned long *ptr = gdb_regs; 196 196 int reg; 197 197

+6 -8

arch/powerpc/kernel/kprobes.c

reviewed

··· 157 157 printk("Cannot register a kprobe on the second word of prefixed instruction\n"); 158 158 ret = -EINVAL; 159 159 } 160 160 - preempt_disable(); 161 160 prev = get_kprobe(p->addr - 1); 162 162 - preempt_enable_no_resched(); 163 161 164 162 /* 165 163 * When prev is a ftrace-based kprobe, we don't have an insn, and it ··· 368 370 369 371 if (ret > 0) { 370 372 restore_previous_kprobe(kcb); 371 371 - preempt_enable_no_resched(); 373 373 + preempt_enable(); 372 374 return 1; 373 375 } 374 376 } ··· 381 383 if (p->pre_handler && p->pre_handler(p, regs)) { 382 384 /* handler changed execution path, so skip ss setup */ 383 385 reset_current_kprobe(); 384 384 - preempt_enable_no_resched(); 386 386 + preempt_enable(); 385 387 return 1; 386 388 } 387 389 ··· 394 396 395 397 kcb->kprobe_status = KPROBE_HIT_SSDONE; 396 398 reset_current_kprobe(); 397 397 - preempt_enable_no_resched(); 399 399 + preempt_enable(); 398 400 return 1; 399 401 } 400 402 } ··· 403 405 return 1; 404 406 405 407 no_kprobe: 406 406 - preempt_enable_no_resched(); 408 408 + preempt_enable(); 407 409 return ret; 408 410 } 409 411 NOKPROBE_SYMBOL(kprobe_handler); ··· 489 491 } 490 492 reset_current_kprobe(); 491 493 out: 492 492 - preempt_enable_no_resched(); 494 494 + preempt_enable(); 493 495 494 496 /* 495 497 * if somebody else is singlestepping across a probe point, msr ··· 528 530 restore_previous_kprobe(kcb); 529 531 else 530 532 reset_current_kprobe(); 531 531 - preempt_enable_no_resched(); 533 533 + preempt_enable(); 532 534 break; 533 535 case KPROBE_HIT_ACTIVE: 534 536 case KPROBE_HIT_SSDONE:

+1 -1

arch/powerpc/kernel/misc_32.S

reviewed

··· 382 382 _GLOBAL(start_secondary_resume) 383 383 /* Reset stack */ 384 384 rlwinm r1, r1, 0, 0, 31 - THREAD_SHIFT 385 385 - addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD 385 385 + addi r1,r1,THREAD_SIZE-STACK_FRAME_MIN_SIZE 386 386 li r3,0 387 387 stw r3,0(r1) /* Zero the stack frame pointer */ 388 388 bl start_secondary

+5 -3

arch/powerpc/kernel/misc_64.S

reviewed

··· 9 9 * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com) 10 10 */ 11 11 12 12 + #include <linux/linkage.h> 12 13 #include <linux/sys.h> 13 14 #include <asm/unistd.h> 14 15 #include <asm/errno.h> ··· 354 353 * 355 354 * don't overwrite r3 here, it is live for kexec_wait above. 356 355 */ 357 357 - real_mode: /* assume normal blr return */ 356 356 + SYM_FUNC_START_LOCAL(real_mode) /* assume normal blr return */ 358 357 #ifdef CONFIG_PPC_BOOK3E_64 359 358 /* Create an identity mapping. */ 360 359 b kexec_create_tlb ··· 371 370 mtspr SPRN_SRR0,r11 372 371 rfid 373 372 #endif 373 373 + SYM_FUNC_END(real_mode) 374 374 375 375 /* 376 376 * kexec_sequence(newstack, start, image, control, clear_all(), ··· 386 384 std r0,16(r1) 387 385 388 386 /* switch stacks to newstack -- &kexec_stack.stack */ 389 389 - stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3) 387 387 + stdu r1,THREAD_SIZE-STACK_FRAME_MIN_SIZE(r3) 390 388 mr r1,r3 391 389 392 390 li r0,0 ··· 403 401 std r26,-48(r1) 404 402 std r25,-56(r1) 405 403 406 406 - stdu r1,-STACK_FRAME_OVERHEAD-64(r1) 404 404 + stdu r1,-STACK_FRAME_MIN_SIZE-64(r1) 407 405 408 406 /* save args into preserved regs */ 409 407 mr r31,r3 /* newstack (both) */

+10

arch/powerpc/kernel/module_64.c

reviewed

··· 31 31 this, and makes other things simpler. Anton? 32 32 --RR. */ 33 33 34 34 + bool module_elf_check_arch(Elf_Ehdr *hdr) 35 35 + { 36 36 + unsigned long abi_level = hdr->e_flags & 0x3; 37 37 + 38 38 + if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V2)) 39 39 + return abi_level == 2; 40 40 + else 41 41 + return abi_level < 2; 42 42 + } 43 43 + 34 44 #ifdef CONFIG_PPC64_ELF_ABI_V2 35 45 36 46 static func_desc_t func_desc(unsigned long addr)

+1 -1

arch/powerpc/kernel/optprobes.c

reviewed

··· 112 112 __this_cpu_write(current_kprobe, NULL); 113 113 } 114 114 115 115 - preempt_enable_no_resched(); 115 115 + preempt_enable(); 116 116 } 117 117 NOKPROBE_SYMBOL(optimized_callback); 118 118

+2 -2

arch/powerpc/kernel/optprobes_head.S

reviewed

··· 85 85 TEMPLATE_FOR_IMM_LOAD_INSNS 86 86 87 87 /* 2. pt_regs pointer in r4 */ 88 88 - addi r4,r1,STACK_FRAME_OVERHEAD 88 88 + addi r4,r1,STACK_INT_FRAME_REGS 89 89 90 90 .global optprobe_template_call_handler 91 91 optprobe_template_call_handler: ··· 96 96 * Parameters for instruction emulation: 97 97 * 1. Pass SP in register r3. 98 98 */ 99 99 - addi r3,r1,STACK_FRAME_OVERHEAD 99 99 + addi r3,r1,STACK_INT_FRAME_REGS 100 100 101 101 .global optprobe_template_insn 102 102 optprobe_template_insn:

+15 -42

arch/powerpc/kernel/ppc_save_regs.S

reviewed

··· 21 21 * different ABIs, though). 22 22 */ 23 23 _GLOBAL(ppc_save_regs) 24 24 - PPC_STL r0,0*SZL(r3) 24 24 + /* This allows stack frame accessor macros and offsets to be used */ 25 25 + subi r3,r3,STACK_INT_FRAME_REGS 26 26 + PPC_STL r0,GPR0(r3) 25 27 #ifdef CONFIG_PPC32 26 26 - stmw r2, 2*SZL(r3) 28 28 + stmw r2,GPR2(r3) 27 29 #else 28 28 - PPC_STL r2,2*SZL(r3) 29 29 - PPC_STL r3,3*SZL(r3) 30 30 - PPC_STL r4,4*SZL(r3) 31 31 - PPC_STL r5,5*SZL(r3) 32 32 - PPC_STL r6,6*SZL(r3) 33 33 - PPC_STL r7,7*SZL(r3) 34 34 - PPC_STL r8,8*SZL(r3) 35 35 - PPC_STL r9,9*SZL(r3) 36 36 - PPC_STL r10,10*SZL(r3) 37 37 - PPC_STL r11,11*SZL(r3) 38 38 - PPC_STL r12,12*SZL(r3) 39 39 - PPC_STL r13,13*SZL(r3) 40 40 - PPC_STL r14,14*SZL(r3) 41 41 - PPC_STL r15,15*SZL(r3) 42 42 - PPC_STL r16,16*SZL(r3) 43 43 - PPC_STL r17,17*SZL(r3) 44 44 - PPC_STL r18,18*SZL(r3) 45 45 - PPC_STL r19,19*SZL(r3) 46 46 - PPC_STL r20,20*SZL(r3) 47 47 - PPC_STL r21,21*SZL(r3) 48 48 - PPC_STL r22,22*SZL(r3) 49 49 - PPC_STL r23,23*SZL(r3) 50 50 - PPC_STL r24,24*SZL(r3) 51 51 - PPC_STL r25,25*SZL(r3) 52 52 - PPC_STL r26,26*SZL(r3) 53 53 - PPC_STL r27,27*SZL(r3) 54 54 - PPC_STL r28,28*SZL(r3) 55 55 - PPC_STL r29,29*SZL(r3) 56 56 - PPC_STL r30,30*SZL(r3) 57 57 - PPC_STL r31,31*SZL(r3) 30 30 + SAVE_GPRS(2, 31, r3) 58 31 lbz r0,PACAIRQSOFTMASK(r13) 59 59 - PPC_STL r0,SOFTE-STACK_FRAME_OVERHEAD(r3) 32 32 + PPC_STL r0,SOFTE(r3) 60 33 #endif 61 34 /* go up one stack frame for SP */ 62 35 PPC_LL r4,0(r1) 63 63 - PPC_STL r4,1*SZL(r3) 36 36 + PPC_STL r4,GPR1(r3) 64 37 /* get caller's LR */ 65 38 PPC_LL r0,LRSAVE(r4) 66 66 - PPC_STL r0,_LINK-STACK_FRAME_OVERHEAD(r3) 39 39 + PPC_STL r0,_LINK(r3) 67 40 mflr r0 68 68 - PPC_STL r0,_NIP-STACK_FRAME_OVERHEAD(r3) 41 41 + PPC_STL r0,_NIP(r3) 69 42 mfmsr r0 70 70 - PPC_STL r0,_MSR-STACK_FRAME_OVERHEAD(r3) 43 43 + PPC_STL r0,_MSR(r3) 71 44 mfctr r0 72 72 - PPC_STL r0,_CTR-STACK_FRAME_OVERHEAD(r3) 45 45 + PPC_STL r0,_CTR(r3) 73 46 mfxer r0 74 74 - PPC_STL r0,_XER-STACK_FRAME_OVERHEAD(r3) 47 47 + PPC_STL r0,_XER(r3) 75 48 mfcr r0 76 76 - PPC_STL r0,_CCR-STACK_FRAME_OVERHEAD(r3) 49 49 + PPC_STL r0,_CCR(r3) 77 50 li r0,0 78 78 - PPC_STL r0,_TRAP-STACK_FRAME_OVERHEAD(r3) 79 79 - PPC_STL r0,ORIG_GPR3-STACK_FRAME_OVERHEAD(r3) 51 51 + PPC_STL r0,_TRAP(r3) 52 52 + PPC_STL r0,ORIG_GPR3(r3) 80 53 blr

+70 -27

arch/powerpc/kernel/process.c

reviewed

··· 862 862 return 0; 863 863 } 864 864 865 865 - void __set_breakpoint(int nr, struct arch_hw_breakpoint *brk) 865 865 + static void set_hw_breakpoint(int nr, struct arch_hw_breakpoint *brk) 866 866 { 867 867 - memcpy(this_cpu_ptr(&current_brk[nr]), brk, sizeof(*brk)); 868 868 - 869 867 if (dawr_enabled()) 870 868 // Power8 or later 871 869 set_dawr(nr, brk); ··· 877 879 WARN_ON_ONCE(1); 878 880 } 879 881 882 882 + void __set_breakpoint(int nr, struct arch_hw_breakpoint *brk) 883 883 + { 884 884 + memcpy(this_cpu_ptr(&current_brk[nr]), brk, sizeof(*brk)); 885 885 + set_hw_breakpoint(nr, brk); 886 886 + } 887 887 + 880 888 /* Check if we have DAWR or DABR hardware */ 881 889 bool ppc_breakpoint_available(void) 882 890 { ··· 894 890 return true; 895 891 } 896 892 EXPORT_SYMBOL_GPL(ppc_breakpoint_available); 893 893 + 894 894 + /* Disable the breakpoint in hardware without touching current_brk[] */ 895 895 + void suspend_breakpoints(void) 896 896 + { 897 897 + struct arch_hw_breakpoint brk = {0}; 898 898 + int i; 899 899 + 900 900 + if (!ppc_breakpoint_available()) 901 901 + return; 902 902 + 903 903 + for (i = 0; i < nr_wp_slots(); i++) 904 904 + set_hw_breakpoint(i, &brk); 905 905 + } 906 906 + 907 907 + /* 908 908 + * Re-enable breakpoints suspended by suspend_breakpoints() in hardware 909 909 + * from current_brk[] 910 910 + */ 911 911 + void restore_breakpoints(void) 912 912 + { 913 913 + int i; 914 914 + 915 915 + if (!ppc_breakpoint_available()) 916 916 + return; 917 917 + 918 918 + for (i = 0; i < nr_wp_slots(); i++) 919 919 + set_hw_breakpoint(i, this_cpu_ptr(&current_brk[i])); 920 920 + } 897 921 898 922 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 899 923 ··· 1391 1359 unsigned long nip = regs->nip; 1392 1360 unsigned long pc = regs->nip - (NR_INSN_TO_PRINT * 3 / 4 * sizeof(int)); 1393 1361 1394 1394 - printk("Instruction dump:"); 1362 1362 + printk("Code: "); 1395 1363 1396 1364 /* 1397 1365 * If we were executing with the MMU off for instructions, adjust pc ··· 1404 1372 1405 1373 for (i = 0; i < NR_INSN_TO_PRINT; i++) { 1406 1374 int instr; 1407 1407 - 1408 1408 - if (!(i % 8)) 1409 1409 - pr_cont("\n"); 1410 1375 1411 1376 if (!__kernel_text_address(pc) || 1412 1377 get_kernel_nofault(instr, (const void *)pc)) { ··· 1755 1726 1756 1727 klp_init_thread_info(p); 1757 1728 1729 1729 + /* Create initial stack frame. */ 1730 1730 + sp -= STACK_USER_INT_FRAME_SIZE; 1731 1731 + *(unsigned long *)(sp + STACK_INT_FRAME_MARKER) = STACK_FRAME_REGS_MARKER; 1732 1732 + 1758 1733 /* Copy registers */ 1759 1759 - sp -= sizeof(struct pt_regs); 1760 1760 - childregs = (struct pt_regs *) sp; 1734 1734 + childregs = (struct pt_regs *)(sp + STACK_INT_FRAME_REGS); 1761 1735 if (unlikely(args->fn)) { 1762 1736 /* kernel thread */ 1737 1737 + ((unsigned long *)sp)[0] = 0; 1763 1738 memset(childregs, 0, sizeof(struct pt_regs)); 1764 1764 - childregs->gpr[1] = sp + sizeof(struct pt_regs); 1739 1739 + childregs->gpr[1] = sp + STACK_USER_INT_FRAME_SIZE; 1765 1740 /* function */ 1766 1741 if (args->fn) 1767 1742 childregs->gpr[14] = ppc_function_entry((void *)args->fn); ··· 1783 1750 *childregs = *regs; 1784 1751 if (usp) 1785 1752 childregs->gpr[1] = usp; 1753 1753 + ((unsigned long *)sp)[0] = childregs->gpr[1]; 1786 1754 p->thread.regs = childregs; 1787 1755 /* 64s sets this in ret_from_fork */ 1788 1756 if (!IS_ENABLED(CONFIG_PPC_BOOK3S_64)) ··· 1801 1767 f = ret_from_fork; 1802 1768 } 1803 1769 childregs->msr &= ~(MSR_FP|MSR_VEC|MSR_VSX); 1804 1804 - sp -= STACK_FRAME_OVERHEAD; 1805 1770 1806 1771 /* 1807 1772 * The way this works is that at some point in the future ··· 1810 1777 * do some house keeping and then return from the fork or clone 1811 1778 * system call, using the stack frame created above. 1812 1779 */ 1813 1813 - ((unsigned long *)sp)[0] = 0; 1814 1814 - sp -= sizeof(struct pt_regs); 1815 1815 - kregs = (struct pt_regs *) sp; 1816 1816 - sp -= STACK_FRAME_OVERHEAD; 1780 1780 + ((unsigned long *)sp)[STACK_FRAME_LR_SAVE] = (unsigned long)f; 1781 1781 + sp -= STACK_SWITCH_FRAME_SIZE; 1782 1782 + ((unsigned long *)sp)[0] = sp + STACK_SWITCH_FRAME_SIZE; 1783 1783 + kregs = (struct pt_regs *)(sp + STACK_SWITCH_FRAME_REGS); 1817 1784 p->thread.ksp = sp; 1785 1785 + 1818 1786 #ifdef CONFIG_HAVE_HW_BREAKPOINT 1819 1787 for (i = 0; i < nr_wp_slots(); i++) 1820 1788 p->thread.ptrace_bps[i] = NULL; ··· 2157 2123 return 0; 2158 2124 } 2159 2125 2160 2160 - 2161 2161 - int validate_sp(unsigned long sp, struct task_struct *p, 2162 2162 - unsigned long nbytes) 2126 2126 + /* 2127 2127 + * validate the stack frame of a particular minimum size, used for when we are 2128 2128 + * looking at a certain object in the stack beyond the minimum. 2129 2129 + */ 2130 2130 + int validate_sp_size(unsigned long sp, struct task_struct *p, 2131 2131 + unsigned long nbytes) 2163 2132 { 2164 2133 unsigned long stack_page = (unsigned long)task_stack_page(p); 2165 2134 ··· 2178 2141 return valid_emergency_stack(sp, p, nbytes); 2179 2142 } 2180 2143 2181 2181 - EXPORT_SYMBOL(validate_sp); 2144 2144 + int validate_sp(unsigned long sp, struct task_struct *p) 2145 2145 + { 2146 2146 + return validate_sp_size(sp, p, STACK_FRAME_MIN_SIZE); 2147 2147 + } 2182 2148 2183 2149 static unsigned long ___get_wchan(struct task_struct *p) 2184 2150 { ··· 2189 2149 int count = 0; 2190 2150 2191 2151 sp = p->thread.ksp; 2192 2192 - if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD)) 2152 2152 + if (!validate_sp(sp, p)) 2193 2153 return 0; 2194 2154 2195 2155 do { 2196 2156 sp = READ_ONCE_NOCHECK(*(unsigned long *)sp); 2197 2197 - if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD) || 2198 2198 - task_is_running(p)) 2157 2157 + if (!validate_sp(sp, p) || task_is_running(p)) 2199 2158 return 0; 2200 2159 if (count > 0) { 2201 2160 ip = READ_ONCE_NOCHECK(((unsigned long *)sp)[STACK_FRAME_LR_SAVE]); ··· 2248 2209 lr = 0; 2249 2210 printk("%sCall Trace:\n", loglvl); 2250 2211 do { 2251 2251 - if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) 2212 2212 + if (!validate_sp(sp, tsk)) 2252 2213 break; 2253 2214 2254 2215 stack = (unsigned long *) sp; ··· 2269 2230 2270 2231 /* 2271 2232 * See if this is an exception frame. 2272 2272 - * We look for the "regshere" marker in the current frame. 2233 2233 + * We look for the "regs" marker in the current frame. 2234 2234 + * 2235 2235 + * STACK_SWITCH_FRAME_SIZE being the smallest frame that 2236 2236 + * could hold a pt_regs, if that does not fit then it can't 2237 2237 + * have regs. 2273 2238 */ 2274 2274 - if (validate_sp(sp, tsk, STACK_FRAME_WITH_PT_REGS) 2275 2275 - && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 2239 2239 + if (validate_sp_size(sp, tsk, STACK_SWITCH_FRAME_SIZE) 2240 2240 + && stack[STACK_INT_FRAME_MARKER_LONGS] == STACK_FRAME_REGS_MARKER) { 2276 2241 struct pt_regs *regs = (struct pt_regs *) 2277 2277 - (sp + STACK_FRAME_OVERHEAD); 2242 2242 + (sp + STACK_INT_FRAME_REGS); 2278 2243 2279 2244 lr = regs->link; 2280 2245 printk("%s--- interrupt: %lx at %pS\n",

+4

arch/powerpc/kernel/prom.c

reviewed

··· 72 72 int __initdata iommu_force_on; 73 73 unsigned long tce_alloc_start, tce_alloc_end; 74 74 u64 ppc64_rma_size; 75 75 + unsigned int boot_cpu_node_count __ro_after_init; 75 76 #endif 76 77 static phys_addr_t first_memblock_size; 77 78 static int __initdata boot_cpu_count; ··· 335 334 /* We are scanning "cpu" nodes only */ 336 335 if (type == NULL || strcmp(type, "cpu") != 0) 337 336 return 0; 337 337 + 338 338 + if (IS_ENABLED(CONFIG_PPC64)) 339 339 + boot_cpu_node_count++; 338 340 339 341 /* Get physical cpuid */ 340 342 intserv = of_get_flat_dt_prop(node, "ibm,ppc-interrupt-server#s", &len);

+130 -70

arch/powerpc/kernel/rtas.c

reviewed

··· 7 7 * Copyright (C) 2001 IBM. 8 8 */ 9 9 10 10 - #include <linux/stdarg.h> 11 11 - #include <linux/kernel.h> 12 12 - #include <linux/types.h> 13 13 - #include <linux/spinlock.h> 14 14 - #include <linux/export.h> 15 15 - #include <linux/init.h> 10 10 + #define pr_fmt(fmt) "rtas: " fmt 11 11 + 16 12 #include <linux/capability.h> 17 13 #include <linux/delay.h> 18 18 - #include <linux/cpu.h> 19 19 - #include <linux/sched.h> 20 20 - #include <linux/smp.h> 21 21 - #include <linux/completion.h> 22 22 - #include <linux/cpumask.h> 14 14 + #include <linux/export.h> 15 15 + #include <linux/init.h> 16 16 + #include <linux/kernel.h> 23 17 #include <linux/memblock.h> 24 24 - #include <linux/slab.h> 25 25 - #include <linux/reboot.h> 26 26 - #include <linux/security.h> 27 27 - #include <linux/syscalls.h> 28 18 #include <linux/of.h> 29 19 #include <linux/of_fdt.h> 30 30 - 31 31 - #include <asm/interrupt.h> 32 32 - #include <asm/rtas.h> 33 33 - #include <asm/hvcall.h> 34 34 - #include <asm/machdep.h> 35 35 - #include <asm/firmware.h> 36 36 - #include <asm/page.h> 37 37 - #include <asm/param.h> 38 38 - #include <asm/delay.h> 20 20 + #include <linux/reboot.h> 21 21 + #include <linux/sched.h> 22 22 + #include <linux/security.h> 23 23 + #include <linux/slab.h> 24 24 + #include <linux/spinlock.h> 25 25 + #include <linux/stdarg.h> 26 26 + #include <linux/syscalls.h> 27 27 + #include <linux/types.h> 39 28 #include <linux/uaccess.h> 40 40 - #include <asm/udbg.h> 41 41 - #include <asm/syscalls.h> 42 42 - #include <asm/smp.h> 43 43 - #include <linux/atomic.h> 44 44 - #include <asm/time.h> 29 29 + 30 30 + #include <asm/delay.h> 31 31 + #include <asm/firmware.h> 32 32 + #include <asm/interrupt.h> 33 33 + #include <asm/machdep.h> 45 34 #include <asm/mmu.h> 46 46 - #include <asm/topology.h> 35 35 + #include <asm/page.h> 36 36 + #include <asm/rtas.h> 37 37 + #include <asm/time.h> 38 38 + #include <asm/udbg.h> 47 39 48 40 /* This is here deliberately so it's only used in this file */ 49 41 void enter_rtas(unsigned long); ··· 345 353 EXPORT_SYMBOL(rtas_service_present); 346 354 347 355 #ifdef CONFIG_RTAS_ERROR_LOGGING 356 356 + 357 357 + static u32 rtas_error_log_max __ro_after_init = RTAS_ERROR_LOG_MAX; 358 358 + 348 359 /* 349 360 * Return the firmware-specified size of the error log buffer 350 361 * for all rtas calls that require an error buffer argument. ··· 355 360 */ 356 361 int rtas_get_error_log_max(void) 357 362 { 358 358 - static int rtas_error_log_max; 359 359 - if (rtas_error_log_max) 360 360 - return rtas_error_log_max; 361 361 - 362 362 - rtas_error_log_max = rtas_token ("rtas-error-log-max"); 363 363 - if ((rtas_error_log_max == RTAS_UNKNOWN_SERVICE) || 364 364 - (rtas_error_log_max > RTAS_ERROR_LOG_MAX)) { 365 365 - printk (KERN_WARNING "RTAS: bad log buffer size %d\n", 366 366 - rtas_error_log_max); 367 367 - rtas_error_log_max = RTAS_ERROR_LOG_MAX; 368 368 - } 369 363 return rtas_error_log_max; 370 364 } 371 365 EXPORT_SYMBOL(rtas_get_error_log_max); 366 366 + 367 367 + static void __init init_error_log_max(void) 368 368 + { 369 369 + static const char propname[] __initconst = "rtas-error-log-max"; 370 370 + u32 max; 371 371 + 372 372 + if (of_property_read_u32(rtas.dev, propname, &max)) { 373 373 + pr_warn("%s not found, using default of %u\n", 374 374 + propname, RTAS_ERROR_LOG_MAX); 375 375 + max = RTAS_ERROR_LOG_MAX; 376 376 + } 377 377 + 378 378 + if (max > RTAS_ERROR_LOG_MAX) { 379 379 + pr_warn("%s = %u, clamping max error log size to %u\n", 380 380 + propname, max, RTAS_ERROR_LOG_MAX); 381 381 + max = RTAS_ERROR_LOG_MAX; 382 382 + } 383 383 + 384 384 + rtas_error_log_max = max; 385 385 + } 372 386 373 387 374 388 static char rtas_err_buf[RTAS_ERROR_LOG_MAX]; ··· 436 432 #else /* CONFIG_RTAS_ERROR_LOGGING */ 437 433 #define __fetch_rtas_last_error(x) NULL 438 434 #define get_errorlog_buffer() NULL 435 435 + static void __init init_error_log_max(void) {} 439 436 #endif 440 437 441 438 ··· 472 467 static int ibm_open_errinjct_token; 473 468 static int ibm_errinjct_token; 474 469 470 470 + /** 471 471 + * rtas_call() - Invoke an RTAS firmware function. 472 472 + * @token: Identifies the function being invoked. 473 473 + * @nargs: Number of input parameters. Does not include token. 474 474 + * @nret: Number of output parameters, including the call status. 475 475 + * @outputs: Array of @nret output words. 476 476 + * @....: List of @nargs input parameters. 477 477 + * 478 478 + * Invokes the RTAS function indicated by @token, which the caller 479 479 + * should obtain via rtas_token(). 480 480 + * 481 481 + * The @nargs and @nret arguments must match the number of input and 482 482 + * output parameters specified for the RTAS function. 483 483 + * 484 484 + * rtas_call() returns RTAS status codes, not conventional Linux errno 485 485 + * values. Callers must translate any failure to an appropriate errno 486 486 + * in syscall context. Most callers of RTAS functions that can return 487 487 + * -2 or 990x should use rtas_busy_delay() to correctly handle those 488 488 + * statuses before calling again. 489 489 + * 490 490 + * The return value descriptions are adapted from 7.2.8 [RTAS] Return 491 491 + * Codes of the PAPR and CHRP specifications. 492 492 + * 493 493 + * Context: Process context preferably, interrupt context if 494 494 + * necessary. Acquires an internal spinlock and may perform 495 495 + * GFP_ATOMIC slab allocation in error path. Unsafe for NMI 496 496 + * context. 497 497 + * Return: 498 498 + * * 0 - RTAS function call succeeded. 499 499 + * * -1 - RTAS function encountered a hardware or 500 500 + * platform error, or the token is invalid, 501 501 + * or the function is restricted by kernel policy. 502 502 + * * -2 - Specs say "A necessary hardware device was busy, 503 503 + * and the requested function could not be 504 504 + * performed. The operation should be retried at 505 505 + * a later time." This is misleading, at least with 506 506 + * respect to current RTAS implementations. What it 507 507 + * usually means in practice is that the function 508 508 + * could not be completed while meeting RTAS's 509 509 + * deadline for returning control to the OS (250us 510 510 + * for PAPR/PowerVM, typically), but the call may be 511 511 + * immediately reattempted to resume work on it. 512 512 + * * -3 - Parameter error. 513 513 + * * -7 - Unexpected state change. 514 514 + * * 9000...9899 - Vendor-specific success codes. 515 515 + * * 9900...9905 - Advisory extended delay. Caller should try 516 516 + * again after ~10^x ms has elapsed, where x is 517 517 + * the last digit of the status [0-5]. Again going 518 518 + * beyond the PAPR text, 990x on PowerVM indicates 519 519 + * contention for RTAS-internal resources. Other 520 520 + * RTAS call sequences in progress should be 521 521 + * allowed to complete before reattempting the 522 522 + * call. 523 523 + * * -9000 - Multi-level isolation error. 524 524 + * * -9999...-9004 - Vendor-specific error codes. 525 525 + * * Additional negative values - Function-specific error. 526 526 + * * Additional positive values - Function-specific success. 527 527 + */ 475 528 int rtas_call(int token, int nargs, int nret, int *outputs, ...) 476 529 { 477 530 va_list list; ··· 720 657 rc = -ENODEV; 721 658 break; 722 659 default: 723 723 - printk(KERN_ERR "%s: unexpected RTAS error %d\n", 724 724 - __func__, rtas_rc); 660 660 + pr_err("%s: unexpected error %d\n", __func__, rtas_rc); 725 661 rc = -ERANGE; 726 662 break; 727 663 } ··· 924 862 { 925 863 if (rtas_flash_term_hook) 926 864 rtas_flash_term_hook(SYS_RESTART); 927 927 - printk("RTAS system-reboot returned %d\n", 928 928 - rtas_call(rtas_token("system-reboot"), 0, 1, NULL)); 865 865 + pr_emerg("system-reboot returned %d\n", 866 866 + rtas_call(rtas_token("system-reboot"), 0, 1, NULL)); 929 867 for (;;); 930 868 } 931 869 ··· 934 872 if (rtas_flash_term_hook) 935 873 rtas_flash_term_hook(SYS_POWER_OFF); 936 874 /* allow power on only with power button press */ 937 937 - printk("RTAS power-off returned %d\n", 938 938 - rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1)); 875 875 + pr_emerg("power-off returned %d\n", 876 876 + rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1)); 939 877 for (;;); 940 878 } 941 879 ··· 944 882 if (rtas_flash_term_hook) 945 883 rtas_flash_term_hook(SYS_HALT); 946 884 /* allow power on only with power button press */ 947 947 - printk("RTAS power-off returned %d\n", 948 948 - rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1)); 885 885 + pr_emerg("power-off returned %d\n", 886 886 + rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1)); 949 887 for (;;); 950 888 } 951 889 952 890 /* Must be in the RMO region, so we place it here */ 953 891 static char rtas_os_term_buf[2048]; 892 892 + static s32 ibm_os_term_token = RTAS_UNKNOWN_SERVICE; 954 893 955 894 void rtas_os_term(char *str) 956 895 { ··· 963 900 * this property may terminate the partition which we want to avoid 964 901 * since it interferes with panic_timeout. 965 902 */ 966 966 - if (RTAS_UNKNOWN_SERVICE == rtas_token("ibm,os-term") || 967 967 - RTAS_UNKNOWN_SERVICE == rtas_token("ibm,extended-os-term")) 903 903 + if (ibm_os_term_token == RTAS_UNKNOWN_SERVICE) 968 904 return; 969 905 970 906 snprintf(rtas_os_term_buf, 2048, "OS panic: %s", str); 971 907 908 908 + /* 909 909 + * Keep calling as long as RTAS returns a "try again" status, 910 910 + * but don't use rtas_busy_delay(), which potentially 911 911 + * schedules. 912 912 + */ 972 913 do { 973 973 - status = rtas_call(rtas_token("ibm,os-term"), 1, 1, NULL, 914 914 + status = rtas_call(ibm_os_term_token, 1, 1, NULL, 974 915 __pa(rtas_os_term_buf)); 975 975 - } while (rtas_busy_delay(status)); 916 916 + } while (rtas_busy_delay_time(status)); 976 917 977 918 if (status != 0) 978 978 - printk(KERN_EMERG "ibm,os-term call failed %d\n", status); 919 919 + pr_emerg("ibm,os-term call failed %d\n", status); 979 920 } 980 921 981 922 /** ··· 1049 982 1050 983 return NULL; 1051 984 } 1052 1052 - 1053 1053 - #ifdef CONFIG_PPC_RTAS_FILTER 1054 985 1055 986 /* 1056 987 * The sys_rtas syscall, as originally designed, allows root to pass ··· 1198 1133 rtas_filters[i].token = rtas_token(rtas_filters[i].name); 1199 1134 } 1200 1135 1201 1201 - #else 1202 1202 - 1203 1203 - static bool block_rtas_call(int token, int nargs, 1204 1204 - struct rtas_args *args) 1205 1205 - { 1206 1206 - return false; 1207 1207 - } 1208 1208 - 1209 1209 - static void __init rtas_syscall_filter_init(void) 1210 1210 - { 1211 1211 - } 1212 1212 - 1213 1213 - #endif /* CONFIG_PPC_RTAS_FILTER */ 1214 1214 - 1215 1136 /* We assume to be passed big endian arguments */ 1216 1137 SYSCALL_DEFINE1(rtas, struct rtas_args __user *, uargs) 1217 1138 { ··· 1327 1276 rtas.size = size; 1328 1277 no_entry = of_property_read_u32(rtas.dev, "linux,rtas-entry", &entry); 1329 1278 rtas.entry = no_entry ? rtas.base : entry; 1279 1279 + 1280 1280 + init_error_log_max(); 1281 1281 + 1282 1282 + /* 1283 1283 + * Discover these now to avoid device tree lookups in the 1284 1284 + * panic path. 1285 1285 + */ 1286 1286 + if (of_property_read_bool(rtas.dev, "ibm,extended-os-term")) 1287 1287 + ibm_os_term_token = rtas_token("ibm,os-term"); 1330 1288 1331 1289 /* If RTAS was found, allocate the RMO buffer for it and look for 1332 1290 * the stop-self token if any

+5 -2

arch/powerpc/kernel/rtasd.c

reviewed

··· 9 9 #include <linux/errno.h> 10 10 #include <linux/sched.h> 11 11 #include <linux/kernel.h> 12 12 + #include <linux/of.h> 12 13 #include <linux/poll.h> 13 14 #include <linux/proc_fs.h> 14 15 #include <linux/init.h> ··· 500 499 501 500 static int __init rtas_event_scan_init(void) 502 501 { 502 502 + int err; 503 503 + 503 504 if (!machine_is(pseries) && !machine_is(chrp)) 504 505 return 0; 505 506 ··· 512 509 return -ENODEV; 513 510 } 514 511 515 515 - rtas_event_scan_rate = rtas_token("rtas-event-scan-rate"); 516 516 - if (rtas_event_scan_rate == RTAS_UNKNOWN_SERVICE) { 512 512 + err = of_property_read_u32(rtas.dev, "rtas-event-scan-rate", &rtas_event_scan_rate); 513 513 + if (err) { 517 514 printk(KERN_ERR "rtasd: no rtas-event-scan-rate on system\n"); 518 515 return -ENODEV; 519 516 }

+1 -1

arch/powerpc/kernel/smp.c

reviewed

··· 1249 1249 #ifdef CONFIG_PPC64 1250 1250 paca_ptrs[cpu]->__current = idle; 1251 1251 paca_ptrs[cpu]->kstack = (unsigned long)task_stack_page(idle) + 1252 1252 - THREAD_SIZE - STACK_FRAME_OVERHEAD; 1252 1252 + THREAD_SIZE - STACK_FRAME_MIN_SIZE; 1253 1253 #endif 1254 1254 task_thread_info(idle)->cpu = cpu; 1255 1255 secondary_current = current_set[cpu] = idle;

+5 -5

arch/powerpc/kernel/stacktrace.c

reviewed

··· 43 43 unsigned long *stack = (unsigned long *) sp; 44 44 unsigned long newsp, ip; 45 45 46 46 - if (!validate_sp(sp, task, STACK_FRAME_OVERHEAD)) 46 46 + if (!validate_sp(sp, task)) 47 47 return; 48 48 49 49 newsp = stack[0]; ··· 77 77 /* 78 78 * For user tasks, this is the SP value loaded on 79 79 * kernel entry, see "PACAKSAVE(r13)" in _switch() and 80 80 - * system_call_common()/EXCEPTION_PROLOG_COMMON(). 80 80 + * system_call_common(). 81 81 * 82 82 * Likewise for non-swapper kernel threads, 83 83 * this also happens to be the top of the stack ··· 88 88 * an unreliable stack trace until it's been 89 89 * _switch()'ed to for the first time. 90 90 */ 91 91 - stack_end -= STACK_FRAME_OVERHEAD + sizeof(struct pt_regs); 91 91 + stack_end -= STACK_USER_INT_FRAME_SIZE; 92 92 } else { 93 93 /* 94 94 * idle tasks have a custom stack layout, 95 95 * c.f. cpu_idle_thread_init(). 96 96 */ 97 97 - stack_end -= STACK_FRAME_OVERHEAD; 97 97 + stack_end -= STACK_FRAME_MIN_SIZE; 98 98 } 99 99 100 100 if (task == current) ··· 136 136 137 137 /* Mark stacktraces with exception frames as unreliable. */ 138 138 if (sp <= stack_end - STACK_INT_FRAME_SIZE && 139 139 - stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 139 139 + stack[STACK_INT_FRAME_MARKER_LONGS] == STACK_FRAME_REGS_MARKER) { 140 140 return -EINVAL; 141 141 } 142 142

+4 -1

arch/powerpc/kernel/swsusp_32.S

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 2 #include <linux/threads.h> 3 3 + #include <linux/linkage.h> 4 4 + 3 5 #include <asm/processor.h> 4 6 #include <asm/page.h> 5 7 #include <asm/cputable.h> ··· 402 400 /* FIXME:This construct is actually not useful since we don't shut 403 401 * down the instruction MMU, we could just flip back MSR-DR on. 404 402 */ 405 405 - turn_on_mmu: 403 403 + SYM_FUNC_START_LOCAL(turn_on_mmu) 406 404 mflr r4 407 405 mtsrr0 r4 408 406 mtsrr1 r3 ··· 410 408 isync 411 409 rfi 412 410 _ASM_NOKPROBE_SYMBOL(turn_on_mmu) 411 411 + SYM_FUNC_END(turn_on_mmu) 413 412

+2 -21

arch/powerpc/kernel/time.c

reviewed

··· 130 130 unsigned long tb_ticks_per_usec = 100; /* sane default */ 131 131 EXPORT_SYMBOL(tb_ticks_per_usec); 132 132 unsigned long tb_ticks_per_sec; 133 133 - EXPORT_SYMBOL(tb_ticks_per_sec); /* for cputime_t conversions */ 133 133 + EXPORT_SYMBOL(tb_ticks_per_sec); /* for cputime conversions */ 134 134 135 135 DEFINE_SPINLOCK(rtc_lock); 136 136 EXPORT_SYMBOL_GPL(rtc_lock); ··· 150 150 bool tb_invalid; 151 151 152 152 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE 153 153 - /* 154 154 - * Factor for converting from cputime_t (timebase ticks) to 155 155 - * microseconds. This is stored as 0.64 fixed-point binary fraction. 156 156 - */ 157 157 - u64 __cputime_usec_factor; 158 158 - EXPORT_SYMBOL(__cputime_usec_factor); 159 159 - 160 160 - static void calc_cputime_factors(void) 161 161 - { 162 162 - struct div_result res; 163 163 - 164 164 - div128_by_32(1000000, 0, tb_ticks_per_sec, &res); 165 165 - __cputime_usec_factor = res.result_low; 166 166 - } 167 167 - 168 153 /* 169 154 * Read the SPURR on systems that have it, otherwise the PURR, 170 155 * or if that doesn't exist return the timebase value passed in. ··· 354 369 acct->hardirq_time = 0; 355 370 acct->softirq_time = 0; 356 371 } 357 357 - 358 358 - #else /* ! CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 359 359 - #define calc_cputime_factors() 360 360 - #endif 372 372 + #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */ 361 373 362 374 void __delay(unsigned long loops) 363 375 { ··· 896 914 tb_ticks_per_jiffy = ppc_tb_freq / HZ; 897 915 tb_ticks_per_sec = ppc_tb_freq; 898 916 tb_ticks_per_usec = ppc_tb_freq / 1000000; 899 899 - calc_cputime_factors(); 900 917 901 918 /* 902 919 * Compute scale factor for sched_clock.

+4 -4

arch/powerpc/kernel/tm.S

reviewed

··· 117 117 std r2, STK_GOT(r1) 118 118 stdu r1, -TM_FRAME_SIZE(r1) 119 119 120 120 - /* We've a struct pt_regs at [r1+STACK_FRAME_OVERHEAD]. */ 120 120 + /* We've a struct pt_regs at [r1+STACK_INT_FRAME_REGS]. */ 121 121 122 122 std r3, STK_PARAM(R3)(r1) 123 123 SAVE_NVGPRS(r1) ··· 222 222 * Make r7 look like an exception frame so that we can use the neat 223 223 * GPRx(n) macros. r7 is NOT a pt_regs ptr! 224 224 */ 225 225 - subi r7, r7, STACK_FRAME_OVERHEAD 225 225 + subi r7, r7, STACK_INT_FRAME_REGS 226 226 227 227 /* Sync the userland GPRs 2-12, 14-31 to thread->regs: */ 228 228 SAVE_GPR(0, r7) /* user r0 */ ··· 359 359 stdu r1, -TM_FRAME_SIZE(r1) 360 360 361 361 /* 362 362 - * We've a struct pt_regs at [r1+STACK_FRAME_OVERHEAD]. 362 362 + * We've a struct pt_regs at [r1+STACK_INT_FRAME_REGS]. 363 363 * This is used for backing up the NVGPRs: 364 364 */ 365 365 SAVE_NVGPRS(r1) ··· 379 379 * Make r7 look like an exception frame so that we can use the neat 380 380 * GPRx(n) macros. r7 is now NOT a pt_regs ptr! 381 381 */ 382 382 - subi r7, r7, STACK_FRAME_OVERHEAD 382 382 + subi r7, r7, STACK_INT_FRAME_REGS 383 383 384 384 /* We need to setup MSR for FP/VMX/VSX register save instructions. */ 385 385 mfmsr r6

+1 -1

arch/powerpc/kernel/trace/ftrace_mprofile.S

reviewed

··· 110 110 .endif 111 111 112 112 /* Load &pt_regs in r6 for call below */ 113 113 - addi r6, r1, STACK_FRAME_OVERHEAD 113 113 + addi r6, r1, STACK_INT_FRAME_REGS 114 114 .endm 115 115 116 116 .macro ftrace_regs_exit allregs

+2

arch/powerpc/kernel/vdso/Makefile

reviewed

··· 102 102 cmd_vdso64ld_and_check = $(VDSOCC) $(c_flags) $(CC64FLAGS) -o $@ -Wl,-T$(filter %.lds,$^) $(filter %.o,$^) -z noexecstack ; $(cmd_vdso_check) 103 103 quiet_cmd_vdso64as = VDSO64A $@ 104 104 cmd_vdso64as = $(VDSOCC) $(a_flags) $(CC64FLAGS) $(AS64FLAGS) -c -o $@ $< 105 105 + 106 106 + OBJECT_FILES_NON_STANDARD := y

+3 -1

arch/powerpc/kernel/vector.S

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 2 + #include <linux/linkage.h> 2 3 #include <asm/processor.h> 3 4 #include <asm/ppc_asm.h> 4 5 #include <asm/reg.h> ··· 186 185 * Internal routine to enable floating point and set FPSCR to 0. 187 186 * Don't call it from C; it doesn't use the normal calling convention. 188 187 */ 189 189 - fpenable: 188 188 + SYM_FUNC_START_LOCAL(fpenable) 190 189 #ifdef CONFIG_PPC32 191 190 stwu r1,-64(r1) 192 191 #else ··· 203 202 mffs fr31 204 203 MTFSF_L(fr1) 205 204 blr 205 205 + SYM_FUNC_END(fpenable) 206 206 207 207 fpdisable: 208 208 mtlr r12

+58 -1

arch/powerpc/kexec/file_load_64.c

reviewed

··· 26 26 #include <asm/firmware.h> 27 27 #include <asm/kexec_ranges.h> 28 28 #include <asm/crashdump-ppc64.h> 29 29 + #include <asm/prom.h> 29 30 30 31 struct umem_info { 31 32 u64 *buf; /* data buffer for usable-memory property */ ··· 930 929 } 931 930 932 931 /** 932 932 + * get_cpu_node_size - Compute the size of a CPU node in the FDT. 933 933 + * This should be done only once and the value is stored in 934 934 + * a static variable. 935 935 + * Returns the max size of a CPU node in the FDT. 936 936 + */ 937 937 + static unsigned int cpu_node_size(void) 938 938 + { 939 939 + static unsigned int size; 940 940 + struct device_node *dn; 941 941 + struct property *pp; 942 942 + 943 943 + /* 944 944 + * Don't compute it twice, we are assuming that the per CPU node size 945 945 + * doesn't change during the system's life. 946 946 + */ 947 947 + if (size) 948 948 + return size; 949 949 + 950 950 + dn = of_find_node_by_type(NULL, "cpu"); 951 951 + if (WARN_ON_ONCE(!dn)) { 952 952 + // Unlikely to happen 953 953 + return 0; 954 954 + } 955 955 + 956 956 + /* 957 957 + * We compute the sub node size for a CPU node, assuming it 958 958 + * will be the same for all. 959 959 + */ 960 960 + size += strlen(dn->name) + 5; 961 961 + for_each_property_of_node(dn, pp) { 962 962 + size += strlen(pp->name); 963 963 + size += pp->length; 964 964 + } 965 965 + 966 966 + of_node_put(dn); 967 967 + return size; 968 968 + } 969 969 + 970 970 + /** 933 971 * kexec_extra_fdt_size_ppc64 - Return the estimated additional size needed to 934 972 * setup FDT for kexec/kdump kernel. 935 973 * @image: kexec image being loaded. ··· 977 937 */ 978 938 unsigned int kexec_extra_fdt_size_ppc64(struct kimage *image) 979 939 { 940 940 + unsigned int cpu_nodes, extra_size; 941 941 + struct device_node *dn; 980 942 u64 usm_entries; 981 943 982 944 if (image->type != KEXEC_TYPE_CRASH) ··· 991 949 */ 992 950 usm_entries = ((memblock_end_of_DRAM() / drmem_lmb_size()) + 993 951 (2 * (resource_size(&crashk_res) / drmem_lmb_size()))); 994 994 - return (unsigned int)(usm_entries * sizeof(u64)); 952 952 + 953 953 + extra_size = (unsigned int)(usm_entries * sizeof(u64)); 954 954 + 955 955 + /* 956 956 + * Get the number of CPU nodes in the current DT. This allows to 957 957 + * reserve places for CPU nodes added since the boot time. 958 958 + */ 959 959 + cpu_nodes = 0; 960 960 + for_each_node_by_type(dn, "cpu") { 961 961 + cpu_nodes++; 962 962 + } 963 963 + 964 964 + if (cpu_nodes > boot_cpu_node_count) 965 965 + extra_size += (cpu_nodes - boot_cpu_node_count) * cpu_node_size(); 966 966 + 967 967 + return extra_size; 995 968 } 996 969 997 970 /**

+3 -4

arch/powerpc/kvm/book3s_64_mmu_hv.c

reviewed

··· 1202 1202 if (rc < 0) 1203 1203 return rc; 1204 1204 1205 1205 - resize_hpt_debug(resize, "resize_hpt_allocate(): HPT @ 0x%lx\n", 1205 1205 + resize_hpt_debug(resize, "%s(): HPT @ 0x%lx\n", __func__, 1206 1206 resize->hpt.virt); 1207 1207 1208 1208 return 0; ··· 1443 1443 */ 1444 1444 mutex_unlock(&kvm->arch.mmu_setup_lock); 1445 1445 1446 1446 - resize_hpt_debug(resize, "resize_hpt_prepare_work(): order = %d\n", 1446 1446 + resize_hpt_debug(resize, "%s(): order = %d\n", __func__, 1447 1447 resize->order); 1448 1448 1449 1449 err = resize_hpt_allocate(resize); ··· 1887 1887 ret = kvmppc_virtmode_do_h_enter(kvm, H_EXACT, i, v, r, 1888 1888 tmp); 1889 1889 if (ret != H_SUCCESS) { 1890 1890 - pr_err("kvm_htab_write ret %ld i=%ld v=%lx " 1891 1891 - "r=%lx\n", ret, i, v, r); 1890 1890 + pr_err("%s ret %ld i=%ld v=%lx r=%lx\n", __func__, ret, i, v, r); 1892 1891 goto out; 1893 1892 } 1894 1893 if (!mmu_ready && is_vrma_hpte(v)) {

+3 -3

arch/powerpc/kvm/book3s_64_vio.c

reviewed

··· 294 294 struct kvmppc_spapr_tce_table *stt = NULL; 295 295 struct kvmppc_spapr_tce_table *siter; 296 296 struct mm_struct *mm = kvm->mm; 297 297 - unsigned long npages, size = args->size; 297 297 + unsigned long npages; 298 298 int ret; 299 299 300 300 if (!args->size || args->page_shift < 12 || args->page_shift > 34 || 301 301 (args->offset + args->size > (ULLONG_MAX >> args->page_shift))) 302 302 return -EINVAL; 303 303 304 304 - npages = kvmppc_tce_pages(size); 304 304 + npages = kvmppc_tce_pages(args->size); 305 305 ret = account_locked_vm(mm, kvmppc_stt_pages(npages), true); 306 306 if (ret) 307 307 return ret; ··· 314 314 stt->liobn = args->liobn; 315 315 stt->page_shift = args->page_shift; 316 316 stt->offset = args->offset; 317 317 - stt->size = size; 317 317 + stt->size = args->size; 318 318 stt->kvm = kvm; 319 319 mutex_init(&stt->alloc_lock); 320 320 INIT_LIST_HEAD_RCU(&stt->iommu_tables);

+3 -1

arch/powerpc/kvm/book3s_hv_interrupts.S

reviewed

··· 9 9 * Authors: Alexander Graf <agraf@suse.de> 10 10 */ 11 11 12 12 + #include <linux/linkage.h> 12 13 #include <asm/ppc_asm.h> 13 14 #include <asm/kvm_asm.h> 14 15 #include <asm/reg.h> ··· 108 107 /* 109 108 * void kvmhv_save_host_pmu(void) 110 109 */ 111 111 - kvmhv_save_host_pmu: 110 110 + SYM_FUNC_START_LOCAL(kvmhv_save_host_pmu) 112 111 BEGIN_FTR_SECTION 113 112 /* Work around P8 PMAE bug */ 114 113 li r3, -1 ··· 155 154 stw r8, HSTATE_PMC5(r13) 156 155 stw r9, HSTATE_PMC6(r13) 157 156 31: blr 157 157 + SYM_FUNC_END(kvmhv_save_host_pmu)

+19 -8

arch/powerpc/kvm/book3s_hv_rmhandlers.S

reviewed

··· 10 10 * Authors: Alexander Graf <agraf@suse.de> 11 11 */ 12 12 13 13 + #include <linux/linkage.h> 14 14 + #include <linux/objtool.h> 13 15 #include <asm/ppc_asm.h> 14 16 #include <asm/code-patching-asm.h> 15 17 #include <asm/kvm_asm.h> ··· 1524 1522 1525 1523 /* Flush the link stack. On Power8 it's up to 32 entries in size. */ 1526 1524 .rept 32 1525 1525 + ANNOTATE_INTRA_FUNCTION_CALL 1527 1526 bl .+4 1528 1527 .endr 1529 1528 1530 1529 /* And on Power9 it's up to 64. */ 1531 1530 BEGIN_FTR_SECTION 1532 1531 .rept 32 1532 1532 + ANNOTATE_INTRA_FUNCTION_CALL 1533 1533 bl .+4 1534 1534 .endr 1535 1535 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300) ··· 2362 2358 * This routine calls kvmppc_read_intr, a C function, if an external 2363 2359 * interrupt is pending. 2364 2360 */ 2365 2365 - kvmppc_check_wake_reason: 2361 2361 + SYM_FUNC_START_LOCAL(kvmppc_check_wake_reason) 2366 2362 mfspr r6, SPRN_SRR1 2367 2363 BEGIN_FTR_SECTION 2368 2364 rlwinm r6, r6, 45-31, 0xf /* extract wake reason field (P8) */ ··· 2431 2427 addi r1, r1, PPC_MIN_STKFRM 2432 2428 mtlr r0 2433 2429 blr 2430 2430 + SYM_FUNC_END(kvmppc_check_wake_reason) 2434 2431 2435 2432 /* 2436 2433 * Save away FP, VMX and VSX registers. ··· 2439 2434 * N.B. r30 and r31 are volatile across this function, 2440 2435 * thus it is not callable from C. 2441 2436 */ 2442 2442 - kvmppc_save_fp: 2437 2437 + SYM_FUNC_START_LOCAL(kvmppc_save_fp) 2443 2438 mflr r30 2444 2439 mr r31,r3 2445 2440 mfmsr r5 ··· 2467 2462 stw r6,VCPU_VRSAVE(r31) 2468 2463 mtlr r30 2469 2464 blr 2465 2465 + SYM_FUNC_END(kvmppc_save_fp) 2470 2466 2471 2467 /* 2472 2468 * Load up FP, VMX and VSX registers ··· 2475 2469 * N.B. r30 and r31 are volatile across this function, 2476 2470 * thus it is not callable from C. 2477 2471 */ 2478 2478 - kvmppc_load_fp: 2472 2472 + SYM_FUNC_START_LOCAL(kvmppc_load_fp) 2479 2473 mflr r30 2480 2474 mr r31,r4 2481 2475 mfmsr r9 ··· 2504 2498 mtlr r30 2505 2499 mr r4,r31 2506 2500 blr 2501 2501 + SYM_FUNC_END(kvmppc_load_fp) 2507 2502 2508 2503 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2509 2504 /* ··· 2736 2729 std r6, SOFTE(r1) 2737 2730 LOAD_PACA_TOC() 2738 2731 LOAD_REG_IMMEDIATE(3, STACK_FRAME_REGS_MARKER) 2739 2739 - std r3, STACK_FRAME_OVERHEAD-16(r1) 2732 2732 + std r3, STACK_INT_FRAME_MARKER(r1) 2740 2733 2741 2734 /* 2742 2735 * XXX On POWER7 and POWER8, we just spin here since we don't ··· 2753 2746 * r9 has a vcpu pointer (in) 2754 2747 * r0 is used as a scratch register 2755 2748 */ 2756 2756 - kvmppc_msr_interrupt: 2749 2749 + SYM_FUNC_START_LOCAL(kvmppc_msr_interrupt) 2757 2750 rldicl r0, r11, 64 - MSR_TS_S_LG, 62 2758 2751 cmpwi r0, 2 /* Check if we are in transactional state.. */ 2759 2752 ld r11, VCPU_INTR_MSR(r9) ··· 2762 2755 li r0, 1 2763 2756 1: rldimi r11, r0, MSR_TS_S_LG, 63 - MSR_TS_T_LG 2764 2757 blr 2758 2758 + SYM_FUNC_END(kvmppc_msr_interrupt) 2765 2759 2766 2760 /* 2767 2761 * void kvmhv_load_guest_pmu(struct kvm_vcpu *vcpu) 2768 2762 * 2769 2763 * Load up guest PMU state. R3 points to the vcpu struct. 2770 2764 */ 2771 2771 - kvmhv_load_guest_pmu: 2765 2765 + SYM_FUNC_START_LOCAL(kvmhv_load_guest_pmu) 2772 2766 mr r4, r3 2773 2767 mflr r0 2774 2768 li r3, 1 ··· 2819 2811 isync 2820 2812 mtlr r0 2821 2813 blr 2814 2814 + SYM_FUNC_END(kvmhv_load_guest_pmu) 2822 2815 2823 2816 /* 2824 2817 * void kvmhv_load_host_pmu(void) 2825 2818 * 2826 2819 * Reload host PMU state saved in the PACA by kvmhv_save_host_pmu. 2827 2820 */ 2828 2828 - kvmhv_load_host_pmu: 2821 2821 + SYM_FUNC_START_LOCAL(kvmhv_load_host_pmu) 2829 2822 mflr r0 2830 2823 lbz r4, PACA_PMCINUSE(r13) /* is the host using the PMU? */ 2831 2824 cmpwi r4, 0 ··· 2868 2859 isync 2869 2860 mtlr r0 2870 2861 23: blr 2862 2862 + SYM_FUNC_END(kvmhv_load_host_pmu) 2871 2863 2872 2864 /* 2873 2865 * void kvmhv_save_guest_pmu(struct kvm_vcpu *vcpu, bool pmu_in_use) ··· 2876 2866 * Save guest PMU state into the vcpu struct. 2877 2867 * r3 = vcpu, r4 = full save flag (PMU in use flag set in VPA) 2878 2868 */ 2879 2879 - kvmhv_save_guest_pmu: 2869 2869 + SYM_FUNC_START_LOCAL(kvmhv_save_guest_pmu) 2880 2870 mr r9, r3 2881 2871 mr r8, r4 2882 2872 BEGIN_FTR_SECTION ··· 2952 2942 mtspr SPRN_MMCRS, r4 2953 2943 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) 2954 2944 22: blr 2945 2945 + SYM_FUNC_END(kvmhv_save_guest_pmu) 2955 2946 2956 2947 /* 2957 2948 * This works around a hardware bug on POWER8E processors, where

+2 -3

arch/powerpc/kvm/book3s_hv_uvmem.c

reviewed

··· 1190 1190 1191 1191 pfn_first = res->start >> PAGE_SHIFT; 1192 1192 pfn_last = pfn_first + (resource_size(res) >> PAGE_SHIFT); 1193 1193 - kvmppc_uvmem_bitmap = kcalloc(BITS_TO_LONGS(pfn_last - pfn_first), 1194 1194 - sizeof(unsigned long), GFP_KERNEL); 1193 1193 + kvmppc_uvmem_bitmap = bitmap_zalloc(pfn_last - pfn_first, GFP_KERNEL); 1195 1194 if (!kvmppc_uvmem_bitmap) { 1196 1195 ret = -ENOMEM; 1197 1196 goto out_unmap; ··· 1214 1215 memunmap_pages(&kvmppc_uvmem_pgmap); 1215 1216 release_mem_region(kvmppc_uvmem_pgmap.range.start, 1216 1217 range_len(&kvmppc_uvmem_pgmap.range)); 1217 1217 - kfree(kvmppc_uvmem_bitmap); 1218 1218 + bitmap_free(kvmppc_uvmem_bitmap); 1218 1219 }

+5 -7

arch/powerpc/kvm/book3s_xive.c

reviewed

··· 539 539 if (irq == XICS_IPI || irq == 0) { 540 540 /* 541 541 * This barrier orders the setting of xc->cppr vs. 542 542 - * subsquent test of xc->mfrr done inside 542 542 + * subsequent test of xc->mfrr done inside 543 543 * scan_interrupts and push_pending_to_hw 544 544 */ 545 545 smp_mb(); ··· 563 563 /* 564 564 * This barrier orders both setting of in_eoi above vs, 565 565 * subsequent test of guest_priority, and the setting 566 566 - * of xc->cppr vs. subsquent test of xc->mfrr done inside 566 566 + * of xc->cppr vs. subsequent test of xc->mfrr done inside 567 567 * scan_interrupts and push_pending_to_hw 568 568 */ 569 569 smp_mb(); ··· 1785 1785 * stale_p (because it has no easy way to address it). Hence we have 1786 1786 * to adjust stale_p before shutting down the interrupt. 1787 1787 */ 1788 1788 - void xive_cleanup_single_escalation(struct kvm_vcpu *vcpu, 1789 1789 - struct kvmppc_xive_vcpu *xc, int irq) 1788 1788 + void xive_cleanup_single_escalation(struct kvm_vcpu *vcpu, int irq) 1790 1789 { 1791 1790 struct irq_data *d = irq_get_irq_data(irq); 1792 1791 struct xive_irq_data *xd = irq_data_get_irq_handler_data(d); ··· 1826 1827 for (i = 0; i < KVMPPC_XIVE_Q_COUNT; i++) { 1827 1828 if (xc->esc_virq[i]) { 1828 1829 if (kvmppc_xive_has_single_escalation(xc->xive)) 1829 1829 - xive_cleanup_single_escalation(vcpu, xc, 1830 1830 - xc->esc_virq[i]); 1830 1830 + xive_cleanup_single_escalation(vcpu, xc->esc_virq[i]); 1831 1831 free_irq(xc->esc_virq[i], vcpu); 1832 1832 irq_dispose_mapping(xc->esc_virq[i]); 1833 1833 kfree(xc->esc_virq_names[i]); ··· 2390 2392 /* 2391 2393 * Now, we select a target if we have one. If we don't we 2392 2394 * leave the interrupt untargetted. It means that an interrupt 2393 2393 - * can become "untargetted" accross migration if it was masked 2395 2395 + * can become "untargetted" across migration if it was masked 2394 2396 * by set_xive() but there is little we can do about it. 2395 2397 */ 2396 2398

+1 -2

arch/powerpc/kvm/book3s_xive.h

reviewed

··· 299 299 int kvmppc_xive_attach_escalation(struct kvm_vcpu *vcpu, u8 prio, 300 300 bool single_escalation); 301 301 struct kvmppc_xive *kvmppc_xive_get_device(struct kvm *kvm, u32 type); 302 302 - void xive_cleanup_single_escalation(struct kvm_vcpu *vcpu, 303 303 - struct kvmppc_xive_vcpu *xc, int irq); 302 302 + void xive_cleanup_single_escalation(struct kvm_vcpu *vcpu, int irq); 304 303 int kvmppc_xive_compute_vp_id(struct kvmppc_xive *xive, u32 cpu, u32 *vp); 305 304 int kvmppc_xive_set_nr_servers(struct kvmppc_xive *xive, u64 addr); 306 305 bool kvmppc_xive_check_save_restore(struct kvm_vcpu *vcpu);

+1 -2

arch/powerpc/kvm/book3s_xive_native.c

reviewed

··· 93 93 /* Free the escalation irq */ 94 94 if (xc->esc_virq[i]) { 95 95 if (kvmppc_xive_has_single_escalation(xc->xive)) 96 96 - xive_cleanup_single_escalation(vcpu, xc, 97 97 - xc->esc_virq[i]); 96 96 + xive_cleanup_single_escalation(vcpu, xc->esc_virq[i]); 98 97 free_irq(xc->esc_virq[i], vcpu); 99 98 irq_dispose_mapping(xc->esc_virq[i]); 100 99 kfree(xc->esc_virq_names[i]);

+3

arch/powerpc/kvm/booke.c

reviewed

··· 1015 1015 u32 last_inst = KVM_INST_FETCH_FAILED; 1016 1016 enum emulation_result emulated = EMULATE_DONE; 1017 1017 1018 1018 + /* Fix irq state (pairs with kvmppc_fix_ee_before_entry()) */ 1019 1019 + kvmppc_fix_ee_after_exit(); 1020 1020 + 1018 1021 /* update before a new last_exit_type is rewritten */ 1019 1022 kvmppc_update_timing_stats(vcpu); 1020 1023

-9

arch/powerpc/kvm/bookehv_interrupts.S

reviewed

··· 424 424 mtspr SPRN_EPCR, r3 425 425 isync 426 426 427 427 - #ifdef CONFIG_64BIT 428 428 - /* 429 429 - * We enter with interrupts disabled in hardware, but 430 430 - * we need to call RECONCILE_IRQ_STATE to ensure 431 431 - * that the software state is kept in sync. 432 432 - */ 433 433 - RECONCILE_IRQ_STATE(r3,r5) 434 434 - #endif 435 435 - 436 427 /* Switch to kernel stack and jump to handler. */ 437 428 mr r3, r4 438 429 mr r5, r14 /* intno */

+12 -5

arch/powerpc/kvm/fpu.S

reviewed

··· 6 6 */ 7 7 8 8 #include <linux/pgtable.h> 9 9 + #include <linux/linkage.h> 10 10 + 9 11 #include <asm/reg.h> 10 12 #include <asm/page.h> 11 13 #include <asm/mmu.h> ··· 112 110 * R8 = (double*)&param3 [load_three] 113 111 * LR = instruction call function 114 112 */ 115 115 - fpd_load_three: 113 113 + SYM_FUNC_START_LOCAL(fpd_load_three) 116 114 lfd 2,0(r8) /* load param3 */ 117 117 - fpd_load_two: 115 115 + SYM_FUNC_START_LOCAL(fpd_load_two) 118 116 lfd 1,0(r7) /* load param2 */ 119 119 - fpd_load_one: 117 117 + SYM_FUNC_START_LOCAL(fpd_load_one) 120 118 lfd 0,0(r6) /* load param1 */ 121 121 - fpd_load_none: 119 119 + SYM_FUNC_START_LOCAL(fpd_load_none) 122 120 lfd 3,0(r3) /* load up fpscr value */ 123 121 MTFSF_L(3) 124 122 lwz r6, 0(r4) /* load cr */ 125 123 mtcr r6 126 124 blr 125 125 + SYM_FUNC_END(fpd_load_none) 126 126 + SYM_FUNC_END(fpd_load_one) 127 127 + SYM_FUNC_END(fpd_load_two) 128 128 + SYM_FUNC_END(fpd_load_three) 127 129 128 130 /* 129 131 * End of double instruction processing ··· 137 131 * R5 = (double*)&result 138 132 * LR = caller of instruction call function 139 133 */ 140 140 - fpd_return: 134 134 + SYM_FUNC_START_LOCAL(fpd_return) 141 135 mfcr r6 142 136 stfd 0,0(r5) /* save result */ 143 137 mffs 0 144 138 stfd 0,0(r3) /* save new fpscr value */ 145 139 stw r6,0(r4) /* save new cr value */ 146 140 blr 141 141 + SYM_FUNC_END(fpd_return) 147 142 148 143 /* 149 144 * Double operation with no input operand

+3 -1

arch/powerpc/lib/Makefile

reviewed

··· 52 52 obj64-y += copypage_64.o copyuser_64.o mem_64.o hweight_64.o \ 53 53 memcpy_64.o copy_mc_64.o 54 54 55 55 - ifndef CONFIG_PPC_QUEUED_SPINLOCKS 55 55 + ifdef CONFIG_PPC_QUEUED_SPINLOCKS 56 56 + obj-$(CONFIG_SMP) += qspinlock.o 57 57 + else 56 58 obj64-$(CONFIG_SMP) += locks.o 57 59 endif 58 60

+202 -36

arch/powerpc/lib/code-patching.c

reviewed

··· 4 4 */ 5 5 6 6 #include <linux/kprobes.h> 7 7 + #include <linux/mmu_context.h> 8 8 + #include <linux/random.h> 7 9 #include <linux/vmalloc.h> 8 10 #include <linux/init.h> 9 11 #include <linux/cpuhotplug.h> 10 12 #include <linux/uaccess.h> 11 13 #include <linux/jump_label.h> 12 14 15 15 + #include <asm/debug.h> 16 16 + #include <asm/pgalloc.h> 17 17 + #include <asm/tlb.h> 13 18 #include <asm/tlbflush.h> 14 19 #include <asm/page.h> 15 20 #include <asm/code-patching.h> ··· 46 41 return __patch_instruction(addr, instr, addr); 47 42 } 48 43 49 49 - #ifdef CONFIG_STRICT_KERNEL_RWX 50 50 - static DEFINE_PER_CPU(struct vm_struct *, text_poke_area); 44 44 + struct patch_context { 45 45 + union { 46 46 + struct vm_struct *area; 47 47 + struct mm_struct *mm; 48 48 + }; 49 49 + unsigned long addr; 50 50 + pte_t *pte; 51 51 + }; 52 52 + 53 53 + static DEFINE_PER_CPU(struct patch_context, cpu_patching_context); 51 54 52 55 static int map_patch_area(void *addr, unsigned long text_poke_addr); 53 56 static void unmap_patch_area(unsigned long addr); 57 57 + 58 58 + static bool mm_patch_enabled(void) 59 59 + { 60 60 + return IS_ENABLED(CONFIG_SMP) && radix_enabled(); 61 61 + } 62 62 + 63 63 + /* 64 64 + * The following applies for Radix MMU. Hash MMU has different requirements, 65 65 + * and so is not supported. 66 66 + * 67 67 + * Changing mm requires context synchronising instructions on both sides of 68 68 + * the context switch, as well as a hwsync between the last instruction for 69 69 + * which the address of an associated storage access was translated using 70 70 + * the current context. 71 71 + * 72 72 + * switch_mm_irqs_off() performs an isync after the context switch. It is 73 73 + * the responsibility of the caller to perform the CSI and hwsync before 74 74 + * starting/stopping the temp mm. 75 75 + */ 76 76 + static struct mm_struct *start_using_temp_mm(struct mm_struct *temp_mm) 77 77 + { 78 78 + struct mm_struct *orig_mm = current->active_mm; 79 79 + 80 80 + lockdep_assert_irqs_disabled(); 81 81 + switch_mm_irqs_off(orig_mm, temp_mm, current); 82 82 + 83 83 + WARN_ON(!mm_is_thread_local(temp_mm)); 84 84 + 85 85 + suspend_breakpoints(); 86 86 + return orig_mm; 87 87 + } 88 88 + 89 89 + static void stop_using_temp_mm(struct mm_struct *temp_mm, 90 90 + struct mm_struct *orig_mm) 91 91 + { 92 92 + lockdep_assert_irqs_disabled(); 93 93 + switch_mm_irqs_off(temp_mm, orig_mm, current); 94 94 + restore_breakpoints(); 95 95 + } 54 96 55 97 static int text_area_cpu_up(unsigned int cpu) 56 98 { ··· 120 68 121 69 unmap_patch_area(addr); 122 70 123 123 - this_cpu_write(text_poke_area, area); 71 71 + this_cpu_write(cpu_patching_context.area, area); 72 72 + this_cpu_write(cpu_patching_context.addr, addr); 73 73 + this_cpu_write(cpu_patching_context.pte, virt_to_kpte(addr)); 124 74 125 75 return 0; 126 76 } 127 77 128 78 static int text_area_cpu_down(unsigned int cpu) 129 79 { 130 130 - free_vm_area(this_cpu_read(text_poke_area)); 80 80 + free_vm_area(this_cpu_read(cpu_patching_context.area)); 81 81 + this_cpu_write(cpu_patching_context.area, NULL); 82 82 + this_cpu_write(cpu_patching_context.addr, 0); 83 83 + this_cpu_write(cpu_patching_context.pte, NULL); 84 84 + return 0; 85 85 + } 86 86 + 87 87 + static void put_patching_mm(struct mm_struct *mm, unsigned long patching_addr) 88 88 + { 89 89 + struct mmu_gather tlb; 90 90 + 91 91 + tlb_gather_mmu(&tlb, mm); 92 92 + free_pgd_range(&tlb, patching_addr, patching_addr + PAGE_SIZE, 0, 0); 93 93 + mmput(mm); 94 94 + } 95 95 + 96 96 + static int text_area_cpu_up_mm(unsigned int cpu) 97 97 + { 98 98 + struct mm_struct *mm; 99 99 + unsigned long addr; 100 100 + pte_t *pte; 101 101 + spinlock_t *ptl; 102 102 + 103 103 + mm = mm_alloc(); 104 104 + if (WARN_ON(!mm)) 105 105 + goto fail_no_mm; 106 106 + 107 107 + /* 108 108 + * Choose a random page-aligned address from the interval 109 109 + * [PAGE_SIZE .. DEFAULT_MAP_WINDOW - PAGE_SIZE]. 110 110 + * The lower address bound is PAGE_SIZE to avoid the zero-page. 111 111 + */ 112 112 + addr = (1 + (get_random_long() % (DEFAULT_MAP_WINDOW / PAGE_SIZE - 2))) << PAGE_SHIFT; 113 113 + 114 114 + /* 115 115 + * PTE allocation uses GFP_KERNEL which means we need to 116 116 + * pre-allocate the PTE here because we cannot do the 117 117 + * allocation during patching when IRQs are disabled. 118 118 + * 119 119 + * Using get_locked_pte() to avoid open coding, the lock 120 120 + * is unnecessary. 121 121 + */ 122 122 + pte = get_locked_pte(mm, addr, &ptl); 123 123 + if (!pte) 124 124 + goto fail_no_pte; 125 125 + pte_unmap_unlock(pte, ptl); 126 126 + 127 127 + this_cpu_write(cpu_patching_context.mm, mm); 128 128 + this_cpu_write(cpu_patching_context.addr, addr); 129 129 + 130 130 + return 0; 131 131 + 132 132 + fail_no_pte: 133 133 + put_patching_mm(mm, addr); 134 134 + fail_no_mm: 135 135 + return -ENOMEM; 136 136 + } 137 137 + 138 138 + static int text_area_cpu_down_mm(unsigned int cpu) 139 139 + { 140 140 + put_patching_mm(this_cpu_read(cpu_patching_context.mm), 141 141 + this_cpu_read(cpu_patching_context.addr)); 142 142 + 143 143 + this_cpu_write(cpu_patching_context.mm, NULL); 144 144 + this_cpu_write(cpu_patching_context.addr, 0); 145 145 + 131 146 return 0; 132 147 } 133 148 134 149 static __ro_after_init DEFINE_STATIC_KEY_FALSE(poking_init_done); 135 150 136 136 - /* 137 137 - * Although BUG_ON() is rude, in this case it should only happen if ENOMEM, and 138 138 - * we judge it as being preferable to a kernel that will crash later when 139 139 - * someone tries to use patch_instruction(). 140 140 - */ 141 151 void __init poking_init(void) 142 152 { 143 143 - BUG_ON(!cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, 144 144 - "powerpc/text_poke:online", text_area_cpu_up, 145 145 - text_area_cpu_down)); 153 153 + int ret; 154 154 + 155 155 + if (!IS_ENABLED(CONFIG_STRICT_KERNEL_RWX)) 156 156 + return; 157 157 + 158 158 + if (mm_patch_enabled()) 159 159 + ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, 160 160 + "powerpc/text_poke_mm:online", 161 161 + text_area_cpu_up_mm, 162 162 + text_area_cpu_down_mm); 163 163 + else 164 164 + ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, 165 165 + "powerpc/text_poke:online", 166 166 + text_area_cpu_up, 167 167 + text_area_cpu_down); 168 168 + 169 169 + /* cpuhp_setup_state returns >= 0 on success */ 170 170 + if (WARN_ON(ret < 0)) 171 171 + return; 172 172 + 146 173 static_branch_enable(&poking_init_done); 147 174 } 148 175 ··· 278 147 flush_tlb_kernel_range(addr, addr + PAGE_SIZE); 279 148 } 280 149 150 150 + static int __do_patch_instruction_mm(u32 *addr, ppc_inst_t instr) 151 151 + { 152 152 + int err; 153 153 + u32 *patch_addr; 154 154 + unsigned long text_poke_addr; 155 155 + pte_t *pte; 156 156 + unsigned long pfn = get_patch_pfn(addr); 157 157 + struct mm_struct *patching_mm; 158 158 + struct mm_struct *orig_mm; 159 159 + spinlock_t *ptl; 160 160 + 161 161 + patching_mm = __this_cpu_read(cpu_patching_context.mm); 162 162 + text_poke_addr = __this_cpu_read(cpu_patching_context.addr); 163 163 + patch_addr = (u32 *)(text_poke_addr + offset_in_page(addr)); 164 164 + 165 165 + pte = get_locked_pte(patching_mm, text_poke_addr, &ptl); 166 166 + if (!pte) 167 167 + return -ENOMEM; 168 168 + 169 169 + __set_pte_at(patching_mm, text_poke_addr, pte, pfn_pte(pfn, PAGE_KERNEL), 0); 170 170 + 171 171 + /* order PTE update before use, also serves as the hwsync */ 172 172 + asm volatile("ptesync": : :"memory"); 173 173 + 174 174 + /* order context switch after arbitrary prior code */ 175 175 + isync(); 176 176 + 177 177 + orig_mm = start_using_temp_mm(patching_mm); 178 178 + 179 179 + err = __patch_instruction(addr, instr, patch_addr); 180 180 + 181 181 + /* hwsync performed by __patch_instruction (sync) if successful */ 182 182 + if (err) 183 183 + mb(); /* sync */ 184 184 + 185 185 + /* context synchronisation performed by __patch_instruction (isync or exception) */ 186 186 + stop_using_temp_mm(patching_mm, orig_mm); 187 187 + 188 188 + pte_clear(patching_mm, text_poke_addr, pte); 189 189 + /* 190 190 + * ptesync to order PTE update before TLB invalidation done 191 191 + * by radix__local_flush_tlb_page_psize (in _tlbiel_va) 192 192 + */ 193 193 + local_flush_tlb_page_psize(patching_mm, text_poke_addr, mmu_virtual_psize); 194 194 + 195 195 + pte_unmap_unlock(pte, ptl); 196 196 + 197 197 + return err; 198 198 + } 199 199 + 281 200 static int __do_patch_instruction(u32 *addr, ppc_inst_t instr) 282 201 { 283 202 int err; ··· 336 155 pte_t *pte; 337 156 unsigned long pfn = get_patch_pfn(addr); 338 157 339 339 - text_poke_addr = (unsigned long)__this_cpu_read(text_poke_area)->addr & PAGE_MASK; 158 158 + text_poke_addr = (unsigned long)__this_cpu_read(cpu_patching_context.addr) & PAGE_MASK; 340 159 patch_addr = (u32 *)(text_poke_addr + offset_in_page(addr)); 341 160 342 342 - pte = virt_to_kpte(text_poke_addr); 161 161 + pte = __this_cpu_read(cpu_patching_context.pte); 343 162 __set_pte_at(&init_mm, text_poke_addr, pte, pfn_pte(pfn, PAGE_KERNEL), 0); 344 163 /* See ptesync comment in radix__set_pte_at() */ 345 164 if (radix_enabled()) ··· 353 172 return err; 354 173 } 355 174 356 356 - static int do_patch_instruction(u32 *addr, ppc_inst_t instr) 175 175 + int patch_instruction(u32 *addr, ppc_inst_t instr) 357 176 { 358 177 int err; 359 178 unsigned long flags; ··· 363 182 * when text_poke_area is not ready, but we still need 364 183 * to allow patching. We just do the plain old patching 365 184 */ 366 366 - if (!static_branch_likely(&poking_init_done)) 185 185 + if (!IS_ENABLED(CONFIG_STRICT_KERNEL_RWX) || 186 186 + !static_branch_likely(&poking_init_done)) 367 187 return raw_patch_instruction(addr, instr); 368 188 369 189 local_irq_save(flags); 370 370 - err = __do_patch_instruction(addr, instr); 190 190 + if (mm_patch_enabled()) 191 191 + err = __do_patch_instruction_mm(addr, instr); 192 192 + else 193 193 + err = __do_patch_instruction(addr, instr); 371 194 local_irq_restore(flags); 372 195 373 196 return err; 374 374 - } 375 375 - #else /* !CONFIG_STRICT_KERNEL_RWX */ 376 376 - 377 377 - static int do_patch_instruction(u32 *addr, ppc_inst_t instr) 378 378 - { 379 379 - return raw_patch_instruction(addr, instr); 380 380 - } 381 381 - 382 382 - #endif /* CONFIG_STRICT_KERNEL_RWX */ 383 383 - 384 384 - __ro_after_init DEFINE_STATIC_KEY_FALSE(init_mem_is_free); 385 385 - 386 386 - int patch_instruction(u32 *addr, ppc_inst_t instr) 387 387 - { 388 388 - /* Make sure we aren't patching a freed init section */ 389 389 - if (static_branch_likely(&init_mem_is_free) && init_section_contains(addr, 4)) 390 390 - return 0; 391 391 - 392 392 - return do_patch_instruction(addr, instr); 393 197 } 394 198 NOKPROBE_SYMBOL(patch_instruction); 395 199

+72 -101

arch/powerpc/lib/feature-fixups.c

reviewed

··· 117 117 } 118 118 } 119 119 120 120 + #ifdef CONFIG_PPC_BARRIER_NOSPEC 121 121 + static bool is_fixup_addr_valid(void *dest, size_t size) 122 122 + { 123 123 + return system_state < SYSTEM_FREEING_INITMEM || 124 124 + !init_section_contains(dest, size); 125 125 + } 126 126 + 127 127 + static int do_patch_fixups(long *start, long *end, unsigned int *instrs, int num) 128 128 + { 129 129 + int i; 130 130 + 131 131 + for (i = 0; start < end; start++, i++) { 132 132 + int j; 133 133 + unsigned int *dest = (void *)start + *start; 134 134 + 135 135 + if (!is_fixup_addr_valid(dest, sizeof(*instrs) * num)) 136 136 + continue; 137 137 + 138 138 + pr_devel("patching dest %lx\n", (unsigned long)dest); 139 139 + 140 140 + for (j = 0; j < num; j++) 141 141 + patch_instruction(dest + j, ppc_inst(instrs[j])); 142 142 + } 143 143 + return i; 144 144 + } 145 145 + #endif 146 146 + 120 147 #ifdef CONFIG_PPC_BOOK3S_64 148 148 + static int do_patch_entry_fixups(long *start, long *end, unsigned int *instrs, 149 149 + bool do_fallback, void *fallback) 150 150 + { 151 151 + int i; 152 152 + 153 153 + for (i = 0; start < end; start++, i++) { 154 154 + unsigned int *dest = (void *)start + *start; 155 155 + 156 156 + if (!is_fixup_addr_valid(dest, sizeof(*instrs) * 3)) 157 157 + continue; 158 158 + 159 159 + pr_devel("patching dest %lx\n", (unsigned long)dest); 160 160 + 161 161 + // See comment in do_entry_flush_fixups() RE order of patching 162 162 + if (do_fallback) { 163 163 + patch_instruction(dest, ppc_inst(instrs[0])); 164 164 + patch_instruction(dest + 2, ppc_inst(instrs[2])); 165 165 + patch_branch(dest + 1, (unsigned long)fallback, BRANCH_SET_LINK); 166 166 + } else { 167 167 + patch_instruction(dest + 1, ppc_inst(instrs[1])); 168 168 + patch_instruction(dest + 2, ppc_inst(instrs[2])); 169 169 + patch_instruction(dest, ppc_inst(instrs[0])); 170 170 + } 171 171 + } 172 172 + return i; 173 173 + } 174 174 + 121 175 static void do_stf_entry_barrier_fixups(enum stf_barrier_type types) 122 176 { 123 123 - unsigned int instrs[3], *dest; 177 177 + unsigned int instrs[3]; 124 178 long *start, *end; 125 179 int i; 126 180 ··· 198 144 instrs[i++] = PPC_RAW_ORI(_R31, _R31, 0); /* speculation barrier */ 199 145 } 200 146 201 201 - for (i = 0; start < end; start++, i++) { 202 202 - dest = (void *)start + *start; 203 203 - 204 204 - pr_devel("patching dest %lx\n", (unsigned long)dest); 205 205 - 206 206 - // See comment in do_entry_flush_fixups() RE order of patching 207 207 - if (types & STF_BARRIER_FALLBACK) { 208 208 - patch_instruction(dest, ppc_inst(instrs[0])); 209 209 - patch_instruction(dest + 2, ppc_inst(instrs[2])); 210 210 - patch_branch(dest + 1, 211 211 - (unsigned long)&stf_barrier_fallback, BRANCH_SET_LINK); 212 212 - } else { 213 213 - patch_instruction(dest + 1, ppc_inst(instrs[1])); 214 214 - patch_instruction(dest + 2, ppc_inst(instrs[2])); 215 215 - patch_instruction(dest, ppc_inst(instrs[0])); 216 216 - } 217 217 - } 147 147 + i = do_patch_entry_fixups(start, end, instrs, types & STF_BARRIER_FALLBACK, 148 148 + &stf_barrier_fallback); 218 149 219 150 printk(KERN_DEBUG "stf-barrier: patched %d entry locations (%s barrier)\n", i, 220 151 (types == STF_BARRIER_NONE) ? "no" : ··· 211 172 212 173 static void do_stf_exit_barrier_fixups(enum stf_barrier_type types) 213 174 { 214 214 - unsigned int instrs[6], *dest; 175 175 + unsigned int instrs[6]; 215 176 long *start, *end; 216 177 int i; 217 178 ··· 245 206 instrs[i++] = PPC_RAW_EIEIO() | 0x02000000; /* eieio + bit 6 hint */ 246 207 } 247 208 248 248 - for (i = 0; start < end; start++, i++) { 249 249 - dest = (void *)start + *start; 209 209 + i = do_patch_fixups(start, end, instrs, ARRAY_SIZE(instrs)); 250 210 251 251 - pr_devel("patching dest %lx\n", (unsigned long)dest); 252 252 - 253 253 - patch_instruction(dest, ppc_inst(instrs[0])); 254 254 - patch_instruction(dest + 1, ppc_inst(instrs[1])); 255 255 - patch_instruction(dest + 2, ppc_inst(instrs[2])); 256 256 - patch_instruction(dest + 3, ppc_inst(instrs[3])); 257 257 - patch_instruction(dest + 4, ppc_inst(instrs[4])); 258 258 - patch_instruction(dest + 5, ppc_inst(instrs[5])); 259 259 - } 260 211 printk(KERN_DEBUG "stf-barrier: patched %d exit locations (%s barrier)\n", i, 261 212 (types == STF_BARRIER_NONE) ? "no" : 262 213 (types == STF_BARRIER_FALLBACK) ? "fallback" : ··· 303 274 304 275 void do_uaccess_flush_fixups(enum l1d_flush_type types) 305 276 { 306 306 - unsigned int instrs[4], *dest; 277 277 + unsigned int instrs[4]; 307 278 long *start, *end; 308 279 int i; 309 280 ··· 329 300 if (types & L1D_FLUSH_MTTRIG) 330 301 instrs[i++] = PPC_RAW_MTSPR(SPRN_TRIG2, _R0); 331 302 332 332 - for (i = 0; start < end; start++, i++) { 333 333 - dest = (void *)start + *start; 334 334 - 335 335 - pr_devel("patching dest %lx\n", (unsigned long)dest); 336 336 - 337 337 - patch_instruction(dest, ppc_inst(instrs[0])); 338 338 - 339 339 - patch_instruction(dest + 1, ppc_inst(instrs[1])); 340 340 - patch_instruction(dest + 2, ppc_inst(instrs[2])); 341 341 - patch_instruction(dest + 3, ppc_inst(instrs[3])); 342 342 - } 303 303 + i = do_patch_fixups(start, end, instrs, ARRAY_SIZE(instrs)); 343 304 344 305 printk(KERN_DEBUG "uaccess-flush: patched %d locations (%s flush)\n", i, 345 306 (types == L1D_FLUSH_NONE) ? "no" : ··· 344 325 static int __do_entry_flush_fixups(void *data) 345 326 { 346 327 enum l1d_flush_type types = *(enum l1d_flush_type *)data; 347 347 - unsigned int instrs[3], *dest; 328 328 + unsigned int instrs[3]; 348 329 long *start, *end; 349 330 int i; 350 331 ··· 394 375 395 376 start = PTRRELOC(&__start___entry_flush_fixup); 396 377 end = PTRRELOC(&__stop___entry_flush_fixup); 397 397 - for (i = 0; start < end; start++, i++) { 398 398 - dest = (void *)start + *start; 399 399 - 400 400 - pr_devel("patching dest %lx\n", (unsigned long)dest); 401 401 - 402 402 - if (types == L1D_FLUSH_FALLBACK) { 403 403 - patch_instruction(dest, ppc_inst(instrs[0])); 404 404 - patch_instruction(dest + 2, ppc_inst(instrs[2])); 405 405 - patch_branch(dest + 1, 406 406 - (unsigned long)&entry_flush_fallback, BRANCH_SET_LINK); 407 407 - } else { 408 408 - patch_instruction(dest + 1, ppc_inst(instrs[1])); 409 409 - patch_instruction(dest + 2, ppc_inst(instrs[2])); 410 410 - patch_instruction(dest, ppc_inst(instrs[0])); 411 411 - } 412 412 - } 378 378 + i = do_patch_entry_fixups(start, end, instrs, types == L1D_FLUSH_FALLBACK, 379 379 + &entry_flush_fallback); 413 380 414 381 start = PTRRELOC(&__start___scv_entry_flush_fixup); 415 382 end = PTRRELOC(&__stop___scv_entry_flush_fixup); 416 416 - for (; start < end; start++, i++) { 417 417 - dest = (void *)start + *start; 418 418 - 419 419 - pr_devel("patching dest %lx\n", (unsigned long)dest); 420 420 - 421 421 - if (types == L1D_FLUSH_FALLBACK) { 422 422 - patch_instruction(dest, ppc_inst(instrs[0])); 423 423 - patch_instruction(dest + 2, ppc_inst(instrs[2])); 424 424 - patch_branch(dest + 1, 425 425 - (unsigned long)&scv_entry_flush_fallback, BRANCH_SET_LINK); 426 426 - } else { 427 427 - patch_instruction(dest + 1, ppc_inst(instrs[1])); 428 428 - patch_instruction(dest + 2, ppc_inst(instrs[2])); 429 429 - patch_instruction(dest, ppc_inst(instrs[0])); 430 430 - } 431 431 - } 432 432 - 383 383 + i += do_patch_entry_fixups(start, end, instrs, types == L1D_FLUSH_FALLBACK, 384 384 + &scv_entry_flush_fallback); 433 385 434 386 printk(KERN_DEBUG "entry-flush: patched %d locations (%s flush)\n", i, 435 387 (types == L1D_FLUSH_NONE) ? "no" : ··· 428 438 static int __do_rfi_flush_fixups(void *data) 429 439 { 430 440 enum l1d_flush_type types = *(enum l1d_flush_type *)data; 431 431 - unsigned int instrs[3], *dest; 441 441 + unsigned int instrs[3]; 432 442 long *start, *end; 433 443 int i; 434 444 ··· 452 462 if (types & L1D_FLUSH_MTTRIG) 453 463 instrs[i++] = PPC_RAW_MTSPR(SPRN_TRIG2, _R0); 454 464 455 455 - for (i = 0; start < end; start++, i++) { 456 456 - dest = (void *)start + *start; 457 457 - 458 458 - pr_devel("patching dest %lx\n", (unsigned long)dest); 459 459 - 460 460 - patch_instruction(dest, ppc_inst(instrs[0])); 461 461 - patch_instruction(dest + 1, ppc_inst(instrs[1])); 462 462 - patch_instruction(dest + 2, ppc_inst(instrs[2])); 463 463 - } 465 465 + i = do_patch_fixups(start, end, instrs, ARRAY_SIZE(instrs)); 464 466 465 467 printk(KERN_DEBUG "rfi-flush: patched %d locations (%s flush)\n", i, 466 468 (types == L1D_FLUSH_NONE) ? "no" : ··· 494 512 495 513 void do_barrier_nospec_fixups_range(bool enable, void *fixup_start, void *fixup_end) 496 514 { 497 497 - unsigned int instr, *dest; 515 515 + unsigned int instr; 498 516 long *start, *end; 499 517 int i; 500 518 ··· 508 526 instr = PPC_RAW_ORI(_R31, _R31, 0); /* speculation barrier */ 509 527 } 510 528 511 511 - for (i = 0; start < end; start++, i++) { 512 512 - dest = (void *)start + *start; 513 513 - 514 514 - pr_devel("patching dest %lx\n", (unsigned long)dest); 515 515 - patch_instruction(dest, ppc_inst(instr)); 516 516 - } 529 529 + i = do_patch_fixups(start, end, &instr, 1); 517 530 518 531 printk(KERN_DEBUG "barrier-nospec: patched %d locations\n", i); 519 532 } ··· 530 553 #ifdef CONFIG_PPC_E500 531 554 void do_barrier_nospec_fixups_range(bool enable, void *fixup_start, void *fixup_end) 532 555 { 533 533 - unsigned int instr[2], *dest; 556 556 + unsigned int instr[2]; 534 557 long *start, *end; 535 558 int i; 536 559 ··· 546 569 instr[1] = PPC_RAW_SYNC(); 547 570 } 548 571 549 549 - for (i = 0; start < end; start++, i++) { 550 550 - dest = (void *)start + *start; 551 551 - 552 552 - pr_devel("patching dest %lx\n", (unsigned long)dest); 553 553 - patch_instruction(dest, ppc_inst(instr[0])); 554 554 - patch_instruction(dest + 1, ppc_inst(instr[1])); 555 555 - } 572 572 + i = do_patch_fixups(start, end, instr, ARRAY_SIZE(instr)); 556 573 557 574 printk(KERN_DEBUG "barrier-nospec: patched %d locations\n", i); 558 575 }

+997

arch/powerpc/lib/qspinlock.c

reviewed

··· 1 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 2 + #include <linux/bug.h> 3 3 + #include <linux/compiler.h> 4 4 + #include <linux/export.h> 5 5 + #include <linux/percpu.h> 6 6 + #include <linux/processor.h> 7 7 + #include <linux/smp.h> 8 8 + #include <linux/topology.h> 9 9 + #include <linux/sched/clock.h> 10 10 + #include <asm/qspinlock.h> 11 11 + #include <asm/paravirt.h> 12 12 + 13 13 + #define MAX_NODES 4 14 14 + 15 15 + struct qnode { 16 16 + struct qnode *next; 17 17 + struct qspinlock *lock; 18 18 + int cpu; 19 19 + int yield_cpu; 20 20 + u8 locked; /* 1 if lock acquired */ 21 21 + }; 22 22 + 23 23 + struct qnodes { 24 24 + int count; 25 25 + struct qnode nodes[MAX_NODES]; 26 26 + }; 27 27 + 28 28 + /* Tuning parameters */ 29 29 + static int steal_spins __read_mostly = (1 << 5); 30 30 + static int remote_steal_spins __read_mostly = (1 << 2); 31 31 + #if _Q_SPIN_TRY_LOCK_STEAL == 1 32 32 + static const bool maybe_stealers = true; 33 33 + #else 34 34 + static bool maybe_stealers __read_mostly = true; 35 35 + #endif 36 36 + static int head_spins __read_mostly = (1 << 8); 37 37 + 38 38 + static bool pv_yield_owner __read_mostly = true; 39 39 + static bool pv_yield_allow_steal __read_mostly = false; 40 40 + static bool pv_spin_on_preempted_owner __read_mostly = false; 41 41 + static bool pv_sleepy_lock __read_mostly = true; 42 42 + static bool pv_sleepy_lock_sticky __read_mostly = false; 43 43 + static u64 pv_sleepy_lock_interval_ns __read_mostly = 0; 44 44 + static int pv_sleepy_lock_factor __read_mostly = 256; 45 45 + static bool pv_yield_prev __read_mostly = true; 46 46 + static bool pv_yield_propagate_owner __read_mostly = true; 47 47 + static bool pv_prod_head __read_mostly = false; 48 48 + 49 49 + static DEFINE_PER_CPU_ALIGNED(struct qnodes, qnodes); 50 50 + static DEFINE_PER_CPU_ALIGNED(u64, sleepy_lock_seen_clock); 51 51 + 52 52 + #if _Q_SPIN_SPEC_BARRIER == 1 53 53 + #define spec_barrier() do { asm volatile("ori 31,31,0" ::: "memory"); } while (0) 54 54 + #else 55 55 + #define spec_barrier() do { } while (0) 56 56 + #endif 57 57 + 58 58 + static __always_inline bool recently_sleepy(void) 59 59 + { 60 60 + /* pv_sleepy_lock is true when this is called */ 61 61 + if (pv_sleepy_lock_interval_ns) { 62 62 + u64 seen = this_cpu_read(sleepy_lock_seen_clock); 63 63 + 64 64 + if (seen) { 65 65 + u64 delta = sched_clock() - seen; 66 66 + if (delta < pv_sleepy_lock_interval_ns) 67 67 + return true; 68 68 + this_cpu_write(sleepy_lock_seen_clock, 0); 69 69 + } 70 70 + } 71 71 + 72 72 + return false; 73 73 + } 74 74 + 75 75 + static __always_inline int get_steal_spins(bool paravirt, bool sleepy) 76 76 + { 77 77 + if (paravirt && sleepy) 78 78 + return steal_spins * pv_sleepy_lock_factor; 79 79 + else 80 80 + return steal_spins; 81 81 + } 82 82 + 83 83 + static __always_inline int get_remote_steal_spins(bool paravirt, bool sleepy) 84 84 + { 85 85 + if (paravirt && sleepy) 86 86 + return remote_steal_spins * pv_sleepy_lock_factor; 87 87 + else 88 88 + return remote_steal_spins; 89 89 + } 90 90 + 91 91 + static __always_inline int get_head_spins(bool paravirt, bool sleepy) 92 92 + { 93 93 + if (paravirt && sleepy) 94 94 + return head_spins * pv_sleepy_lock_factor; 95 95 + else 96 96 + return head_spins; 97 97 + } 98 98 + 99 99 + static inline u32 encode_tail_cpu(int cpu) 100 100 + { 101 101 + return (cpu + 1) << _Q_TAIL_CPU_OFFSET; 102 102 + } 103 103 + 104 104 + static inline int decode_tail_cpu(u32 val) 105 105 + { 106 106 + return (val >> _Q_TAIL_CPU_OFFSET) - 1; 107 107 + } 108 108 + 109 109 + static inline int get_owner_cpu(u32 val) 110 110 + { 111 111 + return (val & _Q_OWNER_CPU_MASK) >> _Q_OWNER_CPU_OFFSET; 112 112 + } 113 113 + 114 114 + /* 115 115 + * Try to acquire the lock if it was not already locked. If the tail matches 116 116 + * mytail then clear it, otherwise leave it unchnaged. Return previous value. 117 117 + * 118 118 + * This is used by the head of the queue to acquire the lock and clean up 119 119 + * its tail if it was the last one queued. 120 120 + */ 121 121 + static __always_inline u32 trylock_clean_tail(struct qspinlock *lock, u32 tail) 122 122 + { 123 123 + u32 newval = queued_spin_encode_locked_val(); 124 124 + u32 prev, tmp; 125 125 + 126 126 + asm volatile( 127 127 + "1: lwarx %0,0,%2,%7 # trylock_clean_tail \n" 128 128 + /* This test is necessary if there could be stealers */ 129 129 + " andi. %1,%0,%5 \n" 130 130 + " bne 3f \n" 131 131 + /* Test whether the lock tail == mytail */ 132 132 + " and %1,%0,%6 \n" 133 133 + " cmpw 0,%1,%3 \n" 134 134 + /* Merge the new locked value */ 135 135 + " or %1,%1,%4 \n" 136 136 + " bne 2f \n" 137 137 + /* If the lock tail matched, then clear it, otherwise leave it. */ 138 138 + " andc %1,%1,%6 \n" 139 139 + "2: stwcx. %1,0,%2 \n" 140 140 + " bne- 1b \n" 141 141 + "\t" PPC_ACQUIRE_BARRIER " \n" 142 142 + "3: \n" 143 143 + : "=&r" (prev), "=&r" (tmp) 144 144 + : "r" (&lock->val), "r"(tail), "r" (newval), 145 145 + "i" (_Q_LOCKED_VAL), 146 146 + "r" (_Q_TAIL_CPU_MASK), 147 147 + "i" (_Q_SPIN_EH_HINT) 148 148 + : "cr0", "memory"); 149 149 + 150 150 + return prev; 151 151 + } 152 152 + 153 153 + /* 154 154 + * Publish our tail, replacing previous tail. Return previous value. 155 155 + * 156 156 + * This provides a release barrier for publishing node, this pairs with the 157 157 + * acquire barrier in get_tail_qnode() when the next CPU finds this tail 158 158 + * value. 159 159 + */ 160 160 + static __always_inline u32 publish_tail_cpu(struct qspinlock *lock, u32 tail) 161 161 + { 162 162 + u32 prev, tmp; 163 163 + 164 164 + asm volatile( 165 165 + "\t" PPC_RELEASE_BARRIER " \n" 166 166 + "1: lwarx %0,0,%2 # publish_tail_cpu \n" 167 167 + " andc %1,%0,%4 \n" 168 168 + " or %1,%1,%3 \n" 169 169 + " stwcx. %1,0,%2 \n" 170 170 + " bne- 1b \n" 171 171 + : "=&r" (prev), "=&r"(tmp) 172 172 + : "r" (&lock->val), "r" (tail), "r"(_Q_TAIL_CPU_MASK) 173 173 + : "cr0", "memory"); 174 174 + 175 175 + return prev; 176 176 + } 177 177 + 178 178 + static __always_inline u32 set_mustq(struct qspinlock *lock) 179 179 + { 180 180 + u32 prev; 181 181 + 182 182 + asm volatile( 183 183 + "1: lwarx %0,0,%1 # set_mustq \n" 184 184 + " or %0,%0,%2 \n" 185 185 + " stwcx. %0,0,%1 \n" 186 186 + " bne- 1b \n" 187 187 + : "=&r" (prev) 188 188 + : "r" (&lock->val), "r" (_Q_MUST_Q_VAL) 189 189 + : "cr0", "memory"); 190 190 + 191 191 + return prev; 192 192 + } 193 193 + 194 194 + static __always_inline u32 clear_mustq(struct qspinlock *lock) 195 195 + { 196 196 + u32 prev; 197 197 + 198 198 + asm volatile( 199 199 + "1: lwarx %0,0,%1 # clear_mustq \n" 200 200 + " andc %0,%0,%2 \n" 201 201 + " stwcx. %0,0,%1 \n" 202 202 + " bne- 1b \n" 203 203 + : "=&r" (prev) 204 204 + : "r" (&lock->val), "r" (_Q_MUST_Q_VAL) 205 205 + : "cr0", "memory"); 206 206 + 207 207 + return prev; 208 208 + } 209 209 + 210 210 + static __always_inline bool try_set_sleepy(struct qspinlock *lock, u32 old) 211 211 + { 212 212 + u32 prev; 213 213 + u32 new = old | _Q_SLEEPY_VAL; 214 214 + 215 215 + BUG_ON(!(old & _Q_LOCKED_VAL)); 216 216 + BUG_ON(old & _Q_SLEEPY_VAL); 217 217 + 218 218 + asm volatile( 219 219 + "1: lwarx %0,0,%1 # try_set_sleepy \n" 220 220 + " cmpw 0,%0,%2 \n" 221 221 + " bne- 2f \n" 222 222 + " stwcx. %3,0,%1 \n" 223 223 + " bne- 1b \n" 224 224 + "2: \n" 225 225 + : "=&r" (prev) 226 226 + : "r" (&lock->val), "r"(old), "r" (new) 227 227 + : "cr0", "memory"); 228 228 + 229 229 + return likely(prev == old); 230 230 + } 231 231 + 232 232 + static __always_inline void seen_sleepy_owner(struct qspinlock *lock, u32 val) 233 233 + { 234 234 + if (pv_sleepy_lock) { 235 235 + if (pv_sleepy_lock_interval_ns) 236 236 + this_cpu_write(sleepy_lock_seen_clock, sched_clock()); 237 237 + if (!(val & _Q_SLEEPY_VAL)) 238 238 + try_set_sleepy(lock, val); 239 239 + } 240 240 + } 241 241 + 242 242 + static __always_inline void seen_sleepy_lock(void) 243 243 + { 244 244 + if (pv_sleepy_lock && pv_sleepy_lock_interval_ns) 245 245 + this_cpu_write(sleepy_lock_seen_clock, sched_clock()); 246 246 + } 247 247 + 248 248 + static __always_inline void seen_sleepy_node(struct qspinlock *lock, u32 val) 249 249 + { 250 250 + if (pv_sleepy_lock) { 251 251 + if (pv_sleepy_lock_interval_ns) 252 252 + this_cpu_write(sleepy_lock_seen_clock, sched_clock()); 253 253 + if (val & _Q_LOCKED_VAL) { 254 254 + if (!(val & _Q_SLEEPY_VAL)) 255 255 + try_set_sleepy(lock, val); 256 256 + } 257 257 + } 258 258 + } 259 259 + 260 260 + static struct qnode *get_tail_qnode(struct qspinlock *lock, u32 val) 261 261 + { 262 262 + int cpu = decode_tail_cpu(val); 263 263 + struct qnodes *qnodesp = per_cpu_ptr(&qnodes, cpu); 264 264 + int idx; 265 265 + 266 266 + /* 267 267 + * After publishing the new tail and finding a previous tail in the 268 268 + * previous val (which is the control dependency), this barrier 269 269 + * orders the release barrier in publish_tail_cpu performed by the 270 270 + * last CPU, with subsequently looking at its qnode structures 271 271 + * after the barrier. 272 272 + */ 273 273 + smp_acquire__after_ctrl_dep(); 274 274 + 275 275 + for (idx = 0; idx < MAX_NODES; idx++) { 276 276 + struct qnode *qnode = &qnodesp->nodes[idx]; 277 277 + if (qnode->lock == lock) 278 278 + return qnode; 279 279 + } 280 280 + 281 281 + BUG(); 282 282 + } 283 283 + 284 284 + /* Called inside spin_begin(). Returns whether or not the vCPU was preempted. */ 285 285 + static __always_inline bool __yield_to_locked_owner(struct qspinlock *lock, u32 val, bool paravirt, bool mustq) 286 286 + { 287 287 + int owner; 288 288 + u32 yield_count; 289 289 + bool preempted = false; 290 290 + 291 291 + BUG_ON(!(val & _Q_LOCKED_VAL)); 292 292 + 293 293 + if (!paravirt) 294 294 + goto relax; 295 295 + 296 296 + if (!pv_yield_owner) 297 297 + goto relax; 298 298 + 299 299 + owner = get_owner_cpu(val); 300 300 + yield_count = yield_count_of(owner); 301 301 + 302 302 + if ((yield_count & 1) == 0) 303 303 + goto relax; /* owner vcpu is running */ 304 304 + 305 305 + spin_end(); 306 306 + 307 307 + seen_sleepy_owner(lock, val); 308 308 + preempted = true; 309 309 + 310 310 + /* 311 311 + * Read the lock word after sampling the yield count. On the other side 312 312 + * there may a wmb because the yield count update is done by the 313 313 + * hypervisor preemption and the value update by the OS, however this 314 314 + * ordering might reduce the chance of out of order accesses and 315 315 + * improve the heuristic. 316 316 + */ 317 317 + smp_rmb(); 318 318 + 319 319 + if (READ_ONCE(lock->val) == val) { 320 320 + if (mustq) 321 321 + clear_mustq(lock); 322 322 + yield_to_preempted(owner, yield_count); 323 323 + if (mustq) 324 324 + set_mustq(lock); 325 325 + spin_begin(); 326 326 + 327 327 + /* Don't relax if we yielded. Maybe we should? */ 328 328 + return preempted; 329 329 + } 330 330 + spin_begin(); 331 331 + relax: 332 332 + spin_cpu_relax(); 333 333 + 334 334 + return preempted; 335 335 + } 336 336 + 337 337 + /* Called inside spin_begin(). Returns whether or not the vCPU was preempted. */ 338 338 + static __always_inline bool yield_to_locked_owner(struct qspinlock *lock, u32 val, bool paravirt) 339 339 + { 340 340 + return __yield_to_locked_owner(lock, val, paravirt, false); 341 341 + } 342 342 + 343 343 + /* Called inside spin_begin(). Returns whether or not the vCPU was preempted. */ 344 344 + static __always_inline bool yield_head_to_locked_owner(struct qspinlock *lock, u32 val, bool paravirt) 345 345 + { 346 346 + bool mustq = false; 347 347 + 348 348 + if ((val & _Q_MUST_Q_VAL) && pv_yield_allow_steal) 349 349 + mustq = true; 350 350 + 351 351 + return __yield_to_locked_owner(lock, val, paravirt, mustq); 352 352 + } 353 353 + 354 354 + static __always_inline void propagate_yield_cpu(struct qnode *node, u32 val, int *set_yield_cpu, bool paravirt) 355 355 + { 356 356 + struct qnode *next; 357 357 + int owner; 358 358 + 359 359 + if (!paravirt) 360 360 + return; 361 361 + if (!pv_yield_propagate_owner) 362 362 + return; 363 363 + 364 364 + owner = get_owner_cpu(val); 365 365 + if (*set_yield_cpu == owner) 366 366 + return; 367 367 + 368 368 + next = READ_ONCE(node->next); 369 369 + if (!next) 370 370 + return; 371 371 + 372 372 + if (vcpu_is_preempted(owner)) { 373 373 + next->yield_cpu = owner; 374 374 + *set_yield_cpu = owner; 375 375 + } else if (*set_yield_cpu != -1) { 376 376 + next->yield_cpu = owner; 377 377 + *set_yield_cpu = owner; 378 378 + } 379 379 + } 380 380 + 381 381 + /* Called inside spin_begin() */ 382 382 + static __always_inline bool yield_to_prev(struct qspinlock *lock, struct qnode *node, u32 val, bool paravirt) 383 383 + { 384 384 + int prev_cpu = decode_tail_cpu(val); 385 385 + u32 yield_count; 386 386 + int yield_cpu; 387 387 + bool preempted = false; 388 388 + 389 389 + if (!paravirt) 390 390 + goto relax; 391 391 + 392 392 + if (!pv_yield_propagate_owner) 393 393 + goto yield_prev; 394 394 + 395 395 + yield_cpu = READ_ONCE(node->yield_cpu); 396 396 + if (yield_cpu == -1) { 397 397 + /* Propagate back the -1 CPU */ 398 398 + if (node->next && node->next->yield_cpu != -1) 399 399 + node->next->yield_cpu = yield_cpu; 400 400 + goto yield_prev; 401 401 + } 402 402 + 403 403 + yield_count = yield_count_of(yield_cpu); 404 404 + if ((yield_count & 1) == 0) 405 405 + goto yield_prev; /* owner vcpu is running */ 406 406 + 407 407 + spin_end(); 408 408 + 409 409 + preempted = true; 410 410 + seen_sleepy_node(lock, val); 411 411 + 412 412 + smp_rmb(); 413 413 + 414 414 + if (yield_cpu == node->yield_cpu) { 415 415 + if (node->next && node->next->yield_cpu != yield_cpu) 416 416 + node->next->yield_cpu = yield_cpu; 417 417 + yield_to_preempted(yield_cpu, yield_count); 418 418 + spin_begin(); 419 419 + return preempted; 420 420 + } 421 421 + spin_begin(); 422 422 + 423 423 + yield_prev: 424 424 + if (!pv_yield_prev) 425 425 + goto relax; 426 426 + 427 427 + yield_count = yield_count_of(prev_cpu); 428 428 + if ((yield_count & 1) == 0) 429 429 + goto relax; /* owner vcpu is running */ 430 430 + 431 431 + spin_end(); 432 432 + 433 433 + preempted = true; 434 434 + seen_sleepy_node(lock, val); 435 435 + 436 436 + smp_rmb(); /* See __yield_to_locked_owner comment */ 437 437 + 438 438 + if (!node->locked) { 439 439 + yield_to_preempted(prev_cpu, yield_count); 440 440 + spin_begin(); 441 441 + return preempted; 442 442 + } 443 443 + spin_begin(); 444 444 + 445 445 + relax: 446 446 + spin_cpu_relax(); 447 447 + 448 448 + return preempted; 449 449 + } 450 450 + 451 451 + static __always_inline bool steal_break(u32 val, int iters, bool paravirt, bool sleepy) 452 452 + { 453 453 + if (iters >= get_steal_spins(paravirt, sleepy)) 454 454 + return true; 455 455 + 456 456 + if (IS_ENABLED(CONFIG_NUMA) && 457 457 + (iters >= get_remote_steal_spins(paravirt, sleepy))) { 458 458 + int cpu = get_owner_cpu(val); 459 459 + if (numa_node_id() != cpu_to_node(cpu)) 460 460 + return true; 461 461 + } 462 462 + return false; 463 463 + } 464 464 + 465 465 + static __always_inline bool try_to_steal_lock(struct qspinlock *lock, bool paravirt) 466 466 + { 467 467 + bool seen_preempted = false; 468 468 + bool sleepy = false; 469 469 + int iters = 0; 470 470 + u32 val; 471 471 + 472 472 + if (!steal_spins) { 473 473 + /* XXX: should spin_on_preempted_owner do anything here? */ 474 474 + return false; 475 475 + } 476 476 + 477 477 + /* Attempt to steal the lock */ 478 478 + spin_begin(); 479 479 + do { 480 480 + bool preempted = false; 481 481 + 482 482 + val = READ_ONCE(lock->val); 483 483 + if (val & _Q_MUST_Q_VAL) 484 484 + break; 485 485 + spec_barrier(); 486 486 + 487 487 + if (unlikely(!(val & _Q_LOCKED_VAL))) { 488 488 + spin_end(); 489 489 + if (__queued_spin_trylock_steal(lock)) 490 490 + return true; 491 491 + spin_begin(); 492 492 + } else { 493 493 + preempted = yield_to_locked_owner(lock, val, paravirt); 494 494 + } 495 495 + 496 496 + if (paravirt && pv_sleepy_lock) { 497 497 + if (!sleepy) { 498 498 + if (val & _Q_SLEEPY_VAL) { 499 499 + seen_sleepy_lock(); 500 500 + sleepy = true; 501 501 + } else if (recently_sleepy()) { 502 502 + sleepy = true; 503 503 + } 504 504 + } 505 505 + if (pv_sleepy_lock_sticky && seen_preempted && 506 506 + !(val & _Q_SLEEPY_VAL)) { 507 507 + if (try_set_sleepy(lock, val)) 508 508 + val |= _Q_SLEEPY_VAL; 509 509 + } 510 510 + } 511 511 + 512 512 + if (preempted) { 513 513 + seen_preempted = true; 514 514 + sleepy = true; 515 515 + if (!pv_spin_on_preempted_owner) 516 516 + iters++; 517 517 + /* 518 518 + * pv_spin_on_preempted_owner don't increase iters 519 519 + * while the owner is preempted -- we won't interfere 520 520 + * with it by definition. This could introduce some 521 521 + * latency issue if we continually observe preempted 522 522 + * owners, but hopefully that's a rare corner case of 523 523 + * a badly oversubscribed system. 524 524 + */ 525 525 + } else { 526 526 + iters++; 527 527 + } 528 528 + } while (!steal_break(val, iters, paravirt, sleepy)); 529 529 + 530 530 + spin_end(); 531 531 + 532 532 + return false; 533 533 + } 534 534 + 535 535 + static __always_inline void queued_spin_lock_mcs_queue(struct qspinlock *lock, bool paravirt) 536 536 + { 537 537 + struct qnodes *qnodesp; 538 538 + struct qnode *next, *node; 539 539 + u32 val, old, tail; 540 540 + bool seen_preempted = false; 541 541 + bool sleepy = false; 542 542 + bool mustq = false; 543 543 + int idx; 544 544 + int set_yield_cpu = -1; 545 545 + int iters = 0; 546 546 + 547 547 + BUILD_BUG_ON(CONFIG_NR_CPUS >= (1U << _Q_TAIL_CPU_BITS)); 548 548 + 549 549 + qnodesp = this_cpu_ptr(&qnodes); 550 550 + if (unlikely(qnodesp->count >= MAX_NODES)) { 551 551 + spec_barrier(); 552 552 + while (!queued_spin_trylock(lock)) 553 553 + cpu_relax(); 554 554 + return; 555 555 + } 556 556 + 557 557 + idx = qnodesp->count++; 558 558 + /* 559 559 + * Ensure that we increment the head node->count before initialising 560 560 + * the actual node. If the compiler is kind enough to reorder these 561 561 + * stores, then an IRQ could overwrite our assignments. 562 562 + */ 563 563 + barrier(); 564 564 + node = &qnodesp->nodes[idx]; 565 565 + node->next = NULL; 566 566 + node->lock = lock; 567 567 + node->cpu = smp_processor_id(); 568 568 + node->yield_cpu = -1; 569 569 + node->locked = 0; 570 570 + 571 571 + tail = encode_tail_cpu(node->cpu); 572 572 + 573 573 + old = publish_tail_cpu(lock, tail); 574 574 + 575 575 + /* 576 576 + * If there was a previous node; link it and wait until reaching the 577 577 + * head of the waitqueue. 578 578 + */ 579 579 + if (old & _Q_TAIL_CPU_MASK) { 580 580 + struct qnode *prev = get_tail_qnode(lock, old); 581 581 + 582 582 + /* Link @node into the waitqueue. */ 583 583 + WRITE_ONCE(prev->next, node); 584 584 + 585 585 + /* Wait for mcs node lock to be released */ 586 586 + spin_begin(); 587 587 + while (!node->locked) { 588 588 + spec_barrier(); 589 589 + 590 590 + if (yield_to_prev(lock, node, old, paravirt)) 591 591 + seen_preempted = true; 592 592 + } 593 593 + spec_barrier(); 594 594 + spin_end(); 595 595 + 596 596 + /* Clear out stale propagated yield_cpu */ 597 597 + if (paravirt && pv_yield_propagate_owner && node->yield_cpu != -1) 598 598 + node->yield_cpu = -1; 599 599 + 600 600 + smp_rmb(); /* acquire barrier for the mcs lock */ 601 601 + 602 602 + /* 603 603 + * Generic qspinlocks have this prefetch here, but it seems 604 604 + * like it could cause additional line transitions because 605 605 + * the waiter will keep loading from it. 606 606 + */ 607 607 + if (_Q_SPIN_PREFETCH_NEXT) { 608 608 + next = READ_ONCE(node->next); 609 609 + if (next) 610 610 + prefetchw(next); 611 611 + } 612 612 + } 613 613 + 614 614 + /* We're at the head of the waitqueue, wait for the lock. */ 615 615 + again: 616 616 + spin_begin(); 617 617 + for (;;) { 618 618 + bool preempted; 619 619 + 620 620 + val = READ_ONCE(lock->val); 621 621 + if (!(val & _Q_LOCKED_VAL)) 622 622 + break; 623 623 + spec_barrier(); 624 624 + 625 625 + if (paravirt && pv_sleepy_lock && maybe_stealers) { 626 626 + if (!sleepy) { 627 627 + if (val & _Q_SLEEPY_VAL) { 628 628 + seen_sleepy_lock(); 629 629 + sleepy = true; 630 630 + } else if (recently_sleepy()) { 631 631 + sleepy = true; 632 632 + } 633 633 + } 634 634 + if (pv_sleepy_lock_sticky && seen_preempted && 635 635 + !(val & _Q_SLEEPY_VAL)) { 636 636 + if (try_set_sleepy(lock, val)) 637 637 + val |= _Q_SLEEPY_VAL; 638 638 + } 639 639 + } 640 640 + 641 641 + propagate_yield_cpu(node, val, &set_yield_cpu, paravirt); 642 642 + preempted = yield_head_to_locked_owner(lock, val, paravirt); 643 643 + if (!maybe_stealers) 644 644 + continue; 645 645 + 646 646 + if (preempted) 647 647 + seen_preempted = true; 648 648 + 649 649 + if (paravirt && preempted) { 650 650 + sleepy = true; 651 651 + 652 652 + if (!pv_spin_on_preempted_owner) 653 653 + iters++; 654 654 + } else { 655 655 + iters++; 656 656 + } 657 657 + 658 658 + if (!mustq && iters >= get_head_spins(paravirt, sleepy)) { 659 659 + mustq = true; 660 660 + set_mustq(lock); 661 661 + val |= _Q_MUST_Q_VAL; 662 662 + } 663 663 + } 664 664 + spec_barrier(); 665 665 + spin_end(); 666 666 + 667 667 + /* If we're the last queued, must clean up the tail. */ 668 668 + old = trylock_clean_tail(lock, tail); 669 669 + if (unlikely(old & _Q_LOCKED_VAL)) { 670 670 + BUG_ON(!maybe_stealers); 671 671 + goto again; /* Can only be true if maybe_stealers. */ 672 672 + } 673 673 + 674 674 + if ((old & _Q_TAIL_CPU_MASK) == tail) 675 675 + goto release; /* We were the tail, no next. */ 676 676 + 677 677 + /* There is a next, must wait for node->next != NULL (MCS protocol) */ 678 678 + next = READ_ONCE(node->next); 679 679 + if (!next) { 680 680 + spin_begin(); 681 681 + while (!(next = READ_ONCE(node->next))) 682 682 + cpu_relax(); 683 683 + spin_end(); 684 684 + } 685 685 + spec_barrier(); 686 686 + 687 687 + /* 688 688 + * Unlock the next mcs waiter node. Release barrier is not required 689 689 + * here because the acquirer is only accessing the lock word, and 690 690 + * the acquire barrier we took the lock with orders that update vs 691 691 + * this store to locked. The corresponding barrier is the smp_rmb() 692 692 + * acquire barrier for mcs lock, above. 693 693 + */ 694 694 + if (paravirt && pv_prod_head) { 695 695 + int next_cpu = next->cpu; 696 696 + WRITE_ONCE(next->locked, 1); 697 697 + if (_Q_SPIN_MISO) 698 698 + asm volatile("miso" ::: "memory"); 699 699 + if (vcpu_is_preempted(next_cpu)) 700 700 + prod_cpu(next_cpu); 701 701 + } else { 702 702 + WRITE_ONCE(next->locked, 1); 703 703 + if (_Q_SPIN_MISO) 704 704 + asm volatile("miso" ::: "memory"); 705 705 + } 706 706 + 707 707 + release: 708 708 + qnodesp->count--; /* release the node */ 709 709 + } 710 710 + 711 711 + void queued_spin_lock_slowpath(struct qspinlock *lock) 712 712 + { 713 713 + /* 714 714 + * This looks funny, but it induces the compiler to inline both 715 715 + * sides of the branch rather than share code as when the condition 716 716 + * is passed as the paravirt argument to the functions. 717 717 + */ 718 718 + if (IS_ENABLED(CONFIG_PARAVIRT_SPINLOCKS) && is_shared_processor()) { 719 719 + if (try_to_steal_lock(lock, true)) { 720 720 + spec_barrier(); 721 721 + return; 722 722 + } 723 723 + queued_spin_lock_mcs_queue(lock, true); 724 724 + } else { 725 725 + if (try_to_steal_lock(lock, false)) { 726 726 + spec_barrier(); 727 727 + return; 728 728 + } 729 729 + queued_spin_lock_mcs_queue(lock, false); 730 730 + } 731 731 + } 732 732 + EXPORT_SYMBOL(queued_spin_lock_slowpath); 733 733 + 734 734 + #ifdef CONFIG_PARAVIRT_SPINLOCKS 735 735 + void pv_spinlocks_init(void) 736 736 + { 737 737 + } 738 738 + #endif 739 739 + 740 740 + #include <linux/debugfs.h> 741 741 + static int steal_spins_set(void *data, u64 val) 742 742 + { 743 743 + #if _Q_SPIN_TRY_LOCK_STEAL == 1 744 744 + /* MAYBE_STEAL remains true */ 745 745 + steal_spins = val; 746 746 + #else 747 747 + static DEFINE_MUTEX(lock); 748 748 + 749 749 + /* 750 750 + * The lock slow path has a !maybe_stealers case that can assume 751 751 + * the head of queue will not see concurrent waiters. That waiter 752 752 + * is unsafe in the presence of stealers, so must keep them away 753 753 + * from one another. 754 754 + */ 755 755 + 756 756 + mutex_lock(&lock); 757 757 + if (val && !steal_spins) { 758 758 + maybe_stealers = true; 759 759 + /* wait for queue head waiter to go away */ 760 760 + synchronize_rcu(); 761 761 + steal_spins = val; 762 762 + } else if (!val && steal_spins) { 763 763 + steal_spins = val; 764 764 + /* wait for all possible stealers to go away */ 765 765 + synchronize_rcu(); 766 766 + maybe_stealers = false; 767 767 + } else { 768 768 + steal_spins = val; 769 769 + } 770 770 + mutex_unlock(&lock); 771 771 + #endif 772 772 + 773 773 + return 0; 774 774 + } 775 775 + 776 776 + static int steal_spins_get(void *data, u64 *val) 777 777 + { 778 778 + *val = steal_spins; 779 779 + 780 780 + return 0; 781 781 + } 782 782 + 783 783 + DEFINE_SIMPLE_ATTRIBUTE(fops_steal_spins, steal_spins_get, steal_spins_set, "%llu\n"); 784 784 + 785 785 + static int remote_steal_spins_set(void *data, u64 val) 786 786 + { 787 787 + remote_steal_spins = val; 788 788 + 789 789 + return 0; 790 790 + } 791 791 + 792 792 + static int remote_steal_spins_get(void *data, u64 *val) 793 793 + { 794 794 + *val = remote_steal_spins; 795 795 + 796 796 + return 0; 797 797 + } 798 798 + 799 799 + DEFINE_SIMPLE_ATTRIBUTE(fops_remote_steal_spins, remote_steal_spins_get, remote_steal_spins_set, "%llu\n"); 800 800 + 801 801 + static int head_spins_set(void *data, u64 val) 802 802 + { 803 803 + head_spins = val; 804 804 + 805 805 + return 0; 806 806 + } 807 807 + 808 808 + static int head_spins_get(void *data, u64 *val) 809 809 + { 810 810 + *val = head_spins; 811 811 + 812 812 + return 0; 813 813 + } 814 814 + 815 815 + DEFINE_SIMPLE_ATTRIBUTE(fops_head_spins, head_spins_get, head_spins_set, "%llu\n"); 816 816 + 817 817 + static int pv_yield_owner_set(void *data, u64 val) 818 818 + { 819 819 + pv_yield_owner = !!val; 820 820 + 821 821 + return 0; 822 822 + } 823 823 + 824 824 + static int pv_yield_owner_get(void *data, u64 *val) 825 825 + { 826 826 + *val = pv_yield_owner; 827 827 + 828 828 + return 0; 829 829 + } 830 830 + 831 831 + DEFINE_SIMPLE_ATTRIBUTE(fops_pv_yield_owner, pv_yield_owner_get, pv_yield_owner_set, "%llu\n"); 832 832 + 833 833 + static int pv_yield_allow_steal_set(void *data, u64 val) 834 834 + { 835 835 + pv_yield_allow_steal = !!val; 836 836 + 837 837 + return 0; 838 838 + } 839 839 + 840 840 + static int pv_yield_allow_steal_get(void *data, u64 *val) 841 841 + { 842 842 + *val = pv_yield_allow_steal; 843 843 + 844 844 + return 0; 845 845 + } 846 846 + 847 847 + DEFINE_SIMPLE_ATTRIBUTE(fops_pv_yield_allow_steal, pv_yield_allow_steal_get, pv_yield_allow_steal_set, "%llu\n"); 848 848 + 849 849 + static int pv_spin_on_preempted_owner_set(void *data, u64 val) 850 850 + { 851 851 + pv_spin_on_preempted_owner = !!val; 852 852 + 853 853 + return 0; 854 854 + } 855 855 + 856 856 + static int pv_spin_on_preempted_owner_get(void *data, u64 *val) 857 857 + { 858 858 + *val = pv_spin_on_preempted_owner; 859 859 + 860 860 + return 0; 861 861 + } 862 862 + 863 863 + DEFINE_SIMPLE_ATTRIBUTE(fops_pv_spin_on_preempted_owner, pv_spin_on_preempted_owner_get, pv_spin_on_preempted_owner_set, "%llu\n"); 864 864 + 865 865 + static int pv_sleepy_lock_set(void *data, u64 val) 866 866 + { 867 867 + pv_sleepy_lock = !!val; 868 868 + 869 869 + return 0; 870 870 + } 871 871 + 872 872 + static int pv_sleepy_lock_get(void *data, u64 *val) 873 873 + { 874 874 + *val = pv_sleepy_lock; 875 875 + 876 876 + return 0; 877 877 + } 878 878 + 879 879 + DEFINE_SIMPLE_ATTRIBUTE(fops_pv_sleepy_lock, pv_sleepy_lock_get, pv_sleepy_lock_set, "%llu\n"); 880 880 + 881 881 + static int pv_sleepy_lock_sticky_set(void *data, u64 val) 882 882 + { 883 883 + pv_sleepy_lock_sticky = !!val; 884 884 + 885 885 + return 0; 886 886 + } 887 887 + 888 888 + static int pv_sleepy_lock_sticky_get(void *data, u64 *val) 889 889 + { 890 890 + *val = pv_sleepy_lock_sticky; 891 891 + 892 892 + return 0; 893 893 + } 894 894 + 895 895 + DEFINE_SIMPLE_ATTRIBUTE(fops_pv_sleepy_lock_sticky, pv_sleepy_lock_sticky_get, pv_sleepy_lock_sticky_set, "%llu\n"); 896 896 + 897 897 + static int pv_sleepy_lock_interval_ns_set(void *data, u64 val) 898 898 + { 899 899 + pv_sleepy_lock_interval_ns = val; 900 900 + 901 901 + return 0; 902 902 + } 903 903 + 904 904 + static int pv_sleepy_lock_interval_ns_get(void *data, u64 *val) 905 905 + { 906 906 + *val = pv_sleepy_lock_interval_ns; 907 907 + 908 908 + return 0; 909 909 + } 910 910 + 911 911 + DEFINE_SIMPLE_ATTRIBUTE(fops_pv_sleepy_lock_interval_ns, pv_sleepy_lock_interval_ns_get, pv_sleepy_lock_interval_ns_set, "%llu\n"); 912 912 + 913 913 + static int pv_sleepy_lock_factor_set(void *data, u64 val) 914 914 + { 915 915 + pv_sleepy_lock_factor = val; 916 916 + 917 917 + return 0; 918 918 + } 919 919 + 920 920 + static int pv_sleepy_lock_factor_get(void *data, u64 *val) 921 921 + { 922 922 + *val = pv_sleepy_lock_factor; 923 923 + 924 924 + return 0; 925 925 + } 926 926 + 927 927 + DEFINE_SIMPLE_ATTRIBUTE(fops_pv_sleepy_lock_factor, pv_sleepy_lock_factor_get, pv_sleepy_lock_factor_set, "%llu\n"); 928 928 + 929 929 + static int pv_yield_prev_set(void *data, u64 val) 930 930 + { 931 931 + pv_yield_prev = !!val; 932 932 + 933 933 + return 0; 934 934 + } 935 935 + 936 936 + static int pv_yield_prev_get(void *data, u64 *val) 937 937 + { 938 938 + *val = pv_yield_prev; 939 939 + 940 940 + return 0; 941 941 + } 942 942 + 943 943 + DEFINE_SIMPLE_ATTRIBUTE(fops_pv_yield_prev, pv_yield_prev_get, pv_yield_prev_set, "%llu\n"); 944 944 + 945 945 + static int pv_yield_propagate_owner_set(void *data, u64 val) 946 946 + { 947 947 + pv_yield_propagate_owner = !!val; 948 948 + 949 949 + return 0; 950 950 + } 951 951 + 952 952 + static int pv_yield_propagate_owner_get(void *data, u64 *val) 953 953 + { 954 954 + *val = pv_yield_propagate_owner; 955 955 + 956 956 + return 0; 957 957 + } 958 958 + 959 959 + DEFINE_SIMPLE_ATTRIBUTE(fops_pv_yield_propagate_owner, pv_yield_propagate_owner_get, pv_yield_propagate_owner_set, "%llu\n"); 960 960 + 961 961 + static int pv_prod_head_set(void *data, u64 val) 962 962 + { 963 963 + pv_prod_head = !!val; 964 964 + 965 965 + return 0; 966 966 + } 967 967 + 968 968 + static int pv_prod_head_get(void *data, u64 *val) 969 969 + { 970 970 + *val = pv_prod_head; 971 971 + 972 972 + return 0; 973 973 + } 974 974 + 975 975 + DEFINE_SIMPLE_ATTRIBUTE(fops_pv_prod_head, pv_prod_head_get, pv_prod_head_set, "%llu\n"); 976 976 + 977 977 + static __init int spinlock_debugfs_init(void) 978 978 + { 979 979 + debugfs_create_file("qspl_steal_spins", 0600, arch_debugfs_dir, NULL, &fops_steal_spins); 980 980 + debugfs_create_file("qspl_remote_steal_spins", 0600, arch_debugfs_dir, NULL, &fops_remote_steal_spins); 981 981 + debugfs_create_file("qspl_head_spins", 0600, arch_debugfs_dir, NULL, &fops_head_spins); 982 982 + if (is_shared_processor()) { 983 983 + debugfs_create_file("qspl_pv_yield_owner", 0600, arch_debugfs_dir, NULL, &fops_pv_yield_owner); 984 984 + debugfs_create_file("qspl_pv_yield_allow_steal", 0600, arch_debugfs_dir, NULL, &fops_pv_yield_allow_steal); 985 985 + debugfs_create_file("qspl_pv_spin_on_preempted_owner", 0600, arch_debugfs_dir, NULL, &fops_pv_spin_on_preempted_owner); 986 986 + debugfs_create_file("qspl_pv_sleepy_lock", 0600, arch_debugfs_dir, NULL, &fops_pv_sleepy_lock); 987 987 + debugfs_create_file("qspl_pv_sleepy_lock_sticky", 0600, arch_debugfs_dir, NULL, &fops_pv_sleepy_lock_sticky); 988 988 + debugfs_create_file("qspl_pv_sleepy_lock_interval_ns", 0600, arch_debugfs_dir, NULL, &fops_pv_sleepy_lock_interval_ns); 989 989 + debugfs_create_file("qspl_pv_sleepy_lock_factor", 0600, arch_debugfs_dir, NULL, &fops_pv_sleepy_lock_factor); 990 990 + debugfs_create_file("qspl_pv_yield_prev", 0600, arch_debugfs_dir, NULL, &fops_pv_yield_prev); 991 991 + debugfs_create_file("qspl_pv_yield_propagate_owner", 0600, arch_debugfs_dir, NULL, &fops_pv_yield_propagate_owner); 992 992 + debugfs_create_file("qspl_pv_prod_head", 0600, arch_debugfs_dir, NULL, &fops_pv_prod_head); 993 993 + } 994 994 + 995 995 + return 0; 996 996 + } 997 997 + device_initcall(spinlock_debugfs_init);

+11 -10

arch/powerpc/lib/sstep.c

reviewed

··· 2284 2284 op->type = MKOP(STCX, 0, 4); 2285 2285 break; 2286 2286 2287 2287 - #ifdef __powerpc64__ 2288 2288 - case 84: /* ldarx */ 2289 2289 - op->type = MKOP(LARX, 0, 8); 2290 2290 - break; 2291 2291 - 2292 2292 - case 214: /* stdcx. */ 2293 2293 - op->type = MKOP(STCX, 0, 8); 2294 2294 - break; 2295 2295 - 2287 2287 + #ifdef CONFIG_PPC_HAS_LBARX_LHARX 2296 2288 case 52: /* lbarx */ 2297 2289 op->type = MKOP(LARX, 0, 1); 2298 2290 break; ··· 2299 2307 2300 2308 case 726: /* sthcx. */ 2301 2309 op->type = MKOP(STCX, 0, 2); 2310 2310 + break; 2311 2311 + #endif 2312 2312 + #ifdef __powerpc64__ 2313 2313 + case 84: /* ldarx */ 2314 2314 + op->type = MKOP(LARX, 0, 8); 2315 2315 + break; 2316 2316 + 2317 2317 + case 214: /* stdcx. */ 2318 2318 + op->type = MKOP(STCX, 0, 8); 2302 2319 break; 2303 2320 2304 2321 case 276: /* lqarx */ ··· 3335 3334 err = 0; 3336 3335 val = 0; 3337 3336 switch (size) { 3338 3338 - #ifdef __powerpc64__ 3337 3337 + #ifdef CONFIG_PPC_HAS_LBARX_LHARX 3339 3338 case 1: 3340 3339 __get_user_asmx(val, ea, err, "lbarx"); 3341 3340 break;

+1 -1

arch/powerpc/lib/test_emulate_step_exec_instr.S

reviewed

··· 16 16 17 17 /* 18 18 * Stack frame layout (INT_FRAME_SIZE bytes) 19 19 - * In-memory pt_regs (SP + STACK_FRAME_OVERHEAD) 19 19 + * In-memory pt_regs (SP + STACK_INT_FRAME_REGS) 20 20 * Scratch space (SP + 8) 21 21 * Back chain (SP + 0) 22 22 */

+5

arch/powerpc/mm/book3s64/hash_4k.c

reviewed

··· 16 16 #include <asm/machdep.h> 17 17 #include <asm/mmu.h> 18 18 19 19 + #include "internal.h" 20 20 + 19 21 int __hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid, 20 22 pte_t *ptep, unsigned long trap, unsigned long flags, 21 23 int ssize, int subpg_prot) ··· 120 118 } 121 119 new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | H_PAGE_HASHPTE; 122 120 new_pte |= pte_set_hidx(ptep, rpte, 0, slot, PTRS_PER_PTE); 121 121 + 122 122 + if (stress_hpt()) 123 123 + hpt_do_stress(ea, hpte_group); 123 124 } 124 125 *ptep = __pte(new_pte & ~H_PAGE_BUSY); 125 126 return 0;

+10

arch/powerpc/mm/book3s64/hash_64k.c

reviewed

··· 16 16 #include <asm/machdep.h> 17 17 #include <asm/mmu.h> 18 18 19 19 + #include "internal.h" 20 20 + 19 21 /* 20 22 * Return true, if the entry has a slot value which 21 23 * the software considers as invalid. ··· 218 216 new_pte |= pte_set_hidx(ptep, rpte, subpg_index, slot, PTRS_PER_PTE); 219 217 new_pte |= H_PAGE_HASHPTE; 220 218 219 219 + if (stress_hpt()) 220 220 + hpt_do_stress(ea, hpte_group); 221 221 + 221 222 *ptep = __pte(new_pte & ~H_PAGE_BUSY); 222 223 return 0; 223 224 } ··· 332 327 333 328 new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | H_PAGE_HASHPTE; 334 329 new_pte |= pte_set_hidx(ptep, rpte, 0, slot, PTRS_PER_PTE); 330 330 + 331 331 + if (stress_hpt()) 332 332 + hpt_do_stress(ea, hpte_group); 335 333 } 334 334 + 336 335 *ptep = __pte(new_pte & ~H_PAGE_BUSY); 336 336 + 337 337 return 0; 338 338 }

+129 -1

arch/powerpc/mm/book3s64/hash_utils.c

reviewed

··· 471 471 return ret; 472 472 } 473 473 474 474 - static bool disable_1tb_segments = false; 474 474 + static bool disable_1tb_segments __ro_after_init; 475 475 476 476 static int __init parse_disable_1tb_segments(char *p) 477 477 { ··· 479 479 return 0; 480 480 } 481 481 early_param("disable_1tb_segments", parse_disable_1tb_segments); 482 482 + 483 483 + bool stress_hpt_enabled __initdata; 484 484 + 485 485 + static int __init parse_stress_hpt(char *p) 486 486 + { 487 487 + stress_hpt_enabled = true; 488 488 + return 0; 489 489 + } 490 490 + early_param("stress_hpt", parse_stress_hpt); 491 491 + 492 492 + __ro_after_init DEFINE_STATIC_KEY_FALSE(stress_hpt_key); 493 493 + 494 494 + /* 495 495 + * per-CPU array allocated if we enable stress_hpt. 496 496 + */ 497 497 + #define STRESS_MAX_GROUPS 16 498 498 + struct stress_hpt_struct { 499 499 + unsigned long last_group[STRESS_MAX_GROUPS]; 500 500 + }; 501 501 + 502 502 + static inline int stress_nr_groups(void) 503 503 + { 504 504 + /* 505 505 + * LPAR H_REMOVE flushes TLB, so need some number > 1 of entries 506 506 + * to allow practical forward progress. Bare metal returns 1, which 507 507 + * seems to help uncover more bugs. 508 508 + */ 509 509 + if (firmware_has_feature(FW_FEATURE_LPAR)) 510 510 + return STRESS_MAX_GROUPS; 511 511 + else 512 512 + return 1; 513 513 + } 514 514 + 515 515 + static struct stress_hpt_struct *stress_hpt_struct; 482 516 483 517 static int __init htab_dt_scan_seg_sizes(unsigned long node, 484 518 const char *uname, int depth, ··· 1010 976 pr_info("Partition table %p\n", partition_tb); 1011 977 } 1012 978 979 979 + void hpt_clear_stress(void); 980 980 + static struct timer_list stress_hpt_timer; 981 981 + void stress_hpt_timer_fn(struct timer_list *timer) 982 982 + { 983 983 + int next_cpu; 984 984 + 985 985 + hpt_clear_stress(); 986 986 + if (!firmware_has_feature(FW_FEATURE_LPAR)) 987 987 + tlbiel_all(); 988 988 + 989 989 + next_cpu = cpumask_next(raw_smp_processor_id(), cpu_online_mask); 990 990 + if (next_cpu >= nr_cpu_ids) 991 991 + next_cpu = cpumask_first(cpu_online_mask); 992 992 + stress_hpt_timer.expires = jiffies + msecs_to_jiffies(10); 993 993 + add_timer_on(&stress_hpt_timer, next_cpu); 994 994 + } 995 995 + 1013 996 static void __init htab_initialize(void) 1014 997 { 1015 998 unsigned long table; ··· 1045 994 1046 995 if (stress_slb_enabled) 1047 996 static_branch_enable(&stress_slb_key); 997 997 + 998 998 + if (stress_hpt_enabled) { 999 999 + unsigned long tmp; 1000 1000 + static_branch_enable(&stress_hpt_key); 1001 1001 + // Too early to use nr_cpu_ids, so use NR_CPUS 1002 1002 + tmp = memblock_phys_alloc_range(sizeof(struct stress_hpt_struct) * NR_CPUS, 1003 1003 + 0, 0, MEMBLOCK_ALLOC_ANYWHERE); 1004 1004 + memset((void *)tmp, 0xff, sizeof(struct stress_hpt_struct) * NR_CPUS); 1005 1005 + stress_hpt_struct = __va(tmp); 1006 1006 + 1007 1007 + timer_setup(&stress_hpt_timer, stress_hpt_timer_fn, 0); 1008 1008 + stress_hpt_timer.expires = jiffies + msecs_to_jiffies(10); 1009 1009 + add_timer(&stress_hpt_timer); 1010 1010 + } 1048 1011 1049 1012 /* 1050 1013 * Calculate the required size of the htab. We want the number of ··· 2043 1978 } 2044 1979 2045 1980 return slot; 1981 1981 + } 1982 1982 + 1983 1983 + void hpt_clear_stress(void) 1984 1984 + { 1985 1985 + int cpu = raw_smp_processor_id(); 1986 1986 + int g; 1987 1987 + 1988 1988 + for (g = 0; g < stress_nr_groups(); g++) { 1989 1989 + unsigned long last_group; 1990 1990 + last_group = stress_hpt_struct[cpu].last_group[g]; 1991 1991 + 1992 1992 + if (last_group != -1UL) { 1993 1993 + int i; 1994 1994 + for (i = 0; i < HPTES_PER_GROUP; i++) { 1995 1995 + if (mmu_hash_ops.hpte_remove(last_group) == -1) 1996 1996 + break; 1997 1997 + } 1998 1998 + stress_hpt_struct[cpu].last_group[g] = -1; 1999 1999 + } 2000 2000 + } 2001 2001 + } 2002 2002 + 2003 2003 + void hpt_do_stress(unsigned long ea, unsigned long hpte_group) 2004 2004 + { 2005 2005 + unsigned long last_group; 2006 2006 + int cpu = raw_smp_processor_id(); 2007 2007 + 2008 2008 + last_group = stress_hpt_struct[cpu].last_group[stress_nr_groups() - 1]; 2009 2009 + if (hpte_group == last_group) 2010 2010 + return; 2011 2011 + 2012 2012 + if (last_group != -1UL) { 2013 2013 + int i; 2014 2014 + /* 2015 2015 + * Concurrent CPUs might be inserting into this group, so 2016 2016 + * give up after a number of iterations, to prevent a live 2017 2017 + * lock. 2018 2018 + */ 2019 2019 + for (i = 0; i < HPTES_PER_GROUP; i++) { 2020 2020 + if (mmu_hash_ops.hpte_remove(last_group) == -1) 2021 2021 + break; 2022 2022 + } 2023 2023 + stress_hpt_struct[cpu].last_group[stress_nr_groups() - 1] = -1; 2024 2024 + } 2025 2025 + 2026 2026 + if (ea >= PAGE_OFFSET) { 2027 2027 + /* 2028 2028 + * We would really like to prefetch to get the TLB loaded, then 2029 2029 + * remove the PTE before returning from fault interrupt, to 2030 2030 + * increase the hash fault rate. 2031 2031 + * 2032 2032 + * Unfortunately QEMU TCG does not model the TLB in a way that 2033 2033 + * makes this possible, and systemsim (mambo) emulator does not 2034 2034 + * bring in TLBs with prefetches (although loads/stores do 2035 2035 + * work for non-CI PTEs). 2036 2036 + * 2037 2037 + * So remember this PTE and clear it on the next hash fault. 2038 2038 + */ 2039 2039 + memmove(&stress_hpt_struct[cpu].last_group[1], 2040 2040 + &stress_hpt_struct[cpu].last_group[0], 2041 2041 + (stress_nr_groups() - 1) * sizeof(unsigned long)); 2042 2042 + stress_hpt_struct[cpu].last_group[0] = hpte_group; 2043 2043 + } 2046 2044 } 2047 2045 2048 2046 #if defined(CONFIG_DEBUG_PAGEALLOC) || defined(CONFIG_KFENCE)

+11

arch/powerpc/mm/book3s64/internal.h

reviewed

··· 13 13 return static_branch_unlikely(&stress_slb_key); 14 14 } 15 15 16 16 + extern bool stress_hpt_enabled; 17 17 + 18 18 + DECLARE_STATIC_KEY_FALSE(stress_hpt_key); 19 19 + 20 20 + static inline bool stress_hpt(void) 21 21 + { 22 22 + return static_branch_unlikely(&stress_hpt_key); 23 23 + } 24 24 + 25 25 + void hpt_do_stress(unsigned long ea, unsigned long hpte_group); 26 26 + 16 27 void slb_setup_new_exec(void); 17 28 18 29 void exit_lazy_flush_tlb(struct mm_struct *mm, bool always_flush);

+2 -2

arch/powerpc/mm/book3s64/pgtable.c

reviewed

··· 100 100 } 101 101 102 102 /* 103 103 - * Serialize against find_current_mm_pte which does lock-less 103 103 + * Serialize against __find_linux_pte() which does lock-less 104 104 * lookup in page tables with local interrupts disabled. For huge pages 105 105 * it casts pmd_t to pte_t. Since format of pte_t is different from 106 106 * pmd_t we want to prevent transit from pmd pointing to page table 107 107 * to pmd pointing to huge page (and back) while interrupts are disabled. 108 108 * We clear pmd to possibly replace it with page table pointer in 109 109 * different code paths. So make sure we wait for the parallel 110 110 - * find_current_mm_pte to finish. 110 110 + * __find_linux_pte() to finish. 111 111 */ 112 112 void serialize_against_pte_lookup(struct mm_struct *mm) 113 113 {

-1

arch/powerpc/mm/mem.c

reviewed

··· 344 344 { 345 345 ppc_md.progress = ppc_printk_progress; 346 346 mark_initmem_nx(); 347 347 - static_branch_enable(&init_mem_is_free); 348 347 free_initmem_default(POISON_FREE_INITMEM); 349 348 ftrace_free_init_tramp(); 350 349 }

-1

arch/powerpc/mm/nohash/kaslr_booke.c

reviewed

··· 19 19 #include <asm/cacheflush.h> 20 20 #include <asm/kdump.h> 21 21 #include <mm/mmu_decl.h> 22 22 - #include <generated/utsrelease.h> 23 22 24 23 struct regions { 25 24 unsigned long pa_start;

+8

arch/powerpc/mm/nohash/tlb.c

reviewed

··· 184 184 mmu_get_tsize(mmu_virtual_psize), 0); 185 185 } 186 186 EXPORT_SYMBOL(local_flush_tlb_page); 187 187 + 188 188 + void local_flush_tlb_page_psize(struct mm_struct *mm, 189 189 + unsigned long vmaddr, int psize) 190 190 + { 191 191 + __local_flush_tlb_page(mm, vmaddr, mmu_get_tsize(psize), 0); 192 192 + } 193 193 + EXPORT_SYMBOL(local_flush_tlb_page_psize); 194 194 + 187 195 #endif 188 196 189 197 /*

+5 -4

arch/powerpc/perf/callchain.c

reviewed

··· 27 27 { 28 28 if (sp & 0xf) 29 29 return 0; /* must be 16-byte aligned */ 30 30 - if (!validate_sp(sp, current, STACK_FRAME_OVERHEAD)) 30 30 + if (!validate_sp(sp, current)) 31 31 return 0; 32 32 if (sp >= prev_sp + STACK_FRAME_MIN_SIZE) 33 33 return 1; ··· 53 53 sp = regs->gpr[1]; 54 54 perf_callchain_store(entry, perf_instruction_pointer(regs)); 55 55 56 56 - if (!validate_sp(sp, current, STACK_FRAME_OVERHEAD)) 56 56 + if (!validate_sp(sp, current)) 57 57 return; 58 58 59 59 for (;;) { ··· 61 61 next_sp = fp[0]; 62 62 63 63 if (next_sp == sp + STACK_INT_FRAME_SIZE && 64 64 - fp[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 64 64 + validate_sp_size(sp, current, STACK_INT_FRAME_SIZE) && 65 65 + fp[STACK_INT_FRAME_MARKER_LONGS] == STACK_FRAME_REGS_MARKER) { 65 66 /* 66 67 * This looks like an interrupt frame for an 67 68 * interrupt that occurred in the kernel 68 69 */ 69 69 - regs = (struct pt_regs *)(sp + STACK_FRAME_OVERHEAD); 70 70 + regs = (struct pt_regs *)(sp + STACK_INT_FRAME_REGS); 70 71 next_ip = regs->nip; 71 72 lr = regs->link; 72 73 level = 0;

+4

arch/powerpc/perf/hv-gpci-requests.h

reviewed

··· 79 79 ) 80 80 #include I(REQUEST_END) 81 81 82 82 + #ifdef ENABLE_EVENTS_COUNTERINFO_V6 82 83 /* 83 84 * Not available for counter_info_version >= 0x8, use 84 85 * run_instruction_cycles_by_partition(0x100) instead. ··· 93 92 __count(0x10, 8, cycles) 94 93 ) 95 94 #include I(REQUEST_END) 95 95 + #endif 96 96 97 97 #define REQUEST_NAME system_performance_capabilities 98 98 #define REQUEST_NUM 0x40 ··· 105 103 ) 106 104 #include I(REQUEST_END) 107 105 106 106 + #ifdef ENABLE_EVENTS_COUNTERINFO_V6 108 107 #define REQUEST_NAME processor_bus_utilization_abc_links 109 108 #define REQUEST_NUM 0x50 110 109 #define REQUEST_IDX_KIND "hw_chip_id=?" ··· 197 194 __count(0x28, 8, instructions_completed) 198 195 ) 199 196 #include I(REQUEST_END) 197 197 + #endif 200 198 201 199 /* Processor_core_power_mode (0x95) skipped, no counters */ 202 200 /* Affinity_domain_information_by_virtual_processor (0xA0) skipped,

+33 -2

arch/powerpc/perf/hv-gpci.c

reviewed

··· 70 70 .attrs = format_attrs, 71 71 }; 72 72 73 73 - static const struct attribute_group event_group = { 73 73 + static struct attribute_group event_group = { 74 74 .name = "events", 75 75 - .attrs = hv_gpci_event_attrs, 75 75 + /* .attrs is set in init */ 76 76 }; 77 77 78 78 #define HV_CAPS_ATTR(_name, _format) \ ··· 330 330 int r; 331 331 unsigned long hret; 332 332 struct hv_perf_caps caps; 333 333 + struct hv_gpci_request_buffer *arg; 333 334 334 335 hv_gpci_assert_offsets_correct(); 335 336 ··· 353 352 354 353 /* sampling not supported */ 355 354 h_gpci_pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT; 355 355 + 356 356 + arg = (void *)get_cpu_var(hv_gpci_reqb); 357 357 + memset(arg, 0, HGPCI_REQ_BUFFER_SIZE); 358 358 + 359 359 + /* 360 360 + * hcall H_GET_PERF_COUNTER_INFO populates the output 361 361 + * counter_info_version value based on the system hypervisor. 362 362 + * Pass the counter request 0x10 corresponds to request type 363 363 + * 'Dispatch_timebase_by_processor', to get the supported 364 364 + * counter_info_version. 365 365 + */ 366 366 + arg->params.counter_request = cpu_to_be32(0x10); 367 367 + 368 368 + r = plpar_hcall_norets(H_GET_PERF_COUNTER_INFO, 369 369 + virt_to_phys(arg), HGPCI_REQ_BUFFER_SIZE); 370 370 + if (r) { 371 371 + pr_devel("hcall failed, can't get supported counter_info_version: 0x%x\n", r); 372 372 + arg->params.counter_info_version_out = 0x8; 373 373 + } 374 374 + 375 375 + /* 376 376 + * Use counter_info_version_out value to assign 377 377 + * required hv-gpci event list. 378 378 + */ 379 379 + if (arg->params.counter_info_version_out >= 0x8) 380 380 + event_group.attrs = hv_gpci_event_attrs; 381 381 + else 382 382 + event_group.attrs = hv_gpci_event_attrs_v6; 383 383 + 384 384 + put_cpu_var(hv_gpci_reqb); 356 385 357 386 r = perf_pmu_register(&h_gpci_pmu, h_gpci_pmu.name, -1); 358 387 if (r)

+1

arch/powerpc/perf/hv-gpci.h

reviewed

··· 26 26 #define REQUEST_FILE "../hv-gpci-requests.h" 27 27 #define NAME_LOWER hv_gpci 28 28 #define NAME_UPPER HV_GPCI 29 29 + #define ENABLE_EVENTS_COUNTERINFO_V6 29 30 #include "req-gen/perf.h" 30 31 #undef REQUEST_FILE 31 32 #undef NAME_LOWER

+20

arch/powerpc/perf/req-gen/perf.h

reviewed

··· 139 139 #define REQUEST_(r_name, r_value, r_idx_1, r_fields) \ 140 140 r_fields 141 141 142 142 + /* Generate event list for platforms with counter_info_version 0x6 or below */ 143 143 + static __maybe_unused struct attribute *hv_gpci_event_attrs_v6[] = { 144 144 + #include REQUEST_FILE 145 145 + NULL 146 146 + }; 147 147 + 148 148 + /* 149 149 + * Based on getPerfCountInfo v1.018 documentation, some of the hv-gpci 150 150 + * events were deprecated for platform firmware that supports 151 151 + * counter_info_version 0x8 or above. 152 152 + * Those deprecated events are still part of platform firmware that 153 153 + * support counter_info_version 0x6 and below. As per the getPerfCountInfo 154 154 + * v1.018 documentation there is no counter_info_version 0x7. 155 155 + * Undefining macro ENABLE_EVENTS_COUNTERINFO_V6, to disable the addition of 156 156 + * deprecated events in "hv_gpci_event_attrs" attribute group, for platforms 157 157 + * that supports counter_info_version 0x8 or above. 158 158 + */ 159 159 + #undef ENABLE_EVENTS_COUNTERINFO_V6 160 160 + 161 161 + /* Generate event list for platforms with counter_info_version 0x8 or above*/ 142 162 static __maybe_unused struct attribute *hv_gpci_event_attrs[] = { 143 163 #include REQUEST_FILE 144 164 NULL

+93 -12

arch/powerpc/platforms/44x/warp.c

reviewed

··· 5 5 * Copyright (c) 2008-2009 PIKA Technologies 6 6 * Sean MacLennan <smaclennan@pikatech.com> 7 7 */ 8 8 + #include <linux/err.h> 8 9 #include <linux/init.h> 9 10 #include <linux/of_platform.h> 10 11 #include <linux/kthread.h> 12 12 + #include <linux/leds.h> 11 13 #include <linux/i2c.h> 12 14 #include <linux/interrupt.h> 13 15 #include <linux/delay.h> 14 16 #include <linux/of_address.h> 15 17 #include <linux/of_irq.h> 16 16 - #include <linux/of_gpio.h> 18 18 + #include <linux/gpio/consumer.h> 17 19 #include <linux/slab.h> 18 20 #include <linux/export.h> 19 21 ··· 94 92 95 93 static LIST_HEAD(dtm_shutdown_list); 96 94 static void __iomem *dtm_fpga; 97 97 - static unsigned green_led, red_led; 98 98 - 99 95 100 96 struct dtm_shutdown { 101 97 struct list_head list; 102 98 void (*func)(void *arg); 103 99 void *arg; 104 100 }; 105 105 - 106 101 107 102 int pika_dtm_register_shutdown(void (*func)(void *arg), void *arg) 108 103 { ··· 131 132 return -EINVAL; 132 133 } 133 134 135 135 + #define WARP_GREEN_LED 0 136 136 + #define WARP_RED_LED 1 137 137 + 138 138 + static struct gpio_led warp_gpio_led_pins[] = { 139 139 + [WARP_GREEN_LED] = { 140 140 + .name = "green", 141 141 + .default_state = LEDS_DEFSTATE_KEEP, 142 142 + .gpiod = NULL, /* to be filled by pika_setup_leds() */ 143 143 + }, 144 144 + [WARP_RED_LED] = { 145 145 + .name = "red", 146 146 + .default_state = LEDS_DEFSTATE_KEEP, 147 147 + .gpiod = NULL, /* to be filled by pika_setup_leds() */ 148 148 + }, 149 149 + }; 150 150 + 151 151 + static struct gpio_led_platform_data warp_gpio_led_data = { 152 152 + .leds = warp_gpio_led_pins, 153 153 + .num_leds = ARRAY_SIZE(warp_gpio_led_pins), 154 154 + }; 155 155 + 156 156 + static struct platform_device warp_gpio_leds = { 157 157 + .name = "leds-gpio", 158 158 + .id = -1, 159 159 + .dev = { 160 160 + .platform_data = &warp_gpio_led_data, 161 161 + }, 162 162 + }; 163 163 + 134 164 static irqreturn_t temp_isr(int irq, void *context) 135 165 { 136 166 struct dtm_shutdown *shutdown; ··· 167 139 168 140 local_irq_disable(); 169 141 170 170 - gpio_set_value(green_led, 0); 142 142 + gpiod_set_value(warp_gpio_led_pins[WARP_GREEN_LED].gpiod, 0); 171 143 172 144 /* Run through the shutdown list. */ 173 145 list_for_each_entry(shutdown, &dtm_shutdown_list, list) ··· 181 153 out_be32(dtm_fpga + 0x14, reset); 182 154 } 183 155 184 184 - gpio_set_value(red_led, value); 156 156 + gpiod_set_value(warp_gpio_led_pins[WARP_RED_LED].gpiod, value); 185 157 value ^= 1; 186 158 mdelay(500); 187 159 } ··· 190 162 return IRQ_HANDLED; 191 163 } 192 164 165 165 + /* 166 166 + * Because green and red power LEDs are normally driven by leds-gpio driver, 167 167 + * but in case of critical temperature shutdown we want to drive them 168 168 + * ourselves, we acquire both and then create leds-gpio platform device 169 169 + * ourselves, instead of doing it through device tree. This way we can still 170 170 + * keep access to the gpios and use them when needed. 171 171 + */ 193 172 static int pika_setup_leds(void) 194 173 { 195 174 struct device_node *np, *child; 175 175 + struct gpio_desc *gpio; 176 176 + struct gpio_led *led; 177 177 + int led_count = 0; 178 178 + int error; 179 179 + int i; 196 180 197 197 - np = of_find_compatible_node(NULL, NULL, "gpio-leds"); 181 181 + np = of_find_compatible_node(NULL, NULL, "warp-power-leds"); 198 182 if (!np) { 199 183 printk(KERN_ERR __FILE__ ": Unable to find leds\n"); 200 184 return -ENOENT; 201 185 } 202 186 203 203 - for_each_child_of_node(np, child) 204 204 - if (of_node_name_eq(child, "green")) 205 205 - green_led = of_get_gpio(child, 0); 206 206 - else if (of_node_name_eq(child, "red")) 207 207 - red_led = of_get_gpio(child, 0); 187 187 + for_each_child_of_node(np, child) { 188 188 + for (i = 0; i < ARRAY_SIZE(warp_gpio_led_pins); i++) { 189 189 + led = &warp_gpio_led_pins[i]; 190 190 + 191 191 + if (!of_node_name_eq(child, led->name)) 192 192 + continue; 193 193 + 194 194 + if (led->gpiod) { 195 195 + printk(KERN_ERR __FILE__ ": %s led has already been defined\n", 196 196 + led->name); 197 197 + continue; 198 198 + } 199 199 + 200 200 + gpio = fwnode_gpiod_get_index(of_fwnode_handle(child), 201 201 + NULL, 0, GPIOD_ASIS, 202 202 + led->name); 203 203 + error = PTR_ERR_OR_ZERO(gpio); 204 204 + if (error) { 205 205 + printk(KERN_ERR __FILE__ ": Failed to get %s led gpio: %d\n", 206 206 + led->name, error); 207 207 + of_node_put(child); 208 208 + goto err_cleanup_pins; 209 209 + } 210 210 + 211 211 + led->gpiod = gpio; 212 212 + led_count++; 213 213 + } 214 214 + } 208 215 209 216 of_node_put(np); 210 217 218 218 + /* Skip device registration if no leds have been defined */ 219 219 + if (led_count) { 220 220 + error = platform_device_register(&warp_gpio_leds); 221 221 + if (error) { 222 222 + printk(KERN_ERR __FILE__ ": Unable to add leds-gpio: %d\n", 223 223 + error); 224 224 + goto err_cleanup_pins; 225 225 + } 226 226 + } 227 227 + 211 228 return 0; 229 229 + 230 230 + err_cleanup_pins: 231 231 + for (i = 0; i < ARRAY_SIZE(warp_gpio_led_pins); i++) { 232 232 + led = &warp_gpio_led_pins[i]; 233 233 + gpiod_put(led->gpiod); 234 234 + led->gpiod = NULL; 235 235 + } 236 236 + return error; 212 237 } 213 238 214 239 static void pika_setup_critical_temp(struct device_node *np,

+11 -4

arch/powerpc/platforms/52xx/lite5200_sleep.S

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 2 + #include <linux/linkage.h> 3 3 + 2 4 #include <asm/reg.h> 3 5 #include <asm/ppc_asm.h> 4 6 #include <asm/processor.h> ··· 180 178 181 179 182 180 /* local udelay in sram is needed */ 183 183 - udelay: /* r11 - tb_ticks_per_usec, r12 - usecs, overwrites r13 */ 181 181 + SYM_FUNC_START_LOCAL(udelay) 182 182 + /* r11 - tb_ticks_per_usec, r12 - usecs, overwrites r13 */ 184 183 mullw r12, r12, r11 185 184 mftb r13 /* start */ 186 185 add r12, r13, r12 /* end */ ··· 190 187 cmp cr0, r13, r12 191 188 blt 1b 192 189 blr 190 190 + SYM_FUNC_END(udelay) 193 191 194 192 sram_code_end: 195 193 ··· 275 271 SAVE_SR(n+2, addr+2); \ 276 272 SAVE_SR(n+3, addr+3); 277 273 278 278 - save_regs: 274 274 + SYM_FUNC_START_LOCAL(save_regs) 279 275 stw r0, 0(r4) 280 276 stw r1, 0x4(r4) 281 277 stw r2, 0x8(r4) ··· 321 317 SAVE_SPRN(TBRU, 0x5b) 322 318 323 319 blr 320 320 + SYM_FUNC_END(save_regs) 324 321 325 322 326 323 /* restore registers */ ··· 341 336 LOAD_SR(n+2, addr+2); \ 342 337 LOAD_SR(n+3, addr+3); 343 338 344 344 - restore_regs: 339 339 + SYM_FUNC_START_LOCAL(restore_regs) 345 340 lis r4, registers@h 346 341 ori r4, r4, registers@l 347 342 ··· 398 393 399 394 blr 400 395 _ASM_NOKPROBE_SYMBOL(restore_regs) 396 396 + SYM_FUNC_END(restore_regs) 401 397 402 398 403 399 ··· 409 403 * Flush data cache 410 404 * Do this by just reading lots of stuff into the cache. 411 405 */ 412 412 - flush_data_cache: 406 406 + SYM_FUNC_START_LOCAL(flush_data_cache) 413 407 lis r3,CONFIG_KERNEL_START@h 414 408 ori r3,r3,CONFIG_KERNEL_START@l 415 409 li r4,NUM_CACHE_LINES ··· 419 413 addi r3,r3,L1_CACHE_BYTES /* Next line, please */ 420 414 bdnz 1b 421 415 blr 416 416 + SYM_FUNC_END(flush_data_cache)

+14 -1

arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c

reviewed

··· 59 59 60 60 /** 61 61 * mpc52xx_lpbfifo_kick - Trigger the next block of data to be transferred 62 62 + * 63 63 + * @req: Pointer to request structure 62 64 */ 63 65 static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo_request *req) 64 66 { ··· 180 178 181 179 /** 182 180 * mpc52xx_lpbfifo_irq - IRQ handler for LPB FIFO 181 181 + * @irq: IRQ number to be handled 182 182 + * @dev_id: device ID cookie 183 183 * 184 184 * On transmit, the dma completion irq triggers before the fifo completion 185 185 * triggers. Handle the dma completion here instead of the LPB FIFO Bestcomm ··· 220 216 * or nested spinlock condition. The out path is non-trivial, so 221 217 * extra fiddling is done to make sure all paths lead to the same 222 218 * outbound code. 219 219 + * 220 220 + * Return: irqreturn code (%IRQ_HANDLED) 223 221 */ 224 222 static irqreturn_t mpc52xx_lpbfifo_irq(int irq, void *dev_id) 225 223 { ··· 326 320 327 321 /** 328 322 * mpc52xx_lpbfifo_bcom_irq - IRQ handler for LPB FIFO Bestcomm task 323 323 + * @irq: IRQ number to be handled 324 324 + * @dev_id: device ID cookie 329 325 * 330 326 * Only used when receiving data. 327 327 + * 328 328 + * Return: irqreturn code (%IRQ_HANDLED) 331 329 */ 332 330 static irqreturn_t mpc52xx_lpbfifo_bcom_irq(int irq, void *dev_id) 333 331 { ··· 382 372 } 383 373 384 374 /** 385 385 - * mpc52xx_lpbfifo_bcom_poll - Poll for DMA completion 375 375 + * mpc52xx_lpbfifo_poll - Poll for DMA completion 386 376 */ 387 377 void mpc52xx_lpbfifo_poll(void) 388 378 { ··· 403 393 /** 404 394 * mpc52xx_lpbfifo_submit - Submit an LPB FIFO transfer request. 405 395 * @req: Pointer to request structure 396 396 + * 397 397 + * Return: %0 on success, -errno code on error 406 398 */ 407 399 int mpc52xx_lpbfifo_submit(struct mpc52xx_lpbfifo_request *req) 408 400 { ··· 543 531 err_bcom_rx_irq: 544 532 bcom_gen_bd_rx_release(lpbfifo.bcom_rx_task); 545 533 err_bcom_rx: 534 534 + free_irq(lpbfifo.irq, &lpbfifo); 546 535 err_irq: 547 536 iounmap(lpbfifo.regs); 548 537 lpbfifo.regs = NULL;

+1 -1

arch/powerpc/platforms/83xx/mpc832x_rdb.c

reviewed

··· 107 107 108 108 goto next; 109 109 unreg: 110 110 - platform_device_del(pdev); 110 110 + platform_device_put(pdev); 111 111 err: 112 112 pr_err("%pOF: registration failed\n", np); 113 113 next:

+53 -79

arch/powerpc/platforms/85xx/sgy_cts1000.c

reviewed

··· 7 7 * Copyright 2012 by Servergy, Inc. 8 8 */ 9 9 10 10 + #define pr_fmt(fmt) "gpio-halt: " fmt 11 11 + 12 12 + #include <linux/err.h> 10 13 #include <linux/platform_device.h> 11 14 #include <linux/device.h> 15 15 + #include <linux/gpio/consumer.h> 12 16 #include <linux/module.h> 13 13 - #include <linux/of_gpio.h> 14 17 #include <linux/of_irq.h> 15 18 #include <linux/workqueue.h> 16 19 #include <linux/reboot.h> ··· 21 18 22 19 #include <asm/machdep.h> 23 20 24 24 - static struct device_node *halt_node; 21 21 + static struct gpio_desc *halt_gpio; 22 22 + static int halt_irq; 25 23 26 24 static const struct of_device_id child_match[] = { 27 25 { ··· 40 36 41 37 static void __noreturn gpio_halt_cb(void) 42 38 { 43 43 - enum of_gpio_flags flags; 44 44 - int trigger, gpio; 45 45 - 46 46 - if (!halt_node) 47 47 - panic("No reset GPIO information was provided in DT\n"); 48 48 - 49 49 - gpio = of_get_gpio_flags(halt_node, 0, &flags); 50 50 - 51 51 - if (!gpio_is_valid(gpio)) 52 52 - panic("Provided GPIO is invalid\n"); 53 53 - 54 54 - trigger = (flags == OF_GPIO_ACTIVE_LOW); 55 55 - 56 56 - printk(KERN_INFO "gpio-halt: triggering GPIO.\n"); 39 39 + pr_info("triggering GPIO.\n"); 57 40 58 41 /* Probably wont return */ 59 59 - gpio_set_value(gpio, trigger); 42 42 + gpiod_set_value(halt_gpio, 1); 60 43 61 44 panic("Halt failed\n"); 62 45 } ··· 52 61 * to handle the shutdown/poweroff. */ 53 62 static irqreturn_t gpio_halt_irq(int irq, void *__data) 54 63 { 55 55 - printk(KERN_INFO "gpio-halt: shutdown due to power button IRQ.\n"); 64 64 + struct platform_device *pdev = __data; 65 65 + 66 66 + dev_info(&pdev->dev, "scheduling shutdown due to power button IRQ\n"); 56 67 schedule_work(&gpio_halt_wq); 57 68 58 69 return IRQ_HANDLED; 59 70 }; 60 71 61 61 - static int gpio_halt_probe(struct platform_device *pdev) 72 72 + static int __gpio_halt_probe(struct platform_device *pdev, 73 73 + struct device_node *halt_node) 62 74 { 63 63 - enum of_gpio_flags flags; 64 64 - struct device_node *node = pdev->dev.of_node; 65 65 - struct device_node *child_node; 66 66 - int gpio, err, irq; 67 67 - int trigger; 75 75 + int err; 68 76 69 69 - if (!node) 70 70 - return -ENODEV; 71 71 - 72 72 - /* If there's no matching child, this isn't really an error */ 73 73 - child_node = of_find_matching_node(node, child_match); 74 74 - if (!child_node) 75 75 - return 0; 76 76 - 77 77 - /* Technically we could just read the first one, but punish 78 78 - * DT writers for invalid form. */ 79 79 - if (of_gpio_count(child_node) != 1) { 80 80 - err = -EINVAL; 81 81 - goto err_put; 82 82 - } 83 83 - 84 84 - /* Get the gpio number relative to the dynamic base. */ 85 85 - gpio = of_get_gpio_flags(child_node, 0, &flags); 86 86 - if (!gpio_is_valid(gpio)) { 87 87 - err = -EINVAL; 88 88 - goto err_put; 89 89 - } 90 90 - 91 91 - err = gpio_request(gpio, "gpio-halt"); 77 77 + halt_gpio = fwnode_gpiod_get_index(of_fwnode_handle(halt_node), 78 78 + NULL, 0, GPIOD_OUT_LOW, "gpio-halt"); 79 79 + err = PTR_ERR_OR_ZERO(halt_gpio); 92 80 if (err) { 93 93 - printk(KERN_ERR "gpio-halt: error requesting GPIO %d.\n", 94 94 - gpio); 95 95 - goto err_put; 81 81 + dev_err(&pdev->dev, "failed to request halt GPIO: %d\n", err); 82 82 + return err; 96 83 } 97 97 - 98 98 - trigger = (flags == OF_GPIO_ACTIVE_LOW); 99 99 - 100 100 - gpio_direction_output(gpio, !trigger); 101 84 102 85 /* Now get the IRQ which tells us when the power button is hit */ 103 103 - irq = irq_of_parse_and_map(child_node, 0); 104 104 - err = request_irq(irq, gpio_halt_irq, IRQF_TRIGGER_RISING | 105 105 - IRQF_TRIGGER_FALLING, "gpio-halt", child_node); 86 86 + halt_irq = irq_of_parse_and_map(halt_node, 0); 87 87 + err = request_irq(halt_irq, gpio_halt_irq, 88 88 + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 89 89 + "gpio-halt", pdev); 106 90 if (err) { 107 107 - printk(KERN_ERR "gpio-halt: error requesting IRQ %d for " 108 108 - "GPIO %d.\n", irq, gpio); 109 109 - gpio_free(gpio); 110 110 - goto err_put; 91 91 + dev_err(&pdev->dev, "failed to request IRQ %d: %d\n", 92 92 + halt_irq, err); 93 93 + gpiod_put(halt_gpio); 94 94 + halt_gpio = NULL; 95 95 + return err; 111 96 } 112 97 113 98 /* Register our halt function */ 114 99 ppc_md.halt = gpio_halt_cb; 115 100 pm_power_off = gpio_halt_cb; 116 101 117 117 - printk(KERN_INFO "gpio-halt: registered GPIO %d (%d trigger, %d" 118 118 - " irq).\n", gpio, trigger, irq); 102 102 + dev_info(&pdev->dev, "registered halt GPIO, irq: %d\n", halt_irq); 119 103 120 120 - halt_node = child_node; 121 104 return 0; 105 105 + } 122 106 123 123 - err_put: 124 124 - of_node_put(child_node); 125 125 - return err; 107 107 + static int gpio_halt_probe(struct platform_device *pdev) 108 108 + { 109 109 + struct device_node *halt_node; 110 110 + int ret; 111 111 + 112 112 + if (!pdev->dev.of_node) 113 113 + return -ENODEV; 114 114 + 115 115 + /* If there's no matching child, this isn't really an error */ 116 116 + halt_node = of_find_matching_node(pdev->dev.of_node, child_match); 117 117 + if (!halt_node) 118 118 + return -ENODEV; 119 119 + 120 120 + ret = __gpio_halt_probe(pdev, halt_node); 121 121 + of_node_put(halt_node); 122 122 + 123 123 + return ret; 126 124 } 127 125 128 126 static int gpio_halt_remove(struct platform_device *pdev) 129 127 { 130 130 - if (halt_node) { 131 131 - int gpio = of_get_gpio(halt_node, 0); 132 132 - int irq = irq_of_parse_and_map(halt_node, 0); 128 128 + free_irq(halt_irq, pdev); 129 129 + cancel_work_sync(&gpio_halt_wq); 133 130 134 134 - free_irq(irq, halt_node); 131 131 + ppc_md.halt = NULL; 132 132 + pm_power_off = NULL; 135 133 136 136 - ppc_md.halt = NULL; 137 137 - pm_power_off = NULL; 138 138 - 139 139 - gpio_free(gpio); 140 140 - 141 141 - of_node_put(halt_node); 142 142 - halt_node = NULL; 143 143 - } 134 134 + gpiod_put(halt_gpio); 135 135 + halt_gpio = NULL; 144 136 145 137 return 0; 146 138 }

+7 -2

arch/powerpc/platforms/Kconfig.cputype

reviewed

··· 135 135 depends on PPC_BOOK3S_64 && CPU_LITTLE_ENDIAN 136 136 select ARCH_HAS_FAST_MULTIPLIER 137 137 select PPC_64S_HASH_MMU 138 138 + select PPC_HAS_LBARX_LHARX 138 139 139 140 config POWERPC_CPU 140 141 bool "Generic 32 bits powerpc" ··· 161 160 depends on PPC_BOOK3S_64 162 161 select ARCH_HAS_FAST_MULTIPLIER 163 162 select PPC_64S_HASH_MMU 163 163 + select PPC_HAS_LBARX_LHARX 164 164 165 165 config POWER8_CPU 166 166 bool "POWER8" 167 167 depends on PPC_BOOK3S_64 168 168 select ARCH_HAS_FAST_MULTIPLIER 169 169 select PPC_64S_HASH_MMU 170 170 + select PPC_HAS_LBARX_LHARX 170 171 171 172 config POWER9_CPU 172 173 bool "POWER9" 173 174 depends on PPC_BOOK3S_64 174 175 select ARCH_HAS_FAST_MULTIPLIER 176 176 + select PPC_HAS_LBARX_LHARX 175 177 176 178 config POWER10_CPU 177 179 bool "POWER10" ··· 188 184 config E6500_CPU 189 185 bool "Freescale e6500" 190 186 depends on PPC64 && PPC_E500 187 187 + select PPC_HAS_LBARX_LHARX 191 188 192 189 config 405_CPU 193 190 bool "40x family" ··· 580 575 endchoice 581 576 582 577 config PPC64_ELF_ABI_V1 583 583 - def_bool PPC64 && CPU_BIG_ENDIAN 578 578 + def_bool PPC64 && (CPU_BIG_ENDIAN && !PPC64_BIG_ENDIAN_ELF_ABI_V2) 584 579 585 580 config PPC64_ELF_ABI_V2 586 586 - def_bool PPC64 && CPU_LITTLE_ENDIAN 581 581 + def_bool PPC64 && !PPC64_ELF_ABI_V1 587 582 588 583 config PPC64_BOOT_WRAPPER 589 584 def_bool n

+2 -2

arch/powerpc/platforms/pasemi/gpio_mdio.c

reviewed

··· 294 294 }, 295 295 }; 296 296 297 297 - static int gpio_mdio_init(void) 297 297 + static int __init gpio_mdio_init(void) 298 298 { 299 299 struct device_node *np; 300 300 ··· 314 314 } 315 315 module_init(gpio_mdio_init); 316 316 317 317 - static void gpio_mdio_exit(void) 317 317 + static void __exit gpio_mdio_exit(void) 318 318 { 319 319 platform_driver_unregister(&gpio_mdio_driver); 320 320 if (gpio_regs)

+5 -13

arch/powerpc/platforms/powermac/setup.c

reviewed

··· 70 70 71 71 #undef SHOW_GATWICK_IRQS 72 72 73 73 - int ppc_override_l2cr = 0; 74 74 - int ppc_override_l2cr_value; 75 75 - int has_l2cache = 0; 73 73 + static int has_l2cache; 76 74 77 75 int pmac_newworld; 78 76 ··· 234 236 const unsigned int *l2cr = 235 237 of_get_property(np, "l2cr-value", NULL); 236 238 if (l2cr) { 237 237 - ppc_override_l2cr = 1; 238 238 - ppc_override_l2cr_value = *l2cr; 239 239 _set_L2CR(0); 240 240 - _set_L2CR(ppc_override_l2cr_value); 240 240 + _set_L2CR(*l2cr); 241 241 + pr_info("L2CR overridden (0x%x), backside cache is %s\n", 242 242 + *l2cr, ((*l2cr) & 0x80000000) ? 243 243 + "enabled" : "disabled"); 241 244 } 242 245 of_node_put(np); 243 246 break; 244 247 } 245 248 } 246 246 - 247 247 - if (ppc_override_l2cr) 248 248 - printk(KERN_INFO "L2CR overridden (0x%x), " 249 249 - "backside cache is %s\n", 250 250 - ppc_override_l2cr_value, 251 251 - (ppc_override_l2cr_value & 0x80000000) 252 252 - ? "enabled" : "disabled"); 253 249 } 254 250 #endif 255 251

+1 -1

arch/powerpc/platforms/ps3/system-bus.c

reviewed

··· 466 466 }; 467 467 ATTRIBUTE_GROUPS(ps3_system_bus_dev); 468 468 469 469 - struct bus_type ps3_system_bus_type = { 469 469 + static struct bus_type ps3_system_bus_type = { 470 470 .name = "ps3_system_bus", 471 471 .match = ps3_system_bus_match, 472 472 .uevent = ps3_system_bus_uevent,

+3 -12

arch/powerpc/platforms/pseries/eeh_pseries.c

reviewed

··· 154 154 /** 155 155 * pseries_eeh_phb_reset - Reset the specified PHB 156 156 * @phb: PCI controller 157 157 - * @config_adddr: the associated config address 157 157 + * @config_addr: the associated config address 158 158 * @option: reset option 159 159 * 160 160 * Reset the specified PHB/PE ··· 188 188 /** 189 189 * pseries_eeh_phb_configure_bridge - Configure PCI bridges in the indicated PE 190 190 * @phb: PCI controller 191 191 - * @config_adddr: the associated config address 191 191 + * @config_addr: the associated config address 192 192 * 193 193 * The function will be called to reconfigure the bridges included 194 194 * in the specified PE so that the mulfunctional PE would be recovered ··· 848 848 } 849 849 850 850 /* Initialize error log size */ 851 851 - eeh_error_buf_size = rtas_token("rtas-error-log-max"); 852 852 - if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) { 853 853 - pr_info("%s: unknown EEH error log size\n", 854 854 - __func__); 855 855 - eeh_error_buf_size = 1024; 856 856 - } else if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) { 857 857 - pr_info("%s: EEH error log size %d exceeds the maximal %d\n", 858 858 - __func__, eeh_error_buf_size, RTAS_ERROR_LOG_MAX); 859 859 - eeh_error_buf_size = RTAS_ERROR_LOG_MAX; 860 860 - } 851 851 + eeh_error_buf_size = rtas_get_error_log_max(); 861 852 862 853 /* Set EEH probe mode */ 863 854 eeh_add_flag(EEH_PROBE_MODE_DEVTREE | EEH_ENABLE_IO_FOR_LOG);

+1

arch/powerpc/platforms/pseries/hotplug-cpu.c

reviewed

··· 70 70 xics_teardown_cpu(); 71 71 72 72 unregister_slb_shadow(hwcpu); 73 73 + unregister_vpa(hwcpu); 73 74 rtas_stop_self(); 74 75 75 76 /* Should never get here... */

+20 -18

arch/powerpc/platforms/pseries/hvCall.S

reviewed

··· 27 27 28 28 /* 29 29 * precall must preserve all registers. use unused STK_PARAM() 30 30 - * areas to save snapshots and opcode. 30 30 + * areas to save snapshots and opcode. STK_PARAM() in the caller's 31 31 + * frame will be available even on ELFv2 because these are all 32 32 + * variadic functions. 31 33 */ 32 34 #define HCALL_INST_PRECALL(FIRST_REG) \ 33 35 mflr r0; \ ··· 43 41 std r10,STK_PARAM(R10)(r1); \ 44 42 std r0,16(r1); \ 45 43 addi r4,r1,STK_PARAM(FIRST_REG); \ 46 46 - stdu r1,-STACK_FRAME_OVERHEAD(r1); \ 44 44 + stdu r1,-STACK_FRAME_MIN_SIZE(r1); \ 47 45 bl __trace_hcall_entry; \ 48 48 - ld r3,STACK_FRAME_OVERHEAD+STK_PARAM(R3)(r1); \ 49 49 - ld r4,STACK_FRAME_OVERHEAD+STK_PARAM(R4)(r1); \ 50 50 - ld r5,STACK_FRAME_OVERHEAD+STK_PARAM(R5)(r1); \ 51 51 - ld r6,STACK_FRAME_OVERHEAD+STK_PARAM(R6)(r1); \ 52 52 - ld r7,STACK_FRAME_OVERHEAD+STK_PARAM(R7)(r1); \ 53 53 - ld r8,STACK_FRAME_OVERHEAD+STK_PARAM(R8)(r1); \ 54 54 - ld r9,STACK_FRAME_OVERHEAD+STK_PARAM(R9)(r1); \ 55 55 - ld r10,STACK_FRAME_OVERHEAD+STK_PARAM(R10)(r1) 46 46 + ld r3,STACK_FRAME_MIN_SIZE+STK_PARAM(R3)(r1); \ 47 47 + ld r4,STACK_FRAME_MIN_SIZE+STK_PARAM(R4)(r1); \ 48 48 + ld r5,STACK_FRAME_MIN_SIZE+STK_PARAM(R5)(r1); \ 49 49 + ld r6,STACK_FRAME_MIN_SIZE+STK_PARAM(R6)(r1); \ 50 50 + ld r7,STACK_FRAME_MIN_SIZE+STK_PARAM(R7)(r1); \ 51 51 + ld r8,STACK_FRAME_MIN_SIZE+STK_PARAM(R8)(r1); \ 52 52 + ld r9,STACK_FRAME_MIN_SIZE+STK_PARAM(R9)(r1); \ 53 53 + ld r10,STACK_FRAME_MIN_SIZE+STK_PARAM(R10)(r1) 56 54 57 55 /* 58 56 * postcall is performed immediately before function return which 59 57 * allows liberal use of volatile registers. 60 58 */ 61 59 #define __HCALL_INST_POSTCALL \ 62 62 - ld r0,STACK_FRAME_OVERHEAD+STK_PARAM(R3)(r1); \ 63 63 - std r3,STACK_FRAME_OVERHEAD+STK_PARAM(R3)(r1); \ 60 60 + ld r0,STACK_FRAME_MIN_SIZE+STK_PARAM(R3)(r1); \ 61 61 + std r3,STACK_FRAME_MIN_SIZE+STK_PARAM(R3)(r1); \ 64 62 mr r4,r3; \ 65 63 mr r3,r0; \ 66 64 bl __trace_hcall_exit; \ 67 67 - ld r0,STACK_FRAME_OVERHEAD+16(r1); \ 68 68 - addi r1,r1,STACK_FRAME_OVERHEAD; \ 65 65 + ld r0,STACK_FRAME_MIN_SIZE+16(r1); \ 66 66 + addi r1,r1,STACK_FRAME_MIN_SIZE; \ 69 67 ld r3,STK_PARAM(R3)(r1); \ 70 68 mtlr r0 71 69 ··· 305 303 mr r7,r8 306 304 mr r8,r9 307 305 mr r9,r10 308 308 - ld r10,STACK_FRAME_OVERHEAD+STK_PARAM(R11)(r1) 309 309 - ld r11,STACK_FRAME_OVERHEAD+STK_PARAM(R12)(r1) 310 310 - ld r12,STACK_FRAME_OVERHEAD+STK_PARAM(R13)(r1) 306 306 + ld r10,STACK_FRAME_MIN_SIZE+STK_PARAM(R11)(r1) 307 307 + ld r11,STACK_FRAME_MIN_SIZE+STK_PARAM(R12)(r1) 308 308 + ld r12,STACK_FRAME_MIN_SIZE+STK_PARAM(R13)(r1) 311 309 312 310 HVSC 313 311 314 312 mr r0,r12 315 315 - ld r12,STACK_FRAME_OVERHEAD+STK_PARAM(R4)(r1) 313 313 + ld r12,STACK_FRAME_MIN_SIZE+STK_PARAM(R4)(r1) 316 314 std r4,0(r12) 317 315 std r5,8(r12) 318 316 std r6,16(r12)

+1 -1

arch/powerpc/platforms/pseries/iommu.c

reviewed

··· 248 248 * Set up the page with TCE data, looping through and setting 249 249 * the values. 250 250 */ 251 251 - limit = min_t(long, npages, 4096/TCE_ENTRY_SIZE); 251 251 + limit = min_t(long, npages, 4096 / TCE_ENTRY_SIZE); 252 252 253 253 for (l = 0; l < limit; l++) { 254 254 tcep[l] = cpu_to_be64(proto_tce | rpn << tceshift);

+5 -2

arch/powerpc/platforms/pseries/mobility.c

reviewed

··· 635 635 prod_others(); 636 636 } 637 637 /* 638 638 - * Execution may have been suspended for several seconds, so 639 639 - * reset the watchdog. 638 638 + * Execution may have been suspended for several seconds, so reset 639 639 + * the watchdogs. touch_nmi_watchdog() also touches the soft lockup 640 640 + * watchdog. 640 641 */ 642 642 + rcu_cpu_stall_reset(); 641 643 touch_nmi_watchdog(); 644 644 + 642 645 return ret; 643 646 } 644 647

+22 -28

arch/powerpc/platforms/pseries/plpks.c

reviewed

··· 75 75 case H_FUNCTION: 76 76 err = -ENXIO; 77 77 break; 78 78 - case H_P1: 78 78 + case H_PARAMETER: 79 79 case H_P2: 80 80 case H_P3: 81 81 case H_P4: ··· 111 111 err = -EEXIST; 112 112 break; 113 113 case H_ABORTED: 114 114 - err = -EINTR; 114 114 + err = -EIO; 115 115 break; 116 116 default: 117 117 err = -EINVAL; ··· 162 162 if (consumer > PKS_OS_OWNER) 163 163 return ERR_PTR(-EINVAL); 164 164 165 165 - auth = kmalloc(struct_size(auth, password, maxpwsize), GFP_KERNEL); 165 165 + auth = kzalloc(struct_size(auth, password, maxpwsize), GFP_KERNEL); 166 166 if (!auth) 167 167 return ERR_PTR(-ENOMEM); 168 168 169 169 auth->version = 1; 170 170 auth->consumer = consumer; 171 171 - auth->rsvd0 = 0; 172 172 - auth->rsvd1 = 0; 173 171 174 174 - if (consumer == PKS_FW_OWNER || consumer == PKS_BOOTLOADER_OWNER) { 175 175 - auth->passwordlength = 0; 172 172 + if (consumer == PKS_FW_OWNER || consumer == PKS_BOOTLOADER_OWNER) 176 173 return auth; 177 177 - } 178 174 179 175 memcpy(auth->password, ospassword, ospasswordlength); 180 176 ··· 308 312 if (!rc) 309 313 rc = plpks_confirm_object_flushed(label, auth); 310 314 311 311 - if (rc) 312 312 - pr_err("Failed to write variable %s for component %s with error %d\n", 313 313 - var.name, var.component, rc); 314 314 - 315 315 rc = pseries_status_to_err(rc); 316 316 kfree(label); 317 317 out: ··· 342 350 if (!rc) 343 351 rc = plpks_confirm_object_flushed(label, auth); 344 352 345 345 - if (rc) 346 346 - pr_err("Failed to remove variable %s for component %s with error %d\n", 347 347 - vname.name, component, rc); 348 348 - 349 353 rc = pseries_status_to_err(rc); 350 354 kfree(label); 351 355 out: ··· 354 366 { 355 367 unsigned long retbuf[PLPAR_HCALL_BUFSIZE] = { 0 }; 356 368 struct plpks_auth *auth; 357 357 - struct label *label; 369 369 + struct label *label = NULL; 358 370 u8 *output; 359 371 int rc; 360 372 361 373 if (var->namelen > MAX_NAME_SIZE) 362 374 return -EINVAL; 363 375 364 364 - auth = construct_auth(PKS_OS_OWNER); 376 376 + auth = construct_auth(consumer); 365 377 if (IS_ERR(auth)) 366 378 return PTR_ERR(auth); 367 379 368 368 - label = construct_label(var->component, var->os, var->name, 369 369 - var->namelen); 370 370 - if (IS_ERR(label)) { 371 371 - rc = PTR_ERR(label); 372 372 - goto out_free_auth; 380 380 + if (consumer == PKS_OS_OWNER) { 381 381 + label = construct_label(var->component, var->os, var->name, 382 382 + var->namelen); 383 383 + if (IS_ERR(label)) { 384 384 + rc = PTR_ERR(label); 385 385 + goto out_free_auth; 386 386 + } 373 387 } 374 388 375 389 output = kzalloc(maxobjsize, GFP_KERNEL); ··· 380 390 goto out_free_label; 381 391 } 382 392 383 383 - rc = plpar_hcall(H_PKS_READ_OBJECT, retbuf, virt_to_phys(auth), 384 384 - virt_to_phys(label), label->size, virt_to_phys(output), 385 385 - maxobjsize); 393 393 + if (consumer == PKS_OS_OWNER) 394 394 + rc = plpar_hcall(H_PKS_READ_OBJECT, retbuf, virt_to_phys(auth), 395 395 + virt_to_phys(label), label->size, virt_to_phys(output), 396 396 + maxobjsize); 397 397 + else 398 398 + rc = plpar_hcall(H_PKS_READ_OBJECT, retbuf, virt_to_phys(auth), 399 399 + virt_to_phys(var->name), var->namelen, virt_to_phys(output), 400 400 + maxobjsize); 401 401 + 386 402 387 403 if (rc != H_SUCCESS) { 388 388 - pr_err("Failed to read variable %s for component %s with error %d\n", 389 389 - var->name, var->component, rc); 390 404 rc = pseries_status_to_err(rc); 391 405 goto out_free_output; 392 406 }

+1 -1

arch/powerpc/platforms/pseries/plpks.h

reviewed

··· 17 17 #define WORLDREADABLE 0x08000000 18 18 #define SIGNEDUPDATE 0x01000000 19 19 20 20 - #define PLPKS_VAR_LINUX 0x01 20 20 + #define PLPKS_VAR_LINUX 0x02 21 21 #define PLPKS_VAR_COMMON 0x04 22 22 23 23 struct plpks_var {

+13

arch/powerpc/sysdev/fsl_pci.c

reviewed

··· 1139 1139 } 1140 1140 1141 1141 /* 1142 1142 + * If there's no PCI host bridge with ISA then check for 1143 1143 + * PCI host bridge with alias "pci0" (first PCI host bridge). 1144 1144 + */ 1145 1145 + np = of_find_node_by_path("pci0"); 1146 1146 + if (np && of_match_node(pci_ids, np) && of_device_is_available(np)) { 1147 1147 + fsl_pci_primary = np; 1148 1148 + of_node_put(np); 1149 1149 + return; 1150 1150 + } 1151 1151 + if (np) 1152 1152 + of_node_put(np); 1153 1153 + 1154 1154 + /* 1142 1155 * If there's no PCI host bridge with ISA, arbitrarily 1143 1156 * designate one as primary. This can go away once 1144 1157 * various bugs with primary-less systems are fixed.

+2 -2

arch/powerpc/sysdev/mpic_msgr.c

reviewed

··· 20 20 21 21 #define MPIC_MSGR_REGISTERS_PER_BLOCK 4 22 22 #define MPIC_MSGR_STRIDE 0x10 23 23 - #define MPIC_MSGR_MER_OFFSET 0x100 23 23 + #define MPIC_MSGR_MER_OFFSET (0x100 / sizeof(u32)) 24 24 #define MSGR_INUSE 0 25 25 #define MSGR_FREE 1 26 26 ··· 234 234 235 235 reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i; 236 236 msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE; 237 237 - msgr->mer = (u32 *)((u8 *)msgr->base + MPIC_MSGR_MER_OFFSET); 237 237 + msgr->mer = msgr->base + MPIC_MSGR_MER_OFFSET; 238 238 msgr->in_use = MSGR_FREE; 239 239 msgr->num = i; 240 240 raw_spin_lock_init(&msgr->lock);

+3 -3

arch/powerpc/sysdev/xive/native.c

reviewed

··· 535 535 static void __init xive_native_setup_pools(void) 536 536 { 537 537 /* Allocate a pool big enough */ 538 538 - pr_debug("XIVE: Allocating VP block for pool size %u\n", nr_cpu_ids); 538 538 + pr_debug("Allocating VP block for pool size %u\n", nr_cpu_ids); 539 539 540 540 xive_pool_vps = xive_native_alloc_vp_block(nr_cpu_ids); 541 541 if (WARN_ON(xive_pool_vps == XIVE_INVALID_VP)) 542 542 - pr_err("XIVE: Failed to allocate pool VP, KVM might not function\n"); 542 542 + pr_err("Failed to allocate pool VP, KVM might not function\n"); 543 543 544 544 - pr_debug("XIVE: Pool VPs allocated at 0x%x for %u max CPUs\n", 544 544 + pr_debug("Pool VPs allocated at 0x%x for %u max CPUs\n", 545 545 xive_pool_vps, nr_cpu_ids); 546 546 } 547 547

+1

arch/powerpc/sysdev/xive/spapr.c

reviewed

··· 439 439 440 440 data->trig_mmio = ioremap(data->trig_page, 1u << data->esb_shift); 441 441 if (!data->trig_mmio) { 442 442 + iounmap(data->eoi_mmio); 442 443 pr_err("Failed to map trigger page for irq 0x%x\n", hw_irq); 443 444 return -ENOMEM; 444 445 }

+8 -9

arch/powerpc/xmon/xmon.c

reviewed

··· 1525 1525 cmd = inchar(); 1526 1526 1527 1527 switch (cmd) { 1528 1528 - static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n"; 1529 1529 - int mode; 1530 1530 - case 'd': /* bd - hardware data breakpoint */ 1528 1528 + case 'd': { /* bd - hardware data breakpoint */ 1529 1529 + static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n"; 1530 1530 + int mode; 1531 1531 if (xmon_is_ro) { 1532 1532 printf(xmon_ro_msg); 1533 1533 break; ··· 1560 1560 1561 1561 force_enable_xmon(); 1562 1562 break; 1563 1563 + } 1563 1564 1564 1565 case 'i': /* bi - hardware instr breakpoint */ 1565 1566 if (xmon_is_ro) { ··· 1721 1720 } 1722 1721 1723 1722 #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long)) 1724 1724 - #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long)) 1725 1723 1726 1724 static void xmon_show_stack(unsigned long sp, unsigned long lr, 1727 1725 unsigned long pc) ··· 1781 1781 xmon_print_symbol(ip, " ", "\n"); 1782 1782 } 1783 1783 1784 1784 - /* Look for "regshere" marker to see if this is 1784 1784 + /* Look for "regs" marker to see if this is 1785 1785 an exception frame. */ 1786 1786 - if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long)) 1786 1786 + if (mread(sp + STACK_INT_FRAME_MARKER, &marker, sizeof(unsigned long)) 1787 1787 && marker == STACK_FRAME_REGS_MARKER) { 1788 1788 - if (mread(sp + STACK_FRAME_OVERHEAD, &regs, sizeof(regs)) 1789 1789 - != sizeof(regs)) { 1788 1788 + if (mread(sp + STACK_INT_FRAME_REGS, &regs, sizeof(regs)) != sizeof(regs)) { 1790 1789 printf("Couldn't read registers at %lx\n", 1791 1791 - sp + STACK_FRAME_OVERHEAD); 1790 1790 + sp + STACK_INT_FRAME_REGS); 1792 1791 break; 1793 1792 } 1794 1793 printf("--- Exception: %lx %s at ", regs.trap,

+1

arch/x86/Kconfig

reviewed

··· 197 197 select HAVE_CONTEXT_TRACKING_USER_OFFSTACK if HAVE_CONTEXT_TRACKING_USER 198 198 select HAVE_C_RECORDMCOUNT 199 199 select HAVE_OBJTOOL_MCOUNT if HAVE_OBJTOOL 200 200 + select HAVE_OBJTOOL_NOP_MCOUNT if HAVE_OBJTOOL_MCOUNT 200 201 select HAVE_BUILDTIME_MCOUNT_SORT 201 202 select HAVE_DEBUG_KMEMLEAK 202 203 select HAVE_DMA_CONTIGUOUS

+4 -1

drivers/cpuidle/cpuidle-powernv.c

reviewed

··· 76 76 local_irq_enable(); 77 77 78 78 snooze_exit_time = get_tb() + get_snooze_timeout(dev, drv, index); 79 79 + dev->poll_time_limit = false; 79 80 ppc64_runlatch_off(); 80 81 HMT_very_low(); 81 82 while (!need_resched()) { ··· 87 86 * cleared to order subsequent test of need_resched(). 88 87 */ 89 88 clear_thread_flag(TIF_POLLING_NRFLAG); 89 89 + dev->poll_time_limit = true; 90 90 smp_mb(); 91 91 break; 92 92 } ··· 157 155 .desc = "snooze", 158 156 .exit_latency = 0, 159 157 .target_residency = 0, 160 160 - .enter = snooze_loop }, 158 158 + .enter = snooze_loop, 159 159 + .flags = CPUIDLE_FLAG_POLLING }, 161 160 }; 162 161 163 162 static int powernv_cpuidle_cpu_online(unsigned int cpu)

+6 -2

drivers/cpuidle/cpuidle-pseries.c

reviewed

··· 44 44 pseries_idle_prolog(); 45 45 local_irq_enable(); 46 46 snooze_exit_time = get_tb() + snooze_timeout; 47 47 + dev->poll_time_limit = false; 47 48 48 49 while (!need_resched()) { 49 50 HMT_low(); ··· 55 54 * loop anyway. Require a barrier after polling is 56 55 * cleared to order subsequent test of need_resched(). 57 56 */ 57 57 + dev->poll_time_limit = true; 58 58 clear_thread_flag(TIF_POLLING_NRFLAG); 59 59 smp_mb(); 60 60 break; ··· 270 268 .desc = "snooze", 271 269 .exit_latency = 0, 272 270 .target_residency = 0, 273 273 - .enter = &snooze_loop }, 271 271 + .enter = &snooze_loop, 272 272 + .flags = CPUIDLE_FLAG_POLLING }, 274 273 { /* CEDE */ 275 274 .name = "CEDE", 276 275 .desc = "CEDE", ··· 289 286 .desc = "snooze", 290 287 .exit_latency = 0, 291 288 .target_residency = 0, 292 292 - .enter = &snooze_loop }, 289 289 + .enter = &snooze_loop, 290 290 + .flags = CPUIDLE_FLAG_POLLING }, 293 291 { /* Shared Cede */ 294 292 .name = "Shared Cede", 295 293 .desc = "Shared Cede",

+13 -1

drivers/crypto/vmx/Makefile

reviewed

··· 2 2 obj-$(CONFIG_CRYPTO_DEV_VMX_ENCRYPT) += vmx-crypto.o 3 3 vmx-crypto-objs := vmx.o aesp8-ppc.o ghashp8-ppc.o aes.o aes_cbc.o aes_ctr.o aes_xts.o ghash.o 4 4 5 5 + ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y) 6 6 + override flavour := linux-ppc64le 7 7 + else 8 8 + ifdef CONFIG_PPC64_ELF_ABI_V2 9 9 + override flavour := linux-ppc64-elfv2 10 10 + else 11 11 + override flavour := linux-ppc64 12 12 + endif 13 13 + endif 14 14 + 5 15 quiet_cmd_perl = PERL $@ 6 6 - cmd_perl = $(PERL) $< $(if $(CONFIG_CPU_LITTLE_ENDIAN), linux-ppc64le, linux-ppc64) > $@ 16 16 + cmd_perl = $(PERL) $< $(flavour) > $@ 7 17 8 18 targets += aesp8-ppc.S ghashp8-ppc.S 9 19 10 20 $(obj)/aesp8-ppc.S $(obj)/ghashp8-ppc.S: $(obj)/%.S: $(src)/%.pl FORCE 11 21 $(call if_changed,perl) 22 22 + 23 23 + OBJECT_FILES_NON_STANDARD_aesp8-ppc.o := y

+6 -4

drivers/crypto/vmx/ppc-xlate.pl

reviewed

··· 9 9 10 10 my %GLOBALS; 11 11 my $dotinlocallabels=($flavour=~/linux/)?1:0; 12 12 + my $elfv2abi=(($flavour =~ /linux-ppc64le/) or ($flavour =~ /linux-ppc64-elfv2/))?1:0; 13 13 + my $dotfunctions=($elfv2abi=~1)?0:1; 12 14 13 15 ################################################################ 14 16 # directives which need special treatment on different platforms ··· 42 40 }; 43 41 my $text = sub { 44 42 my $ret = ($flavour =~ /aix/) ? ".csect\t.text[PR],7" : ".text"; 45 45 - $ret = ".abiversion 2\n".$ret if ($flavour =~ /linux.*64le/); 43 43 + $ret = ".abiversion 2\n".$ret if ($elfv2abi); 46 44 $ret; 47 45 }; 48 46 my $machine = sub { ··· 58 56 if ($flavour =~ /linux/) 59 57 { shift; 60 58 my $name = shift; $name =~ s|^[\.\_]||; 61 61 - my $ret = ".size $name,.-".($flavour=~/64$/?".":"").$name; 62 62 - $ret .= "\n.size .$name,.-.$name" if ($flavour=~/64$/); 59 59 + my $ret = ".size $name,.-".($dotfunctions?".":"").$name; 60 60 + $ret .= "\n.size .$name,.-.$name" if ($dotfunctions); 63 61 $ret; 64 62 } 65 63 else ··· 144 142 145 143 # Some ABIs specify vrsave, special-purpose register #256, as reserved 146 144 # for system use. 147 147 - my $no_vrsave = ($flavour =~ /linux-ppc64le/); 145 145 + my $no_vrsave = ($elfv2abi); 148 146 my $mtspr = sub { 149 147 my ($f,$idx,$ra) = @_; 150 148 if ($idx == 256 && $no_vrsave) {

+2 -2

drivers/macintosh/adb.c

reviewed

··· 478 478 if ((adb_handler[i].original_address == default_id) && 479 479 (!handler_id || (handler_id == adb_handler[i].handler_id) || 480 480 try_handler_change(i, handler_id))) { 481 481 - if (adb_handler[i].handler != 0) { 481 481 + if (adb_handler[i].handler) { 482 482 pr_err("Two handlers for ADB device %d\n", 483 483 default_id); 484 484 continue; ··· 673 673 goto out; 674 674 } 675 675 state = kmalloc(sizeof(struct adbdev_state), GFP_KERNEL); 676 676 - if (state == 0) { 676 676 + if (!state) { 677 677 ret = -ENOMEM; 678 678 goto out; 679 679 }

+3 -5

drivers/macintosh/ams/ams-i2c.c

reviewed

··· 56 56 AMS_CMD_START, 57 57 }; 58 58 59 59 - static int ams_i2c_probe(struct i2c_client *client, 60 60 - const struct i2c_device_id *id); 59 59 + static int ams_i2c_probe(struct i2c_client *client); 61 60 static void ams_i2c_remove(struct i2c_client *client); 62 61 63 62 static const struct i2c_device_id ams_id[] = { ··· 69 70 .driver = { 70 71 .name = "ams", 71 72 }, 72 72 - .probe = ams_i2c_probe, 73 73 + .probe_new = ams_i2c_probe, 73 74 .remove = ams_i2c_remove, 74 75 .id_table = ams_id, 75 76 }; ··· 154 155 *z = ams_i2c_read(AMS_DATAZ); 155 156 } 156 157 157 157 - static int ams_i2c_probe(struct i2c_client *client, 158 158 - const struct i2c_device_id *id) 158 158 + static int ams_i2c_probe(struct i2c_client *client) 159 159 { 160 160 int vmaj, vmin; 161 161 int result;

+5

drivers/macintosh/ams/ams.h

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 2 + #ifndef _AMS_H 3 3 + #define _AMS_H 4 4 + 2 5 #include <linux/i2c.h> 3 6 #include <linux/input.h> 4 7 #include <linux/kthread.h> ··· 72 69 73 70 extern int ams_input_init(void); 74 71 extern void ams_input_exit(void); 72 72 + 73 73 + #endif /* _AMS_H */

+8 -3

drivers/macintosh/macio-adb.c

reviewed

··· 100 100 unsigned int irq; 101 101 102 102 adbs = of_find_compatible_node(NULL, "adb", "chrp,adb0"); 103 103 - if (adbs == 0) 103 103 + if (!adbs) 104 104 return -ENXIO; 105 105 106 106 if (of_address_to_resource(adbs, 0, &r)) { ··· 108 108 return -ENXIO; 109 109 } 110 110 adb = ioremap(r.start, sizeof(struct adb_regs)); 111 111 + if (!adb) { 112 112 + of_node_put(adbs); 113 113 + return -ENOMEM; 114 114 + } 111 115 112 116 out_8(&adb->ctrl.r, 0); 113 117 out_8(&adb->intr.r, 0); ··· 187 183 req->reply_len = 0; 188 184 189 185 spin_lock_irqsave(&macio_lock, flags); 190 190 - if (current_req != 0) { 186 186 + if (current_req) { 191 187 last_req->next = req; 192 188 last_req = req; 193 189 } else { ··· 217 213 spin_lock(&macio_lock); 218 214 if (in_8(&adb->intr.r) & TAG) { 219 215 handled = 1; 220 220 - if ((req = current_req) != 0) { 216 216 + req = current_req; 217 217 + if (req) { 221 218 /* put the current request in */ 222 219 for (i = 0; i < req->nbytes; ++i) 223 220 out_8(&adb->data[i].r, req->data[i]);

+1 -1

drivers/macintosh/macio_asic.c

reviewed

··· 424 424 if (of_device_register(&dev->ofdev) != 0) { 425 425 printk(KERN_DEBUG"macio: device registration error for %s!\n", 426 426 dev_name(&dev->ofdev.dev)); 427 427 - kfree(dev); 427 427 + put_device(&dev->ofdev.dev); 428 428 return NULL; 429 429 } 430 430

+3 -3

drivers/macintosh/therm_adt746x.c

reviewed

··· 464 464 465 465 } 466 466 467 467 - static int probe_thermostat(struct i2c_client *client, 468 468 - const struct i2c_device_id *id) 467 467 + static int probe_thermostat(struct i2c_client *client) 469 468 { 469 469 + const struct i2c_device_id *id = i2c_client_get_device_id(client); 470 470 struct device_node *np = client->dev.of_node; 471 471 struct thermostat* th; 472 472 const __be32 *prop; ··· 598 598 .driver = { 599 599 .name = "therm_adt746x", 600 600 }, 601 601 - .probe = probe_thermostat, 601 601 + .probe_new = probe_thermostat, 602 602 .remove = remove_thermostat, 603 603 .id_table = therm_adt746x_id, 604 604 };

+3 -2

drivers/macintosh/therm_windtunnel.c

reviewed

··· 411 411 MODULE_DEVICE_TABLE(i2c, therm_windtunnel_id); 412 412 413 413 static int 414 414 - do_probe(struct i2c_client *cl, const struct i2c_device_id *id) 414 414 + do_probe(struct i2c_client *cl) 415 415 { 416 416 + const struct i2c_device_id *id = i2c_client_get_device_id(cl); 416 417 struct i2c_adapter *adapter = cl->adapter; 417 418 int ret = 0; 418 419 ··· 442 441 .driver = { 443 442 .name = "therm_windtunnel", 444 443 }, 445 445 - .probe = do_probe, 444 444 + .probe_new = do_probe, 446 445 .remove = do_remove, 447 446 .id_table = therm_windtunnel_id, 448 447 };

+1 -6

drivers/macintosh/via-pmu-backlight.c

reviewed

··· 71 71 static int __pmu_backlight_update_status(struct backlight_device *bd) 72 72 { 73 73 struct adb_request req; 74 74 - int level = bd->props.brightness; 75 75 - 76 76 - 77 77 - if (bd->props.power != FB_BLANK_UNBLANK || 78 78 - bd->props.fb_blank != FB_BLANK_UNBLANK) 79 79 - level = 0; 74 74 + int level = backlight_get_brightness(bd); 80 75 81 76 if (level > 0) { 82 77 int pmulevel = pmu_backlight_get_level_brightness(level);

+4

drivers/macintosh/via-pmu.c

reviewed

··· 203 203 static void pmu_start(void); 204 204 static irqreturn_t via_pmu_interrupt(int irq, void *arg); 205 205 static irqreturn_t gpio1_interrupt(int irq, void *arg); 206 206 + #ifdef CONFIG_PROC_FS 206 207 static int pmu_info_proc_show(struct seq_file *m, void *v); 207 208 static int pmu_irqstats_proc_show(struct seq_file *m, void *v); 208 209 static int pmu_battery_proc_show(struct seq_file *m, void *v); 210 210 + #endif 209 211 static void pmu_pass_intr(unsigned char *data, int len); 210 212 static const struct proc_ops pmu_options_proc_ops; 211 213 ··· 854 852 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1); 855 853 } 856 854 855 855 + #ifdef CONFIG_PROC_FS 857 856 static int pmu_info_proc_show(struct seq_file *m, void *v) 858 857 { 859 858 seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION); ··· 975 972 .proc_release = single_release, 976 973 .proc_write = pmu_options_proc_write, 977 974 }; 975 975 + #endif 978 976 979 977 #ifdef CONFIG_ADB 980 978 /* Send an ADB command */

+2 -3

drivers/macintosh/windfarm_ad7417_sensor.c

reviewed

··· 229 229 pv->config = config; 230 230 } 231 231 232 232 - static int wf_ad7417_probe(struct i2c_client *client, 233 233 - const struct i2c_device_id *id) 232 232 + static int wf_ad7417_probe(struct i2c_client *client) 234 233 { 235 234 struct wf_ad7417_priv *pv; 236 235 const struct mpu_data *mpu; ··· 320 321 .name = "wf_ad7417", 321 322 .of_match_table = wf_ad7417_of_id, 322 323 }, 323 323 - .probe = wf_ad7417_probe, 324 324 + .probe_new = wf_ad7417_probe, 324 325 .remove = wf_ad7417_remove, 325 326 .id_table = wf_ad7417_id, 326 327 };

+2 -3

drivers/macintosh/windfarm_fcu_controls.c

reviewed

··· 514 514 return 0; 515 515 } 516 516 517 517 - static int wf_fcu_probe(struct i2c_client *client, 518 518 - const struct i2c_device_id *id) 517 517 + static int wf_fcu_probe(struct i2c_client *client) 519 518 { 520 519 struct wf_fcu_priv *pv; 521 520 ··· 589 590 .name = "wf_fcu", 590 591 .of_match_table = wf_fcu_of_id, 591 592 }, 592 592 - .probe = wf_fcu_probe, 593 593 + .probe_new = wf_fcu_probe, 593 594 .remove = wf_fcu_remove, 594 595 .id_table = wf_fcu_id, 595 596 };

+4 -4

drivers/macintosh/windfarm_lm75_sensor.c

reviewed

··· 87 87 .owner = THIS_MODULE, 88 88 }; 89 89 90 90 - static int wf_lm75_probe(struct i2c_client *client, 91 91 - const struct i2c_device_id *id) 92 92 - { 90 90 + static int wf_lm75_probe(struct i2c_client *client) 91 91 + { 92 92 + const struct i2c_device_id *id = i2c_client_get_device_id(client); 93 93 struct wf_lm75_sensor *lm; 94 94 int rc, ds1775; 95 95 const char *name, *loc; ··· 177 177 .name = "wf_lm75", 178 178 .of_match_table = wf_lm75_of_id, 179 179 }, 180 180 - .probe = wf_lm75_probe, 180 180 + .probe_new = wf_lm75_probe, 181 181 .remove = wf_lm75_remove, 182 182 .id_table = wf_lm75_id, 183 183 };

+2 -3

drivers/macintosh/windfarm_lm87_sensor.c

reviewed

··· 95 95 .owner = THIS_MODULE, 96 96 }; 97 97 98 98 - static int wf_lm87_probe(struct i2c_client *client, 99 99 - const struct i2c_device_id *id) 98 98 + static int wf_lm87_probe(struct i2c_client *client) 100 99 { 101 100 struct wf_lm87_sensor *lm; 102 101 const char *name = NULL, *loc; ··· 172 173 .name = "wf_lm87", 173 174 .of_match_table = wf_lm87_of_id, 174 175 }, 175 175 - .probe = wf_lm87_probe, 176 176 + .probe_new = wf_lm87_probe, 176 177 .remove = wf_lm87_remove, 177 178 .id_table = wf_lm87_id, 178 179 };

+2 -3

drivers/macintosh/windfarm_max6690_sensor.c

reviewed

··· 60 60 .owner = THIS_MODULE, 61 61 }; 62 62 63 63 - static int wf_max6690_probe(struct i2c_client *client, 64 64 - const struct i2c_device_id *id) 63 63 + static int wf_max6690_probe(struct i2c_client *client) 65 64 { 66 65 const char *name, *loc; 67 66 struct wf_6690_sensor *max; ··· 128 129 .name = "wf_max6690", 129 130 .of_match_table = wf_max6690_of_id, 130 131 }, 131 131 - .probe = wf_max6690_probe, 132 132 + .probe_new = wf_max6690_probe, 132 133 .remove = wf_max6690_remove, 133 134 .id_table = wf_max6690_id, 134 135 };

+5

drivers/macintosh/windfarm_pid.h

reviewed

··· 1 1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 2 + #ifndef _WINDFARM_PID_H 3 3 + #define _WINDFARM_PID_H 4 4 + 2 5 /* 3 6 * Windfarm PowerMac thermal control. Generic PID helpers 4 7 * ··· 85 82 extern void wf_cpu_pid_init(struct wf_cpu_pid_state *st, 86 83 struct wf_cpu_pid_param *param); 87 84 extern s32 wf_cpu_pid_run(struct wf_cpu_pid_state *st, s32 power, s32 temp); 85 85 + 86 86 + #endif /* _WINDFARM_PID_H */

+2 -2

drivers/macintosh/windfarm_pm121.c

reviewed

··· 651 651 652 652 /* First, locate the PID params in SMU SBD */ 653 653 hdr = smu_get_sdb_partition(SMU_SDB_CPUPIDDATA_ID, NULL); 654 654 - if (hdr == 0) { 654 654 + if (!hdr) { 655 655 printk(KERN_WARNING "pm121: CPU PID fan config not found.\n"); 656 656 goto fail; 657 657 } ··· 970 970 const struct smu_sdbp_header *hdr; 971 971 972 972 hdr = smu_get_sdb_partition(SMU_SDB_SENSORTREE_ID, NULL); 973 973 - if (hdr != 0) { 973 973 + if (hdr) { 974 974 struct smu_sdbp_sensortree *st = 975 975 (struct smu_sdbp_sensortree *)&hdr[1]; 976 976 pm121_mach_model = st->model_id;

+2 -2

drivers/macintosh/windfarm_pm81.c

reviewed

··· 401 401 402 402 /* First, locate the PID params in SMU SBD */ 403 403 hdr = smu_get_sdb_partition(SMU_SDB_CPUPIDDATA_ID, NULL); 404 404 - if (hdr == 0) { 404 404 + if (!hdr) { 405 405 printk(KERN_WARNING "windfarm: CPU PID fan config not found " 406 406 "max fan speed\n"); 407 407 goto fail; ··· 705 705 const struct smu_sdbp_header *hdr; 706 706 707 707 hdr = smu_get_sdb_partition(SMU_SDB_SENSORTREE_ID, NULL); 708 708 - if (hdr != 0) { 708 708 + if (hdr) { 709 709 struct smu_sdbp_sensortree *st = 710 710 (struct smu_sdbp_sensortree *)&hdr[1]; 711 711 wf_smu_mach_model = st->model_id;

+1 -1

drivers/macintosh/windfarm_pm91.c

reviewed

··· 150 150 151 151 /* First, locate the PID params in SMU SBD */ 152 152 hdr = smu_get_sdb_partition(SMU_SDB_CPUPIDDATA_ID, NULL); 153 153 - if (hdr == 0) { 153 153 + if (!hdr) { 154 154 printk(KERN_WARNING "windfarm: CPU PID fan config not found " 155 155 "max fan speed\n"); 156 156 goto fail;

+4 -6

drivers/macintosh/windfarm_smu_controls.c

reviewed

··· 266 266 return -ENODEV; 267 267 268 268 /* Look for RPM fans */ 269 269 - for (fans = NULL; (fans = of_get_next_child(smu, fans)) != NULL;) 269 269 + for_each_child_of_node(smu, fans) 270 270 if (of_node_name_eq(fans, "rpm-fans") || 271 271 of_device_is_compatible(fans, "smu-rpm-fans")) 272 272 break; 273 273 - for (fan = NULL; 274 274 - fans && (fan = of_get_next_child(fans, fan)) != NULL;) { 273 273 + for_each_child_of_node(fans, fan) { 275 274 struct smu_fan_control *fct; 276 275 277 276 fct = smu_fan_create(fan, 0); ··· 285 286 286 287 287 288 /* Look for PWM fans */ 288 288 - for (fans = NULL; (fans = of_get_next_child(smu, fans)) != NULL;) 289 289 + for_each_child_of_node(smu, fans) 289 290 if (of_node_name_eq(fans, "pwm-fans")) 290 291 break; 291 291 - for (fan = NULL; 292 292 - fans && (fan = of_get_next_child(fans, fan)) != NULL;) { 292 292 + for_each_child_of_node(fans, fan) { 293 293 struct smu_fan_control *fct; 294 294 295 295 fct = smu_fan_create(fan, 1);

+2 -3

drivers/macintosh/windfarm_smu_sat.c

reviewed

··· 189 189 .owner = THIS_MODULE, 190 190 }; 191 191 192 192 - static int wf_sat_probe(struct i2c_client *client, 193 193 - const struct i2c_device_id *id) 192 192 + static int wf_sat_probe(struct i2c_client *client) 194 193 { 195 194 struct device_node *dev = client->dev.of_node; 196 195 struct wf_sat *sat; ··· 348 349 .name = "wf_smu_sat", 349 350 .of_match_table = wf_sat_of_id, 350 351 }, 351 351 - .probe = wf_sat_probe, 352 352 + .probe_new = wf_sat_probe, 352 353 .remove = wf_sat_remove, 353 354 .id_table = wf_sat_id, 354 355 };

+1

drivers/misc/cxl/pci.c

reviewed

··· 387 387 rc = get_phb_index(np, phb_index); 388 388 if (rc) { 389 389 pr_err("cxl: invalid phb index\n"); 390 390 + of_node_put(np); 390 391 return rc; 391 392 } 392 393

-7

drivers/misc/cxl/vphb.c

reviewed

··· 67 67 } 68 68 } 69 69 70 70 - static resource_size_t cxl_pci_window_alignment(struct pci_bus *bus, 71 71 - unsigned long type) 72 72 - { 73 73 - return 1; 74 74 - } 75 75 - 76 70 static void cxl_pci_reset_secondary_bus(struct pci_dev *dev) 77 71 { 78 72 /* Should we do an AFU reset here ? */ ··· 194 200 .enable_device_hook = cxl_pci_enable_device_hook, 195 201 .disable_device = cxl_pci_disable_device, 196 202 .release_device = cxl_pci_disable_device, 197 197 - .window_alignment = cxl_pci_window_alignment, 198 203 .reset_secondary_bus = cxl_pci_reset_secondary_bus, 199 204 .setup_msi_irqs = cxl_setup_msi_irqs, 200 205 .teardown_msi_irqs = cxl_teardown_msi_irqs,

+1 -1

drivers/ps3/ps3-lpm.c

reviewed

··· 1066 1066 * instance, specified by one of enum ps3_lpm_tb_type. 1067 1067 * @tb_cache: Optional user supplied buffer to use as the trace buffer cache. 1068 1068 * If NULL, the driver will allocate and manage an internal buffer. 1069 1069 - * Unused when when @tb_type is PS3_LPM_TB_TYPE_NONE. 1069 1069 + * Unused when @tb_type is PS3_LPM_TB_TYPE_NONE. 1070 1070 * @tb_cache_size: The size in bytes of the user supplied @tb_cache buffer. 1071 1071 * Unused when @tb_cache is NULL or @tb_type is PS3_LPM_TB_TYPE_NONE. 1072 1072 */

+3

include/linux/moduleloader.h

reviewed

··· 13 13 * must be implemented by each architecture. 14 14 */ 15 15 16 16 + /* arch may override to do additional checking of ELF header architecture */ 17 17 + bool module_elf_check_arch(Elf_Ehdr *hdr); 18 18 + 16 19 /* Adjust arch-specific sections. Return 0 on success. */ 17 20 int module_frob_arch_sections(Elf_Ehdr *hdr, 18 21 Elf_Shdr *sechdrs,

+1 -1

include/misc/cxl.h

reviewed

··· 30 30 /* 31 31 * Context lifetime overview: 32 32 * 33 33 - * An AFU context may be inited and then started and stoppped multiple times 33 33 + * An AFU context may be inited and then started and stopped multiple times 34 34 * before it's released. ie. 35 35 * - cxl_dev_context_init() 36 36 * - cxl_start_context()

+10

kernel/module/main.c

reviewed

··· 1671 1671 info->hdr->e_machine); 1672 1672 goto no_exec; 1673 1673 } 1674 1674 + if (!module_elf_check_arch(info->hdr)) { 1675 1675 + pr_err("Invalid module architecture in ELF header: %u\n", 1676 1676 + info->hdr->e_machine); 1677 1677 + goto no_exec; 1678 1678 + } 1674 1679 if (info->hdr->e_shentsize != sizeof(Elf_Shdr)) { 1675 1680 pr_err("Invalid ELF section header size\n"); 1676 1681 goto no_exec; ··· 2247 2242 + mod->init_layout.size); 2248 2243 flush_icache_range((unsigned long)mod->core_layout.base, 2249 2244 (unsigned long)mod->core_layout.base + mod->core_layout.size); 2245 2245 + } 2246 2246 + 2247 2247 + bool __weak module_elf_check_arch(Elf_Ehdr *hdr) 2248 2248 + { 2249 2249 + return true; 2250 2250 } 2251 2251 2252 2252 int __weak module_frob_arch_sections(Elf_Ehdr *hdr,

+7

kernel/trace/Kconfig

reviewed

··· 82 82 help 83 83 Arch supports objtool --mcount 84 84 85 85 + config HAVE_OBJTOOL_NOP_MCOUNT 86 86 + bool 87 87 + help 88 88 + Arch supports the objtool options --mcount with --mnop. 89 89 + An architecture can select this if it wants to enable nop'ing 90 90 + of ftrace locations. 91 91 + 85 92 config HAVE_C_RECORDMCOUNT 86 93 bool 87 94 help

+3

scripts/Makefile.lib

reviewed

··· 258 258 objtool-args-$(CONFIG_X86_KERNEL_IBT) += --ibt 259 259 objtool-args-$(CONFIG_FINEIBT) += --cfi 260 260 objtool-args-$(CONFIG_FTRACE_MCOUNT_USE_OBJTOOL) += --mcount 261 261 + ifdef CONFIG_FTRACE_MCOUNT_USE_OBJTOOL 262 262 + objtool-args-$(CONFIG_HAVE_OBJTOOL_NOP_MCOUNT) += --mnop 263 263 + endif 261 264 objtool-args-$(CONFIG_UNWINDER_ORC) += --orc 262 265 objtool-args-$(CONFIG_RETPOLINE) += --retpoline 263 266 objtool-args-$(CONFIG_RETHUNK) += --rethunk

+2

tools/objtool/arch/powerpc/Build

reviewed

··· 1 1 + objtool-y += decode.o 2 2 + objtool-y += special.o

+110

tools/objtool/arch/powerpc/decode.c

reviewed

··· 1 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 2 + 3 3 + #include <stdio.h> 4 4 + #include <stdlib.h> 5 5 + #include <objtool/check.h> 6 6 + #include <objtool/elf.h> 7 7 + #include <objtool/arch.h> 8 8 + #include <objtool/warn.h> 9 9 + #include <objtool/builtin.h> 10 10 + #include <objtool/endianness.h> 11 11 + 12 12 + int arch_ftrace_match(char *name) 13 13 + { 14 14 + return !strcmp(name, "_mcount"); 15 15 + } 16 16 + 17 17 + unsigned long arch_dest_reloc_offset(int addend) 18 18 + { 19 19 + return addend; 20 20 + } 21 21 + 22 22 + bool arch_callee_saved_reg(unsigned char reg) 23 23 + { 24 24 + return false; 25 25 + } 26 26 + 27 27 + int arch_decode_hint_reg(u8 sp_reg, int *base) 28 28 + { 29 29 + exit(-1); 30 30 + } 31 31 + 32 32 + const char *arch_nop_insn(int len) 33 33 + { 34 34 + exit(-1); 35 35 + } 36 36 + 37 37 + const char *arch_ret_insn(int len) 38 38 + { 39 39 + exit(-1); 40 40 + } 41 41 + 42 42 + int arch_decode_instruction(struct objtool_file *file, const struct section *sec, 43 43 + unsigned long offset, unsigned int maxlen, 44 44 + unsigned int *len, enum insn_type *type, 45 45 + unsigned long *immediate, 46 46 + struct list_head *ops_list) 47 47 + { 48 48 + unsigned int opcode; 49 49 + enum insn_type typ; 50 50 + unsigned long imm; 51 51 + u32 insn; 52 52 + 53 53 + insn = bswap_if_needed(file->elf, *(u32 *)(sec->data->d_buf + offset)); 54 54 + opcode = insn >> 26; 55 55 + typ = INSN_OTHER; 56 56 + imm = 0; 57 57 + 58 58 + switch (opcode) { 59 59 + case 18: /* b[l][a] */ 60 60 + if ((insn & 3) == 1) /* bl */ 61 61 + typ = INSN_CALL; 62 62 + 63 63 + imm = insn & 0x3fffffc; 64 64 + if (imm & 0x2000000) 65 65 + imm -= 0x4000000; 66 66 + break; 67 67 + } 68 68 + 69 69 + if (opcode == 1) 70 70 + *len = 8; 71 71 + else 72 72 + *len = 4; 73 73 + 74 74 + *type = typ; 75 75 + *immediate = imm; 76 76 + 77 77 + return 0; 78 78 + } 79 79 + 80 80 + unsigned long arch_jump_destination(struct instruction *insn) 81 81 + { 82 82 + return insn->offset + insn->immediate; 83 83 + } 84 84 + 85 85 + bool arch_pc_relative_reloc(struct reloc *reloc) 86 86 + { 87 87 + /* 88 88 + * The powerpc build only allows certain relocation types, see 89 89 + * relocs_check.sh, and none of those accepted are PC relative. 90 90 + */ 91 91 + return false; 92 92 + } 93 93 + 94 94 + void arch_initial_func_cfi_state(struct cfi_init_state *state) 95 95 + { 96 96 + int i; 97 97 + 98 98 + for (i = 0; i < CFI_NUM_REGS; i++) { 99 99 + state->regs[i].base = CFI_UNDEFINED; 100 100 + state->regs[i].offset = 0; 101 101 + } 102 102 + 103 103 + /* initial CFA (call frame address) */ 104 104 + state->cfa.base = CFI_SP; 105 105 + state->cfa.offset = 0; 106 106 + 107 107 + /* initial LR (return address) */ 108 108 + state->regs[CFI_RA].base = CFI_CFA; 109 109 + state->regs[CFI_RA].offset = 0; 110 110 + }

+11

tools/objtool/arch/powerpc/include/arch/cfi_regs.h

reviewed

··· 1 1 + /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 2 + 3 3 + #ifndef _OBJTOOL_CFI_REGS_H 4 4 + #define _OBJTOOL_CFI_REGS_H 5 5 + 6 6 + #define CFI_BP 1 7 7 + #define CFI_SP CFI_BP 8 8 + #define CFI_RA 32 9 9 + #define CFI_NUM_REGS 33 10 10 + 11 11 + #endif

+10

tools/objtool/arch/powerpc/include/arch/elf.h

reviewed

··· 1 1 + /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 2 + 3 3 + #ifndef _OBJTOOL_ARCH_ELF 4 4 + #define _OBJTOOL_ARCH_ELF 5 5 + 6 6 + #define R_NONE R_PPC_NONE 7 7 + #define R_ABS64 R_PPC64_ADDR64 8 8 + #define R_ABS32 R_PPC_ADDR32 9 9 + 10 10 + #endif /* _OBJTOOL_ARCH_ELF */

+21

tools/objtool/arch/powerpc/include/arch/special.h

reviewed

··· 1 1 + /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 2 + #ifndef _PPC_ARCH_SPECIAL_H 3 3 + #define _PPC_ARCH_SPECIAL_H 4 4 + 5 5 + #define EX_ENTRY_SIZE 8 6 6 + #define EX_ORIG_OFFSET 0 7 7 + #define EX_NEW_OFFSET 4 8 8 + 9 9 + #define JUMP_ENTRY_SIZE 16 10 10 + #define JUMP_ORIG_OFFSET 0 11 11 + #define JUMP_NEW_OFFSET 4 12 12 + #define JUMP_KEY_OFFSET 8 13 13 + 14 14 + #define ALT_ENTRY_SIZE 12 15 15 + #define ALT_ORIG_OFFSET 0 16 16 + #define ALT_NEW_OFFSET 4 17 17 + #define ALT_FEATURE_OFFSET 8 18 18 + #define ALT_ORIG_LEN_OFFSET 10 19 19 + #define ALT_NEW_LEN_OFFSET 11 20 20 + 21 21 + #endif /* _PPC_ARCH_SPECIAL_H */

+19

tools/objtool/arch/powerpc/special.c

reviewed

··· 1 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 2 + #include <string.h> 3 3 + #include <stdlib.h> 4 4 + #include <objtool/special.h> 5 5 + #include <objtool/builtin.h> 6 6 + 7 7 + 8 8 + bool arch_support_alt_relocation(struct special_alt *special_alt, 9 9 + struct instruction *insn, 10 10 + struct reloc *reloc) 11 11 + { 12 12 + exit(-1); 13 13 + } 14 14 + 15 15 + struct reloc *arch_find_switch_table(struct objtool_file *file, 16 16 + struct instruction *insn) 17 17 + { 18 18 + exit(-1); 19 19 + }

+5

tools/objtool/arch/x86/decode.c

reviewed

··· 23 23 #include <objtool/builtin.h> 24 24 #include <arch/elf.h> 25 25 26 26 + int arch_ftrace_match(char *name) 27 27 + { 28 28 + return !strcmp(name, "__fentry__"); 29 29 + } 30 30 + 26 31 static int is_x86_64(const struct elf *elf) 27 32 { 28 33 switch (elf->ehdr.e_machine) {

+2

tools/objtool/arch/x86/include/arch/elf.h

reviewed

··· 2 2 #define _OBJTOOL_ARCH_ELF 3 3 4 4 #define R_NONE R_X86_64_NONE 5 5 + #define R_ABS64 R_X86_64_64 6 6 + #define R_ABS32 R_X86_64_32 5 7 6 8 #endif /* _OBJTOOL_ARCH_ELF */

-9

tools/objtool/arch/x86/include/arch/endianness.h

reviewed

··· 1 1 - /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 2 - #ifndef _ARCH_ENDIANNESS_H 3 3 - #define _ARCH_ENDIANNESS_H 4 4 - 5 5 - #include <endian.h> 6 6 - 7 7 - #define __TARGET_BYTE_ORDER __LITTLE_ENDIAN 8 8 - 9 9 - #endif /* _ARCH_ENDIANNESS_H */

+14

tools/objtool/builtin-check.c

reviewed

··· 89 89 OPT_BOOLEAN(0, "dry-run", &opts.dryrun, "don't write modifications"), 90 90 OPT_BOOLEAN(0, "link", &opts.link, "object is a linked object"), 91 91 OPT_BOOLEAN(0, "module", &opts.module, "object is part of a kernel module"), 92 92 + OPT_BOOLEAN(0, "mnop", &opts.mnop, "nop out mcount call sites"), 92 93 OPT_BOOLEAN(0, "no-unreachable", &opts.no_unreachable, "skip 'unreachable instruction' warnings"), 93 94 OPT_BOOLEAN(0, "sec-address", &opts.sec_address, "print section addresses in warnings"), 94 95 OPT_BOOLEAN(0, "stats", &opts.stats, "print statistics"), ··· 158 157 return false; 159 158 } 160 159 160 160 + static bool mnop_opts_valid(void) 161 161 + { 162 162 + if (opts.mnop && !opts.mcount) { 163 163 + ERROR("--mnop requires --mcount"); 164 164 + return false; 165 165 + } 166 166 + 167 167 + return true; 168 168 + } 169 169 + 161 170 static bool link_opts_valid(struct objtool_file *file) 162 171 { 163 172 if (opts.link) ··· 214 203 215 204 file = objtool_open_read(objname); 216 205 if (!file) 206 206 + return 1; 207 207 + 208 208 + if (!mnop_opts_valid()) 217 209 return 1; 218 210 219 211 if (!link_opts_valid(file))

+29 -24

tools/objtool/check.c

reviewed

··· 204 204 return false; 205 205 206 206 insn = find_insn(file, func->sec, func->offset); 207 207 - if (!insn_func(insn)) 207 207 + if (!insn || !insn_func(insn)) 208 208 return false; 209 209 210 210 func_for_each_insn(file, func, insn) { ··· 925 925 926 926 static int create_mcount_loc_sections(struct objtool_file *file) 927 927 { 928 928 - struct section *sec; 929 929 - unsigned long *loc; 928 928 + int addrsize = elf_class_addrsize(file->elf); 930 929 struct instruction *insn; 930 930 + struct section *sec; 931 931 int idx; 932 932 933 933 sec = find_section_by_name(file->elf, "__mcount_loc"); ··· 944 944 list_for_each_entry(insn, &file->mcount_loc_list, call_node) 945 945 idx++; 946 946 947 947 - sec = elf_create_section(file->elf, "__mcount_loc", 0, sizeof(unsigned long), idx); 947 947 + sec = elf_create_section(file->elf, "__mcount_loc", 0, addrsize, idx); 948 948 if (!sec) 949 949 return -1; 950 950 951 951 + sec->sh.sh_addralign = addrsize; 952 952 + 951 953 idx = 0; 952 954 list_for_each_entry(insn, &file->mcount_loc_list, call_node) { 955 955 + void *loc; 953 956 954 954 - loc = (unsigned long *)sec->data->d_buf + idx; 955 955 - memset(loc, 0, sizeof(unsigned long)); 957 957 + loc = sec->data->d_buf + idx; 958 958 + memset(loc, 0, addrsize); 956 959 957 957 - if (elf_add_reloc_to_insn(file->elf, sec, 958 958 - idx * sizeof(unsigned long), 959 959 - R_X86_64_64, 960 960 + if (elf_add_reloc_to_insn(file->elf, sec, idx, 961 961 + addrsize == sizeof(u64) ? R_ABS64 : R_ABS32, 960 962 insn->sec, insn->offset)) 961 963 return -1; 962 964 963 963 - idx++; 965 965 + idx += addrsize; 964 966 } 965 967 966 968 return 0; ··· 1382 1380 if (opts.mcount && sym->fentry) { 1383 1381 if (sibling) 1384 1382 WARN_FUNC("Tail call to __fentry__ !?!?", insn->sec, insn->offset); 1383 1383 + if (opts.mnop) { 1384 1384 + if (reloc) { 1385 1385 + reloc->type = R_NONE; 1386 1386 + elf_write_reloc(file->elf, reloc); 1387 1387 + } 1385 1388 1386 1386 - if (reloc) { 1387 1387 - reloc->type = R_NONE; 1388 1388 - elf_write_reloc(file->elf, reloc); 1389 1389 + elf_write_insn(file->elf, insn->sec, 1390 1390 + insn->offset, insn->len, 1391 1391 + arch_nop_insn(insn->len)); 1392 1392 + 1393 1393 + insn->type = INSN_NOP; 1389 1394 } 1390 1390 - 1391 1391 - elf_write_insn(file->elf, insn->sec, 1392 1392 - insn->offset, insn->len, 1393 1393 - arch_nop_insn(insn->len)); 1394 1394 - 1395 1395 - insn->type = INSN_NOP; 1396 1395 1397 1396 list_add_tail(&insn->call_node, &file->mcount_loc_list); 1398 1397 return; ··· 2255 2252 return -1; 2256 2253 } 2257 2254 2258 2258 - cfi.cfa.offset = bswap_if_needed(hint->sp_offset); 2255 2255 + cfi.cfa.offset = bswap_if_needed(file->elf, hint->sp_offset); 2259 2256 cfi.type = hint->type; 2260 2257 cfi.end = hint->end; 2261 2258 ··· 2468 2465 if (arch_is_rethunk(func)) 2469 2466 func->return_thunk = true; 2470 2467 2471 2471 - if (!strcmp(func->name, "__fentry__")) 2468 2468 + if (arch_ftrace_match(func->name)) 2472 2469 func->fentry = true; 2473 2470 2474 2471 if (is_profiling_func(func->name)) ··· 2544 2541 * Must be before add_jump_destinations(), which depends on 'func' 2545 2542 * being set for alternatives, to enable proper sibling call detection. 2546 2543 */ 2547 2547 - ret = add_special_section_alts(file); 2548 2548 - if (ret) 2549 2549 - return ret; 2544 2544 + if (opts.stackval || opts.orc || opts.uaccess || opts.noinstr) { 2545 2545 + ret = add_special_section_alts(file); 2546 2546 + if (ret) 2547 2547 + return ret; 2548 2548 + } 2550 2549 2551 2550 ret = add_jump_destinations(file); 2552 2551 if (ret)

+6 -2

tools/objtool/elf.c

reviewed

··· 1174 1174 { 1175 1175 char *relocname; 1176 1176 struct section *sec; 1177 1177 + int addrsize = elf_class_addrsize(elf); 1177 1178 1178 1179 relocname = malloc(strlen(base->name) + strlen(".rela") + 1); 1179 1180 if (!relocname) { ··· 1184 1183 strcpy(relocname, ".rela"); 1185 1184 strcat(relocname, base->name); 1186 1185 1187 1187 - sec = elf_create_section(elf, relocname, 0, sizeof(GElf_Rela), 0); 1186 1186 + if (addrsize == sizeof(u32)) 1187 1187 + sec = elf_create_section(elf, relocname, 0, sizeof(Elf32_Rela), 0); 1188 1188 + else 1189 1189 + sec = elf_create_section(elf, relocname, 0, sizeof(GElf_Rela), 0); 1188 1190 free(relocname); 1189 1191 if (!sec) 1190 1192 return NULL; ··· 1196 1192 sec->base = base; 1197 1193 1198 1194 sec->sh.sh_type = SHT_RELA; 1199 1199 - sec->sh.sh_addralign = 8; 1195 1195 + sec->sh.sh_addralign = addrsize; 1200 1196 sec->sh.sh_link = find_section_by_name(elf, ".symtab")->idx; 1201 1197 sec->sh.sh_info = base->idx; 1202 1198 sec->sh.sh_flags = SHF_INFO_LINK;

+2

tools/objtool/include/objtool/arch.h

reviewed

··· 69 69 70 70 struct instruction; 71 71 72 72 + int arch_ftrace_match(char *name); 73 73 + 72 74 void arch_initial_func_cfi_state(struct cfi_init_state *state); 73 75 74 76 int arch_decode_instruction(struct objtool_file *file, const struct section *sec,

+1

tools/objtool/include/objtool/builtin.h

reviewed

··· 34 34 bool backup; 35 35 bool dryrun; 36 36 bool link; 37 37 + bool mnop; 37 38 bool module; 38 39 bool no_unreachable; 39 40 bool sec_address;

+8

tools/objtool/include/objtool/elf.h

reviewed

··· 145 145 return elf->num_files > 1; 146 146 } 147 147 148 148 + static inline int elf_class_addrsize(struct elf *elf) 149 149 + { 150 150 + if (elf->ehdr.e_ident[EI_CLASS] == ELFCLASS32) 151 151 + return sizeof(u32); 152 152 + else 153 153 + return sizeof(u64); 154 154 + } 155 155 + 148 156 struct elf *elf_open_read(const char *name, int flags); 149 157 struct section *elf_create_section(struct elf *elf, const char *name, unsigned int sh_flags, size_t entsize, int nr); 150 158

+16 -16

tools/objtool/include/objtool/endianness.h

reviewed

··· 2 2 #ifndef _OBJTOOL_ENDIANNESS_H 3 3 #define _OBJTOOL_ENDIANNESS_H 4 4 5 5 - #include <arch/endianness.h> 6 5 #include <linux/kernel.h> 7 6 #include <endian.h> 8 8 - 9 9 - #ifndef __TARGET_BYTE_ORDER 10 10 - #error undefined arch __TARGET_BYTE_ORDER 11 11 - #endif 12 12 - 13 13 - #if __BYTE_ORDER != __TARGET_BYTE_ORDER 14 14 - #define __NEED_BSWAP 1 15 15 - #else 16 16 - #define __NEED_BSWAP 0 17 17 - #endif 7 7 + #include <objtool/elf.h> 18 8 19 9 /* 20 20 - * Does a byte swap if target endianness doesn't match the host, i.e. cross 10 10 + * Does a byte swap if target file endianness doesn't match the host, i.e. cross 21 11 * compilation for little endian on big endian and vice versa. 22 12 * To be used for multi-byte values conversion, which are read from / about 23 13 * to be written to a target native endianness ELF file. 24 14 */ 25 25 - #define bswap_if_needed(val) \ 15 15 + static inline bool need_bswap(struct elf *elf) 16 16 + { 17 17 + return (__BYTE_ORDER == __LITTLE_ENDIAN) ^ 18 18 + (elf->ehdr.e_ident[EI_DATA] == ELFDATA2LSB); 19 19 + } 20 20 + 21 21 + #define bswap_if_needed(elf, val) \ 26 22 ({ \ 27 23 __typeof__(val) __ret; \ 24 24 + bool __need_bswap = need_bswap(elf); \ 28 25 switch (sizeof(val)) { \ 29 29 - case 8: __ret = __NEED_BSWAP ? bswap_64(val) : (val); break; \ 30 30 - case 4: __ret = __NEED_BSWAP ? bswap_32(val) : (val); break; \ 31 31 - case 2: __ret = __NEED_BSWAP ? bswap_16(val) : (val); break; \ 26 26 + case 8: \ 27 27 + __ret = __need_bswap ? bswap_64(val) : (val); break; \ 28 28 + case 4: \ 29 29 + __ret = __need_bswap ? bswap_32(val) : (val); break; \ 30 30 + case 2: \ 31 31 + __ret = __need_bswap ? bswap_16(val) : (val); break; \ 32 32 default: \ 33 33 BUILD_BUG(); break; \ 34 34 } \

+9 -2

tools/objtool/orc_dump.c

reviewed

··· 76 76 GElf_Rela rela; 77 77 GElf_Sym sym; 78 78 Elf_Data *data, *symtab = NULL, *rela_orc_ip = NULL; 79 79 + struct elf dummy_elf = {}; 79 80 80 81 81 82 objname = _objname; ··· 94 93 WARN_ELF("elf_begin"); 95 94 return -1; 96 95 } 96 96 + 97 97 + if (!elf64_getehdr(elf)) { 98 98 + WARN_ELF("elf64_getehdr"); 99 99 + return -1; 100 100 + } 101 101 + memcpy(&dummy_elf.ehdr, elf64_getehdr(elf), sizeof(dummy_elf.ehdr)); 97 102 98 103 if (elf_getshdrnum(elf, &nr_sections)) { 99 104 WARN_ELF("elf_getshdrnum"); ··· 205 198 206 199 printf(" sp:"); 207 200 208 208 - print_reg(orc[i].sp_reg, bswap_if_needed(orc[i].sp_offset)); 201 201 + print_reg(orc[i].sp_reg, bswap_if_needed(&dummy_elf, orc[i].sp_offset)); 209 202 210 203 printf(" bp:"); 211 204 212 212 - print_reg(orc[i].bp_reg, bswap_if_needed(orc[i].bp_offset)); 205 205 + print_reg(orc[i].bp_reg, bswap_if_needed(&dummy_elf, orc[i].bp_offset)); 213 206 214 207 printf(" type:%s end:%d\n", 215 208 orc_type_name(orc[i].type), orc[i].end);

+2 -2

tools/objtool/orc_gen.c

reviewed

··· 97 97 /* populate ORC data */ 98 98 orc = (struct orc_entry *)orc_sec->data->d_buf + idx; 99 99 memcpy(orc, o, sizeof(*orc)); 100 100 - orc->sp_offset = bswap_if_needed(orc->sp_offset); 101 101 - orc->bp_offset = bswap_if_needed(orc->bp_offset); 100 100 + orc->sp_offset = bswap_if_needed(elf, orc->sp_offset); 101 101 + orc->bp_offset = bswap_if_needed(elf, orc->bp_offset); 102 102 103 103 /* populate reloc for ip */ 104 104 if (elf_add_reloc_to_insn(elf, ip_sec, idx * sizeof(int), R_X86_64_PC32,

+2 -1

tools/objtool/special.c

reviewed

··· 87 87 if (entry->feature) { 88 88 unsigned short feature; 89 89 90 90 - feature = bswap_if_needed(*(unsigned short *)(sec->data->d_buf + 90 90 + feature = bswap_if_needed(elf, 91 91 + *(unsigned short *)(sec->data->d_buf + 91 92 offset + 92 93 entry->feature)); 93 94 arch_handle_alternative(feature, alt);

+5 -12

tools/testing/selftests/powerpc/dscr/dscr.h

reviewed

··· 23 23 #include <sys/stat.h> 24 24 #include <sys/wait.h> 25 25 26 26 + #include "reg.h" 26 27 #include "utils.h" 27 28 28 29 #define THREADS 100 /* Max threads */ ··· 42 41 /* Prilvilege state DSCR access */ 43 42 inline unsigned long get_dscr(void) 44 43 { 45 45 - unsigned long ret; 46 46 - 47 47 - asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR_PRIV)); 48 48 - 49 49 - return ret; 44 44 + return mfspr(SPRN_DSCR_PRIV); 50 45 } 51 46 52 47 inline void set_dscr(unsigned long val) 53 48 { 54 54 - asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_PRIV)); 49 49 + mtspr(SPRN_DSCR_PRIV, val); 55 50 } 56 51 57 52 /* Problem state DSCR access */ 58 53 inline unsigned long get_dscr_usr(void) 59 54 { 60 60 - unsigned long ret; 61 61 - 62 62 - asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR)); 63 63 - 64 64 - return ret; 55 55 + return mfspr(SPRN_DSCR); 65 56 } 66 57 67 58 inline void set_dscr_usr(unsigned long val) 68 59 { 69 69 - asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR)); 60 60 + mtspr(SPRN_DSCR, val); 70 61 } 71 62 72 63 /* Default DSCR access */

+4 -1

tools/testing/selftests/powerpc/dscr/dscr_sysfs_test.c

reviewed

··· 24 24 rc = read(fd, buf, sizeof(buf)); 25 25 if (rc == -1) { 26 26 perror("read() failed"); 27 27 + close(fd); 27 28 return 1; 28 29 } 29 30 close(fd); ··· 66 65 if (access(file, F_OK)) 67 66 continue; 68 67 69 69 - if (check_cpu_dscr_default(file, val)) 68 68 + if (check_cpu_dscr_default(file, val)) { 69 69 + closedir(sysfs); 70 70 return 1; 71 71 + } 71 72 } 72 73 closedir(sysfs); 73 74 return 0;

+1 -1

tools/testing/selftests/powerpc/include/pkeys.h

reviewed

··· 24 24 #undef PKEY_DISABLE_EXECUTE 25 25 #define PKEY_DISABLE_EXECUTE 0x4 26 26 27 27 - /* Older versions of libc do not not define this */ 27 27 + /* Older versions of libc do not define this */ 28 28 #ifndef SEGV_PKUERR 29 29 #define SEGV_PKUERR 4 30 30 #endif

+4 -2

tools/testing/selftests/powerpc/ptrace/core-pkey.c

reviewed

··· 329 329 330 330 core = mmap(NULL, core_size, PROT_READ, MAP_PRIVATE, fd, 0); 331 331 if (core == (void *) -1) { 332 332 - perror("Error mmaping core file"); 332 332 + perror("Error mmapping core file"); 333 333 ret = TEST_FAIL; 334 334 goto out; 335 335 } ··· 383 383 goto out; 384 384 } 385 385 386 386 - ret = fread(core_pattern, 1, PATH_MAX, f); 386 386 + ret = fread(core_pattern, 1, PATH_MAX - 1, f); 387 387 fclose(f); 388 388 if (!ret) { 389 389 perror("Error reading core_pattern file"); 390 390 ret = TEST_FAIL; 391 391 goto out; 392 392 } 393 393 + 394 394 + core_pattern[ret] = '\0'; 393 395 394 396 /* Check whether we can predict the name of the core file. */ 395 397 if (!strcmp(core_pattern, "core") || !strcmp(core_pattern, "core.%p"))

+59 -25

tools/testing/selftests/powerpc/ptrace/perf-hwbreak.c

reviewed

··· 17 17 * Copyright (C) 2018 Michael Neuling, IBM Corporation. 18 18 */ 19 19 20 20 + #define _GNU_SOURCE 21 21 + 20 22 #include <unistd.h> 21 23 #include <assert.h> 24 24 + #include <sched.h> 22 25 #include <stdio.h> 23 26 #include <stdlib.h> 24 27 #include <signal.h> ··· 29 26 #include <sys/ioctl.h> 30 27 #include <sys/wait.h> 31 28 #include <sys/ptrace.h> 29 29 + #include <sys/resource.h> 32 30 #include <sys/sysinfo.h> 33 31 #include <asm/ptrace.h> 34 32 #include <elf.h> ··· 144 140 145 141 static int perf_systemwide_event_open(int *fd, __u32 type, __u64 addr, __u64 len) 146 142 { 147 147 - int i = 0; 143 143 + int i, ncpus, cpu, ret = 0; 144 144 + struct rlimit rlim; 145 145 + cpu_set_t *mask; 146 146 + size_t size; 148 147 149 149 - /* Assume online processors are 0 to nprocs for simplisity */ 150 150 - for (i = 0; i < nprocs; i++) { 151 151 - fd[i] = perf_cpu_event_open(i, type, addr, len); 152 152 - if (fd[i] < 0) { 153 153 - close_fds(fd, i); 154 154 - return fd[i]; 155 155 - } 148 148 + if (getrlimit(RLIMIT_NOFILE, &rlim)) { 149 149 + perror("getrlimit"); 150 150 + return -1; 156 151 } 157 157 - return 0; 152 152 + rlim.rlim_cur = 65536; 153 153 + if (setrlimit(RLIMIT_NOFILE, &rlim)) { 154 154 + perror("setrlimit"); 155 155 + return -1; 156 156 + } 157 157 + 158 158 + ncpus = get_nprocs_conf(); 159 159 + size = CPU_ALLOC_SIZE(ncpus); 160 160 + mask = CPU_ALLOC(ncpus); 161 161 + if (!mask) { 162 162 + perror("malloc"); 163 163 + return -1; 164 164 + } 165 165 + 166 166 + CPU_ZERO_S(size, mask); 167 167 + 168 168 + if (sched_getaffinity(0, size, mask)) { 169 169 + perror("sched_getaffinity"); 170 170 + ret = -1; 171 171 + goto done; 172 172 + } 173 173 + 174 174 + for (i = 0, cpu = 0; i < nprocs && cpu < ncpus; cpu++) { 175 175 + if (!CPU_ISSET_S(cpu, size, mask)) 176 176 + continue; 177 177 + fd[i] = perf_cpu_event_open(cpu, type, addr, len); 178 178 + if (fd[i] < 0) { 179 179 + perror("perf_systemwide_event_open"); 180 180 + close_fds(fd, i); 181 181 + ret = fd[i]; 182 182 + goto done; 183 183 + } 184 184 + i++; 185 185 + } 186 186 + 187 187 + if (i < nprocs) { 188 188 + printf("Error: Number of online cpus reduced since start of test: %d < %d\n", i, nprocs); 189 189 + close_fds(fd, i); 190 190 + ret = -1; 191 191 + } 192 192 + 193 193 + done: 194 194 + CPU_FREE(mask); 195 195 + return ret; 158 196 } 159 197 160 198 static inline bool breakpoint_test(int len) ··· 589 543 int ret; 590 544 591 545 ret = perf_systemwide_event_open(fd1, HW_BREAKPOINT_RW, (__u64)&a, (__u64)sizeof(a)); 592 592 - if (ret) { 593 593 - perror("perf_systemwide_event_open"); 546 546 + if (ret) 594 547 exit(EXIT_FAILURE); 595 595 - } 596 548 597 549 ret = perf_systemwide_event_open(fd2, HW_BREAKPOINT_RW, (__u64)&b, (__u64)sizeof(b)); 598 550 if (ret) { 599 551 close_fds(fd1, nprocs); 600 600 - perror("perf_systemwide_event_open"); 601 552 exit(EXIT_FAILURE); 602 553 } 603 554 ··· 633 590 int ret; 634 591 635 592 ret = perf_systemwide_event_open(fd1, HW_BREAKPOINT_RW, (__u64)&a, (__u64)sizeof(a)); 636 636 - if (ret) { 637 637 - perror("perf_systemwide_event_open"); 593 593 + if (ret) 638 594 exit(EXIT_FAILURE); 639 639 - } 640 595 641 596 ret = perf_systemwide_event_open(fd2, HW_BREAKPOINT_RW, (__u64)&a, (__u64)sizeof(a)); 642 597 if (ret) { 643 598 close_fds(fd1, nprocs); 644 644 - perror("perf_systemwide_event_open"); 645 599 exit(EXIT_FAILURE); 646 600 } 647 601 ··· 677 637 int ret; 678 638 679 639 ret = perf_systemwide_event_open(fd1, HW_BREAKPOINT_W, (__u64)&a, (__u64)sizeof(a)); 680 680 - if (ret) { 681 681 - perror("perf_systemwide_event_open"); 640 640 + if (ret) 682 641 exit(EXIT_FAILURE); 683 683 - } 684 642 685 643 ret = perf_systemwide_event_open(fd2, HW_BREAKPOINT_R, (__u64)&b, (__u64)sizeof(b)); 686 644 if (ret) { 687 645 close_fds(fd1, nprocs); 688 688 - perror("perf_systemwide_event_open"); 689 646 exit(EXIT_FAILURE); 690 647 } 691 648 ··· 721 684 int ret; 722 685 723 686 ret = perf_systemwide_event_open(fd1, HW_BREAKPOINT_W, (__u64)&a, (__u64)sizeof(a)); 724 724 - if (ret) { 725 725 - perror("perf_systemwide_event_open"); 687 687 + if (ret) 726 688 exit(EXIT_FAILURE); 727 727 - } 728 689 729 690 ret = perf_systemwide_event_open(fd2, HW_BREAKPOINT_R, (__u64)&a, (__u64)sizeof(a)); 730 691 if (ret) { 731 692 close_fds(fd1, nprocs); 732 732 - perror("perf_systemwide_event_open"); 733 693 exit(EXIT_FAILURE); 734 694 } 735 695

+2 -4

tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c

reviewed

··· 23 23 #include <sys/syscall.h> 24 24 #include <linux/limits.h> 25 25 #include "ptrace.h" 26 26 + #include "reg.h" 26 27 27 28 #define SPRN_PVR 0x11F 28 29 #define PVR_8xx 0x00500000 ··· 621 620 622 621 int main(int argc, char **argv, char **envp) 623 622 { 624 624 - int pvr = 0; 625 625 - asm __volatile__ ("mfspr %0,%1" : "=r"(pvr) : "i"(SPRN_PVR)); 626 626 - if (pvr == PVR_8xx) 627 627 - is_8xx = true; 623 623 + is_8xx = mfspr(SPRN_PVR) == PVR_8xx; 628 624 629 625 return test_harness(ptrace_hwbreak, "ptrace-hwbreak"); 630 626 }

+1 -4

tools/testing/selftests/powerpc/ptrace/ptrace.h

reviewed

··· 745 745 /* Analyse TEXASR after TM failure */ 746 746 inline unsigned long get_tfiar(void) 747 747 { 748 748 - unsigned long ret; 749 749 - 750 750 - asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_TFIAR)); 751 751 - return ret; 748 748 + return mfspr(SPRN_TFIAR); 752 749 } 753 750 754 751 void analyse_texasr(unsigned long texasr)

+1 -1

tools/testing/selftests/powerpc/scripts/hmi.sh

reviewed

··· 36 36 37 37 # for each chip+core combination 38 38 # todo - less fragile parsing 39 39 - egrep -o 'OCC: Chip [0-9a-f]+ Core [0-9a-f]' < /sys/firmware/opal/msglog | 39 39 + grep -E -o 'OCC: Chip [0-9a-f]+ Core [0-9a-f]' < /sys/firmware/opal/msglog | 40 40 while read chipcore; do 41 41 chip=$(echo "$chipcore"|awk '{print $3}') 42 42 core=$(echo "$chipcore"|awk '{print $5}')

+2 -1

tools/testing/selftests/powerpc/security/flush_utils.c

reviewed

··· 14 14 #include <string.h> 15 15 #include <stdio.h> 16 16 #include <sys/utsname.h> 17 17 + #include "reg.h" 17 18 #include "utils.h" 18 19 #include "flush_utils.h" 19 20 ··· 80 79 init = 1; 81 80 } 82 81 83 83 - asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR)); 82 82 + mtspr(SPRN_DSCR, val); 84 83 }