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usb: dwc3: Select 2.0 or 3.0 clk base on maximum_speed

The dwc->maximum_speed is determined through the device capability and
designer's constraint through device tree binding. If none of them
applies, don't let the default coreConsultant setting in GUCTL1 to limit
the device operating speed.

Normally the default setting will not contradict the device capability
or device tree binding. This scenario was found through our internal
tests, not an actual bug in the wild.

Signed-off-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Link: https://lore.kernel.org/r/65003b0cc37c08a0d22996009f548247ad18c00c.1713308949.git.Thinh.Nguyen@synopsys.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Thinh Nguyen and committed by
Greg Kroah-Hartman 606c096a 3d1b6c9d

+7 -4
+7 -4
drivers/usb/dwc3/core.c
··· 1320 1320 if (dwc->parkmode_disable_hs_quirk) 1321 1321 reg |= DWC3_GUCTL1_PARKMODE_DISABLE_HS; 1322 1322 1323 - if (DWC3_VER_IS_WITHIN(DWC3, 290A, ANY) && 1324 - (dwc->maximum_speed == USB_SPEED_HIGH || 1325 - dwc->maximum_speed == USB_SPEED_FULL)) 1326 - reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK; 1323 + if (DWC3_VER_IS_WITHIN(DWC3, 290A, ANY)) { 1324 + if (dwc->maximum_speed == USB_SPEED_FULL || 1325 + dwc->maximum_speed == USB_SPEED_HIGH) 1326 + reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK; 1327 + else 1328 + reg &= ~DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK; 1329 + } 1327 1330 1328 1331 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 1329 1332 }