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drm/amd/display: Merge pipes for validate

Validation expects to operate on non-split pipes. This is
seen in dcn20_fast_validate_bw, which merges pipes for
validation. We weren't doing that in the non-fast path
which lead to validation failures when operating with
4-to-1 MPC and a writeback connector.

Co-developed by Claude Sonnet 4.5

Assisted-by: Claude:claude-sonnet-4.5
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Harry Wentland and committed by
Alex Deucher 606f6b17 c34cb0d8

+2
+2
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
··· 1641 1641 if (!pipes) 1642 1642 return false; 1643 1643 1644 + dcn20_merge_pipes_for_validate(dc, context); 1645 + 1644 1646 context->bw_ctx.dml.vba.maxMpcComb = 0; 1645 1647 context->bw_ctx.dml.vba.VoltageLevel = 0; 1646 1648 context->bw_ctx.dml.vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;