Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'tty-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty / serial driver updates from Greg KH:
"Here is the big set of tty and serial driver changes for 6.0-rc1.
It was delayed from last week as I wanted to make sure the last commit
here got some good testing in linux-next and elsewhere as it seemed to
show up only late in testing for some reason.
Nothing major here, just lots of cleanups from Jiri and Ilpo to make
the tty core cleaner (Jiri) and the rs485 code simpler to use (Ilpo).
Also included in here is the obligatory n_gsm updates from Daniel
Starke and lots of tiny driver updates and minor fixes and tweaks for
other smaller serial drivers.
All of these have been in linux-next for a while with no reported
problems"
* tag 'tty-6.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (186 commits)
tty: serial: qcom-geni-serial: Fix %lu -> %u in print statements
tty: amiserial: Fix comment typo
tty: serial: document uart_get_console()
tty: serial: serial_core, reformat kernel-doc for functions
Documentation: serial: link uart_ops properly
Documentation: serial: move GPIO kernel-doc to the functions
Documentation: serial: dedup kernel-doc for uart functions
Documentation: serial: move uart_ops documentation to the struct
dt-bindings: serial: snps-dw-apb-uart: Document Rockchip RV1126
serial: mvebu-uart: uart2 error bits clearing
tty: serial: fsl_lpuart: correct the count of break characters
serial: stm32: make info structs static to avoid sparse warnings
serial: fsl_lpuart: zero out parity bit in CS7 mode
tty: serial: qcom-geni-serial: Fix get_clk_div_rate() which otherwise could return a sub-optimal clock rate.
serial: 8250_bcm2835aux: Add missing clk_disable_unprepare()
tty: vt: initialize unicode screen buffer
serial: remove VR41XX serial driver
serial: 8250: lpc18xx: Remove redundant sanity check for RS485 flags
serial: 8250_dwlib: remove redundant sanity check for RS485 flags
dt_bindings: rs485: Correct delay values
...
+3344
-3188
+1
Documentation/devicetree/bindings/serial/8250.yaml
+1
Documentation/devicetree/bindings/serial/8250.yaml
+120
Documentation/devicetree/bindings/serial/mediatek,uart.yaml
+120
Documentation/devicetree/bindings/serial/mediatek,uart.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/serial/mediatek,uart.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: MediaTek Universal Asynchronous Receiver/Transmitter (UART)
8
+
9
+
maintainers:
10
+
- Matthias Brugger <matthias.bgg@gmail.com>
11
+
12
+
allOf:
13
+
- $ref: serial.yaml#
14
+
15
+
description: |
16
+
The MediaTek UART is based on the basic 8250 UART and compatible
17
+
with 16550A, with enhancements for high speed baud rates and
18
+
support for DMA.
19
+
20
+
properties:
21
+
compatible:
22
+
oneOf:
23
+
- const: mediatek,mt6577-uart
24
+
- items:
25
+
- enum:
26
+
- mediatek,mt2701-uart
27
+
- mediatek,mt2712-uart
28
+
- mediatek,mt6580-uart
29
+
- mediatek,mt6582-uart
30
+
- mediatek,mt6589-uart
31
+
- mediatek,mt6755-uart
32
+
- mediatek,mt6765-uart
33
+
- mediatek,mt6779-uart
34
+
- mediatek,mt6795-uart
35
+
- mediatek,mt6797-uart
36
+
- mediatek,mt7622-uart
37
+
- mediatek,mt7623-uart
38
+
- mediatek,mt7629-uart
39
+
- mediatek,mt7986-uart
40
+
- mediatek,mt8127-uart
41
+
- mediatek,mt8135-uart
42
+
- mediatek,mt8173-uart
43
+
- mediatek,mt8183-uart
44
+
- mediatek,mt8186-uart
45
+
- mediatek,mt8192-uart
46
+
- mediatek,mt8195-uart
47
+
- mediatek,mt8516-uart
48
+
- const: mediatek,mt6577-uart
49
+
50
+
reg:
51
+
description: The base address of the UART register bank
52
+
maxItems: 1
53
+
54
+
clocks:
55
+
minItems: 1
56
+
items:
57
+
- description: The clock the baudrate is derived from
58
+
- description: The bus clock for register accesses
59
+
60
+
clock-names:
61
+
minItems: 1
62
+
items:
63
+
- const: baud
64
+
- const: bus
65
+
66
+
dmas:
67
+
items:
68
+
- description: phandle to TX DMA
69
+
- description: phandle to RX DMA
70
+
71
+
dma-names:
72
+
items:
73
+
- const: tx
74
+
- const: rx
75
+
76
+
interrupts:
77
+
minItems: 1
78
+
maxItems: 2
79
+
80
+
interrupt-names:
81
+
description:
82
+
The UART interrupt and optionally the RX in-band wakeup interrupt.
83
+
minItems: 1
84
+
items:
85
+
- const: uart
86
+
- const: wakeup
87
+
88
+
pinctrl-0: true
89
+
pinctrl-1: true
90
+
91
+
pinctrl-names:
92
+
minItems: 1
93
+
items:
94
+
- const: default
95
+
- const: sleep
96
+
97
+
required:
98
+
- compatible
99
+
- reg
100
+
- clocks
101
+
- interrupts
102
+
103
+
unevaluatedProperties: false
104
+
105
+
examples:
106
+
- |
107
+
#include <dt-bindings/interrupt-controller/arm-gic.h>
108
+
109
+
serial@11006000 {
110
+
compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
111
+
reg = <0x11006000 0x400>;
112
+
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
113
+
<GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>;
114
+
interrupt-names = "uart", "wakeup";
115
+
clocks = <&uart_clk>, <&bus_clk>;
116
+
clock-names = "baud", "bus";
117
+
pinctrl-0 = <&uart_pin>;
118
+
pinctrl-1 = <&uart_pin_sleep>;
119
+
pinctrl-names = "default", "sleep";
120
+
};
-59
Documentation/devicetree/bindings/serial/mtk-uart.txt
-59
Documentation/devicetree/bindings/serial/mtk-uart.txt
···
1
-
* MediaTek Universal Asynchronous Receiver/Transmitter (UART)
2
-
3
-
Required properties:
4
-
- compatible should contain:
5
-
* "mediatek,mt2701-uart" for MT2701 compatible UARTS
6
-
* "mediatek,mt2712-uart" for MT2712 compatible UARTS
7
-
* "mediatek,mt6580-uart" for MT6580 compatible UARTS
8
-
* "mediatek,mt6582-uart" for MT6582 compatible UARTS
9
-
* "mediatek,mt6589-uart" for MT6589 compatible UARTS
10
-
* "mediatek,mt6755-uart" for MT6755 compatible UARTS
11
-
* "mediatek,mt6765-uart" for MT6765 compatible UARTS
12
-
* "mediatek,mt6779-uart" for MT6779 compatible UARTS
13
-
* "mediatek,mt6795-uart" for MT6795 compatible UARTS
14
-
* "mediatek,mt6797-uart" for MT6797 compatible UARTS
15
-
* "mediatek,mt7622-uart" for MT7622 compatible UARTS
16
-
* "mediatek,mt7623-uart" for MT7623 compatible UARTS
17
-
* "mediatek,mt7629-uart" for MT7629 compatible UARTS
18
-
* "mediatek,mt7986-uart", "mediatek,mt6577-uart" for MT7986 compatible UARTS
19
-
* "mediatek,mt8127-uart" for MT8127 compatible UARTS
20
-
* "mediatek,mt8135-uart" for MT8135 compatible UARTS
21
-
* "mediatek,mt8173-uart" for MT8173 compatible UARTS
22
-
* "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS
23
-
* "mediatek,mt8186-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS
24
-
* "mediatek,mt8192-uart", "mediatek,mt6577-uart" for MT8192 compatible UARTS
25
-
* "mediatek,mt8195-uart", "mediatek,mt6577-uart" for MT8195 compatible UARTS
26
-
* "mediatek,mt8516-uart" for MT8516 compatible UARTS
27
-
* "mediatek,mt6577-uart" for MT6577 and all of the above
28
-
29
-
- reg: The base address of the UART register bank.
30
-
31
-
- interrupts:
32
-
index 0: an interrupt specifier for the UART controller itself
33
-
index 1: optional, an interrupt specifier with edge sensitivity on Rx pin to
34
-
support Rx in-band wake up. If one would like to use this feature,
35
-
one must create an addtional pinctrl to reconfigure Rx pin to normal
36
-
GPIO before suspend.
37
-
38
-
- clocks : Must contain an entry for each entry in clock-names.
39
-
See ../clocks/clock-bindings.txt for details.
40
-
- clock-names:
41
-
- "baud": The clock the baudrate is derived from
42
-
- "bus": The bus clock for register accesses (optional)
43
-
44
-
For compatibility with older device trees an unnamed clock is used for the
45
-
baud clock if the baudclk does not exist. Do not use this for new designs.
46
-
47
-
Example:
48
-
49
-
uart0: serial@11006000 {
50
-
compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
51
-
reg = <0x11006000 0x400>;
52
-
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
53
-
<GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>;
54
-
clocks = <&uart_clk>, <&bus_clk>;
55
-
clock-names = "baud", "bus";
56
-
pinctrl-names = "default", "sleep";
57
-
pinctrl-0 = <&uart_pin>;
58
-
pinctrl-1 = <&uart_pin_sleep>;
59
-
};
+1
Documentation/devicetree/bindings/serial/renesas,hscif.yaml
+1
Documentation/devicetree/bindings/serial/renesas,hscif.yaml
+2
-2
Documentation/devicetree/bindings/serial/rs485.yaml
+2
-2
Documentation/devicetree/bindings/serial/rs485.yaml
···
22
22
- description: Delay between rts signal and beginning of data sent in
23
23
milliseconds. It corresponds to the delay before sending data.
24
24
default: 0
25
-
maximum: 1000
25
+
maximum: 100
26
26
- description: Delay between end of data sent and rts signal in milliseconds.
27
27
It corresponds to the delay after sending data and actual release
28
28
of the line.
29
29
default: 0
30
-
maximum: 1000
30
+
maximum: 100
31
31
32
32
rs485-rts-active-low:
33
33
description: drive RTS low when sending (default is high).
+2
Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
+2
Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
+18
-464
Documentation/driver-api/serial/driver.rst
+18
-464
Documentation/driver-api/serial/driver.rst
···
25
25
---------------
26
26
27
27
The serial core provides a few helper functions. This includes identifing
28
-
the correct port structure (via uart_get_console) and decoding command line
29
-
arguments (uart_parse_options).
28
+
the correct port structure (via uart_get_console()) and decoding command line
29
+
arguments (uart_parse_options()).
30
30
31
-
There is also a helper function (uart_console_write) which performs a
31
+
There is also a helper function (uart_console_write()) which performs a
32
32
character by character write, translating newlines to CRLF sequences.
33
33
Driver writers are recommended to use this function rather than implementing
34
34
their own version.
···
39
39
40
40
It is the responsibility of the low level hardware driver to perform the
41
41
necessary locking using port->lock. There are some exceptions (which
42
-
are described in the uart_ops listing below.)
42
+
are described in the struct uart_ops listing below.)
43
43
44
44
There are two locks. A per-port spinlock, and an overall semaphore.
45
45
···
63
63
uart_ops
64
64
--------
65
65
66
-
The uart_ops structure is the main interface between serial_core and the
67
-
hardware specific driver. It contains all the methods to control the
68
-
hardware.
69
-
70
-
tx_empty(port)
71
-
This function tests whether the transmitter fifo and shifter
72
-
for the port described by 'port' is empty. If it is empty,
73
-
this function should return TIOCSER_TEMT, otherwise return 0.
74
-
If the port does not support this operation, then it should
75
-
return TIOCSER_TEMT.
76
-
77
-
Locking: none.
78
-
79
-
Interrupts: caller dependent.
80
-
81
-
This call must not sleep
82
-
83
-
set_mctrl(port, mctrl)
84
-
This function sets the modem control lines for port described
85
-
by 'port' to the state described by mctrl. The relevant bits
86
-
of mctrl are:
87
-
88
-
- TIOCM_RTS RTS signal.
89
-
- TIOCM_DTR DTR signal.
90
-
- TIOCM_OUT1 OUT1 signal.
91
-
- TIOCM_OUT2 OUT2 signal.
92
-
- TIOCM_LOOP Set the port into loopback mode.
93
-
94
-
If the appropriate bit is set, the signal should be driven
95
-
active. If the bit is clear, the signal should be driven
96
-
inactive.
97
-
98
-
Locking: port->lock taken.
99
-
100
-
Interrupts: locally disabled.
101
-
102
-
This call must not sleep
103
-
104
-
get_mctrl(port)
105
-
Returns the current state of modem control inputs. The state
106
-
of the outputs should not be returned, since the core keeps
107
-
track of their state. The state information should include:
108
-
109
-
- TIOCM_CAR state of DCD signal
110
-
- TIOCM_CTS state of CTS signal
111
-
- TIOCM_DSR state of DSR signal
112
-
- TIOCM_RI state of RI signal
113
-
114
-
The bit is set if the signal is currently driven active. If
115
-
the port does not support CTS, DCD or DSR, the driver should
116
-
indicate that the signal is permanently active. If RI is
117
-
not available, the signal should not be indicated as active.
118
-
119
-
Locking: port->lock taken.
120
-
121
-
Interrupts: locally disabled.
122
-
123
-
This call must not sleep
124
-
125
-
stop_tx(port)
126
-
Stop transmitting characters. This might be due to the CTS
127
-
line becoming inactive or the tty layer indicating we want
128
-
to stop transmission due to an XOFF character.
129
-
130
-
The driver should stop transmitting characters as soon as
131
-
possible.
132
-
133
-
Locking: port->lock taken.
134
-
135
-
Interrupts: locally disabled.
136
-
137
-
This call must not sleep
138
-
139
-
start_tx(port)
140
-
Start transmitting characters.
141
-
142
-
Locking: port->lock taken.
143
-
144
-
Interrupts: locally disabled.
145
-
146
-
This call must not sleep
147
-
148
-
throttle(port)
149
-
Notify the serial driver that input buffers for the line discipline are
150
-
close to full, and it should somehow signal that no more characters
151
-
should be sent to the serial port.
152
-
This will be called only if hardware assisted flow control is enabled.
153
-
154
-
Locking: serialized with .unthrottle() and termios modification by the
155
-
tty layer.
156
-
157
-
unthrottle(port)
158
-
Notify the serial driver that characters can now be sent to the serial
159
-
port without fear of overrunning the input buffers of the line
160
-
disciplines.
161
-
162
-
This will be called only if hardware assisted flow control is enabled.
163
-
164
-
Locking: serialized with .throttle() and termios modification by the
165
-
tty layer.
166
-
167
-
send_xchar(port,ch)
168
-
Transmit a high priority character, even if the port is stopped.
169
-
This is used to implement XON/XOFF flow control and tcflow(). If
170
-
the serial driver does not implement this function, the tty core
171
-
will append the character to the circular buffer and then call
172
-
start_tx() / stop_tx() to flush the data out.
173
-
174
-
Do not transmit if ch == '\0' (__DISABLED_CHAR).
175
-
176
-
Locking: none.
177
-
178
-
Interrupts: caller dependent.
179
-
180
-
stop_rx(port)
181
-
Stop receiving characters; the port is in the process of
182
-
being closed.
183
-
184
-
Locking: port->lock taken.
185
-
186
-
Interrupts: locally disabled.
187
-
188
-
This call must not sleep
189
-
190
-
enable_ms(port)
191
-
Enable the modem status interrupts.
192
-
193
-
This method may be called multiple times. Modem status
194
-
interrupts should be disabled when the shutdown method is
195
-
called.
196
-
197
-
Locking: port->lock taken.
198
-
199
-
Interrupts: locally disabled.
200
-
201
-
This call must not sleep
202
-
203
-
break_ctl(port,ctl)
204
-
Control the transmission of a break signal. If ctl is
205
-
nonzero, the break signal should be transmitted. The signal
206
-
should be terminated when another call is made with a zero
207
-
ctl.
208
-
209
-
Locking: caller holds tty_port->mutex
210
-
211
-
startup(port)
212
-
Grab any interrupt resources and initialise any low level driver
213
-
state. Enable the port for reception. It should not activate
214
-
RTS nor DTR; this will be done via a separate call to set_mctrl.
215
-
216
-
This method will only be called when the port is initially opened.
217
-
218
-
Locking: port_sem taken.
219
-
220
-
Interrupts: globally disabled.
221
-
222
-
shutdown(port)
223
-
Disable the port, disable any break condition that may be in
224
-
effect, and free any interrupt resources. It should not disable
225
-
RTS nor DTR; this will have already been done via a separate
226
-
call to set_mctrl.
227
-
228
-
Drivers must not access port->state once this call has completed.
229
-
230
-
This method will only be called when there are no more users of
231
-
this port.
232
-
233
-
Locking: port_sem taken.
234
-
235
-
Interrupts: caller dependent.
236
-
237
-
flush_buffer(port)
238
-
Flush any write buffers, reset any DMA state and stop any
239
-
ongoing DMA transfers.
240
-
241
-
This will be called whenever the port->state->xmit circular
242
-
buffer is cleared.
243
-
244
-
Locking: port->lock taken.
245
-
246
-
Interrupts: locally disabled.
247
-
248
-
This call must not sleep
249
-
250
-
set_termios(port,termios,oldtermios)
251
-
Change the port parameters, including word length, parity, stop
252
-
bits. Update read_status_mask and ignore_status_mask to indicate
253
-
the types of events we are interested in receiving. Relevant
254
-
termios->c_cflag bits are:
255
-
256
-
CSIZE
257
-
- word size
258
-
CSTOPB
259
-
- 2 stop bits
260
-
PARENB
261
-
- parity enable
262
-
PARODD
263
-
- odd parity (when PARENB is in force)
264
-
CREAD
265
-
- enable reception of characters (if not set,
266
-
still receive characters from the port, but
267
-
throw them away.
268
-
CRTSCTS
269
-
- if set, enable CTS status change reporting
270
-
CLOCAL
271
-
- if not set, enable modem status change
272
-
reporting.
273
-
274
-
Relevant termios->c_iflag bits are:
275
-
276
-
INPCK
277
-
- enable frame and parity error events to be
278
-
passed to the TTY layer.
279
-
BRKINT / PARMRK
280
-
- both of these enable break events to be
281
-
passed to the TTY layer.
282
-
283
-
IGNPAR
284
-
- ignore parity and framing errors
285
-
IGNBRK
286
-
- ignore break errors, If IGNPAR is also
287
-
set, ignore overrun errors as well.
288
-
289
-
The interaction of the iflag bits is as follows (parity error
290
-
given as an example):
291
-
292
-
=============== ======= ====== =============================
293
-
Parity error INPCK IGNPAR
294
-
=============== ======= ====== =============================
295
-
n/a 0 n/a character received, marked as
296
-
TTY_NORMAL
297
-
None 1 n/a character received, marked as
298
-
TTY_NORMAL
299
-
Yes 1 0 character received, marked as
300
-
TTY_PARITY
301
-
Yes 1 1 character discarded
302
-
=============== ======= ====== =============================
303
-
304
-
Other flags may be used (eg, xon/xoff characters) if your
305
-
hardware supports hardware "soft" flow control.
306
-
307
-
Locking: caller holds tty_port->mutex
308
-
309
-
Interrupts: caller dependent.
310
-
311
-
This call must not sleep
312
-
313
-
set_ldisc(port,termios)
314
-
Notifier for discipline change. See ../tty/tty_ldisc.rst.
315
-
316
-
Locking: caller holds tty_port->mutex
317
-
318
-
pm(port,state,oldstate)
319
-
Perform any power management related activities on the specified
320
-
port. State indicates the new state (defined by
321
-
enum uart_pm_state), oldstate indicates the previous state.
322
-
323
-
This function should not be used to grab any resources.
324
-
325
-
This will be called when the port is initially opened and finally
326
-
closed, except when the port is also the system console. This
327
-
will occur even if CONFIG_PM is not set.
328
-
329
-
Locking: none.
330
-
331
-
Interrupts: caller dependent.
332
-
333
-
type(port)
334
-
Return a pointer to a string constant describing the specified
335
-
port, or return NULL, in which case the string 'unknown' is
336
-
substituted.
337
-
338
-
Locking: none.
339
-
340
-
Interrupts: caller dependent.
341
-
342
-
release_port(port)
343
-
Release any memory and IO region resources currently in use by
344
-
the port.
345
-
346
-
Locking: none.
347
-
348
-
Interrupts: caller dependent.
349
-
350
-
request_port(port)
351
-
Request any memory and IO region resources required by the port.
352
-
If any fail, no resources should be registered when this function
353
-
returns, and it should return -EBUSY on failure.
354
-
355
-
Locking: none.
356
-
357
-
Interrupts: caller dependent.
358
-
359
-
config_port(port,type)
360
-
Perform any autoconfiguration steps required for the port. `type`
361
-
contains a bit mask of the required configuration. UART_CONFIG_TYPE
362
-
indicates that the port requires detection and identification.
363
-
port->type should be set to the type found, or PORT_UNKNOWN if
364
-
no port was detected.
365
-
366
-
UART_CONFIG_IRQ indicates autoconfiguration of the interrupt signal,
367
-
which should be probed using standard kernel autoprobing techniques.
368
-
This is not necessary on platforms where ports have interrupts
369
-
internally hard wired (eg, system on a chip implementations).
370
-
371
-
Locking: none.
372
-
373
-
Interrupts: caller dependent.
374
-
375
-
verify_port(port,serinfo)
376
-
Verify the new serial port information contained within serinfo is
377
-
suitable for this port type.
378
-
379
-
Locking: none.
380
-
381
-
Interrupts: caller dependent.
382
-
383
-
ioctl(port,cmd,arg)
384
-
Perform any port specific IOCTLs. IOCTL commands must be defined
385
-
using the standard numbering system found in <asm/ioctl.h>
386
-
387
-
Locking: none.
388
-
389
-
Interrupts: caller dependent.
390
-
391
-
poll_init(port)
392
-
Called by kgdb to perform the minimal hardware initialization needed
393
-
to support poll_put_char() and poll_get_char(). Unlike ->startup()
394
-
this should not request interrupts.
395
-
396
-
Locking: tty_mutex and tty_port->mutex taken.
397
-
398
-
Interrupts: n/a.
399
-
400
-
poll_put_char(port,ch)
401
-
Called by kgdb to write a single character directly to the serial
402
-
port. It can and should block until there is space in the TX FIFO.
403
-
404
-
Locking: none.
405
-
406
-
Interrupts: caller dependent.
407
-
408
-
This call must not sleep
409
-
410
-
poll_get_char(port)
411
-
Called by kgdb to read a single character directly from the serial
412
-
port. If data is available, it should be returned; otherwise
413
-
the function should return NO_POLL_CHAR immediately.
414
-
415
-
Locking: none.
416
-
417
-
Interrupts: caller dependent.
418
-
419
-
This call must not sleep
66
+
.. kernel-doc:: include/linux/serial_core.h
67
+
:identifiers: uart_ops
420
68
421
69
Other functions
422
70
---------------
423
71
424
-
uart_update_timeout(port,cflag,baud)
425
-
Update the FIFO drain timeout, port->timeout, according to the
426
-
number of bits, parity, stop bits and baud rate.
427
-
428
-
Locking: caller is expected to take port->lock
429
-
430
-
Interrupts: n/a
431
-
432
-
uart_get_baud_rate(port,termios,old,min,max)
433
-
Return the numeric baud rate for the specified termios, taking
434
-
account of the special 38400 baud "kludge". The B0 baud rate
435
-
is mapped to 9600 baud.
436
-
437
-
If the baud rate is not within min..max, then if old is non-NULL,
438
-
the original baud rate will be tried. If that exceeds the
439
-
min..max constraint, 9600 baud will be returned. termios will
440
-
be updated to the baud rate in use.
441
-
442
-
Note: min..max must always allow 9600 baud to be selected.
443
-
444
-
Locking: caller dependent.
445
-
446
-
Interrupts: n/a
447
-
448
-
uart_get_divisor(port,baud)
449
-
Return the divisor (baud_base / baud) for the specified baud
450
-
rate, appropriately rounded.
451
-
452
-
If 38400 baud and custom divisor is selected, return the
453
-
custom divisor instead.
454
-
455
-
Locking: caller dependent.
456
-
457
-
Interrupts: n/a
458
-
459
-
uart_match_port(port1,port2)
460
-
This utility function can be used to determine whether two
461
-
uart_port structures describe the same port.
462
-
463
-
Locking: n/a
464
-
465
-
Interrupts: n/a
466
-
467
-
uart_write_wakeup(port)
468
-
A driver is expected to call this function when the number of
469
-
characters in the transmit buffer have dropped below a threshold.
470
-
471
-
Locking: port->lock should be held.
472
-
473
-
Interrupts: n/a
474
-
475
-
uart_register_driver(drv)
476
-
Register a uart driver with the core driver. We in turn register
477
-
with the tty layer, and initialise the core driver per-port state.
478
-
479
-
drv->port should be NULL, and the per-port structures should be
480
-
registered using uart_add_one_port after this call has succeeded.
481
-
482
-
Locking: none
483
-
484
-
Interrupts: enabled
485
-
486
-
uart_unregister_driver()
487
-
Remove all references to a driver from the core driver. The low
488
-
level driver must have removed all its ports via the
489
-
uart_remove_one_port() if it registered them with uart_add_one_port().
490
-
491
-
Locking: none
492
-
493
-
Interrupts: enabled
494
-
495
-
**uart_suspend_port()**
496
-
497
-
**uart_resume_port()**
498
-
499
-
**uart_add_one_port()**
500
-
501
-
**uart_remove_one_port()**
72
+
.. kernel-doc:: drivers/tty/serial/serial_core.c
73
+
:identifiers: uart_update_timeout uart_get_baud_rate uart_get_divisor
74
+
uart_match_port uart_write_wakeup uart_register_driver
75
+
uart_unregister_driver uart_suspend_port uart_resume_port
76
+
uart_add_one_port uart_remove_one_port uart_console_write
77
+
uart_parse_earlycon uart_parse_options uart_set_options
78
+
uart_get_lsr_info uart_handle_dcd_change uart_handle_cts_change
79
+
uart_try_toggle_sysrq uart_get_console
502
80
503
81
Other notes
504
82
-----------
···
97
519
98
520
Some helpers are provided in order to set/get modem control lines via GPIO.
99
521
100
-
mctrl_gpio_init(port, idx):
101
-
This will get the {cts,rts,...}-gpios from device tree if they are
102
-
present and request them, set direction etc, and return an
103
-
allocated structure. `devm_*` functions are used, so there's no need
104
-
to call mctrl_gpio_free().
105
-
As this sets up the irq handling make sure to not handle changes to the
106
-
gpio input lines in your driver, too.
107
-
108
-
mctrl_gpio_free(dev, gpios):
109
-
This will free the requested gpios in mctrl_gpio_init().
110
-
As `devm_*` functions are used, there's generally no need to call
111
-
this function.
112
-
113
-
mctrl_gpio_to_gpiod(gpios, gidx)
114
-
This returns the gpio_desc structure associated to the modem line
115
-
index.
116
-
117
-
mctrl_gpio_set(gpios, mctrl):
118
-
This will sets the gpios according to the mctrl state.
119
-
120
-
mctrl_gpio_get(gpios, mctrl):
121
-
This will update mctrl with the gpios values.
122
-
123
-
mctrl_gpio_enable_ms(gpios):
124
-
Enables irqs and handling of changes to the ms lines.
125
-
126
-
mctrl_gpio_disable_ms(gpios):
127
-
Disables irqs and handling of changes to the ms lines.
522
+
.. kernel-doc:: drivers/tty/serial/serial_mctrl_gpio.c
523
+
:identifiers: mctrl_gpio_init mctrl_gpio_free mctrl_gpio_to_gpiod
524
+
mctrl_gpio_set mctrl_gpio_get mctrl_gpio_enable_ms
525
+
mctrl_gpio_disable_ms
+33
-5
Documentation/driver-api/serial/serial-rs485.rst
+33
-5
Documentation/driver-api/serial/serial-rs485.rst
···
38
38
the values given by the device tree.
39
39
40
40
Any driver for devices capable of working both as RS232 and RS485 should
41
-
implement the rs485_config callback in the uart_port structure. The
42
-
serial_core calls rs485_config to do the device specific part in response
43
-
to TIOCSRS485 and TIOCGRS485 ioctls (see below). The rs485_config callback
44
-
receives a pointer to struct serial_rs485.
41
+
implement the rs485_config callback and provide rs485_supported in the
42
+
uart_port structure. The serial core calls rs485_config to do the device
43
+
specific part in response to TIOCSRS485 ioctl (see below). The rs485_config
44
+
callback receives a pointer to a sanitizated serial_rs485 structure. The
45
+
serial_rs485 userspace provides is sanitized before calling rs485_config
46
+
using rs485_supported that indicates what RS485 features the driver supports
47
+
for the uart_port. TIOCGRS485 ioctl can be used to read back the
48
+
serial_rs485 structure matching to the current configuration.
45
49
46
50
4. Usage from user-level
47
51
========================
···
99
95
/* Error handling. See errno. */
100
96
}
101
97
102
-
5. References
98
+
5. Multipoint Addressing
99
+
========================
100
+
101
+
The Linux kernel provides addressing mode for multipoint RS-485 serial
102
+
communications line. The addressing mode is enabled with SER_RS485_ADDRB
103
+
flag in serial_rs485. Struct serial_rs485 has two additional flags and
104
+
fields for enabling receive and destination addresses.
105
+
106
+
Address mode flags:
107
+
- SER_RS485_ADDRB: Enabled addressing mode (sets also ADDRB in termios).
108
+
- SER_RS485_ADDR_RECV: Receive (filter) address enabled.
109
+
- SER_RS485_ADDR_DEST: Set destination address.
110
+
111
+
Address fields (enabled with corresponding SER_RS485_ADDR_* flag):
112
+
- addr_recv: Receive address.
113
+
- addr_dest: Destination address.
114
+
115
+
Once a receive address is set, the communication can occur only with the
116
+
particular device and other peers are filtered out. It is left up to the
117
+
receiver side to enforce the filtering. Receive address will be cleared
118
+
if SER_RS485_ADDR_RECV is not set.
119
+
120
+
Note: not all devices supporting RS485 support multipoint addressing.
121
+
122
+
6. References
103
123
=============
104
124
105
125
[1] include/uapi/linux/serial.h
+2
-1
MAINTAINERS
+2
-1
MAINTAINERS
···
19622
19622
F: drivers/gpio/gpio-creg-snps.c
19623
19623
19624
19624
SYNOPSYS DESIGNWARE 8250 UART DRIVER
19625
+
M: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
19625
19626
R: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
19626
-
S: Maintained
19627
+
S: Supported
19627
19628
F: drivers/tty/serial/8250/8250_dw.c
19628
19629
F: drivers/tty/serial/8250/8250_dwlib.*
19629
19630
F: drivers/tty/serial/8250/8250_lpss.c
+7
-10
arch/mips/ath79/early_printk.c
+7
-10
arch/mips/ath79/early_printk.c
···
8
8
9
9
#include <linux/io.h>
10
10
#include <linux/errno.h>
11
+
#include <linux/serial.h>
11
12
#include <linux/serial_reg.h>
12
13
#include <asm/addrspace.h>
13
14
#include <asm/setup.h>
···
19
18
20
19
static void (*_prom_putchar)(char);
21
20
22
-
static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val)
21
+
static inline void prom_putchar_wait(void __iomem *reg, u32 val)
23
22
{
24
23
u32 t;
25
24
26
25
do {
27
26
t = __raw_readl(reg);
28
-
if ((t & mask) == val)
27
+
if ((t & val) == val)
29
28
break;
30
29
} while (1);
31
30
}
32
-
33
-
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
34
31
35
32
static void prom_putchar_ar71xx(char ch)
36
33
{
37
34
void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));
38
35
39
-
prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
36
+
prom_putchar_wait(base + UART_LSR * 4, UART_LSR_BOTH_EMPTY);
40
37
__raw_writel((unsigned char)ch, base + UART_TX * 4);
41
-
prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
38
+
prom_putchar_wait(base + UART_LSR * 4, UART_LSR_BOTH_EMPTY);
42
39
}
43
40
44
41
static void prom_putchar_ar933x(char ch)
45
42
{
46
43
void __iomem *base = (void __iomem *)(KSEG1ADDR(AR933X_UART_BASE));
47
44
48
-
prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
49
-
AR933X_UART_DATA_TX_CSR);
45
+
prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR);
50
46
__raw_writel(AR933X_UART_DATA_TX_CSR | (unsigned char)ch,
51
47
base + AR933X_UART_DATA_REG);
52
-
prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR,
53
-
AR933X_UART_DATA_TX_CSR);
48
+
prom_putchar_wait(base + AR933X_UART_DATA_REG, AR933X_UART_DATA_TX_CSR);
54
49
}
55
50
56
51
static void prom_putchar_dummy(char ch)
+1
-1
drivers/accessibility/braille/braille_console.c
+1
-1
drivers/accessibility/braille/braille_console.c
+1
-1
drivers/accessibility/speakup/main.c
+1
-1
drivers/accessibility/speakup/main.c
+1
-2
drivers/accessibility/speakup/serialio.h
+1
-2
drivers/accessibility/speakup/serialio.h
···
33
33
#define NUM_DISABLE_TIMEOUTS 3
34
34
/* buffer timeout in ms */
35
35
#define SPK_TIMEOUT 100
36
-
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
37
36
38
37
#define spk_serial_tx_busy() \
39
-
((inb(speakup_info.port_tts + UART_LSR) & BOTH_EMPTY) != BOTH_EMPTY)
38
+
(!uart_lsr_tx_empty(inb(speakup_info.port_tts + UART_LSR)))
40
39
41
40
#endif
+3
-1
drivers/of/fdt.c
+3
-1
drivers/of/fdt.c
···
1024
1024
int l;
1025
1025
const struct earlycon_id *match;
1026
1026
const void *fdt = initial_boot_params;
1027
+
int ret;
1027
1028
1028
1029
offset = fdt_path_offset(fdt, "/chosen");
1029
1030
if (offset < 0)
···
1057
1056
if (fdt_node_check_compatible(fdt, offset, match->compatible))
1058
1057
continue;
1059
1058
1060
-
if (of_setup_earlycon(match, offset, options) == 0)
1059
+
ret = of_setup_earlycon(match, offset, options);
1060
+
if (!ret || ret == -EALREADY)
1061
1061
return 0;
1062
1062
}
1063
1063
return -ENODEV;
+10
-10
drivers/tty/amiserial.c
+10
-10
drivers/tty/amiserial.c
···
12
12
* (non hardware specific) changes to serial.c.
13
13
*
14
14
* The port is registered with the tty driver as minor device 64, and
15
-
* therefore other ports should should only use 65 upwards.
15
+
* therefore other ports should only use 65 upwards.
16
16
*
17
17
* Richard Lucock 28/12/99
18
18
*
···
51
51
#include <linux/seq_file.h>
52
52
#include <linux/serial.h>
53
53
#include <linux/serial_reg.h>
54
+
#include <linux/serial_core.h>
54
55
#include <linux/sched.h>
55
56
#include <linux/signal.h>
56
57
#include <linux/slab.h>
···
284
283
285
284
amiga_custom.serdat = info->xmit.buf[info->xmit.tail++] | 0x100;
286
285
mb();
287
-
info->xmit.tail = info->xmit.tail & (SERIAL_XMIT_SIZE-1);
286
+
info->xmit.tail = info->xmit.tail & (UART_XMIT_SIZE - 1);
288
287
info->icount.tx++;
289
288
290
289
if (CIRC_CNT(info->xmit.head,
291
290
info->xmit.tail,
292
-
SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
291
+
UART_XMIT_SIZE) < WAKEUP_CHARS)
293
292
tty_wakeup(info->tport.tty);
294
293
295
294
#ifdef SERIAL_DEBUG_INTR
···
709
708
local_irq_save(flags);
710
709
if (CIRC_SPACE(info->xmit.head,
711
710
info->xmit.tail,
712
-
SERIAL_XMIT_SIZE) == 0) {
711
+
UART_XMIT_SIZE) == 0) {
713
712
local_irq_restore(flags);
714
713
return 0;
715
714
}
716
715
717
716
info->xmit.buf[info->xmit.head++] = ch;
718
-
info->xmit.head &= SERIAL_XMIT_SIZE-1;
717
+
info->xmit.head &= UART_XMIT_SIZE - 1;
719
718
local_irq_restore(flags);
720
719
return 1;
721
720
}
···
754
753
while (1) {
755
754
c = CIRC_SPACE_TO_END(info->xmit.head,
756
755
info->xmit.tail,
757
-
SERIAL_XMIT_SIZE);
756
+
UART_XMIT_SIZE);
758
757
if (count < c)
759
758
c = count;
760
759
if (c <= 0) {
761
760
break;
762
761
}
763
762
memcpy(info->xmit.buf + info->xmit.head, buf, c);
764
-
info->xmit.head = ((info->xmit.head + c) &
765
-
(SERIAL_XMIT_SIZE-1));
763
+
info->xmit.head = (info->xmit.head + c) & (UART_XMIT_SIZE - 1);
766
764
buf += c;
767
765
count -= c;
768
766
ret += c;
···
788
788
{
789
789
struct serial_state *info = tty->driver_data;
790
790
791
-
return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
791
+
return CIRC_SPACE(info->xmit.head, info->xmit.tail, UART_XMIT_SIZE);
792
792
}
793
793
794
794
static unsigned int rs_chars_in_buffer(struct tty_struct *tty)
795
795
{
796
796
struct serial_state *info = tty->driver_data;
797
797
798
-
return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
798
+
return CIRC_CNT(info->xmit.head, info->xmit.tail, UART_XMIT_SIZE);
799
799
}
800
800
801
801
static void rs_flush_buffer(struct tty_struct *tty)
+2
-2
drivers/tty/mips_ejtag_fdc.c
+2
-2
drivers/tty/mips_ejtag_fdc.c
···
916
916
mips_ejtag_fdc_write(priv, REG_FDCFG, cfg);
917
917
918
918
/* Make each port's xmit FIFO big enough to fill FDC TX FIFO */
919
-
priv->xmit_size = min(tx_fifo * 4, (unsigned int)SERIAL_XMIT_SIZE);
919
+
priv->xmit_size = min(tx_fifo * 4, (unsigned int)UART_XMIT_SIZE);
920
920
921
921
driver = tty_alloc_driver(NUM_TTY_CHANNELS, TTY_DRIVER_REAL_RAW);
922
922
if (IS_ERR(driver))
···
1222
1222
1223
1223
/* Construct a word from any data in buffer */
1224
1224
word = mips_ejtag_fdc_encode(bufs, &kgdbfdc_wbuflen, 1);
1225
-
/* Relocate any remaining data to beginnning of buffer */
1225
+
/* Relocate any remaining data to beginning of buffer */
1226
1226
kgdbfdc_wbuflen -= word.bytes;
1227
1227
for (i = 0; i < kgdbfdc_wbuflen; ++i)
1228
1228
kgdbfdc_wbuf[i] = kgdbfdc_wbuf[i + word.bytes];
+540
-215
drivers/tty/n_gsm.c
+540
-215
drivers/tty/n_gsm.c
···
5
5
*
6
6
* * THIS IS A DEVELOPMENT SNAPSHOT IT IS NOT A FINAL RELEASE *
7
7
*
8
+
* Outgoing path:
9
+
* tty -> DLCI fifo -> scheduler -> GSM MUX data queue ---o-> ldisc
10
+
* control message -> GSM MUX control queue --´
11
+
*
12
+
* Incoming path:
13
+
* ldisc -> gsm_queue() -o--> tty
14
+
* `-> gsm_control_response()
15
+
*
8
16
* TO DO:
9
17
* Mostly done: ioctls for setting modes/timing
10
18
* Partly done: hooks so you can pull off frames to non tty devs
···
218
210
/* Events on the GSM channel */
219
211
wait_queue_head_t event;
220
212
213
+
/* ldisc send work */
214
+
struct work_struct tx_work;
215
+
221
216
/* Bits for GSM mode decoding */
222
217
223
218
/* Framing Layer */
···
246
235
struct gsm_dlci *dlci[NUM_DLCI];
247
236
int old_c_iflag; /* termios c_iflag value before attach */
248
237
bool constipated; /* Asked by remote to shut up */
238
+
bool has_devices; /* Devices were registered */
249
239
250
240
spinlock_t tx_lock;
251
241
unsigned int tx_bytes; /* TX data outstanding */
252
242
#define TX_THRESH_HI 8192
253
243
#define TX_THRESH_LO 2048
254
-
struct list_head tx_list; /* Pending data packets */
244
+
struct list_head tx_ctrl_list; /* Pending control packets */
245
+
struct list_head tx_data_list; /* Pending data packets */
255
246
256
247
/* Control messages */
248
+
struct timer_list kick_timer; /* Kick TX queuing on timeout */
257
249
struct timer_list t2_timer; /* Retransmit timer for commands */
258
250
int cretries; /* Command retry counter */
259
251
struct gsm_control *pending_cmd;/* Our current pending command */
···
383
369
384
370
static int gsmld_output(struct gsm_mux *gsm, u8 *data, int len);
385
371
static int gsm_modem_update(struct gsm_dlci *dlci, u8 brk);
372
+
static struct gsm_msg *gsm_data_alloc(struct gsm_mux *gsm, u8 addr, int len,
373
+
u8 ctrl);
374
+
static int gsm_send_packet(struct gsm_mux *gsm, struct gsm_msg *msg);
375
+
static void gsmld_write_trigger(struct gsm_mux *gsm);
376
+
static void gsmld_write_task(struct work_struct *work);
386
377
387
378
/**
388
379
* gsm_fcs_add - update FCS
···
439
420
}
440
421
441
422
/**
423
+
* gsm_read_ea_val - read a value until EA
424
+
* @val: variable holding value
425
+
* @data: buffer of data
426
+
* @dlen: length of data
427
+
*
428
+
* Processes an EA value. Updates the passed variable and
429
+
* returns the processed data length.
430
+
*/
431
+
static unsigned int gsm_read_ea_val(unsigned int *val, const u8 *data, int dlen)
432
+
{
433
+
unsigned int len = 0;
434
+
435
+
for (; dlen > 0; dlen--) {
436
+
len++;
437
+
if (gsm_read_ea(val, *data++))
438
+
break;
439
+
}
440
+
return len;
441
+
}
442
+
443
+
/**
442
444
* gsm_encode_modem - encode modem data bits
443
445
* @dlci: DLCI to encode from
444
446
*
···
501
461
print_hex_dump(KERN_INFO, prefix, DUMP_PREFIX_OFFSET, 16, 1, data, len,
502
462
true);
503
463
kfree(prefix);
464
+
}
465
+
466
+
/**
467
+
* gsm_register_devices - register all tty devices for a given mux index
468
+
*
469
+
* @driver: the tty driver that describes the tty devices
470
+
* @index: the mux number is used to calculate the minor numbers of the
471
+
* ttys for this mux and may differ from the position in the
472
+
* mux array.
473
+
*/
474
+
static int gsm_register_devices(struct tty_driver *driver, unsigned int index)
475
+
{
476
+
struct device *dev;
477
+
int i;
478
+
unsigned int base;
479
+
480
+
if (!driver || index >= MAX_MUX)
481
+
return -EINVAL;
482
+
483
+
base = index * NUM_DLCI; /* first minor for this index */
484
+
for (i = 1; i < NUM_DLCI; i++) {
485
+
/* Don't register device 0 - this is the control channel
486
+
* and not a usable tty interface
487
+
*/
488
+
dev = tty_register_device(gsm_tty_driver, base + i, NULL);
489
+
if (IS_ERR(dev)) {
490
+
if (debug & 8)
491
+
pr_info("%s failed to register device minor %u",
492
+
__func__, base + i);
493
+
for (i--; i >= 1; i--)
494
+
tty_unregister_device(gsm_tty_driver, base + i);
495
+
return PTR_ERR(dev);
496
+
}
497
+
}
498
+
499
+
return 0;
500
+
}
501
+
502
+
/**
503
+
* gsm_unregister_devices - unregister all tty devices for a given mux index
504
+
*
505
+
* @driver: the tty driver that describes the tty devices
506
+
* @index: the mux number is used to calculate the minor numbers of the
507
+
* ttys for this mux and may differ from the position in the
508
+
* mux array.
509
+
*/
510
+
static void gsm_unregister_devices(struct tty_driver *driver,
511
+
unsigned int index)
512
+
{
513
+
int i;
514
+
unsigned int base;
515
+
516
+
if (!driver || index >= MAX_MUX)
517
+
return;
518
+
519
+
base = index * NUM_DLCI; /* first minor for this index */
520
+
for (i = 1; i < NUM_DLCI; i++) {
521
+
/* Don't unregister device 0 - this is the control
522
+
* channel and not a usable tty interface
523
+
*/
524
+
tty_unregister_device(gsm_tty_driver, base + i);
525
+
}
504
526
}
505
527
506
528
/**
···
672
570
* @cr: command/response bit seen as initiator
673
571
* @control: control byte including PF bit
674
572
*
675
-
* Format up and transmit a control frame. These do not go via the
676
-
* queueing logic as they should be transmitted ahead of data when
677
-
* they are needed.
678
-
*
679
-
* FIXME: Lock versus data TX path
573
+
* Format up and transmit a control frame. These should be transmitted
574
+
* ahead of data when they are needed.
680
575
*/
681
-
682
-
static void gsm_send(struct gsm_mux *gsm, int addr, int cr, int control)
576
+
static int gsm_send(struct gsm_mux *gsm, int addr, int cr, int control)
683
577
{
684
-
int len;
685
-
u8 cbuf[10];
686
-
u8 ibuf[3];
578
+
struct gsm_msg *msg;
579
+
u8 *dp;
687
580
int ocr;
581
+
unsigned long flags;
582
+
583
+
msg = gsm_data_alloc(gsm, addr, 0, control);
584
+
if (!msg)
585
+
return -ENOMEM;
688
586
689
587
/* toggle C/R coding if not initiator */
690
588
ocr = cr ^ (gsm->initiator ? 0 : 1);
691
589
692
-
switch (gsm->encoding) {
693
-
case 0:
694
-
cbuf[0] = GSM0_SOF;
695
-
cbuf[1] = (addr << 2) | (ocr << 1) | EA;
696
-
cbuf[2] = control;
697
-
cbuf[3] = EA; /* Length of data = 0 */
698
-
cbuf[4] = 0xFF - gsm_fcs_add_block(INIT_FCS, cbuf + 1, 3);
699
-
cbuf[5] = GSM0_SOF;
700
-
len = 6;
701
-
break;
702
-
case 1:
703
-
case 2:
704
-
/* Control frame + packing (but not frame stuffing) in mode 1 */
705
-
ibuf[0] = (addr << 2) | (ocr << 1) | EA;
706
-
ibuf[1] = control;
707
-
ibuf[2] = 0xFF - gsm_fcs_add_block(INIT_FCS, ibuf, 2);
708
-
/* Stuffing may double the size worst case */
709
-
len = gsm_stuff_frame(ibuf, cbuf + 1, 3);
710
-
/* Now add the SOF markers */
711
-
cbuf[0] = GSM1_SOF;
712
-
cbuf[len + 1] = GSM1_SOF;
713
-
/* FIXME: we can omit the lead one in many cases */
714
-
len += 2;
715
-
break;
716
-
default:
717
-
WARN_ON(1);
718
-
return;
590
+
msg->data -= 3;
591
+
dp = msg->data;
592
+
*dp++ = (addr << 2) | (ocr << 1) | EA;
593
+
*dp++ = control;
594
+
595
+
if (gsm->encoding == 0)
596
+
*dp++ = EA; /* Length of data = 0 */
597
+
598
+
*dp = 0xFF - gsm_fcs_add_block(INIT_FCS, msg->data, dp - msg->data);
599
+
msg->len = (dp - msg->data) + 1;
600
+
601
+
gsm_print_packet("Q->", addr, cr, control, NULL, 0);
602
+
603
+
spin_lock_irqsave(&gsm->tx_lock, flags);
604
+
list_add_tail(&msg->list, &gsm->tx_ctrl_list);
605
+
gsm->tx_bytes += msg->len;
606
+
spin_unlock_irqrestore(&gsm->tx_lock, flags);
607
+
gsmld_write_trigger(gsm);
608
+
609
+
return 0;
610
+
}
611
+
612
+
/**
613
+
* gsm_dlci_clear_queues - remove outstanding data for a DLCI
614
+
* @gsm: mux
615
+
* @dlci: clear for this DLCI
616
+
*
617
+
* Clears the data queues for a given DLCI.
618
+
*/
619
+
static void gsm_dlci_clear_queues(struct gsm_mux *gsm, struct gsm_dlci *dlci)
620
+
{
621
+
struct gsm_msg *msg, *nmsg;
622
+
int addr = dlci->addr;
623
+
unsigned long flags;
624
+
625
+
/* Clear DLCI write fifo first */
626
+
spin_lock_irqsave(&dlci->lock, flags);
627
+
kfifo_reset(&dlci->fifo);
628
+
spin_unlock_irqrestore(&dlci->lock, flags);
629
+
630
+
/* Clear data packets in MUX write queue */
631
+
spin_lock_irqsave(&gsm->tx_lock, flags);
632
+
list_for_each_entry_safe(msg, nmsg, &gsm->tx_data_list, list) {
633
+
if (msg->addr != addr)
634
+
continue;
635
+
gsm->tx_bytes -= msg->len;
636
+
list_del(&msg->list);
637
+
kfree(msg);
719
638
}
720
-
gsmld_output(gsm, cbuf, len);
721
-
if (!gsm->initiator) {
722
-
cr = cr & gsm->initiator;
723
-
control = control & ~PF;
724
-
}
725
-
gsm_print_packet("-->", addr, cr, control, NULL, 0);
639
+
spin_unlock_irqrestore(&gsm->tx_lock, flags);
726
640
}
727
641
728
642
/**
···
801
683
}
802
684
803
685
/**
804
-
* gsm_data_kick - poke the queue
686
+
* gsm_send_packet - sends a single packet
805
687
* @gsm: GSM Mux
806
-
* @dlci: DLCI sending the data
688
+
* @msg: packet to send
689
+
*
690
+
* The given packet is encoded and sent out. No memory is freed.
691
+
* The caller must hold the gsm tx lock.
692
+
*/
693
+
static int gsm_send_packet(struct gsm_mux *gsm, struct gsm_msg *msg)
694
+
{
695
+
int len, ret;
696
+
697
+
698
+
if (gsm->encoding == 0) {
699
+
gsm->txframe[0] = GSM0_SOF;
700
+
memcpy(gsm->txframe + 1, msg->data, msg->len);
701
+
gsm->txframe[msg->len + 1] = GSM0_SOF;
702
+
len = msg->len + 2;
703
+
} else {
704
+
gsm->txframe[0] = GSM1_SOF;
705
+
len = gsm_stuff_frame(msg->data, gsm->txframe + 1, msg->len);
706
+
gsm->txframe[len + 1] = GSM1_SOF;
707
+
len += 2;
708
+
}
709
+
710
+
if (debug & 4)
711
+
gsm_hex_dump_bytes(__func__, gsm->txframe, len);
712
+
gsm_print_packet("-->", msg->addr, gsm->initiator, msg->ctrl, msg->data,
713
+
msg->len);
714
+
715
+
ret = gsmld_output(gsm, gsm->txframe, len);
716
+
if (ret <= 0)
717
+
return ret;
718
+
/* FIXME: Can eliminate one SOF in many more cases */
719
+
gsm->tx_bytes -= msg->len;
720
+
721
+
return 0;
722
+
}
723
+
724
+
/**
725
+
* gsm_is_flow_ctrl_msg - checks if flow control message
726
+
* @msg: message to check
727
+
*
728
+
* Returns true if the given message is a flow control command of the
729
+
* control channel. False is returned in any other case.
730
+
*/
731
+
static bool gsm_is_flow_ctrl_msg(struct gsm_msg *msg)
732
+
{
733
+
unsigned int cmd;
734
+
735
+
if (msg->addr > 0)
736
+
return false;
737
+
738
+
switch (msg->ctrl & ~PF) {
739
+
case UI:
740
+
case UIH:
741
+
cmd = 0;
742
+
if (gsm_read_ea_val(&cmd, msg->data + 2, msg->len - 2) < 1)
743
+
break;
744
+
switch (cmd & ~PF) {
745
+
case CMD_FCOFF:
746
+
case CMD_FCON:
747
+
return true;
748
+
}
749
+
break;
750
+
}
751
+
752
+
return false;
753
+
}
754
+
755
+
/**
756
+
* gsm_data_kick - poke the queue
757
+
* @gsm: GSM Mux
807
758
*
808
759
* The tty device has called us to indicate that room has appeared in
809
-
* the transmit queue. Ram more data into the pipe if we have any
760
+
* the transmit queue. Ram more data into the pipe if we have any.
810
761
* If we have been flow-stopped by a CMD_FCOFF, then we can only
811
-
* send messages on DLCI0 until CMD_FCON
812
-
*
813
-
* FIXME: lock against link layer control transmissions
762
+
* send messages on DLCI0 until CMD_FCON. The caller must hold
763
+
* the gsm tx lock.
814
764
*/
815
-
816
-
static void gsm_data_kick(struct gsm_mux *gsm, struct gsm_dlci *dlci)
765
+
static int gsm_data_kick(struct gsm_mux *gsm)
817
766
{
818
767
struct gsm_msg *msg, *nmsg;
819
-
int len;
768
+
struct gsm_dlci *dlci;
769
+
int ret;
820
770
821
-
list_for_each_entry_safe(msg, nmsg, &gsm->tx_list, list) {
822
-
if (gsm->constipated && msg->addr)
771
+
clear_bit(TTY_DO_WRITE_WAKEUP, &gsm->tty->flags);
772
+
773
+
/* Serialize control messages and control channel messages first */
774
+
list_for_each_entry_safe(msg, nmsg, &gsm->tx_ctrl_list, list) {
775
+
if (gsm->constipated && !gsm_is_flow_ctrl_msg(msg))
823
776
continue;
824
-
if (gsm->encoding != 0) {
825
-
gsm->txframe[0] = GSM1_SOF;
826
-
len = gsm_stuff_frame(msg->data,
827
-
gsm->txframe + 1, msg->len);
828
-
gsm->txframe[len + 1] = GSM1_SOF;
829
-
len += 2;
830
-
} else {
831
-
gsm->txframe[0] = GSM0_SOF;
832
-
memcpy(gsm->txframe + 1 , msg->data, msg->len);
833
-
gsm->txframe[msg->len + 1] = GSM0_SOF;
834
-
len = msg->len + 2;
835
-
}
836
-
837
-
if (debug & 4)
838
-
gsm_hex_dump_bytes(__func__, gsm->txframe, len);
839
-
if (gsmld_output(gsm, gsm->txframe, len) <= 0)
777
+
ret = gsm_send_packet(gsm, msg);
778
+
switch (ret) {
779
+
case -ENOSPC:
780
+
return -ENOSPC;
781
+
case -ENODEV:
782
+
/* ldisc not open */
783
+
gsm->tx_bytes -= msg->len;
784
+
list_del(&msg->list);
785
+
kfree(msg);
786
+
continue;
787
+
default:
788
+
if (ret >= 0) {
789
+
list_del(&msg->list);
790
+
kfree(msg);
791
+
}
840
792
break;
841
-
/* FIXME: Can eliminate one SOF in many more cases */
842
-
gsm->tx_bytes -= msg->len;
843
-
844
-
list_del(&msg->list);
845
-
kfree(msg);
846
-
847
-
if (dlci) {
848
-
tty_port_tty_wakeup(&dlci->port);
849
-
} else {
850
-
int i = 0;
851
-
852
-
for (i = 0; i < NUM_DLCI; i++)
853
-
if (gsm->dlci[i])
854
-
tty_port_tty_wakeup(&gsm->dlci[i]->port);
855
793
}
856
794
}
795
+
796
+
if (gsm->constipated)
797
+
return -EAGAIN;
798
+
799
+
/* Serialize other channels */
800
+
if (list_empty(&gsm->tx_data_list))
801
+
return 0;
802
+
list_for_each_entry_safe(msg, nmsg, &gsm->tx_data_list, list) {
803
+
dlci = gsm->dlci[msg->addr];
804
+
/* Send only messages for DLCIs with valid state */
805
+
if (dlci->state != DLCI_OPEN) {
806
+
gsm->tx_bytes -= msg->len;
807
+
list_del(&msg->list);
808
+
kfree(msg);
809
+
continue;
810
+
}
811
+
ret = gsm_send_packet(gsm, msg);
812
+
switch (ret) {
813
+
case -ENOSPC:
814
+
return -ENOSPC;
815
+
case -ENODEV:
816
+
/* ldisc not open */
817
+
gsm->tx_bytes -= msg->len;
818
+
list_del(&msg->list);
819
+
kfree(msg);
820
+
continue;
821
+
default:
822
+
if (ret >= 0) {
823
+
list_del(&msg->list);
824
+
kfree(msg);
825
+
}
826
+
break;
827
+
}
828
+
}
829
+
830
+
return 1;
857
831
}
858
832
859
833
/**
···
994
784
msg->data = dp;
995
785
996
786
/* Add to the actual output queue */
997
-
list_add_tail(&msg->list, &gsm->tx_list);
787
+
switch (msg->ctrl & ~PF) {
788
+
case UI:
789
+
case UIH:
790
+
if (msg->addr > 0) {
791
+
list_add_tail(&msg->list, &gsm->tx_data_list);
792
+
break;
793
+
}
794
+
fallthrough;
795
+
default:
796
+
list_add_tail(&msg->list, &gsm->tx_ctrl_list);
797
+
break;
798
+
}
998
799
gsm->tx_bytes += msg->len;
999
-
gsm_data_kick(gsm, dlci);
800
+
801
+
gsmld_write_trigger(gsm);
802
+
mod_timer(&gsm->kick_timer, jiffies + 10 * gsm->t1 * HZ / 100);
1000
803
}
1001
804
1002
805
/**
···
1046
823
{
1047
824
struct gsm_msg *msg;
1048
825
u8 *dp;
1049
-
int len, total_size, size;
1050
-
int h = dlci->adaption - 1;
826
+
int h, len, size;
1051
827
1052
-
total_size = 0;
1053
-
while (1) {
1054
-
len = kfifo_len(&dlci->fifo);
1055
-
if (len == 0)
1056
-
return total_size;
828
+
/* for modem bits without break data */
829
+
h = ((dlci->adaption == 1) ? 0 : 1);
1057
830
1058
-
/* MTU/MRU count only the data bits */
1059
-
if (len > gsm->mtu)
1060
-
len = gsm->mtu;
831
+
len = kfifo_len(&dlci->fifo);
832
+
if (len == 0)
833
+
return 0;
1061
834
1062
-
size = len + h;
835
+
/* MTU/MRU count only the data bits but watch adaption mode */
836
+
if ((len + h) > gsm->mtu)
837
+
len = gsm->mtu - h;
1063
838
1064
-
msg = gsm_data_alloc(gsm, dlci->addr, size, gsm->ftype);
1065
-
/* FIXME: need a timer or something to kick this so it can't
1066
-
get stuck with no work outstanding and no buffer free */
1067
-
if (msg == NULL)
1068
-
return -ENOMEM;
1069
-
dp = msg->data;
1070
-
switch (dlci->adaption) {
1071
-
case 1: /* Unstructured */
1072
-
break;
1073
-
case 2: /* Unstructed with modem bits.
1074
-
Always one byte as we never send inline break data */
1075
-
*dp++ = (gsm_encode_modem(dlci) << 1) | EA;
1076
-
break;
1077
-
}
1078
-
WARN_ON(kfifo_out_locked(&dlci->fifo, dp , len, &dlci->lock) != len);
1079
-
__gsm_data_queue(dlci, msg);
1080
-
total_size += size;
839
+
size = len + h;
840
+
841
+
msg = gsm_data_alloc(gsm, dlci->addr, size, gsm->ftype);
842
+
if (!msg)
843
+
return -ENOMEM;
844
+
dp = msg->data;
845
+
switch (dlci->adaption) {
846
+
case 1: /* Unstructured */
847
+
break;
848
+
case 2: /* Unstructured with modem bits.
849
+
* Always one byte as we never send inline break data
850
+
*/
851
+
*dp++ = (gsm_encode_modem(dlci) << 1) | EA;
852
+
break;
853
+
default:
854
+
pr_err("%s: unsupported adaption %d\n", __func__,
855
+
dlci->adaption);
856
+
break;
1081
857
}
858
+
859
+
WARN_ON(len != kfifo_out_locked(&dlci->fifo, dp, len,
860
+
&dlci->lock));
861
+
862
+
/* Notify upper layer about available send space. */
863
+
tty_port_tty_wakeup(&dlci->port);
864
+
865
+
__gsm_data_queue(dlci, msg);
1082
866
/* Bytes of data we used up */
1083
-
return total_size;
867
+
return size;
1084
868
}
1085
869
1086
870
/**
···
1138
908
1139
909
size = len + overhead;
1140
910
msg = gsm_data_alloc(gsm, dlci->addr, size, gsm->ftype);
1141
-
1142
-
/* FIXME: need a timer or something to kick this so it can't
1143
-
get stuck with no work outstanding and no buffer free */
1144
911
if (msg == NULL) {
1145
912
skb_queue_tail(&dlci->skb_list, dlci->skb);
1146
913
dlci->skb = NULL;
···
1233
1006
* renegotiate DLCI priorities with optional stuff. Needs optimising.
1234
1007
*/
1235
1008
1236
-
static void gsm_dlci_data_sweep(struct gsm_mux *gsm)
1009
+
static int gsm_dlci_data_sweep(struct gsm_mux *gsm)
1237
1010
{
1238
-
int len;
1239
1011
/* Priority ordering: We should do priority with RR of the groups */
1240
-
int i = 1;
1012
+
int i, len, ret = 0;
1013
+
bool sent;
1014
+
struct gsm_dlci *dlci;
1241
1015
1242
-
while (i < NUM_DLCI) {
1243
-
struct gsm_dlci *dlci;
1244
-
1245
-
if (gsm->tx_bytes > TX_THRESH_HI)
1246
-
break;
1247
-
dlci = gsm->dlci[i];
1248
-
if (dlci == NULL || dlci->constipated) {
1249
-
i++;
1250
-
continue;
1016
+
while (gsm->tx_bytes < TX_THRESH_HI) {
1017
+
for (sent = false, i = 1; i < NUM_DLCI; i++) {
1018
+
dlci = gsm->dlci[i];
1019
+
/* skip unused or blocked channel */
1020
+
if (!dlci || dlci->constipated)
1021
+
continue;
1022
+
/* skip channels with invalid state */
1023
+
if (dlci->state != DLCI_OPEN)
1024
+
continue;
1025
+
/* count the sent data per adaption */
1026
+
if (dlci->adaption < 3 && !dlci->net)
1027
+
len = gsm_dlci_data_output(gsm, dlci);
1028
+
else
1029
+
len = gsm_dlci_data_output_framed(gsm, dlci);
1030
+
/* on error exit */
1031
+
if (len < 0)
1032
+
return ret;
1033
+
if (len > 0) {
1034
+
ret++;
1035
+
sent = true;
1036
+
/* The lower DLCs can starve the higher DLCs! */
1037
+
break;
1038
+
}
1039
+
/* try next */
1251
1040
}
1252
-
if (dlci->adaption < 3 && !dlci->net)
1253
-
len = gsm_dlci_data_output(gsm, dlci);
1254
-
else
1255
-
len = gsm_dlci_data_output_framed(gsm, dlci);
1256
-
if (len < 0)
1041
+
if (!sent)
1257
1042
break;
1258
-
/* DLCI empty - try the next */
1259
-
if (len == 0)
1260
-
i++;
1261
-
}
1043
+
};
1044
+
1045
+
return ret;
1262
1046
}
1263
1047
1264
1048
/**
···
1515
1277
const u8 *data, int clen)
1516
1278
{
1517
1279
u8 buf[1];
1518
-
unsigned long flags;
1519
1280
1520
1281
switch (command) {
1521
1282
case CMD_CLD: {
···
1536
1299
gsm->constipated = false;
1537
1300
gsm_control_reply(gsm, CMD_FCON, NULL, 0);
1538
1301
/* Kick the link in case it is idling */
1539
-
spin_lock_irqsave(&gsm->tx_lock, flags);
1540
-
gsm_data_kick(gsm, NULL);
1541
-
spin_unlock_irqrestore(&gsm->tx_lock, flags);
1302
+
gsmld_write_trigger(gsm);
1542
1303
break;
1543
1304
case CMD_FCOFF:
1544
1305
/* Modem wants us to STFU */
···
1642
1407
spin_lock_irqsave(&gsm->control_lock, flags);
1643
1408
ctrl = gsm->pending_cmd;
1644
1409
if (ctrl) {
1645
-
if (gsm->cretries == 0) {
1410
+
if (gsm->cretries == 0 || !gsm->dlci[0] || gsm->dlci[0]->dead) {
1646
1411
gsm->pending_cmd = NULL;
1647
1412
ctrl->error = -ETIMEDOUT;
1648
1413
ctrl->done = 1;
···
1739
1504
1740
1505
static void gsm_dlci_close(struct gsm_dlci *dlci)
1741
1506
{
1742
-
unsigned long flags;
1743
-
1744
1507
del_timer(&dlci->t1);
1745
1508
if (debug & 8)
1746
1509
pr_debug("DLCI %d goes closed.\n", dlci->addr);
1747
1510
dlci->state = DLCI_CLOSED;
1511
+
/* Prevent us from sending data before the link is up again */
1512
+
dlci->constipated = true;
1748
1513
if (dlci->addr != 0) {
1749
1514
tty_port_tty_hangup(&dlci->port, false);
1750
-
spin_lock_irqsave(&dlci->lock, flags);
1751
-
kfifo_reset(&dlci->fifo);
1752
-
spin_unlock_irqrestore(&dlci->lock, flags);
1515
+
gsm_dlci_clear_queues(dlci->gsm, dlci);
1753
1516
/* Ensure that gsmtty_open() can return. */
1754
1517
tty_port_set_initialized(&dlci->port, 0);
1755
1518
wake_up_interruptible(&dlci->port.open_wait);
1756
1519
} else
1757
1520
dlci->gsm->dead = true;
1758
-
wake_up(&dlci->gsm->event);
1759
1521
/* A DLCI 0 close is a MUX termination so we need to kick that
1760
1522
back to userspace somehow */
1523
+
gsm_dlci_data_kick(dlci);
1524
+
wake_up(&dlci->gsm->event);
1761
1525
}
1762
1526
1763
1527
/**
···
1773
1539
del_timer(&dlci->t1);
1774
1540
/* This will let a tty open continue */
1775
1541
dlci->state = DLCI_OPEN;
1542
+
dlci->constipated = false;
1776
1543
if (debug & 8)
1777
1544
pr_debug("DLCI %d goes open.\n", dlci->addr);
1778
1545
/* Send current modem state */
1779
1546
if (dlci->addr)
1780
1547
gsm_modem_update(dlci, 0);
1548
+
gsm_dlci_data_kick(dlci);
1781
1549
wake_up(&dlci->gsm->event);
1782
1550
}
1783
1551
···
1805
1569
1806
1570
switch (dlci->state) {
1807
1571
case DLCI_OPENING:
1808
-
dlci->retries--;
1809
1572
if (dlci->retries) {
1573
+
dlci->retries--;
1810
1574
gsm_command(dlci->gsm, dlci->addr, SABM|PF);
1811
1575
mod_timer(&dlci->t1, jiffies + gsm->t1 * HZ / 100);
1812
1576
} else if (!dlci->addr && gsm->control == (DM | PF)) {
···
1821
1585
1822
1586
break;
1823
1587
case DLCI_CLOSING:
1824
-
dlci->retries--;
1825
1588
if (dlci->retries) {
1589
+
dlci->retries--;
1826
1590
gsm_command(dlci->gsm, dlci->addr, DISC|PF);
1827
1591
mod_timer(&dlci->t1, jiffies + gsm->t1 * HZ / 100);
1828
1592
} else
···
1853
1617
dlci->state = DLCI_OPENING;
1854
1618
gsm_command(dlci->gsm, dlci->addr, SABM|PF);
1855
1619
mod_timer(&dlci->t1, jiffies + gsm->t1 * HZ / 100);
1620
+
}
1621
+
1622
+
/**
1623
+
* gsm_dlci_set_opening - change state to opening
1624
+
* @dlci: DLCI to open
1625
+
*
1626
+
* Change internal state to wait for DLCI open from initiator side.
1627
+
* We set off timers and responses upon reception of an SABM.
1628
+
*/
1629
+
static void gsm_dlci_set_opening(struct gsm_dlci *dlci)
1630
+
{
1631
+
switch (dlci->state) {
1632
+
case DLCI_CLOSED:
1633
+
case DLCI_CLOSING:
1634
+
dlci->state = DLCI_OPENING;
1635
+
break;
1636
+
default:
1637
+
break;
1638
+
}
1856
1639
}
1857
1640
1858
1641
/**
···
1983
1728
}
1984
1729
}
1985
1730
1731
+
/**
1732
+
* gsm_kick_timer - transmit if possible
1733
+
* @t: timer contained in our gsm object
1734
+
*
1735
+
* Transmit data from DLCIs if the queue is empty. We can't rely on
1736
+
* a tty wakeup except when we filled the pipe so we need to fire off
1737
+
* new data ourselves in other cases.
1738
+
*/
1739
+
static void gsm_kick_timer(struct timer_list *t)
1740
+
{
1741
+
struct gsm_mux *gsm = from_timer(gsm, t, kick_timer);
1742
+
unsigned long flags;
1743
+
int sent = 0;
1744
+
1745
+
spin_lock_irqsave(&gsm->tx_lock, flags);
1746
+
/* If we have nothing running then we need to fire up */
1747
+
if (gsm->tx_bytes < TX_THRESH_LO)
1748
+
sent = gsm_dlci_data_sweep(gsm);
1749
+
spin_unlock_irqrestore(&gsm->tx_lock, flags);
1750
+
1751
+
if (sent && debug & 4)
1752
+
pr_info("%s TX queue stalled\n", __func__);
1753
+
}
1754
+
1986
1755
/*
1987
1756
* Allocate/Free DLCI channels
1988
1757
*/
···
2041
1762
dlci->addr = addr;
2042
1763
dlci->adaption = gsm->adaption;
2043
1764
dlci->state = DLCI_CLOSED;
2044
-
if (addr)
1765
+
if (addr) {
2045
1766
dlci->data = gsm_dlci_data;
2046
-
else
1767
+
/* Prevent us from sending data before the link is up */
1768
+
dlci->constipated = true;
1769
+
} else {
2047
1770
dlci->data = gsm_dlci_command;
1771
+
}
2048
1772
gsm->dlci[addr] = dlci;
2049
1773
return dlci;
2050
1774
}
···
2207
1925
case UIH:
2208
1926
case UIH|PF:
2209
1927
if (dlci == NULL || dlci->state != DLCI_OPEN) {
2210
-
gsm_command(gsm, address, DM|PF);
1928
+
gsm_response(gsm, address, DM|PF);
2211
1929
return;
2212
1930
}
2213
1931
dlci->data(dlci, gsm->buf, gsm->len);
···
2330
2048
} else if ((c & ISO_IEC_646_MASK) == XOFF) {
2331
2049
gsm->constipated = false;
2332
2050
/* Kick the link in case it is idling */
2333
-
gsm_data_kick(gsm, NULL);
2051
+
gsmld_write_trigger(gsm);
2334
2052
return;
2335
2053
}
2336
2054
if (c == GSM1_SOF) {
···
2458
2176
}
2459
2177
2460
2178
/* Finish outstanding timers, making sure they are done */
2179
+
del_timer_sync(&gsm->kick_timer);
2461
2180
del_timer_sync(&gsm->t2_timer);
2462
2181
2182
+
/* Finish writing to ldisc */
2183
+
flush_work(&gsm->tx_work);
2184
+
2463
2185
/* Free up any link layer users and finally the control channel */
2186
+
if (gsm->has_devices) {
2187
+
gsm_unregister_devices(gsm_tty_driver, gsm->num);
2188
+
gsm->has_devices = false;
2189
+
}
2464
2190
for (i = NUM_DLCI - 1; i >= 0; i--)
2465
2191
if (gsm->dlci[i])
2466
2192
gsm_dlci_release(gsm->dlci[i]);
2467
2193
mutex_unlock(&gsm->mutex);
2468
2194
/* Now wipe the queues */
2469
2195
tty_ldisc_flush(gsm->tty);
2470
-
list_for_each_entry_safe(txq, ntxq, &gsm->tx_list, list)
2196
+
list_for_each_entry_safe(txq, ntxq, &gsm->tx_ctrl_list, list)
2471
2197
kfree(txq);
2472
-
INIT_LIST_HEAD(&gsm->tx_list);
2198
+
INIT_LIST_HEAD(&gsm->tx_ctrl_list);
2199
+
list_for_each_entry_safe(txq, ntxq, &gsm->tx_data_list, list)
2200
+
kfree(txq);
2201
+
INIT_LIST_HEAD(&gsm->tx_data_list);
2473
2202
}
2474
2203
2475
2204
/**
···
2495
2202
static int gsm_activate_mux(struct gsm_mux *gsm)
2496
2203
{
2497
2204
struct gsm_dlci *dlci;
2205
+
int ret;
2498
2206
2207
+
dlci = gsm_dlci_alloc(gsm, 0);
2208
+
if (dlci == NULL)
2209
+
return -ENOMEM;
2210
+
2211
+
timer_setup(&gsm->kick_timer, gsm_kick_timer, 0);
2499
2212
timer_setup(&gsm->t2_timer, gsm_control_retransmit, 0);
2213
+
INIT_WORK(&gsm->tx_work, gsmld_write_task);
2500
2214
init_waitqueue_head(&gsm->event);
2501
2215
spin_lock_init(&gsm->control_lock);
2502
2216
spin_lock_init(&gsm->tx_lock);
···
2513
2213
else
2514
2214
gsm->receive = gsm1_receive;
2515
2215
2516
-
dlci = gsm_dlci_alloc(gsm, 0);
2517
-
if (dlci == NULL)
2518
-
return -ENOMEM;
2216
+
ret = gsm_register_devices(gsm_tty_driver, gsm->num);
2217
+
if (ret)
2218
+
return ret;
2219
+
2220
+
gsm->has_devices = true;
2519
2221
gsm->dead = false; /* Tty opens are now permissible */
2520
2222
return 0;
2521
2223
}
···
2610
2308
spin_lock_init(&gsm->lock);
2611
2309
mutex_init(&gsm->mutex);
2612
2310
kref_init(&gsm->ref);
2613
-
INIT_LIST_HEAD(&gsm->tx_list);
2311
+
INIT_LIST_HEAD(&gsm->tx_ctrl_list);
2312
+
INIT_LIST_HEAD(&gsm->tx_data_list);
2614
2313
2615
2314
gsm->t1 = T1;
2616
2315
gsm->t2 = T2;
···
2768
2465
return gsm->tty->ops->write(gsm->tty, data, len);
2769
2466
}
2770
2467
2468
+
2469
+
/**
2470
+
* gsmld_write_trigger - schedule ldisc write task
2471
+
* @gsm: our mux
2472
+
*/
2473
+
static void gsmld_write_trigger(struct gsm_mux *gsm)
2474
+
{
2475
+
if (!gsm || !gsm->dlci[0] || gsm->dlci[0]->dead)
2476
+
return;
2477
+
schedule_work(&gsm->tx_work);
2478
+
}
2479
+
2480
+
2481
+
/**
2482
+
* gsmld_write_task - ldisc write task
2483
+
* @work: our tx write work
2484
+
*
2485
+
* Writes out data to the ldisc if possible. We are doing this here to
2486
+
* avoid dead-locking. This returns if no space or data is left for output.
2487
+
*/
2488
+
static void gsmld_write_task(struct work_struct *work)
2489
+
{
2490
+
struct gsm_mux *gsm = container_of(work, struct gsm_mux, tx_work);
2491
+
unsigned long flags;
2492
+
int i, ret;
2493
+
2494
+
/* All outstanding control channel and control messages and one data
2495
+
* frame is sent.
2496
+
*/
2497
+
ret = -ENODEV;
2498
+
spin_lock_irqsave(&gsm->tx_lock, flags);
2499
+
if (gsm->tty)
2500
+
ret = gsm_data_kick(gsm);
2501
+
spin_unlock_irqrestore(&gsm->tx_lock, flags);
2502
+
2503
+
if (ret >= 0)
2504
+
for (i = 0; i < NUM_DLCI; i++)
2505
+
if (gsm->dlci[i])
2506
+
tty_port_tty_wakeup(&gsm->dlci[i]->port);
2507
+
}
2508
+
2771
2509
/**
2772
2510
* gsmld_attach_gsm - mode set up
2773
2511
* @tty: our tty structure
···
2819
2475
* will need moving to an ioctl path.
2820
2476
*/
2821
2477
2822
-
static int gsmld_attach_gsm(struct tty_struct *tty, struct gsm_mux *gsm)
2478
+
static void gsmld_attach_gsm(struct tty_struct *tty, struct gsm_mux *gsm)
2823
2479
{
2824
-
unsigned int base;
2825
-
int ret, i;
2826
-
2827
2480
gsm->tty = tty_kref_get(tty);
2828
2481
/* Turn off tty XON/XOFF handling to handle it explicitly. */
2829
2482
gsm->old_c_iflag = tty->termios.c_iflag;
2830
2483
tty->termios.c_iflag &= (IXON | IXOFF);
2831
-
ret = gsm_activate_mux(gsm);
2832
-
if (ret != 0)
2833
-
tty_kref_put(gsm->tty);
2834
-
else {
2835
-
/* Don't register device 0 - this is the control channel and not
2836
-
a usable tty interface */
2837
-
base = mux_num_to_base(gsm); /* Base for this MUX */
2838
-
for (i = 1; i < NUM_DLCI; i++) {
2839
-
struct device *dev;
2840
-
2841
-
dev = tty_register_device(gsm_tty_driver,
2842
-
base + i, NULL);
2843
-
if (IS_ERR(dev)) {
2844
-
for (i--; i >= 1; i--)
2845
-
tty_unregister_device(gsm_tty_driver,
2846
-
base + i);
2847
-
return PTR_ERR(dev);
2848
-
}
2849
-
}
2850
-
}
2851
-
return ret;
2852
2484
}
2853
-
2854
2485
2855
2486
/**
2856
2487
* gsmld_detach_gsm - stop doing 0710 mux
···
2837
2518
2838
2519
static void gsmld_detach_gsm(struct tty_struct *tty, struct gsm_mux *gsm)
2839
2520
{
2840
-
unsigned int base = mux_num_to_base(gsm); /* Base for this MUX */
2841
-
int i;
2842
-
2843
2521
WARN_ON(tty != gsm->tty);
2844
-
for (i = 1; i < NUM_DLCI; i++)
2845
-
tty_unregister_device(gsm_tty_driver, base + i);
2846
2522
/* Restore tty XON/XOFF handling. */
2847
2523
gsm->tty->termios.c_iflag = gsm->old_c_iflag;
2848
2524
tty_kref_put(gsm->tty);
···
2929
2615
static int gsmld_open(struct tty_struct *tty)
2930
2616
{
2931
2617
struct gsm_mux *gsm;
2932
-
int ret;
2933
2618
2934
2619
if (tty->ops->write == NULL)
2935
2620
return -EINVAL;
···
2944
2631
/* Attach the initial passive connection */
2945
2632
gsm->encoding = 1;
2946
2633
2947
-
ret = gsmld_attach_gsm(tty, gsm);
2948
-
if (ret != 0) {
2949
-
gsm_cleanup_mux(gsm, false);
2950
-
mux_put(gsm);
2951
-
}
2952
-
return ret;
2634
+
gsmld_attach_gsm(tty, gsm);
2635
+
2636
+
timer_setup(&gsm->kick_timer, gsm_kick_timer, 0);
2637
+
timer_setup(&gsm->t2_timer, gsm_control_retransmit, 0);
2638
+
INIT_WORK(&gsm->tx_work, gsmld_write_task);
2639
+
2640
+
return 0;
2953
2641
}
2954
2642
2955
2643
/**
···
2965
2651
static void gsmld_write_wakeup(struct tty_struct *tty)
2966
2652
{
2967
2653
struct gsm_mux *gsm = tty->disc_data;
2968
-
unsigned long flags;
2969
2654
2970
2655
/* Queue poll */
2971
-
clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
2972
-
spin_lock_irqsave(&gsm->tx_lock, flags);
2973
-
gsm_data_kick(gsm, NULL);
2974
-
if (gsm->tx_bytes < TX_THRESH_LO) {
2975
-
gsm_dlci_data_sweep(gsm);
2976
-
}
2977
-
spin_unlock_irqrestore(&gsm->tx_lock, flags);
2656
+
gsmld_write_trigger(gsm);
2978
2657
}
2979
2658
2980
2659
/**
···
3011
2704
static ssize_t gsmld_write(struct tty_struct *tty, struct file *file,
3012
2705
const unsigned char *buf, size_t nr)
3013
2706
{
3014
-
int space = tty_write_room(tty);
2707
+
struct gsm_mux *gsm = tty->disc_data;
2708
+
unsigned long flags;
2709
+
int space;
2710
+
int ret;
2711
+
2712
+
if (!gsm)
2713
+
return -ENODEV;
2714
+
2715
+
ret = -ENOBUFS;
2716
+
spin_lock_irqsave(&gsm->tx_lock, flags);
2717
+
space = tty_write_room(tty);
3015
2718
if (space >= nr)
3016
-
return tty->ops->write(tty, buf, nr);
3017
-
set_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
3018
-
return -ENOBUFS;
2719
+
ret = tty->ops->write(tty, buf, nr);
2720
+
else
2721
+
set_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
2722
+
spin_unlock_irqrestore(&gsm->tx_lock, flags);
2723
+
2724
+
return ret;
3019
2725
}
3020
2726
3021
2727
/**
···
3053
2733
3054
2734
poll_wait(file, &tty->read_wait, wait);
3055
2735
poll_wait(file, &tty->write_wait, wait);
2736
+
2737
+
if (gsm->dead)
2738
+
mask |= EPOLLHUP;
3056
2739
if (tty_hung_up_p(file))
2740
+
mask |= EPOLLHUP;
2741
+
if (test_bit(TTY_OTHER_CLOSED, &tty->flags))
3057
2742
mask |= EPOLLHUP;
3058
2743
if (!tty_is_writelocked(tty) && tty_write_room(tty) > 0)
3059
2744
mask |= EPOLLOUT | EPOLLWRNORM;
3060
-
if (gsm->dead)
3061
-
mask |= EPOLLHUP;
3062
2745
return mask;
3063
2746
}
3064
2747
···
3497
3174
/* Start sending off SABM messages */
3498
3175
if (gsm->initiator)
3499
3176
gsm_dlci_begin_open(dlci);
3177
+
else
3178
+
gsm_dlci_set_opening(dlci);
3500
3179
/* And wait for virtual carrier */
3501
3180
return tty_port_block_til_ready(port, tty, filp);
3502
3181
}
+73
-19
drivers/tty/n_tty.c
+73
-19
drivers/tty/n_tty.c
···
118
118
size_t read_tail;
119
119
size_t line_start;
120
120
121
+
/* # of chars looked ahead (to find software flow control chars) */
122
+
size_t lookahead_count;
123
+
121
124
/* protected by output lock */
122
125
unsigned int column;
123
126
unsigned int canon_column;
···
336
333
ldata->erasing = 0;
337
334
bitmap_zero(ldata->read_flags, N_TTY_BUF_SIZE);
338
335
ldata->push = 0;
336
+
337
+
ldata->lookahead_count = 0;
339
338
}
340
339
341
340
static void n_tty_packet_mode_flush(struct tty_struct *tty)
···
1230
1225
return c == START_CHAR(tty) || c == STOP_CHAR(tty);
1231
1226
}
1232
1227
1233
-
/* Returns true if c is consumed as flow-control character */
1234
-
static bool n_tty_receive_char_flow_ctrl(struct tty_struct *tty, unsigned char c)
1228
+
/**
1229
+
* n_tty_receive_char_flow_ctrl - receive flow control chars
1230
+
* @tty: terminal device
1231
+
* @c: character
1232
+
* @lookahead_done: lookahead has processed this character already
1233
+
*
1234
+
* Receive and process flow control character actions.
1235
+
*
1236
+
* In case lookahead for flow control chars already handled the character in
1237
+
* advance to the normal receive, the actions are skipped during normal
1238
+
* receive.
1239
+
*
1240
+
* Returns true if @c is consumed as flow-control character, the character
1241
+
* must not be treated as normal character.
1242
+
*/
1243
+
static bool n_tty_receive_char_flow_ctrl(struct tty_struct *tty, unsigned char c,
1244
+
bool lookahead_done)
1235
1245
{
1236
1246
if (!n_tty_is_char_flow_ctrl(tty, c))
1237
1247
return false;
1248
+
1249
+
if (lookahead_done)
1250
+
return true;
1238
1251
1239
1252
if (c == START_CHAR(tty)) {
1240
1253
start_tty(tty);
···
1265
1242
return true;
1266
1243
}
1267
1244
1268
-
static void n_tty_receive_char_special(struct tty_struct *tty, unsigned char c)
1245
+
static void n_tty_receive_char_special(struct tty_struct *tty, unsigned char c,
1246
+
bool lookahead_done)
1269
1247
{
1270
1248
struct n_tty_data *ldata = tty->disc_data;
1271
1249
1272
-
if (I_IXON(tty) && n_tty_receive_char_flow_ctrl(tty, c))
1250
+
if (I_IXON(tty) && n_tty_receive_char_flow_ctrl(tty, c, lookahead_done))
1273
1251
return;
1274
1252
1275
1253
if (L_ISIG(tty)) {
···
1425
1401
put_tty_queue(c, ldata);
1426
1402
}
1427
1403
1428
-
static void n_tty_receive_char_closing(struct tty_struct *tty, unsigned char c)
1404
+
static void n_tty_receive_char_closing(struct tty_struct *tty, unsigned char c,
1405
+
bool lookahead_done)
1429
1406
{
1430
1407
if (I_ISTRIP(tty))
1431
1408
c &= 0x7f;
···
1434
1409
c = tolower(c);
1435
1410
1436
1411
if (I_IXON(tty)) {
1437
-
if (c == STOP_CHAR(tty))
1438
-
stop_tty(tty);
1439
-
else if (c == START_CHAR(tty) ||
1440
-
(tty->flow.stopped && !tty->flow.tco_stopped && I_IXANY(tty) &&
1441
-
c != INTR_CHAR(tty) && c != QUIT_CHAR(tty) &&
1442
-
c != SUSP_CHAR(tty))) {
1412
+
if (!n_tty_receive_char_flow_ctrl(tty, c, lookahead_done) &&
1413
+
tty->flow.stopped && !tty->flow.tco_stopped && I_IXANY(tty) &&
1414
+
c != INTR_CHAR(tty) && c != QUIT_CHAR(tty) &&
1415
+
c != SUSP_CHAR(tty)) {
1443
1416
start_tty(tty);
1444
1417
process_echoes(tty);
1445
1418
}
···
1480
1457
n_tty_receive_char_flagged(tty, c, flag);
1481
1458
}
1482
1459
1460
+
/* Caller must ensure count > 0 */
1461
+
static void n_tty_lookahead_flow_ctrl(struct tty_struct *tty, const unsigned char *cp,
1462
+
const unsigned char *fp, unsigned int count)
1463
+
{
1464
+
struct n_tty_data *ldata = tty->disc_data;
1465
+
unsigned char flag = TTY_NORMAL;
1466
+
1467
+
ldata->lookahead_count += count;
1468
+
1469
+
if (!I_IXON(tty))
1470
+
return;
1471
+
1472
+
while (count--) {
1473
+
if (fp)
1474
+
flag = *fp++;
1475
+
if (likely(flag == TTY_NORMAL))
1476
+
n_tty_receive_char_flow_ctrl(tty, *cp, false);
1477
+
cp++;
1478
+
}
1479
+
}
1480
+
1483
1481
static void
1484
1482
n_tty_receive_buf_real_raw(struct tty_struct *tty, const unsigned char *cp,
1485
1483
const char *fp, int count)
···
1540
1496
1541
1497
static void
1542
1498
n_tty_receive_buf_closing(struct tty_struct *tty, const unsigned char *cp,
1543
-
const char *fp, int count)
1499
+
const char *fp, int count, bool lookahead_done)
1544
1500
{
1545
1501
char flag = TTY_NORMAL;
1546
1502
···
1548
1504
if (fp)
1549
1505
flag = *fp++;
1550
1506
if (likely(flag == TTY_NORMAL))
1551
-
n_tty_receive_char_closing(tty, *cp++);
1507
+
n_tty_receive_char_closing(tty, *cp++, lookahead_done);
1552
1508
}
1553
1509
}
1554
1510
1555
1511
static void n_tty_receive_buf_standard(struct tty_struct *tty,
1556
-
const unsigned char *cp, const char *fp, int count)
1512
+
const unsigned char *cp, const char *fp, int count, bool lookahead_done)
1557
1513
{
1558
1514
struct n_tty_data *ldata = tty->disc_data;
1559
1515
char flag = TTY_NORMAL;
···
1584
1540
}
1585
1541
1586
1542
if (test_bit(c, ldata->char_map))
1587
-
n_tty_receive_char_special(tty, c);
1543
+
n_tty_receive_char_special(tty, c, lookahead_done);
1588
1544
else
1589
1545
n_tty_receive_char(tty, c);
1590
1546
}
···
1595
1551
{
1596
1552
struct n_tty_data *ldata = tty->disc_data;
1597
1553
bool preops = I_ISTRIP(tty) || (I_IUCLC(tty) && L_IEXTEN(tty));
1554
+
size_t la_count = min_t(size_t, ldata->lookahead_count, count);
1598
1555
1599
1556
if (ldata->real_raw)
1600
1557
n_tty_receive_buf_real_raw(tty, cp, fp, count);
1601
1558
else if (ldata->raw || (L_EXTPROC(tty) && !preops))
1602
1559
n_tty_receive_buf_raw(tty, cp, fp, count);
1603
-
else if (tty->closing && !L_EXTPROC(tty))
1604
-
n_tty_receive_buf_closing(tty, cp, fp, count);
1605
-
else {
1606
-
n_tty_receive_buf_standard(tty, cp, fp, count);
1560
+
else if (tty->closing && !L_EXTPROC(tty)) {
1561
+
if (la_count > 0)
1562
+
n_tty_receive_buf_closing(tty, cp, fp, la_count, true);
1563
+
if (count > la_count)
1564
+
n_tty_receive_buf_closing(tty, cp, fp, count - la_count, false);
1565
+
} else {
1566
+
if (la_count > 0)
1567
+
n_tty_receive_buf_standard(tty, cp, fp, la_count, true);
1568
+
if (count > la_count)
1569
+
n_tty_receive_buf_standard(tty, cp, fp, count - la_count, false);
1607
1570
1608
1571
flush_echoes(tty);
1609
1572
if (tty->ops->flush_chars)
1610
1573
tty->ops->flush_chars(tty);
1611
1574
}
1575
+
1576
+
ldata->lookahead_count -= la_count;
1612
1577
1613
1578
if (ldata->icanon && !L_EXTPROC(tty))
1614
1579
return;
···
2499
2446
.receive_buf = n_tty_receive_buf,
2500
2447
.write_wakeup = n_tty_write_wakeup,
2501
2448
.receive_buf2 = n_tty_receive_buf2,
2449
+
.lookahead_buf = n_tty_lookahead_flow_ctrl,
2502
2450
};
2503
2451
2504
2452
/**
+23
-1
drivers/tty/serial/8250/8250.h
+23
-1
drivers/tty/serial/8250/8250.h
···
123
123
up->port.serial_out(&up->port, offset, value);
124
124
}
125
125
126
+
/**
127
+
* serial_lsr_in - Read LSR register and preserve flags across reads
128
+
* @up: uart 8250 port
129
+
*
130
+
* Read LSR register and handle saving non-preserved flags across reads.
131
+
* The flags that are not preserved across reads are stored into
132
+
* up->lsr_saved_flags.
133
+
*
134
+
* Returns LSR value or'ed with the preserved flags (if any).
135
+
*/
136
+
static inline u16 serial_lsr_in(struct uart_8250_port *up)
137
+
{
138
+
u16 lsr = up->lsr_saved_flags;
139
+
140
+
lsr |= serial_in(up, UART_LSR);
141
+
up->lsr_saved_flags = lsr & up->lsr_save_mask;
142
+
143
+
return lsr;
144
+
}
145
+
126
146
/*
127
147
* For the 16C950
128
148
*/
···
203
183
void serial8250_rpm_get_tx(struct uart_8250_port *p);
204
184
void serial8250_rpm_put_tx(struct uart_8250_port *p);
205
185
206
-
int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485);
186
+
int serial8250_em485_config(struct uart_port *port, struct ktermios *termios,
187
+
struct serial_rs485 *rs485);
207
188
void serial8250_em485_start_tx(struct uart_8250_port *p);
208
189
void serial8250_em485_stop_tx(struct uart_8250_port *p);
209
190
void serial8250_em485_destroy(struct uart_8250_port *p);
191
+
extern struct serial_rs485 serial8250_em485_supported;
210
192
211
193
/* MCR <-> TIOCM conversion */
212
194
static inline int serial8250_TIOCM_to_MCR(int tiocm)
+5
-2
drivers/tty/serial/8250/8250_bcm2835aux.c
+5
-2
drivers/tty/serial/8250/8250_bcm2835aux.c
···
108
108
up.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE |
109
109
UPF_SKIP_TEST | UPF_IOREMAP;
110
110
up.port.rs485_config = serial8250_em485_config;
111
+
up.port.rs485_supported = serial8250_em485_supported;
111
112
up.rs485_start_tx = bcm2835aux_rs485_start_tx;
112
113
up.rs485_stop_tx = bcm2835aux_rs485_stop_tx;
113
114
···
167
166
uartclk = clk_get_rate(data->clk);
168
167
if (!uartclk) {
169
168
ret = device_property_read_u32(&pdev->dev, "clock-frequency", &uartclk);
170
-
if (ret)
171
-
return dev_err_probe(&pdev->dev, ret, "could not get clk rate\n");
169
+
if (ret) {
170
+
dev_err_probe(&pdev->dev, ret, "could not get clk rate\n");
171
+
goto dis_clk;
172
+
}
172
173
}
173
174
174
175
/* the HW-clock divider for bcm2835aux is 8,
+18
-6
drivers/tty/serial/8250/8250_bcm7271.c
+18
-6
drivers/tty/serial/8250/8250_bcm7271.c
···
1139
1139
struct brcmuart_priv *priv = dev_get_drvdata(dev);
1140
1140
struct uart_8250_port *up = serial8250_get_port(priv->line);
1141
1141
struct uart_port *port = &up->port;
1142
-
1143
-
serial8250_suspend_port(priv->line);
1144
-
clk_disable_unprepare(priv->baud_mux_clk);
1142
+
unsigned long flags;
1145
1143
1146
1144
/*
1147
1145
* This will prevent resume from enabling RTS before the
1148
-
* baud rate has been resored.
1146
+
* baud rate has been restored.
1149
1147
*/
1148
+
spin_lock_irqsave(&port->lock, flags);
1150
1149
priv->saved_mctrl = port->mctrl;
1151
-
port->mctrl = 0;
1150
+
port->mctrl &= ~TIOCM_RTS;
1151
+
spin_unlock_irqrestore(&port->lock, flags);
1152
+
1153
+
serial8250_suspend_port(priv->line);
1154
+
clk_disable_unprepare(priv->baud_mux_clk);
1152
1155
1153
1156
return 0;
1154
1157
}
···
1161
1158
struct brcmuart_priv *priv = dev_get_drvdata(dev);
1162
1159
struct uart_8250_port *up = serial8250_get_port(priv->line);
1163
1160
struct uart_port *port = &up->port;
1161
+
unsigned long flags;
1164
1162
int ret;
1165
1163
1166
1164
ret = clk_prepare_enable(priv->baud_mux_clk);
···
1184
1180
start_rx_dma(serial8250_get_port(priv->line));
1185
1181
}
1186
1182
serial8250_resume_port(priv->line);
1187
-
port->mctrl = priv->saved_mctrl;
1183
+
1184
+
if (priv->saved_mctrl & TIOCM_RTS) {
1185
+
/* Restore RTS */
1186
+
spin_lock_irqsave(&port->lock, flags);
1187
+
port->mctrl |= TIOCM_RTS;
1188
+
port->ops->set_mctrl(port, port->mctrl);
1189
+
spin_unlock_irqrestore(&port->lock, flags);
1190
+
}
1191
+
1188
1192
return 0;
1189
1193
}
1190
1194
+6
-2
drivers/tty/serial/8250/8250_core.c
+6
-2
drivers/tty/serial/8250/8250_core.c
···
277
277
* the "Diva" UART used on the management processor on many HP
278
278
* ia64 and parisc boxes.
279
279
*/
280
-
lsr = serial_in(up, UART_LSR);
281
-
up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
280
+
lsr = serial_lsr_in(up);
282
281
if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
283
282
(!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
284
283
(lsr & UART_LSR_THRE)) {
···
1007
1008
uart->port.throttle = up->port.throttle;
1008
1009
uart->port.unthrottle = up->port.unthrottle;
1009
1010
uart->port.rs485_config = up->port.rs485_config;
1011
+
uart->port.rs485_supported = up->port.rs485_supported;
1010
1012
uart->port.rs485 = up->port.rs485;
1011
1013
uart->rs485_start_tx = up->rs485_start_tx;
1012
1014
uart->rs485_stop_tx = up->rs485_stop_tx;
1015
+
uart->lsr_save_mask = up->lsr_save_mask;
1013
1016
uart->dma = up->dma;
1014
1017
1015
1018
/* Take tx_loadsz from fifosize if it wasn't set separately */
···
1098
1097
1099
1098
ret = 0;
1100
1099
}
1100
+
1101
+
if (!uart->lsr_save_mask)
1102
+
uart->lsr_save_mask = LSR_SAVE_FLAGS; /* Use default LSR mask */
1101
1103
1102
1104
/* Initialise interrupt backoff work if required */
1103
1105
if (up->overrun_backoff_time_ms > 0) {
+43
-33
drivers/tty/serial/8250/8250_dw.c
+43
-33
drivers/tty/serial/8250/8250_dw.c
···
9
9
* LCR is written whilst busy. If it is, then a busy detect interrupt is
10
10
* raised, the LCR needs to be rewritten and the uart status register read.
11
11
*/
12
+
#include <linux/acpi.h>
13
+
#include <linux/clk.h>
12
14
#include <linux/delay.h>
13
15
#include <linux/device.h>
14
16
#include <linux/io.h>
15
17
#include <linux/mod_devicetable.h>
16
18
#include <linux/module.h>
17
-
#include <linux/serial_8250.h>
18
-
#include <linux/serial_reg.h>
19
+
#include <linux/notifier.h>
19
20
#include <linux/of.h>
20
21
#include <linux/platform_device.h>
21
-
#include <linux/property.h>
22
-
#include <linux/workqueue.h>
23
-
#include <linux/notifier.h>
24
-
#include <linux/slab.h>
25
-
#include <linux/acpi.h>
26
-
#include <linux/clk.h>
27
-
#include <linux/reset.h>
28
22
#include <linux/pm_runtime.h>
23
+
#include <linux/property.h>
24
+
#include <linux/reset.h>
25
+
#include <linux/slab.h>
26
+
#include <linux/workqueue.h>
29
27
30
28
#include <asm/byteorder.h>
29
+
30
+
#include <linux/serial_8250.h>
31
+
#include <linux/serial_reg.h>
31
32
32
33
#include "8250_dwlib.h"
33
34
···
83
82
static void dw8250_force_idle(struct uart_port *p)
84
83
{
85
84
struct uart_8250_port *up = up_to_u8250p(p);
85
+
unsigned int lsr;
86
86
87
87
serial8250_clear_and_reinit_fifos(up);
88
+
89
+
/*
90
+
* With PSLVERR_RESP_EN parameter set to 1, the device generates an
91
+
* error response when an attempt to read an empty RBR with FIFO
92
+
* enabled.
93
+
*/
94
+
if (up->fcr & UART_FCR_ENABLE_FIFO) {
95
+
lsr = p->serial_in(p, UART_LSR);
96
+
if (!(lsr & UART_LSR_DR))
97
+
return;
98
+
}
99
+
88
100
(void)p->serial_in(p, UART_RX);
89
101
}
90
102
···
136
122
/* Returns once the transmitter is empty or we run out of retries */
137
123
static void dw8250_tx_wait_empty(struct uart_port *p)
138
124
{
125
+
struct uart_8250_port *up = up_to_u8250p(p);
139
126
unsigned int tries = 20000;
140
127
unsigned int delay_threshold = tries - 1000;
141
128
unsigned int lsr;
142
129
143
130
while (tries--) {
144
131
lsr = readb (p->membase + (UART_LSR << p->regshift));
132
+
up->lsr_saved_flags |= lsr & up->lsr_save_mask;
133
+
145
134
if (lsr & UART_LSR_TEMT)
146
135
break;
147
136
···
157
140
}
158
141
}
159
142
160
-
static void dw8250_serial_out38x(struct uart_port *p, int offset, int value)
161
-
{
162
-
struct dw8250_data *d = to_dw8250_data(p->private_data);
163
-
164
-
/* Allow the TX to drain before we reconfigure */
165
-
if (offset == UART_LCR)
166
-
dw8250_tx_wait_empty(p);
167
-
168
-
writeb(value, p->membase + (offset << p->regshift));
169
-
170
-
if (offset == UART_LCR && !d->uart_16550_compatible)
171
-
dw8250_check_lcr(p, value);
172
-
}
173
-
174
-
175
143
static void dw8250_serial_out(struct uart_port *p, int offset, int value)
176
144
{
177
145
struct dw8250_data *d = to_dw8250_data(p->private_data);
···
165
163
166
164
if (offset == UART_LCR && !d->uart_16550_compatible)
167
165
dw8250_check_lcr(p, value);
166
+
}
167
+
168
+
static void dw8250_serial_out38x(struct uart_port *p, int offset, int value)
169
+
{
170
+
/* Allow the TX to drain before we reconfigure */
171
+
if (offset == UART_LCR)
172
+
dw8250_tx_wait_empty(p);
173
+
174
+
dw8250_serial_out(p, offset, value);
168
175
}
169
176
170
177
static unsigned int dw8250_serial_in(struct uart_port *p, int offset)
···
264
253
*/
265
254
if (!up->dma && rx_timeout) {
266
255
spin_lock_irqsave(&p->lock, flags);
267
-
status = p->serial_in(p, UART_LSR);
256
+
status = serial_lsr_in(up);
268
257
269
258
if (!(status & (UART_LSR_DR | UART_LSR_BI)))
270
259
(void) p->serial_in(p, UART_RX);
···
274
263
275
264
/* Manually stop the Rx DMA transfer when acting as flow controller */
276
265
if (quirks & DW_UART_QUIRK_IS_DMA_FC && up->dma && up->dma->rx_running && rx_timeout) {
277
-
status = p->serial_in(p, UART_LSR);
266
+
spin_lock_irqsave(&p->lock, flags);
267
+
status = serial_lsr_in(up);
268
+
spin_unlock_irqrestore(&p->lock, flags);
269
+
278
270
if (status & (UART_LSR_DR | UART_LSR_BI)) {
279
271
dw8250_writel_ext(p, RZN1_UART_RDMACR, 0);
280
272
dw8250_writel_ext(p, DW_UART_DMASA, 1);
···
702
688
return 0;
703
689
}
704
690
705
-
#ifdef CONFIG_PM_SLEEP
706
691
static int dw8250_suspend(struct device *dev)
707
692
{
708
693
struct dw8250_data *data = dev_get_drvdata(dev);
···
719
706
720
707
return 0;
721
708
}
722
-
#endif /* CONFIG_PM_SLEEP */
723
709
724
-
#ifdef CONFIG_PM
725
710
static int dw8250_runtime_suspend(struct device *dev)
726
711
{
727
712
struct dw8250_data *data = dev_get_drvdata(dev);
···
741
730
742
731
return 0;
743
732
}
744
-
#endif
745
733
746
734
static const struct dev_pm_ops dw8250_pm_ops = {
747
-
SET_SYSTEM_SLEEP_PM_OPS(dw8250_suspend, dw8250_resume)
748
-
SET_RUNTIME_PM_OPS(dw8250_runtime_suspend, dw8250_runtime_resume, NULL)
735
+
SYSTEM_SLEEP_PM_OPS(dw8250_suspend, dw8250_resume)
736
+
RUNTIME_PM_OPS(dw8250_runtime_suspend, dw8250_runtime_resume, NULL)
749
737
};
750
738
751
739
static const struct dw8250_platform_data dw8250_dw_apb = {
···
802
792
static struct platform_driver dw8250_platform_driver = {
803
793
.driver = {
804
794
.name = "dw-apb-uart",
805
-
.pm = &dw8250_pm_ops,
795
+
.pm = pm_ptr(&dw8250_pm_ops),
806
796
.of_match_table = dw8250_of_match,
807
797
.acpi_match_table = dw8250_acpi_match,
808
798
},
+122
-30
drivers/tty/serial/8250/8250_dwlib.c
+122
-30
drivers/tty/serial/8250/8250_dwlib.c
···
3
3
4
4
#include <linux/bitops.h>
5
5
#include <linux/bitfield.h>
6
+
#include <linux/delay.h>
6
7
#include <linux/device.h>
7
8
#include <linux/kernel.h>
9
+
#include <linux/math.h>
8
10
#include <linux/property.h>
9
11
#include <linux/serial_8250.h>
10
12
#include <linux/serial_core.h>
···
18
16
#define DW_UART_DE_EN 0xb0 /* Driver Output Enable Register */
19
17
#define DW_UART_RE_EN 0xb4 /* Receiver Output Enable Register */
20
18
#define DW_UART_DLF 0xc0 /* Divisor Latch Fraction Register */
19
+
#define DW_UART_RAR 0xc4 /* Receive Address Register */
20
+
#define DW_UART_TAR 0xc8 /* Transmit Address Register */
21
+
#define DW_UART_LCR_EXT 0xcc /* Line Extended Control Register */
21
22
#define DW_UART_CPR 0xf4 /* Component Parameter Register */
22
23
#define DW_UART_UCV 0xf8 /* UART Component Version */
24
+
25
+
/* Receive / Transmit Address Register bits */
26
+
#define DW_UART_ADDR_MASK GENMASK(7, 0)
27
+
28
+
/* Line Status Register bits */
29
+
#define DW_UART_LSR_ADDR_RCVD BIT(8)
23
30
24
31
/* Transceiver Control Register bits */
25
32
#define DW_UART_TCR_RS485_EN BIT(0)
···
39
28
#define DW_UART_TCR_XFER_MODE_SW_DE_OR_RE FIELD_PREP(DW_UART_TCR_XFER_MODE, 1)
40
29
#define DW_UART_TCR_XFER_MODE_DE_OR_RE FIELD_PREP(DW_UART_TCR_XFER_MODE, 2)
41
30
31
+
/* Line Extended Control Register bits */
32
+
#define DW_UART_LCR_EXT_DLS_E BIT(0)
33
+
#define DW_UART_LCR_EXT_ADDR_MATCH BIT(1)
34
+
#define DW_UART_LCR_EXT_SEND_ADDR BIT(2)
35
+
#define DW_UART_LCR_EXT_TRANSMIT_MODE BIT(3)
36
+
42
37
/* Component Parameter Register bits */
43
-
#define DW_UART_CPR_ABP_DATA_WIDTH (3 << 0)
44
-
#define DW_UART_CPR_AFCE_MODE (1 << 4)
45
-
#define DW_UART_CPR_THRE_MODE (1 << 5)
46
-
#define DW_UART_CPR_SIR_MODE (1 << 6)
47
-
#define DW_UART_CPR_SIR_LP_MODE (1 << 7)
48
-
#define DW_UART_CPR_ADDITIONAL_FEATURES (1 << 8)
49
-
#define DW_UART_CPR_FIFO_ACCESS (1 << 9)
50
-
#define DW_UART_CPR_FIFO_STAT (1 << 10)
51
-
#define DW_UART_CPR_SHADOW (1 << 11)
52
-
#define DW_UART_CPR_ENCODED_PARMS (1 << 12)
53
-
#define DW_UART_CPR_DMA_EXTRA (1 << 13)
54
-
#define DW_UART_CPR_FIFO_MODE (0xff << 16)
38
+
#define DW_UART_CPR_ABP_DATA_WIDTH GENMASK(1, 0)
39
+
#define DW_UART_CPR_AFCE_MODE BIT(4)
40
+
#define DW_UART_CPR_THRE_MODE BIT(5)
41
+
#define DW_UART_CPR_SIR_MODE BIT(6)
42
+
#define DW_UART_CPR_SIR_LP_MODE BIT(7)
43
+
#define DW_UART_CPR_ADDITIONAL_FEATURES BIT(8)
44
+
#define DW_UART_CPR_FIFO_ACCESS BIT(9)
45
+
#define DW_UART_CPR_FIFO_STAT BIT(10)
46
+
#define DW_UART_CPR_SHADOW BIT(11)
47
+
#define DW_UART_CPR_ENCODED_PARMS BIT(12)
48
+
#define DW_UART_CPR_DMA_EXTRA BIT(13)
49
+
#define DW_UART_CPR_FIFO_MODE GENMASK(23, 16)
55
50
56
51
/* Helper for FIFO size calculation */
57
-
#define DW_UART_CPR_FIFO_SIZE(a) (((a >> 16) & 0xff) * 16)
52
+
#define DW_UART_CPR_FIFO_SIZE(a) (FIELD_GET(DW_UART_CPR_FIFO_MODE, (a)) * 16)
58
53
59
54
/*
60
55
* divisor = div(I) + div(F)
···
99
82
p->status |= UPSTAT_AUTOCTS;
100
83
101
84
serial8250_do_set_termios(p, termios, old);
85
+
86
+
/* Filter addresses which have 9th bit set */
87
+
p->ignore_status_mask |= DW_UART_LSR_ADDR_RCVD;
88
+
p->read_status_mask |= DW_UART_LSR_ADDR_RCVD;
102
89
}
103
90
EXPORT_SYMBOL_GPL(dw8250_do_set_termios);
104
91
105
-
static int dw8250_rs485_config(struct uart_port *p, struct serial_rs485 *rs485)
92
+
/*
93
+
* Wait until re is de-asserted for sure. An ongoing receive will keep
94
+
* re asserted until end of frame. Without BUSY indication available,
95
+
* only available course of action is to wait for the time it takes to
96
+
* receive one frame (there might nothing to receive but w/o BUSY the
97
+
* driver cannot know).
98
+
*/
99
+
static void dw8250_wait_re_deassert(struct uart_port *p)
100
+
{
101
+
ndelay(p->frame_time);
102
+
}
103
+
104
+
static void dw8250_update_rar(struct uart_port *p, u32 addr)
105
+
{
106
+
u32 re_en = dw8250_readl_ext(p, DW_UART_RE_EN);
107
+
108
+
/*
109
+
* RAR shouldn't be changed while receiving. Thus, de-assert RE_EN
110
+
* if asserted and wait.
111
+
*/
112
+
if (re_en)
113
+
dw8250_writel_ext(p, DW_UART_RE_EN, 0);
114
+
dw8250_wait_re_deassert(p);
115
+
dw8250_writel_ext(p, DW_UART_RAR, addr);
116
+
if (re_en)
117
+
dw8250_writel_ext(p, DW_UART_RE_EN, re_en);
118
+
}
119
+
120
+
static void dw8250_rs485_set_addr(struct uart_port *p, struct serial_rs485 *rs485,
121
+
struct ktermios *termios)
122
+
{
123
+
u32 lcr = dw8250_readl_ext(p, DW_UART_LCR_EXT);
124
+
125
+
if (rs485->flags & SER_RS485_ADDRB) {
126
+
lcr |= DW_UART_LCR_EXT_DLS_E;
127
+
if (termios)
128
+
termios->c_cflag |= ADDRB;
129
+
130
+
if (rs485->flags & SER_RS485_ADDR_RECV) {
131
+
u32 delta = p->rs485.flags ^ rs485->flags;
132
+
133
+
/*
134
+
* rs485 (param) is equal to uart_port's rs485 only during init
135
+
* (during init, delta is not yet applicable).
136
+
*/
137
+
if (unlikely(&p->rs485 == rs485))
138
+
delta = rs485->flags;
139
+
140
+
if ((delta & SER_RS485_ADDR_RECV) ||
141
+
(p->rs485.addr_recv != rs485->addr_recv))
142
+
dw8250_update_rar(p, rs485->addr_recv);
143
+
lcr |= DW_UART_LCR_EXT_ADDR_MATCH;
144
+
} else {
145
+
lcr &= ~DW_UART_LCR_EXT_ADDR_MATCH;
146
+
}
147
+
if (rs485->flags & SER_RS485_ADDR_DEST) {
148
+
/*
149
+
* Don't skip writes here as another endpoint could
150
+
* have changed communication line's destination
151
+
* address in between.
152
+
*/
153
+
dw8250_writel_ext(p, DW_UART_TAR, rs485->addr_dest);
154
+
lcr |= DW_UART_LCR_EXT_SEND_ADDR;
155
+
}
156
+
} else {
157
+
lcr = 0;
158
+
}
159
+
dw8250_writel_ext(p, DW_UART_LCR_EXT, lcr);
160
+
}
161
+
162
+
static int dw8250_rs485_config(struct uart_port *p, struct ktermios *termios,
163
+
struct serial_rs485 *rs485)
106
164
{
107
165
u32 tcr;
108
166
···
185
93
tcr &= ~DW_UART_TCR_XFER_MODE;
186
94
187
95
if (rs485->flags & SER_RS485_ENABLED) {
188
-
/* Clear unsupported flags. */
189
-
rs485->flags &= SER_RS485_ENABLED | SER_RS485_RX_DURING_TX |
190
-
SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND;
191
96
tcr |= DW_UART_TCR_RS485_EN;
192
97
193
-
if (rs485->flags & SER_RS485_RX_DURING_TX) {
98
+
if (rs485->flags & SER_RS485_RX_DURING_TX)
194
99
tcr |= DW_UART_TCR_XFER_MODE_DE_DURING_RE;
195
-
} else {
196
-
/* HW does not support same DE level for tx and rx */
197
-
if (!(rs485->flags & SER_RS485_RTS_ON_SEND) ==
198
-
!(rs485->flags & SER_RS485_RTS_AFTER_SEND))
199
-
return -EINVAL;
200
-
100
+
else
201
101
tcr |= DW_UART_TCR_XFER_MODE_DE_OR_RE;
202
-
}
203
102
dw8250_writel_ext(p, DW_UART_DE_EN, 1);
204
103
dw8250_writel_ext(p, DW_UART_RE_EN, 1);
205
104
} else {
206
-
rs485->flags = 0;
105
+
if (termios)
106
+
termios->c_cflag &= ~ADDRB;
207
107
208
108
tcr &= ~DW_UART_TCR_RS485_EN;
209
109
}
···
211
127
212
128
dw8250_writel_ext(p, DW_UART_TCR, tcr);
213
129
214
-
rs485->delay_rts_before_send = 0;
215
-
rs485->delay_rts_after_send = 0;
216
-
217
-
p->rs485 = *rs485;
130
+
/* Addressing mode can only be set up after TCR */
131
+
if (rs485->flags & SER_RS485_ENABLED)
132
+
dw8250_rs485_set_addr(p, rs485, termios);
218
133
219
134
return 0;
220
135
}
···
232
149
return reg;
233
150
}
234
151
152
+
static const struct serial_rs485 dw8250_rs485_supported = {
153
+
.flags = SER_RS485_ENABLED | SER_RS485_RX_DURING_TX | SER_RS485_RTS_ON_SEND |
154
+
SER_RS485_RTS_AFTER_SEND | SER_RS485_ADDRB | SER_RS485_ADDR_RECV |
155
+
SER_RS485_ADDR_DEST,
156
+
};
157
+
235
158
void dw8250_setup_port(struct uart_port *p)
236
159
{
237
160
struct dw8250_port_data *pd = p->private_data;
···
248
159
pd->hw_rs485_support = dw8250_detect_rs485_hw(p);
249
160
if (pd->hw_rs485_support) {
250
161
p->rs485_config = dw8250_rs485_config;
162
+
up->lsr_save_mask = LSR_SAVE_FLAGS | DW_UART_LSR_ADDR_RCVD;
163
+
p->rs485_supported = dw8250_rs485_supported;
251
164
} else {
252
165
p->rs485_config = serial8250_em485_config;
166
+
p->rs485_supported = serial8250_em485_supported;
253
167
up->rs485_start_tx = serial8250_em485_start_tx;
254
168
up->rs485_stop_tx = serial8250_em485_stop_tx;
255
169
}
+1
-3
drivers/tty/serial/8250/8250_early.c
+1
-3
drivers/tty/serial/8250/8250_early.c
···
84
84
}
85
85
}
86
86
87
-
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
88
-
89
87
static void serial_putc(struct uart_port *port, unsigned char c)
90
88
{
91
89
unsigned int status;
···
92
94
93
95
for (;;) {
94
96
status = serial8250_early_in(port, UART_LSR);
95
-
if ((status & BOTH_EMPTY) == BOTH_EMPTY)
97
+
if (uart_lsr_tx_empty(status))
96
98
break;
97
99
cpu_relax();
98
100
}
+18
-7
drivers/tty/serial/8250/8250_exar.c
+18
-7
drivers/tty/serial/8250/8250_exar.c
···
112
112
struct exar8250;
113
113
114
114
struct exar8250_platform {
115
-
int (*rs485_config)(struct uart_port *, struct serial_rs485 *);
115
+
int (*rs485_config)(struct uart_port *port, struct ktermios *termios,
116
+
struct serial_rs485 *rs485);
117
+
const struct serial_rs485 *rs485_supported;
116
118
int (*register_gpio)(struct pci_dev *, struct uart_8250_port *);
117
119
void (*unregister_gpio)(struct uart_8250_port *);
118
120
};
···
196
194
197
195
static void exar_shutdown(struct uart_port *port)
198
196
{
199
-
unsigned char lsr;
200
197
bool tx_complete = false;
201
198
struct uart_8250_port *up = up_to_u8250p(port);
202
199
struct circ_buf *xmit = &port->state->xmit;
203
200
int i = 0;
201
+
u16 lsr;
204
202
205
203
do {
206
204
lsr = serial_in(up, UART_LSR);
···
410
408
port->port.private_data = NULL;
411
409
}
412
410
413
-
static int generic_rs485_config(struct uart_port *port,
411
+
static int generic_rs485_config(struct uart_port *port, struct ktermios *termios,
414
412
struct serial_rs485 *rs485)
415
413
{
416
414
bool is_rs485 = !!(rs485->flags & SER_RS485_ENABLED);
···
428
426
if (is_rs485)
429
427
writeb(UART_EXAR_RS485_DLY(4), p + UART_MSR);
430
428
431
-
port->rs485 = *rs485;
432
-
433
429
return 0;
434
430
}
431
+
432
+
static const struct serial_rs485 generic_rs485_supported = {
433
+
.flags = SER_RS485_ENABLED,
434
+
};
435
435
436
436
static const struct exar8250_platform exar8250_default_platform = {
437
437
.register_gpio = xr17v35x_register_gpio,
438
438
.unregister_gpio = xr17v35x_unregister_gpio,
439
439
.rs485_config = generic_rs485_config,
440
+
.rs485_supported = &generic_rs485_supported,
440
441
};
441
442
442
-
static int iot2040_rs485_config(struct uart_port *port,
443
+
static int iot2040_rs485_config(struct uart_port *port, struct ktermios *termios,
443
444
struct serial_rs485 *rs485)
444
445
{
445
446
bool is_rs485 = !!(rs485->flags & SER_RS485_ENABLED);
···
472
467
value |= mode;
473
468
writeb(value, p + UART_EXAR_MPIOLVL_7_0);
474
469
475
-
return generic_rs485_config(port, rs485);
470
+
return generic_rs485_config(port, termios, rs485);
476
471
}
472
+
473
+
static const struct serial_rs485 iot2040_rs485_supported = {
474
+
.flags = SER_RS485_ENABLED | SER_RS485_RX_DURING_TX | SER_RS485_TERMINATE_BUS,
475
+
};
477
476
478
477
static const struct property_entry iot2040_gpio_properties[] = {
479
478
PROPERTY_ENTRY_U32("exar,first-pin", 10),
···
507
498
508
499
static const struct exar8250_platform iot2040_platform = {
509
500
.rs485_config = iot2040_rs485_config,
501
+
.rs485_supported = &iot2040_rs485_supported,
510
502
.register_gpio = iot2040_register_gpio,
511
503
.unregister_gpio = xr17v35x_unregister_gpio,
512
504
};
···
550
540
551
541
port->port.uartclk = baud * 16;
552
542
port->port.rs485_config = platform->rs485_config;
543
+
port->port.rs485_supported = *(platform->rs485_supported);
553
544
554
545
/*
555
546
* Setup the UART clock for the devices on expansion slot to
+16
-15
drivers/tty/serial/8250/8250_fintek.c
+16
-15
drivers/tty/serial/8250/8250_fintek.c
···
191
191
return -ENODEV;
192
192
}
193
193
194
-
static int fintek_8250_rs485_config(struct uart_port *port,
194
+
static int fintek_8250_rs485_config(struct uart_port *port, struct ktermios *termios,
195
195
struct serial_rs485 *rs485)
196
196
{
197
197
uint8_t config = 0;
···
206
206
if (!(rs485->flags & SER_RS485_RTS_ON_SEND) ==
207
207
!(rs485->flags & SER_RS485_RTS_AFTER_SEND))
208
208
return -EINVAL;
209
-
memset(rs485->padding, 0, sizeof(rs485->padding));
210
209
config |= RS485_URA;
211
-
} else {
212
-
memset(rs485, 0, sizeof(*rs485));
213
-
}
214
-
215
-
rs485->flags &= SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND |
216
-
SER_RS485_RTS_AFTER_SEND;
217
-
218
-
/* Only the first port supports delays */
219
-
if (pdata->index) {
220
-
rs485->delay_rts_before_send = 0;
221
-
rs485->delay_rts_after_send = 0;
222
210
}
223
211
224
212
if (rs485->delay_rts_before_send) {
···
228
240
sio_write_reg(pdata, LDN, pdata->index);
229
241
sio_write_reg(pdata, RS485, config);
230
242
fintek_8250_exit_key(pdata->base_port);
231
-
232
-
port->rs485 = *rs485;
233
243
234
244
return 0;
235
245
}
···
410
424
return -ENODEV;
411
425
}
412
426
427
+
/* Only the first port supports delays */
428
+
static const struct serial_rs485 fintek_8250_rs485_supported_port0 = {
429
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND,
430
+
.delay_rts_before_send = 1,
431
+
.delay_rts_after_send = 1,
432
+
};
433
+
434
+
static const struct serial_rs485 fintek_8250_rs485_supported = {
435
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND,
436
+
};
437
+
413
438
static void fintek_8250_set_rs485_handler(struct uart_8250_port *uart)
414
439
{
415
440
struct fintek_8250 *pdata = uart->port.private_data;
···
432
435
case CHIP_ID_F81866:
433
436
case CHIP_ID_F81865:
434
437
uart->port.rs485_config = fintek_8250_rs485_config;
438
+
if (!pdata->index)
439
+
uart->port.rs485_supported = fintek_8250_rs485_supported_port0;
440
+
else
441
+
uart->port.rs485_supported = fintek_8250_rs485_supported;
435
442
break;
436
443
437
444
default: /* No RS485 Auto direction functional */
+2
-2
drivers/tty/serial/8250/8250_fsl.c
+2
-2
drivers/tty/serial/8250/8250_fsl.c
···
25
25
26
26
int fsl8250_handle_irq(struct uart_port *port)
27
27
{
28
-
unsigned char lsr, orig_lsr;
29
28
unsigned long flags;
29
+
u16 lsr, orig_lsr;
30
30
unsigned int iir;
31
31
struct uart_8250_port *up = up_to_u8250p(port);
32
32
···
77
77
if ((lsr & UART_LSR_THRE) && (up->ier & UART_IER_THRI))
78
78
serial8250_tx_chars(up);
79
79
80
-
up->lsr_saved_flags = orig_lsr;
80
+
up->lsr_saved_flags |= orig_lsr & UART_LSR_BI;
81
81
82
82
uart_unlock_and_check_sysrq_irqrestore(&up->port, flags);
83
83
+1
-1
drivers/tty/serial/8250/8250_ingenic.c
+1
-1
drivers/tty/serial/8250/8250_ingenic.c
+9
-19
drivers/tty/serial/8250/8250_lpc18xx.c
+9
-19
drivers/tty/serial/8250/8250_lpc18xx.c
···
32
32
int line;
33
33
};
34
34
35
-
static int lpc18xx_rs485_config(struct uart_port *port,
35
+
static int lpc18xx_rs485_config(struct uart_port *port, struct ktermios *termios,
36
36
struct serial_rs485 *rs485)
37
37
{
38
38
struct uart_8250_port *up = up_to_u8250p(port);
···
40
40
u32 rs485_dly_reg = 0;
41
41
unsigned baud_clk;
42
42
43
-
if (rs485->flags & SER_RS485_ENABLED)
44
-
memset(rs485->padding, 0, sizeof(rs485->padding));
45
-
else
46
-
memset(rs485, 0, sizeof(*rs485));
47
-
48
-
rs485->flags &= SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND |
49
-
SER_RS485_RTS_AFTER_SEND;
50
-
51
43
if (rs485->flags & SER_RS485_ENABLED) {
52
44
rs485_ctrl_reg |= LPC18XX_UART_RS485CTRL_NMMEN |
53
45
LPC18XX_UART_RS485CTRL_DCTRL;
54
46
55
-
if (rs485->flags & SER_RS485_RTS_ON_SEND) {
47
+
if (rs485->flags & SER_RS485_RTS_ON_SEND)
56
48
rs485_ctrl_reg |= LPC18XX_UART_RS485CTRL_OINV;
57
-
rs485->flags &= ~SER_RS485_RTS_AFTER_SEND;
58
-
} else {
59
-
rs485->flags |= SER_RS485_RTS_AFTER_SEND;
60
-
}
61
49
}
62
50
63
51
if (rs485->delay_rts_after_send) {
···
61
73
/ baud_clk;
62
74
}
63
75
64
-
/* Delay RTS before send not supported */
65
-
rs485->delay_rts_before_send = 0;
66
-
67
76
serial_out(up, LPC18XX_UART_RS485CTRL, rs485_ctrl_reg);
68
77
serial_out(up, LPC18XX_UART_RS485DLY, rs485_dly_reg);
69
-
70
-
port->rs485 = *rs485;
71
78
72
79
return 0;
73
80
}
···
80
97
offset = offset << p->regshift;
81
98
writel(value, p->membase + offset);
82
99
}
100
+
101
+
static const struct serial_rs485 lpc18xx_rs485_supported = {
102
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND,
103
+
.delay_rts_after_send = 1,
104
+
/* Delay RTS before send is not supported */
105
+
};
83
106
84
107
static int lpc18xx_serial_probe(struct platform_device *pdev)
85
108
{
···
157
168
uart.port.uartclk = clk_get_rate(data->clk_uart);
158
169
uart.port.private_data = data;
159
170
uart.port.rs485_config = lpc18xx_rs485_config;
171
+
uart.port.rs485_supported = lpc18xx_rs485_supported;
160
172
uart.port.serial_out = lpc18xx_uart_serial_out;
161
173
162
174
uart.dma = &data->dma;
+1
-1
drivers/tty/serial/8250/8250_lpss.c
+1
-1
drivers/tty/serial/8250/8250_lpss.c
···
330
330
uart.port.irq = pci_irq_vector(pdev, 0);
331
331
uart.port.private_data = &lpss->data;
332
332
uart.port.type = PORT_16550A;
333
-
uart.port.iotype = UPIO_MEM;
333
+
uart.port.iotype = UPIO_MEM32;
334
334
uart.port.regshift = 2;
335
335
uart.port.uartclk = lpss->board->base_baud * 16;
336
336
uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
+1
drivers/tty/serial/8250/8250_of.c
+1
drivers/tty/serial/8250/8250_of.c
+3
-4
drivers/tty/serial/8250/8250_omap.c
+3
-4
drivers/tty/serial/8250/8250_omap.c
···
1115
1115
return omap_8250_rx_dma(up);
1116
1116
}
1117
1117
1118
-
static unsigned char omap_8250_handle_rx_dma(struct uart_8250_port *up,
1119
-
u8 iir, unsigned char status)
1118
+
static u16 omap_8250_handle_rx_dma(struct uart_8250_port *up, u8 iir, u16 status)
1120
1119
{
1121
1120
if ((status & (UART_LSR_DR | UART_LSR_BI)) &&
1122
1121
(iir & UART_IIR_RDI)) {
···
1129
1130
}
1130
1131
1131
1132
static void am654_8250_handle_rx_dma(struct uart_8250_port *up, u8 iir,
1132
-
unsigned char status)
1133
+
u16 status)
1133
1134
{
1134
1135
/*
1135
1136
* Queue a new transfer if FIFO has data.
···
1163
1164
{
1164
1165
struct uart_8250_port *up = up_to_u8250p(port);
1165
1166
struct omap8250_priv *priv = up->port.private_data;
1166
-
unsigned char status;
1167
+
u16 status;
1167
1168
u8 iir;
1168
1169
1169
1170
serial8250_rpm_get(up);
+117
-18
drivers/tty/serial/8250/8250_pci.c
+117
-18
drivers/tty/serial/8250/8250_pci.c
···
1553
1553
#define FINTEK_RTS_INVERT BIT(5)
1554
1554
1555
1555
/* We should do proper H/W transceiver setting before change to RS485 mode */
1556
-
static int pci_fintek_rs485_config(struct uart_port *port,
1556
+
static int pci_fintek_rs485_config(struct uart_port *port, struct ktermios *termios,
1557
1557
struct serial_rs485 *rs485)
1558
1558
{
1559
1559
struct pci_dev *pci_dev = to_pci_dev(port->dev);
···
1561
1561
u8 *index = (u8 *) port->private_data;
1562
1562
1563
1563
pci_read_config_byte(pci_dev, 0x40 + 8 * *index + 7, &setting);
1564
-
1565
-
if (!rs485)
1566
-
rs485 = &port->rs485;
1567
-
else if (rs485->flags & SER_RS485_ENABLED)
1568
-
memset(rs485->padding, 0, sizeof(rs485->padding));
1569
-
else
1570
-
memset(rs485, 0, sizeof(*rs485));
1571
-
1572
-
/* F81504/508/512 not support RTS delay before or after send */
1573
-
rs485->flags &= SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND;
1574
1564
1575
1565
if (rs485->flags & SER_RS485_ENABLED) {
1576
1566
/* Enable RTS H/W control mode */
···
1573
1583
/* RTS driving low on TX */
1574
1584
setting |= FINTEK_RTS_INVERT;
1575
1585
}
1576
-
1577
-
rs485->delay_rts_after_send = 0;
1578
-
rs485->delay_rts_before_send = 0;
1579
1586
} else {
1580
1587
/* Disable RTS H/W control mode */
1581
1588
setting &= ~(FINTEK_RTS_CONTROL_BY_HW | FINTEK_RTS_INVERT);
···
1580
1593
1581
1594
pci_write_config_byte(pci_dev, 0x40 + 8 * *index + 7, setting);
1582
1595
1583
-
if (rs485 != &port->rs485)
1584
-
port->rs485 = *rs485;
1585
-
1586
1596
return 0;
1587
1597
}
1598
+
1599
+
static const struct serial_rs485 pci_fintek_rs485_supported = {
1600
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND,
1601
+
/* F81504/508/512 does not support RTS delay before or after send */
1602
+
};
1588
1603
1589
1604
static int pci_fintek_setup(struct serial_private *priv,
1590
1605
const struct pciserial_board *board,
···
1607
1618
port->port.iotype = UPIO_PORT;
1608
1619
port->port.iobase = iobase;
1609
1620
port->port.rs485_config = pci_fintek_rs485_config;
1621
+
port->port.rs485_supported = pci_fintek_rs485_supported;
1610
1622
1611
1623
data = devm_kzalloc(&pdev->dev, sizeof(u8), GFP_KERNEL);
1612
1624
if (!data)
···
1679
1689
* pciserial_resume_ports()
1680
1690
*/
1681
1691
port = serial8250_get_port(priv->line[i]);
1682
-
pci_fintek_rs485_config(&port->port, NULL);
1692
+
uart_rs485_config(&port->port);
1683
1693
} else {
1684
1694
/* First init without port data
1685
1695
* force init to RS232 Mode
···
5066
5076
PCI_ANY_ID, PCI_ANY_ID,
5067
5077
0, 0,
5068
5078
pbn_b2_4_115200 },
5079
+
/*
5080
+
* Brainboxes PX-101
5081
+
*/
5082
+
{ PCI_VENDOR_ID_INTASHIELD, 0x4005,
5083
+
PCI_ANY_ID, PCI_ANY_ID,
5084
+
0, 0,
5085
+
pbn_b0_2_115200 },
5086
+
{ PCI_VENDOR_ID_INTASHIELD, 0x4019,
5087
+
PCI_ANY_ID, PCI_ANY_ID,
5088
+
0, 0,
5089
+
pbn_oxsemi_2_15625000 },
5090
+
/*
5091
+
* Brainboxes PX-235/246
5092
+
*/
5093
+
{ PCI_VENDOR_ID_INTASHIELD, 0x4004,
5094
+
PCI_ANY_ID, PCI_ANY_ID,
5095
+
0, 0,
5096
+
pbn_b0_1_115200 },
5097
+
{ PCI_VENDOR_ID_INTASHIELD, 0x4016,
5098
+
PCI_ANY_ID, PCI_ANY_ID,
5099
+
0, 0,
5100
+
pbn_oxsemi_1_15625000 },
5101
+
/*
5102
+
* Brainboxes PX-203/PX-257
5103
+
*/
5104
+
{ PCI_VENDOR_ID_INTASHIELD, 0x4006,
5105
+
PCI_ANY_ID, PCI_ANY_ID,
5106
+
0, 0,
5107
+
pbn_b0_2_115200 },
5108
+
{ PCI_VENDOR_ID_INTASHIELD, 0x4015,
5109
+
PCI_ANY_ID, PCI_ANY_ID,
5110
+
0, 0,
5111
+
pbn_oxsemi_4_15625000 },
5112
+
/*
5113
+
* Brainboxes PX-260/PX-701
5114
+
*/
5115
+
{ PCI_VENDOR_ID_INTASHIELD, 0x400A,
5116
+
PCI_ANY_ID, PCI_ANY_ID,
5117
+
0, 0,
5118
+
pbn_oxsemi_4_15625000 },
5119
+
/*
5120
+
* Brainboxes PX-310
5121
+
*/
5122
+
{ PCI_VENDOR_ID_INTASHIELD, 0x400E,
5123
+
PCI_ANY_ID, PCI_ANY_ID,
5124
+
0, 0,
5125
+
pbn_oxsemi_2_15625000 },
5126
+
/*
5127
+
* Brainboxes PX-313
5128
+
*/
5129
+
{ PCI_VENDOR_ID_INTASHIELD, 0x400C,
5130
+
PCI_ANY_ID, PCI_ANY_ID,
5131
+
0, 0,
5132
+
pbn_oxsemi_2_15625000 },
5133
+
/*
5134
+
* Brainboxes PX-320/324/PX-376/PX-387
5135
+
*/
5136
+
{ PCI_VENDOR_ID_INTASHIELD, 0x400B,
5137
+
PCI_ANY_ID, PCI_ANY_ID,
5138
+
0, 0,
5139
+
pbn_oxsemi_1_15625000 },
5140
+
/*
5141
+
* Brainboxes PX-335/346
5142
+
*/
5143
+
{ PCI_VENDOR_ID_INTASHIELD, 0x400F,
5144
+
PCI_ANY_ID, PCI_ANY_ID,
5145
+
0, 0,
5146
+
pbn_oxsemi_4_15625000 },
5147
+
/*
5148
+
* Brainboxes PX-368
5149
+
*/
5150
+
{ PCI_VENDOR_ID_INTASHIELD, 0x4010,
5151
+
PCI_ANY_ID, PCI_ANY_ID,
5152
+
0, 0,
5153
+
pbn_oxsemi_4_15625000 },
5154
+
/*
5155
+
* Brainboxes PX-420
5156
+
*/
5157
+
{ PCI_VENDOR_ID_INTASHIELD, 0x4000,
5158
+
PCI_ANY_ID, PCI_ANY_ID,
5159
+
0, 0,
5160
+
pbn_b0_4_115200 },
5161
+
{ PCI_VENDOR_ID_INTASHIELD, 0x4011,
5162
+
PCI_ANY_ID, PCI_ANY_ID,
5163
+
0, 0,
5164
+
pbn_oxsemi_4_15625000 },
5165
+
/*
5166
+
* Brainboxes PX-803
5167
+
*/
5168
+
{ PCI_VENDOR_ID_INTASHIELD, 0x4009,
5169
+
PCI_ANY_ID, PCI_ANY_ID,
5170
+
0, 0,
5171
+
pbn_b0_1_115200 },
5172
+
{ PCI_VENDOR_ID_INTASHIELD, 0x401E,
5173
+
PCI_ANY_ID, PCI_ANY_ID,
5174
+
0, 0,
5175
+
pbn_oxsemi_1_15625000 },
5176
+
/*
5177
+
* Brainboxes PX-846
5178
+
*/
5179
+
{ PCI_VENDOR_ID_INTASHIELD, 0x4008,
5180
+
PCI_ANY_ID, PCI_ANY_ID,
5181
+
0, 0,
5182
+
pbn_b0_1_115200 },
5183
+
{ PCI_VENDOR_ID_INTASHIELD, 0x4017,
5184
+
PCI_ANY_ID, PCI_ANY_ID,
5185
+
0, 0,
5186
+
pbn_oxsemi_1_15625000 },
5187
+
5069
5188
/*
5070
5189
* Perle PCI-RAS cards
5071
5190
*/
+1
-1
drivers/tty/serial/8250/8250_pericom.c
+1
-1
drivers/tty/serial/8250/8250_pericom.c
···
73
73
struct uart_8250_port *up = up_to_u8250p(port);
74
74
int lcr = serial_port_in(port, UART_LCR);
75
75
76
-
serial_port_out(port, UART_LCR, lcr | 0x80);
76
+
serial_port_out(port, UART_LCR, lcr | UART_LCR_DLAB);
77
77
serial_dl_write(up, divisor);
78
78
serial_port_out(port, 2, 16 - scr);
79
79
serial_port_out(port, UART_LCR, lcr);
+71
-86
drivers/tty/serial/8250/8250_port.c
+71
-86
drivers/tty/serial/8250/8250_port.c
···
50
50
#define DEBUG_AUTOCONF(fmt...) do { } while (0)
51
51
#endif
52
52
53
-
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
54
-
55
53
/*
56
54
* Here we define the default xmit fifo size used for each type of UART.
57
55
*/
···
334
336
335
337
#ifdef CONFIG_SERIAL_8250_RT288X
336
338
339
+
#define UART_REG_UNMAPPED -1
340
+
337
341
/* Au1x00/RT288x UART hardware has a weird register layout */
338
342
static const s8 au_io_in_map[8] = {
339
-
0, /* UART_RX */
340
-
2, /* UART_IER */
341
-
3, /* UART_IIR */
342
-
5, /* UART_LCR */
343
-
6, /* UART_MCR */
344
-
7, /* UART_LSR */
345
-
8, /* UART_MSR */
346
-
-1, /* UART_SCR (unmapped) */
343
+
[UART_RX] = 0,
344
+
[UART_IER] = 2,
345
+
[UART_IIR] = 3,
346
+
[UART_LCR] = 5,
347
+
[UART_MCR] = 6,
348
+
[UART_LSR] = 7,
349
+
[UART_MSR] = 8,
350
+
[UART_SCR] = UART_REG_UNMAPPED,
347
351
};
348
352
349
353
static const s8 au_io_out_map[8] = {
350
-
1, /* UART_TX */
351
-
2, /* UART_IER */
352
-
4, /* UART_FCR */
353
-
5, /* UART_LCR */
354
-
6, /* UART_MCR */
355
-
-1, /* UART_LSR (unmapped) */
356
-
-1, /* UART_MSR (unmapped) */
357
-
-1, /* UART_SCR (unmapped) */
354
+
[UART_TX] = 1,
355
+
[UART_IER] = 2,
356
+
[UART_FCR] = 4,
357
+
[UART_LCR] = 5,
358
+
[UART_MCR] = 6,
359
+
[UART_LSR] = UART_REG_UNMAPPED,
360
+
[UART_MSR] = UART_REG_UNMAPPED,
361
+
[UART_SCR] = UART_REG_UNMAPPED,
358
362
};
359
363
360
364
unsigned int au_serial_in(struct uart_port *p, int offset)
···
364
364
if (offset >= ARRAY_SIZE(au_io_in_map))
365
365
return UINT_MAX;
366
366
offset = au_io_in_map[offset];
367
-
if (offset < 0)
367
+
if (offset == UART_REG_UNMAPPED)
368
368
return UINT_MAX;
369
369
return __raw_readl(p->membase + (offset << p->regshift));
370
370
}
···
374
374
if (offset >= ARRAY_SIZE(au_io_out_map))
375
375
return;
376
376
offset = au_io_out_map[offset];
377
-
if (offset < 0)
377
+
if (offset == UART_REG_UNMAPPED)
378
378
return;
379
379
__raw_writel(value, p->membase + (offset << p->regshift));
380
380
}
···
647
647
}
648
648
EXPORT_SYMBOL_GPL(serial8250_em485_destroy);
649
649
650
+
struct serial_rs485 serial8250_em485_supported = {
651
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND |
652
+
SER_RS485_TERMINATE_BUS | SER_RS485_RX_DURING_TX,
653
+
.delay_rts_before_send = 1,
654
+
.delay_rts_after_send = 1,
655
+
};
656
+
EXPORT_SYMBOL_GPL(serial8250_em485_supported);
657
+
650
658
/**
651
659
* serial8250_em485_config() - generic ->rs485_config() callback
652
660
* @port: uart port
···
664
656
* if the uart is incapable of driving RTS as a Transmit Enable signal in
665
657
* hardware, relying on software emulation instead.
666
658
*/
667
-
int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485)
659
+
int serial8250_em485_config(struct uart_port *port, struct ktermios *termios,
660
+
struct serial_rs485 *rs485)
668
661
{
669
662
struct uart_8250_port *up = up_to_u8250p(port);
670
663
···
676
667
rs485->flags &= ~SER_RS485_RTS_AFTER_SEND;
677
668
}
678
669
679
-
/* clamp the delays to [0, 100ms] */
680
-
rs485->delay_rts_before_send = min(rs485->delay_rts_before_send, 100U);
681
-
rs485->delay_rts_after_send = min(rs485->delay_rts_after_send, 100U);
682
-
683
-
memset(rs485->padding, 0, sizeof(rs485->padding));
684
-
port->rs485 = *rs485;
685
-
686
-
gpiod_set_value(port->rs485_term_gpio,
687
-
rs485->flags & SER_RS485_TERMINATE_BUS);
688
-
689
670
/*
690
671
* Both serial8250_em485_init() and serial8250_em485_destroy()
691
672
* are idempotent.
692
673
*/
693
-
if (rs485->flags & SER_RS485_ENABLED) {
694
-
int ret = serial8250_em485_init(up);
695
-
696
-
if (ret) {
697
-
rs485->flags &= ~SER_RS485_ENABLED;
698
-
port->rs485.flags &= ~SER_RS485_ENABLED;
699
-
}
700
-
return ret;
701
-
}
674
+
if (rs485->flags & SER_RS485_ENABLED)
675
+
return serial8250_em485_init(up);
702
676
703
677
serial8250_em485_destroy(up);
704
678
return 0;
···
841
849
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
842
850
old_dl = serial_dl_read(up);
843
851
serial_dl_write(up, 0x0001);
844
-
serial_out(up, UART_LCR, 0x03);
852
+
serial_out(up, UART_LCR, UART_LCR_WLEN8);
845
853
for (count = 0; count < 256; count++)
846
854
serial_out(up, UART_TX, count);
847
855
mdelay(20);/* FIXME - schedule_timeout */
···
1495
1503
}
1496
1504
}
1497
1505
1498
-
static inline void __do_stop_tx(struct uart_8250_port *p)
1499
-
{
1500
-
if (serial8250_clear_THRI(p))
1501
-
serial8250_rpm_put_tx(p);
1502
-
}
1503
-
1504
1506
static inline void __stop_tx(struct uart_8250_port *p)
1505
1507
{
1506
1508
struct uart_8250_em485 *em485 = p->em485;
1507
1509
1508
1510
if (em485) {
1509
-
unsigned char lsr = serial_in(p, UART_LSR);
1511
+
u16 lsr = serial_lsr_in(p);
1510
1512
u64 stop_delay = 0;
1511
1513
1512
1514
p->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
···
1508
1522
if (!(lsr & UART_LSR_THRE))
1509
1523
return;
1510
1524
/*
1511
-
* To provide required timeing and allow FIFO transfer,
1525
+
* To provide required timing and allow FIFO transfer,
1512
1526
* __stop_tx_rs485() must be called only when both FIFO and
1513
1527
* shift register are empty. The device driver should either
1514
1528
* enable interrupt on TEMT or set UART_CAP_NOTEMT that will
···
1530
1544
1531
1545
__stop_tx_rs485(p, stop_delay);
1532
1546
}
1533
-
__do_stop_tx(p);
1547
+
1548
+
if (serial8250_clear_THRI(p))
1549
+
serial8250_rpm_put_tx(p);
1534
1550
}
1535
1551
1536
1552
static void serial8250_stop_tx(struct uart_port *port)
···
1561
1573
1562
1574
if (serial8250_set_THRI(up)) {
1563
1575
if (up->bugs & UART_BUG_TXEN) {
1564
-
unsigned char lsr;
1576
+
u16 lsr = serial_lsr_in(up);
1565
1577
1566
-
lsr = serial_in(up, UART_LSR);
1567
-
up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1568
1578
if (lsr & UART_LSR_THRE)
1569
1579
serial8250_tx_chars(up);
1570
1580
}
···
1602
1616
}
1603
1617
EXPORT_SYMBOL_GPL(serial8250_em485_start_tx);
1604
1618
1605
-
static inline void start_tx_rs485(struct uart_port *port)
1619
+
/* Returns false, if start_tx_timer was setup to defer TX start */
1620
+
static bool start_tx_rs485(struct uart_port *port)
1606
1621
{
1607
1622
struct uart_8250_port *up = up_to_u8250p(port);
1608
1623
struct uart_8250_em485 *em485 = up->em485;
···
1631
1644
em485->active_timer = &em485->start_tx_timer;
1632
1645
start_hrtimer_ms(&em485->start_tx_timer,
1633
1646
up->port.rs485.delay_rts_before_send);
1634
-
return;
1647
+
return false;
1635
1648
}
1636
1649
}
1637
1650
1638
-
__start_tx(port);
1651
+
return true;
1639
1652
}
1640
1653
1641
1654
static enum hrtimer_restart serial8250_em485_handle_start_tx(struct hrtimer *t)
···
1665
1678
1666
1679
serial8250_rpm_get_tx(up);
1667
1680
1668
-
if (em485 &&
1669
-
em485->active_timer == &em485->start_tx_timer)
1670
-
return;
1671
-
1672
-
if (em485)
1673
-
start_tx_rs485(port);
1674
-
else
1675
-
__start_tx(port);
1681
+
if (em485) {
1682
+
if ((em485->active_timer == &em485->start_tx_timer) ||
1683
+
!start_tx_rs485(port))
1684
+
return;
1685
+
}
1686
+
__start_tx(port);
1676
1687
}
1677
1688
1678
1689
static void serial8250_throttle(struct uart_port *port)
···
1714
1729
serial8250_rpm_put(up);
1715
1730
}
1716
1731
1717
-
void serial8250_read_char(struct uart_8250_port *up, unsigned char lsr)
1732
+
void serial8250_read_char(struct uart_8250_port *up, u16 lsr)
1718
1733
{
1719
1734
struct uart_port *port = &up->port;
1720
1735
unsigned char ch;
···
1777
1792
EXPORT_SYMBOL_GPL(serial8250_read_char);
1778
1793
1779
1794
/*
1780
-
* serial8250_rx_chars: processes according to the passed in LSR
1781
-
* value, and returns the remaining LSR bits not handled
1782
-
* by this Rx routine.
1795
+
* serial8250_rx_chars - Read characters. The first LSR value must be passed in.
1796
+
*
1797
+
* Returns LSR bits. The caller should rely only on non-Rx related LSR bits
1798
+
* (such as THRE) because the LSR value might come from an already consumed
1799
+
* character.
1783
1800
*/
1784
-
unsigned char serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1801
+
u16 serial8250_rx_chars(struct uart_8250_port *up, u16 lsr)
1785
1802
{
1786
1803
struct uart_port *port = &up->port;
1787
1804
int max_count = 256;
···
1839
1852
if (uart_circ_empty(xmit))
1840
1853
break;
1841
1854
if ((up->capabilities & UART_CAP_HFIFO) &&
1842
-
(serial_in(up, UART_LSR) & BOTH_EMPTY) != BOTH_EMPTY)
1855
+
!uart_lsr_tx_empty(serial_in(up, UART_LSR)))
1843
1856
break;
1844
1857
/* The BCM2835 MINI UART THRE bit is really a not-full bit. */
1845
1858
if ((up->capabilities & UART_CAP_MINI) &&
···
1903
1916
*/
1904
1917
int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1905
1918
{
1906
-
unsigned char status;
1907
1919
struct uart_8250_port *up = up_to_u8250p(port);
1908
1920
bool skip_rx = false;
1909
1921
unsigned long flags;
1922
+
u16 status;
1910
1923
1911
1924
if (iir & UART_IIR_NO_INT)
1912
1925
return 0;
1913
1926
1914
1927
spin_lock_irqsave(&port->lock, flags);
1915
1928
1916
-
status = serial_port_in(port, UART_LSR);
1929
+
status = serial_lsr_in(up);
1917
1930
1918
1931
/*
1919
1932
* If port is stopped and there are no error conditions in the
···
1989
2002
{
1990
2003
struct uart_8250_port *up = up_to_u8250p(port);
1991
2004
unsigned long flags;
1992
-
unsigned int lsr;
2005
+
u16 lsr;
1993
2006
1994
2007
serial8250_rpm_get(up);
1995
2008
1996
2009
spin_lock_irqsave(&port->lock, flags);
1997
-
lsr = serial_port_in(port, UART_LSR);
1998
-
up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
2010
+
lsr = serial_lsr_in(up);
1999
2011
spin_unlock_irqrestore(&port->lock, flags);
2000
2012
2001
2013
serial8250_rpm_put(up);
2002
2014
2003
-
return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
2015
+
return uart_lsr_tx_empty(lsr) ? TIOCSER_TEMT : 0;
2004
2016
}
2005
2017
2006
2018
unsigned int serial8250_do_get_mctrl(struct uart_port *port)
···
2070
2084
2071
2085
/* Wait up to 10ms for the character(s) to be sent. */
2072
2086
for (;;) {
2073
-
status = serial_in(up, UART_LSR);
2074
-
2075
-
up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
2087
+
status = serial_lsr_in(up);
2076
2088
2077
2089
if ((status & bits) == bits)
2078
2090
break;
···
2112
2128
static int serial8250_get_poll_char(struct uart_port *port)
2113
2129
{
2114
2130
struct uart_8250_port *up = up_to_u8250p(port);
2115
-
unsigned char lsr;
2116
2131
int status;
2132
+
u16 lsr;
2117
2133
2118
2134
serial8250_rpm_get(up);
2119
2135
···
2147
2163
else
2148
2164
serial_port_out(port, UART_IER, 0);
2149
2165
2150
-
wait_for_xmitr(up, BOTH_EMPTY);
2166
+
wait_for_xmitr(up, UART_LSR_BOTH_EMPTY);
2151
2167
/*
2152
2168
* Send the character out.
2153
2169
*/
···
2157
2173
* Finally, wait for transmitter to become empty
2158
2174
* and restore the IER
2159
2175
*/
2160
-
wait_for_xmitr(up, BOTH_EMPTY);
2176
+
wait_for_xmitr(up, UART_LSR_BOTH_EMPTY);
2161
2177
serial_port_out(port, UART_IER, ier);
2162
2178
serial8250_rpm_put(up);
2163
2179
}
···
2168
2184
{
2169
2185
struct uart_8250_port *up = up_to_u8250p(port);
2170
2186
unsigned long flags;
2171
-
unsigned char lsr, iir;
2187
+
unsigned char iir;
2172
2188
int retval;
2189
+
u16 lsr;
2173
2190
2174
2191
if (!port->fifosize)
2175
2192
port->fifosize = uart_config[port->type].fifo_size;
···
2795
2810
port->read_status_mask |= UART_LSR_BI;
2796
2811
2797
2812
/*
2798
-
* Characteres to ignore
2813
+
* Characters to ignore
2799
2814
*/
2800
2815
port->ignore_status_mask = 0;
2801
2816
if (termios->c_iflag & IGNPAR)
···
3188
3203
autoconfig(up);
3189
3204
3190
3205
if (port->rs485.flags & SER_RS485_ENABLED)
3191
-
port->rs485_config(port, &port->rs485);
3206
+
uart_rs485_config(port);
3192
3207
3193
3208
/* if access method is AU, it is a 16550 with a quirk */
3194
3209
if (port->type == PORT_16550A && port->iotype == UPIO_AU)
···
3430
3445
* Finally, wait for transmitter to become empty
3431
3446
* and restore the IER
3432
3447
*/
3433
-
wait_for_xmitr(up, BOTH_EMPTY);
3448
+
wait_for_xmitr(up, UART_LSR_BOTH_EMPTY);
3434
3449
3435
3450
if (em485) {
3436
3451
mdelay(port->rs485.delay_rts_after_send);
+1
drivers/tty/serial/8250/Kconfig
+1
drivers/tty/serial/8250/Kconfig
+1
-17
drivers/tty/serial/Kconfig
+1
-17
drivers/tty/serial/Kconfig
···
324
324
depends on SPI_MASTER
325
325
select SERIAL_CORE
326
326
select REGMAP_SPI if SPI_MASTER
327
+
select REGMAP_I2C if I2C
327
328
help
328
329
This selects support for an advanced UART from Maxim (Dallas).
329
330
Supported ICs are MAX3107, MAX3108, MAX3109, MAX14830.
···
889
888
config SERIAL_TXX9_STDSERIAL
890
889
bool "TX39XX/49XX SIO act as standard serial"
891
890
depends on !SERIAL_8250 && SERIAL_TXX9
892
-
893
-
config SERIAL_VR41XX
894
-
tristate "NEC VR4100 series Serial Interface Unit support"
895
-
depends on CPU_VR41XX
896
-
select SERIAL_CORE
897
-
help
898
-
If you have a NEC VR4100 series processor and you want to use
899
-
Serial Interface Unit(SIU) or Debug Serial Interface Unit(DSIU)
900
-
(not include VR4111/VR4121 DSIU), say Y. Otherwise, say N.
901
-
902
-
config SERIAL_VR41XX_CONSOLE
903
-
bool "Enable NEC VR4100 series Serial Interface Unit console"
904
-
depends on SERIAL_VR41XX=y
905
-
select SERIAL_CORE_CONSOLE
906
-
help
907
-
If you have a NEC VR4100 series processor and you want to use
908
-
a console on a serial port, say Y. Otherwise, say N.
909
891
910
892
config SERIAL_JSM
911
893
tristate "Digi International NEO and Classic PCI Support"
-1
drivers/tty/serial/Makefile
-1
drivers/tty/serial/Makefile
···
51
51
obj-$(CONFIG_SERIAL_SC16IS7XX_CORE) += sc16is7xx.o
52
52
obj-$(CONFIG_SERIAL_JSM) += jsm/
53
53
obj-$(CONFIG_SERIAL_TXX9) += serial_txx9.o
54
-
obj-$(CONFIG_SERIAL_VR41XX) += vr41xx_siu.o
55
54
obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o
56
55
obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o
57
56
obj-$(CONFIG_SERIAL_MSM) += msm_serial.o
+9
-6
drivers/tty/serial/amba-pl011.c
+9
-6
drivers/tty/serial/amba-pl011.c
···
2214
2214
return ret;
2215
2215
}
2216
2216
2217
-
static int pl011_rs485_config(struct uart_port *port,
2217
+
static int pl011_rs485_config(struct uart_port *port, struct ktermios *termios,
2218
2218
struct serial_rs485 *rs485)
2219
2219
{
2220
2220
struct uart_amba_port *uap =
···
2700
2700
static int pl011_get_rs485_mode(struct uart_amba_port *uap)
2701
2701
{
2702
2702
struct uart_port *port = &uap->port;
2703
-
struct serial_rs485 *rs485 = &port->rs485;
2704
2703
int ret;
2705
2704
2706
2705
ret = uart_get_rs485_mode(port);
2707
2706
if (ret)
2708
2707
return ret;
2709
-
2710
-
/* clamp the delays to [0, 100ms] */
2711
-
rs485->delay_rts_before_send = min(rs485->delay_rts_before_send, 100U);
2712
-
rs485->delay_rts_after_send = min(rs485->delay_rts_after_send, 100U);
2713
2708
2714
2709
return 0;
2715
2710
}
···
2765
2770
return ret;
2766
2771
}
2767
2772
2773
+
static const struct serial_rs485 pl011_rs485_supported = {
2774
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND |
2775
+
SER_RS485_RX_DURING_TX,
2776
+
.delay_rts_before_send = 1,
2777
+
.delay_rts_after_send = 1,
2778
+
};
2779
+
2768
2780
static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
2769
2781
{
2770
2782
struct uart_amba_port *uap;
···
2798
2796
uap->port.irq = dev->irq[0];
2799
2797
uap->port.ops = &amba_pl011_pops;
2800
2798
uap->port.rs485_config = pl011_rs485_config;
2799
+
uap->port.rs485_supported = pl011_rs485_supported;
2801
2800
snprintf(uap->type, sizeof(uap->type), "PL011 rev%u", amba_rev(dev));
2802
2801
2803
2802
ret = pl011_setup_port(&dev->dev, uap, &dev->res, portnr);
+13
-14
drivers/tty/serial/ar933x_uart.c
+13
-14
drivers/tty/serial/ar933x_uart.c
···
580
580
.verify_port = ar933x_uart_verify_port,
581
581
};
582
582
583
-
static int ar933x_config_rs485(struct uart_port *port,
583
+
static int ar933x_config_rs485(struct uart_port *port, struct ktermios *termios,
584
584
struct serial_rs485 *rs485conf)
585
585
{
586
-
struct ar933x_uart_port *up =
587
-
container_of(port, struct ar933x_uart_port, port);
588
-
589
-
if ((rs485conf->flags & SER_RS485_ENABLED) &&
590
-
!up->rts_gpiod) {
591
-
dev_err(port->dev, "RS485 needs rts-gpio\n");
592
-
return 1;
593
-
}
594
-
port->rs485 = *rs485conf;
595
586
return 0;
596
587
}
597
588
···
693
702
.cons = NULL, /* filled in runtime */
694
703
};
695
704
705
+
static const struct serial_rs485 ar933x_no_rs485 = {};
706
+
static const struct serial_rs485 ar933x_rs485_supported = {
707
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND,
708
+
};
709
+
696
710
static int ar933x_uart_probe(struct platform_device *pdev)
697
711
{
698
712
struct ar933x_uart_port *up;
···
769
773
port->fifosize = AR933X_UART_FIFO_SIZE;
770
774
port->ops = &ar933x_uart_ops;
771
775
port->rs485_config = ar933x_config_rs485;
776
+
port->rs485_supported = ar933x_rs485_supported;
772
777
773
778
baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
774
779
up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
···
789
792
790
793
up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS);
791
794
792
-
if ((port->rs485.flags & SER_RS485_ENABLED) &&
793
-
!up->rts_gpiod) {
794
-
dev_err(&pdev->dev, "lacking rts-gpio, disabling RS485\n");
795
-
port->rs485.flags &= ~SER_RS485_ENABLED;
795
+
if (!up->rts_gpiod) {
796
+
port->rs485_supported = ar933x_no_rs485;
797
+
if (port->rs485.flags & SER_RS485_ENABLED) {
798
+
dev_err(&pdev->dev, "lacking rts-gpio, disabling RS485\n");
799
+
port->rs485.flags &= ~SER_RS485_ENABLED;
800
+
}
796
801
}
797
802
798
803
#ifdef CONFIG_SERIAL_AR933X_CONSOLE
+34
-69
drivers/tty/serial/atmel_serial.c
+34
-69
drivers/tty/serial/atmel_serial.c
···
166
166
unsigned int fidi_min;
167
167
unsigned int fidi_max;
168
168
169
-
#ifdef CONFIG_PM
170
169
struct {
171
170
u32 cr;
172
171
u32 mr;
···
176
177
u32 fmr;
177
178
u32 fimr;
178
179
} cache;
179
-
#endif
180
180
181
181
int (*prepare_rx)(struct uart_port *port);
182
182
int (*prepare_tx)(struct uart_port *port);
···
283
285
}
284
286
285
287
/* Enable or disable the rs485 support */
286
-
static int atmel_config_rs485(struct uart_port *port,
288
+
static int atmel_config_rs485(struct uart_port *port, struct ktermios *termios,
287
289
struct serial_rs485 *rs485conf)
288
290
{
289
291
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
···
2471
2473
#endif
2472
2474
};
2473
2475
2476
+
static const struct serial_rs485 atmel_rs485_supported = {
2477
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_AFTER_SEND | SER_RS485_RX_DURING_TX,
2478
+
.delay_rts_before_send = 1,
2479
+
.delay_rts_after_send = 1,
2480
+
};
2481
+
2474
2482
/*
2475
2483
* Configure the port from the platform device resource info.
2476
2484
*/
···
2498
2494
port->mapbase = mpdev->resource[0].start;
2499
2495
port->irq = platform_get_irq(mpdev, 0);
2500
2496
port->rs485_config = atmel_config_rs485;
2497
+
port->rs485_supported = atmel_rs485_supported;
2501
2498
port->iso7816_config = atmel_config_iso7816;
2502
2499
port->membase = NULL;
2503
2500
···
2508
2503
if (ret)
2509
2504
return ret;
2510
2505
2511
-
/* for console, the clock could already be configured */
2512
-
if (!atmel_port->clk) {
2513
-
atmel_port->clk = clk_get(&mpdev->dev, "usart");
2514
-
if (IS_ERR(atmel_port->clk)) {
2515
-
ret = PTR_ERR(atmel_port->clk);
2516
-
atmel_port->clk = NULL;
2517
-
return ret;
2518
-
}
2519
-
ret = clk_prepare_enable(atmel_port->clk);
2520
-
if (ret) {
2521
-
clk_put(atmel_port->clk);
2522
-
atmel_port->clk = NULL;
2523
-
return ret;
2524
-
}
2525
-
port->uartclk = clk_get_rate(atmel_port->clk);
2526
-
clk_disable_unprepare(atmel_port->clk);
2527
-
/* only enable clock when USART is in use */
2528
-
}
2506
+
port->uartclk = clk_get_rate(atmel_port->clk);
2529
2507
2530
2508
/*
2531
2509
* Use TXEMPTY for interrupt when rs485 or ISO7816 else TXRDY or
···
2617
2629
2618
2630
static int __init atmel_console_setup(struct console *co, char *options)
2619
2631
{
2620
-
int ret;
2621
2632
struct uart_port *port = &atmel_ports[co->index].uart;
2622
2633
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2623
2634
int baud = 115200;
···
2628
2641
/* Port not initialized yet - delay setup */
2629
2642
return -ENODEV;
2630
2643
}
2631
-
2632
-
ret = clk_prepare_enable(atmel_ports[co->index].clk);
2633
-
if (ret)
2634
-
return ret;
2635
2644
2636
2645
atmel_uart_writel(port, ATMEL_US_IDR, -1);
2637
2646
atmel_uart_writel(port, ATMEL_US_CR, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
···
2694
2711
.cons = ATMEL_CONSOLE_DEVICE,
2695
2712
};
2696
2713
2697
-
#ifdef CONFIG_PM
2698
2714
static bool atmel_serial_clk_will_stop(void)
2699
2715
{
2700
2716
#ifdef CONFIG_ARCH_AT91
···
2703
2721
#endif
2704
2722
}
2705
2723
2706
-
static int atmel_serial_suspend(struct platform_device *pdev,
2707
-
pm_message_t state)
2724
+
static int __maybe_unused atmel_serial_suspend(struct device *dev)
2708
2725
{
2709
-
struct uart_port *port = platform_get_drvdata(pdev);
2726
+
struct uart_port *port = dev_get_drvdata(dev);
2710
2727
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2711
2728
2712
2729
if (uart_console(port) && console_suspend_enabled) {
···
2730
2749
}
2731
2750
2732
2751
/* we can not wake up if we're running on slow clock */
2733
-
atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
2752
+
atmel_port->may_wakeup = device_may_wakeup(dev);
2734
2753
if (atmel_serial_clk_will_stop()) {
2735
2754
unsigned long flags;
2736
2755
2737
2756
spin_lock_irqsave(&atmel_port->lock_suspended, flags);
2738
2757
atmel_port->suspended = true;
2739
2758
spin_unlock_irqrestore(&atmel_port->lock_suspended, flags);
2740
-
device_set_wakeup_enable(&pdev->dev, 0);
2759
+
device_set_wakeup_enable(dev, 0);
2741
2760
}
2742
2761
2743
2762
uart_suspend_port(&atmel_uart, port);
···
2745
2764
return 0;
2746
2765
}
2747
2766
2748
-
static int atmel_serial_resume(struct platform_device *pdev)
2767
+
static int __maybe_unused atmel_serial_resume(struct device *dev)
2749
2768
{
2750
-
struct uart_port *port = platform_get_drvdata(pdev);
2769
+
struct uart_port *port = dev_get_drvdata(dev);
2751
2770
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2752
2771
unsigned long flags;
2753
2772
···
2782
2801
spin_unlock_irqrestore(&atmel_port->lock_suspended, flags);
2783
2802
2784
2803
uart_resume_port(&atmel_uart, port);
2785
-
device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
2804
+
device_set_wakeup_enable(dev, atmel_port->may_wakeup);
2786
2805
2787
2806
return 0;
2788
2807
}
2789
-
#else
2790
-
#define atmel_serial_suspend NULL
2791
-
#define atmel_serial_resume NULL
2792
-
#endif
2793
2808
2794
2809
static void atmel_serial_probe_fifos(struct atmel_uart_port *atmel_port,
2795
2810
struct platform_device *pdev)
···
2874
2897
atomic_set(&atmel_port->tasklet_shutdown, 0);
2875
2898
spin_lock_init(&atmel_port->lock_suspended);
2876
2899
2900
+
atmel_port->clk = devm_clk_get(&pdev->dev, "usart");
2901
+
if (IS_ERR(atmel_port->clk)) {
2902
+
ret = PTR_ERR(atmel_port->clk);
2903
+
goto err;
2904
+
}
2905
+
ret = clk_prepare_enable(atmel_port->clk);
2906
+
if (ret)
2907
+
goto err;
2908
+
2877
2909
ret = atmel_init_port(atmel_port, pdev);
2878
2910
if (ret)
2879
-
goto err_clear_bit;
2911
+
goto err_clk_disable_unprepare;
2880
2912
2881
2913
atmel_port->gpios = mctrl_gpio_init(&atmel_port->uart, 0);
2882
2914
if (IS_ERR(atmel_port->gpios)) {
2883
2915
ret = PTR_ERR(atmel_port->gpios);
2884
-
goto err_clear_bit;
2916
+
goto err_clk_disable_unprepare;
2885
2917
}
2886
2918
2887
2919
if (!atmel_use_pdc_rx(&atmel_port->uart)) {
···
2899
2913
sizeof(struct atmel_uart_char),
2900
2914
GFP_KERNEL);
2901
2915
if (!data)
2902
-
goto err_alloc_ring;
2916
+
goto err_clk_disable_unprepare;
2903
2917
atmel_port->rx_ring.buf = data;
2904
2918
}
2905
2919
···
2909
2923
if (ret)
2910
2924
goto err_add_port;
2911
2925
2912
-
#ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2913
-
if (uart_console(&atmel_port->uart)
2914
-
&& ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
2915
-
/*
2916
-
* The serial core enabled the clock for us, so undo
2917
-
* the clk_prepare_enable() in atmel_console_setup()
2918
-
*/
2919
-
clk_disable_unprepare(atmel_port->clk);
2920
-
}
2921
-
#endif
2922
-
2923
2926
device_init_wakeup(&pdev->dev, 1);
2924
2927
platform_set_drvdata(pdev, atmel_port);
2925
-
2926
-
/*
2927
-
* The peripheral clock has been disabled by atmel_init_port():
2928
-
* enable it before accessing I/O registers
2929
-
*/
2930
-
clk_prepare_enable(atmel_port->clk);
2931
2928
2932
2929
if (rs485_enabled) {
2933
2930
atmel_uart_writel(&atmel_port->uart, ATMEL_US_MR,
···
2935
2966
err_add_port:
2936
2967
kfree(atmel_port->rx_ring.buf);
2937
2968
atmel_port->rx_ring.buf = NULL;
2938
-
err_alloc_ring:
2939
-
if (!uart_console(&atmel_port->uart)) {
2940
-
clk_put(atmel_port->clk);
2941
-
atmel_port->clk = NULL;
2942
-
}
2943
-
err_clear_bit:
2969
+
err_clk_disable_unprepare:
2970
+
clk_disable_unprepare(atmel_port->clk);
2944
2971
clear_bit(atmel_port->uart.line, atmel_ports_in_use);
2945
2972
err:
2946
2973
return ret;
···
2970
3005
2971
3006
clear_bit(port->line, atmel_ports_in_use);
2972
3007
2973
-
clk_put(atmel_port->clk);
2974
-
atmel_port->clk = NULL;
2975
3008
pdev->dev.of_node = NULL;
2976
3009
2977
3010
return ret;
2978
3011
}
2979
3012
3013
+
static SIMPLE_DEV_PM_OPS(atmel_serial_pm_ops, atmel_serial_suspend,
3014
+
atmel_serial_resume);
3015
+
2980
3016
static struct platform_driver atmel_serial_driver = {
2981
3017
.probe = atmel_serial_probe,
2982
3018
.remove = atmel_serial_remove,
2983
-
.suspend = atmel_serial_suspend,
2984
-
.resume = atmel_serial_resume,
2985
3019
.driver = {
2986
3020
.name = "atmel_usart_serial",
2987
3021
.of_match_table = of_match_ptr(atmel_serial_dt_ids),
3022
+
.pm = pm_ptr(&atmel_serial_pm_ops),
2988
3023
},
2989
3024
};
2990
3025
+3
drivers/tty/serial/earlycon.c
+3
drivers/tty/serial/earlycon.c
+39
-28
drivers/tty/serial/fsl_lpuart.c
+39
-28
drivers/tty/serial/fsl_lpuart.c
···
274
274
int rx_dma_rng_buf_len;
275
275
unsigned int dma_tx_nents;
276
276
wait_queue_head_t dma_wait;
277
+
bool is_cs7; /* Set to true when character size is 7 */
278
+
/* and the parity is enabled */
277
279
};
278
280
279
281
struct lpuart_soc_data {
···
992
990
993
991
if (sr & (UARTSTAT_PE | UARTSTAT_OR | UARTSTAT_FE)) {
994
992
if (sr & UARTSTAT_PE) {
993
+
sport->port.icount.parity++;
994
+
} else if (sr & UARTSTAT_FE) {
995
995
if (is_break)
996
996
sport->port.icount.brk++;
997
997
else
998
-
sport->port.icount.parity++;
999
-
} else if (sr & UARTSTAT_FE) {
1000
-
sport->port.icount.frame++;
998
+
sport->port.icount.frame++;
1001
999
}
1002
1000
1003
1001
if (sr & UARTSTAT_OR)
···
1012
1010
sr &= sport->port.read_status_mask;
1013
1011
1014
1012
if (sr & UARTSTAT_PE) {
1013
+
flg = TTY_PARITY;
1014
+
} else if (sr & UARTSTAT_FE) {
1015
1015
if (is_break)
1016
1016
flg = TTY_BREAK;
1017
1017
else
1018
-
flg = TTY_PARITY;
1019
-
} else if (sr & UARTSTAT_FE) {
1020
-
flg = TTY_FRAME;
1018
+
flg = TTY_FRAME;
1021
1019
}
1022
1020
1023
1021
if (sr & UARTSTAT_OR)
1024
1022
flg = TTY_OVERRUN;
1025
1023
}
1024
+
1025
+
if (sport->is_cs7)
1026
+
rx &= 0x7F;
1026
1027
1027
1028
if (tty_insert_flip_char(port, rx, flg) == 0)
1028
1029
sport->port.icount.buf_overrun++;
···
1110
1105
ring->buf + ring->tail, count);
1111
1106
ring->tail = ring->head;
1112
1107
}
1108
+
}
1109
+
1110
+
static int lpuart_tty_insert_flip_string(struct tty_port *port,
1111
+
unsigned char *chars, size_t size, bool is_cs7)
1112
+
{
1113
+
int i;
1114
+
1115
+
if (is_cs7)
1116
+
for (i = 0; i < size; i++)
1117
+
chars[i] &= 0x7F;
1118
+
return tty_insert_flip_string(port, chars, size);
1113
1119
}
1114
1120
1115
1121
static void lpuart_copy_rx_to_tty(struct lpuart_port *sport)
···
1233
1217
if (ring->head < ring->tail) {
1234
1218
count = sport->rx_sgl.length - ring->tail;
1235
1219
1236
-
copied = tty_insert_flip_string(port, ring->buf + ring->tail, count);
1220
+
copied = lpuart_tty_insert_flip_string(port, ring->buf + ring->tail,
1221
+
count, sport->is_cs7);
1237
1222
if (copied != count)
1238
1223
sport->port.icount.buf_overrun++;
1239
1224
ring->tail = 0;
···
1244
1227
/* Finally we read data from tail to head */
1245
1228
if (ring->tail < ring->head) {
1246
1229
count = ring->head - ring->tail;
1247
-
copied = tty_insert_flip_string(port, ring->buf + ring->tail, count);
1230
+
copied = lpuart_tty_insert_flip_string(port, ring->buf + ring->tail,
1231
+
count, sport->is_cs7);
1248
1232
if (copied != count)
1249
1233
sport->port.icount.buf_overrun++;
1250
1234
/* Wrap ring->head if needed */
···
1373
1355
sport->dma_rx_cookie = -EINVAL;
1374
1356
}
1375
1357
1376
-
static int lpuart_config_rs485(struct uart_port *port,
1358
+
static int lpuart_config_rs485(struct uart_port *port, struct ktermios *termios,
1377
1359
struct serial_rs485 *rs485)
1378
1360
{
1379
1361
struct lpuart_port *sport = container_of(port,
···
1382
1364
u8 modem = readb(sport->port.membase + UARTMODEM) &
1383
1365
~(UARTMODEM_TXRTSPOL | UARTMODEM_TXRTSE);
1384
1366
writeb(modem, sport->port.membase + UARTMODEM);
1385
-
1386
-
/* clear unsupported configurations */
1387
-
rs485->delay_rts_before_send = 0;
1388
-
rs485->delay_rts_after_send = 0;
1389
-
rs485->flags &= ~SER_RS485_RX_DURING_TX;
1390
1367
1391
1368
if (rs485->flags & SER_RS485_ENABLED) {
1392
1369
/* Enable auto RS-485 RTS mode */
···
1403
1390
return 0;
1404
1391
}
1405
1392
1406
-
static int lpuart32_config_rs485(struct uart_port *port,
1393
+
static int lpuart32_config_rs485(struct uart_port *port, struct ktermios *termios,
1407
1394
struct serial_rs485 *rs485)
1408
1395
{
1409
1396
struct lpuart_port *sport = container_of(port,
···
1412
1399
unsigned long modem = lpuart32_read(&sport->port, UARTMODIR)
1413
1400
& ~(UARTMODEM_TXRTSPOL | UARTMODEM_TXRTSE);
1414
1401
lpuart32_write(&sport->port, modem, UARTMODIR);
1415
-
1416
-
/* clear unsupported configurations */
1417
-
rs485->delay_rts_before_send = 0;
1418
-
rs485->delay_rts_after_send = 0;
1419
-
rs485->flags &= ~SER_RS485_RX_DURING_TX;
1420
1402
1421
1403
if (rs485->flags & SER_RS485_ENABLED) {
1422
1404
/* Enable auto RS-485 RTS mode */
···
2084
2076
ctrl = old_ctrl = lpuart32_read(&sport->port, UARTCTRL);
2085
2077
bd = lpuart32_read(&sport->port, UARTBAUD);
2086
2078
modem = lpuart32_read(&sport->port, UARTMODIR);
2079
+
sport->is_cs7 = false;
2087
2080
/*
2088
2081
* only support CS8 and CS7, and for CS7 must enable PE.
2089
2082
* supported mode:
···
2202
2193
lpuart32_write(&sport->port, modem, UARTMODIR);
2203
2194
lpuart32_write(&sport->port, ctrl, UARTCTRL);
2204
2195
/* restore control register */
2196
+
2197
+
if ((ctrl & (UARTCTRL_PE | UARTCTRL_M)) == UARTCTRL_PE)
2198
+
sport->is_cs7 = true;
2205
2199
2206
2200
if (old && sport->lpuart_dma_rx_use) {
2207
2201
if (!lpuart_start_rx_dma(sport))
···
2633
2621
.cons = LPUART_CONSOLE,
2634
2622
};
2635
2623
2624
+
static const struct serial_rs485 lpuart_rs485_supported = {
2625
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND,
2626
+
/* delay_rts_* and RX_DURING_TX are not supported */
2627
+
};
2628
+
2636
2629
static int lpuart_probe(struct platform_device *pdev)
2637
2630
{
2638
2631
const struct lpuart_soc_data *sdata = of_device_get_match_data(&pdev->dev);
···
2677
2660
sport->port.rs485_config = lpuart32_config_rs485;
2678
2661
else
2679
2662
sport->port.rs485_config = lpuart_config_rs485;
2663
+
sport->port.rs485_supported = lpuart_rs485_supported;
2680
2664
2681
2665
sport->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
2682
2666
if (IS_ERR(sport->ipg_clk)) {
···
2735
2717
if (ret)
2736
2718
goto failed_get_rs485;
2737
2719
2738
-
if (sport->port.rs485.flags & SER_RS485_RX_DURING_TX)
2739
-
dev_err(&pdev->dev, "driver doesn't support RX during TX\n");
2740
-
2741
-
if (sport->port.rs485.delay_rts_before_send ||
2742
-
sport->port.rs485.delay_rts_after_send)
2743
-
dev_err(&pdev->dev, "driver doesn't support RTS delays\n");
2744
-
2745
-
sport->port.rs485_config(&sport->port, &sport->port.rs485);
2720
+
uart_rs485_config(&sport->port);
2746
2721
2747
2722
ret = devm_request_irq(&pdev->dev, sport->port.irq, handler, 0,
2748
2723
DRIVER_NAME, sport);
+15
-6
drivers/tty/serial/imx.c
+15
-6
drivers/tty/serial/imx.c
···
1907
1907
#endif
1908
1908
1909
1909
/* called with port.lock taken and irqs off or from .probe without locking */
1910
-
static int imx_uart_rs485_config(struct uart_port *port,
1910
+
static int imx_uart_rs485_config(struct uart_port *port, struct ktermios *termios,
1911
1911
struct serial_rs485 *rs485conf)
1912
1912
{
1913
1913
struct imx_port *sport = (struct imx_port *)port;
1914
1914
u32 ucr2;
1915
-
1916
-
/* RTS is required to control the transmitter */
1917
-
if (!sport->have_rtscts && !sport->have_rtsgpio)
1918
-
rs485conf->flags &= ~SER_RS485_ENABLED;
1919
1915
1920
1916
if (rs485conf->flags & SER_RS485_ENABLED) {
1921
1917
/* Enable receiver if low-active RTS signal is requested */
···
2196
2200
return HRTIMER_NORESTART;
2197
2201
}
2198
2202
2203
+
static const struct serial_rs485 imx_no_rs485 = {}; /* No RS485 if no RTS */
2204
+
static const struct serial_rs485 imx_rs485_supported = {
2205
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND |
2206
+
SER_RS485_RX_DURING_TX,
2207
+
.delay_rts_before_send = 1,
2208
+
.delay_rts_after_send = 1,
2209
+
};
2210
+
2199
2211
/* Default RX DMA buffer configuration */
2200
2212
#define RX_DMA_PERIODS 16
2201
2213
#define RX_DMA_PERIOD_LEN (PAGE_SIZE / 4)
···
2283
2279
sport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_IMX_CONSOLE);
2284
2280
sport->port.ops = &imx_uart_pops;
2285
2281
sport->port.rs485_config = imx_uart_rs485_config;
2282
+
/* RTS is required to control the RS485 transmitter */
2283
+
if (sport->have_rtscts || sport->have_rtsgpio)
2284
+
sport->port.rs485_supported = imx_rs485_supported;
2285
+
else
2286
+
sport->port.rs485_supported = imx_no_rs485;
2286
2287
sport->port.flags = UPF_BOOT_AUTOCONF;
2287
2288
timer_setup(&sport->timer, imx_uart_timeout, 0);
2288
2289
···
2347
2338
dev_err(&pdev->dev,
2348
2339
"low-active RTS not possible when receiver is off, enabling receiver\n");
2349
2340
2350
-
imx_uart_rs485_config(&sport->port, &sport->port.rs485);
2341
+
uart_rs485_config(&sport->port);
2351
2342
2352
2343
/* Disable interrupts before requesting them */
2353
2344
ucr1 = imx_uart_readl(sport, UCR1);
+1
-1
drivers/tty/serial/kgdboc.c
+1
-1
drivers/tty/serial/kgdboc.c
···
342
342
/*
343
343
* Configure with the new params as long as init already ran.
344
344
* Note that we can get called before init if someone loads us
345
-
* with "modprobe kgdboc kgdboc=..." or if they happen to use the
345
+
* with "modprobe kgdboc kgdboc=..." or if they happen to use
346
346
* the odd syntax of "kgdboc.kgdboc=..." on the kernel command.
347
347
*/
348
348
if (configured >= 0)
+207
-65
drivers/tty/serial/max310x.c
+207
-65
drivers/tty/serial/max310x.c
···
14
14
#include <linux/delay.h>
15
15
#include <linux/device.h>
16
16
#include <linux/gpio/driver.h>
17
+
#include <linux/i2c.h>
17
18
#include <linux/module.h>
18
19
#include <linux/mod_devicetable.h>
19
20
#include <linux/property.h>
···
73
72
#define MAX310X_GLOBALCMD_REG MAX310X_REG_1F /* Global Command (WO) */
74
73
75
74
/* Extended registers */
76
-
#define MAX310X_REVID_EXTREG MAX310X_REG_05 /* Revision ID */
75
+
#define MAX310X_SPI_REVID_EXTREG MAX310X_REG_05 /* Revision ID */
76
+
#define MAX310X_I2C_REVID_EXTREG (0x25) /* Revision ID */
77
77
78
78
/* IRQ register bits */
79
79
#define MAX310X_IRQ_LSR_BIT (1 << 0) /* LSR interrupt */
···
247
245
#define MAX14830_BRGCFG_CLKDIS_BIT (1 << 6) /* Clock Disable */
248
246
#define MAX14830_REV_ID (0xb0)
249
247
248
+
struct max310x_if_cfg {
249
+
int (*extended_reg_enable)(struct device *dev, bool enable);
250
+
251
+
unsigned int rev_id_reg;
252
+
};
253
+
250
254
struct max310x_devtype {
255
+
struct {
256
+
unsigned short min;
257
+
unsigned short max;
258
+
} slave_addr;
251
259
char name[9];
252
260
int nr;
253
261
u8 mode1;
···
270
258
struct work_struct tx_work;
271
259
struct work_struct md_work;
272
260
struct work_struct rs_work;
261
+
struct regmap *regmap;
273
262
274
-
u8 wr_header;
275
-
u8 rd_header;
276
263
u8 rx_buf[MAX310X_FIFO_SIZE];
277
264
};
278
265
#define to_max310x_port(_port) \
···
279
268
280
269
struct max310x_port {
281
270
const struct max310x_devtype *devtype;
271
+
const struct max310x_if_cfg *if_cfg;
282
272
struct regmap *regmap;
283
273
struct clk *clk;
284
274
#ifdef CONFIG_GPIOLIB
···
301
289
302
290
static u8 max310x_port_read(struct uart_port *port, u8 reg)
303
291
{
304
-
struct max310x_port *s = dev_get_drvdata(port->dev);
292
+
struct max310x_one *one = to_max310x_port(port);
305
293
unsigned int val = 0;
306
294
307
-
regmap_read(s->regmap, port->iobase + reg, &val);
295
+
regmap_read(one->regmap, reg, &val);
308
296
309
297
return val;
310
298
}
311
299
312
300
static void max310x_port_write(struct uart_port *port, u8 reg, u8 val)
313
301
{
314
-
struct max310x_port *s = dev_get_drvdata(port->dev);
302
+
struct max310x_one *one = to_max310x_port(port);
315
303
316
-
regmap_write(s->regmap, port->iobase + reg, val);
304
+
regmap_write(one->regmap, reg, val);
317
305
}
318
306
319
307
static void max310x_port_update(struct uart_port *port, u8 reg, u8 mask, u8 val)
320
308
{
321
-
struct max310x_port *s = dev_get_drvdata(port->dev);
309
+
struct max310x_one *one = to_max310x_port(port);
322
310
323
-
regmap_update_bits(s->regmap, port->iobase + reg, mask, val);
311
+
regmap_update_bits(one->regmap, reg, mask, val);
324
312
}
325
313
326
314
static int max3107_detect(struct device *dev)
···
369
357
unsigned int val = 0;
370
358
int ret;
371
359
372
-
ret = regmap_write(s->regmap, MAX310X_GLOBALCMD_REG,
373
-
MAX310X_EXTREG_ENBL);
360
+
ret = s->if_cfg->extended_reg_enable(dev, true);
374
361
if (ret)
375
362
return ret;
376
363
377
-
regmap_read(s->regmap, MAX310X_REVID_EXTREG, &val);
378
-
regmap_write(s->regmap, MAX310X_GLOBALCMD_REG, MAX310X_EXTREG_DSBL);
364
+
regmap_read(s->regmap, s->if_cfg->rev_id_reg, &val);
365
+
s->if_cfg->extended_reg_enable(dev, false);
379
366
if (((val & MAX310x_REV_MASK) != MAX3109_REV_ID)) {
380
367
dev_err(dev,
381
368
"%s ID 0x%02x does not match\n", s->devtype->name, val);
···
399
388
unsigned int val = 0;
400
389
int ret;
401
390
402
-
ret = regmap_write(s->regmap, MAX310X_GLOBALCMD_REG,
403
-
MAX310X_EXTREG_ENBL);
391
+
ret = s->if_cfg->extended_reg_enable(dev, true);
404
392
if (ret)
405
393
return ret;
406
394
407
-
regmap_read(s->regmap, MAX310X_REVID_EXTREG, &val);
408
-
regmap_write(s->regmap, MAX310X_GLOBALCMD_REG, MAX310X_EXTREG_DSBL);
395
+
regmap_read(s->regmap, s->if_cfg->rev_id_reg, &val);
396
+
s->if_cfg->extended_reg_enable(dev, false);
409
397
if (((val & MAX310x_REV_MASK) != MAX14830_REV_ID)) {
410
398
dev_err(dev,
411
399
"%s ID 0x%02x does not match\n", s->devtype->name, val);
···
429
419
.mode1 = MAX310X_MODE1_AUTOSLEEP_BIT | MAX310X_MODE1_IRQSEL_BIT,
430
420
.detect = max3107_detect,
431
421
.power = max310x_power,
422
+
.slave_addr = {
423
+
.min = 0x2c,
424
+
.max = 0x2f,
425
+
},
432
426
};
433
427
434
428
static const struct max310x_devtype max3108_devtype = {
···
441
427
.mode1 = MAX310X_MODE1_AUTOSLEEP_BIT,
442
428
.detect = max3108_detect,
443
429
.power = max310x_power,
430
+
.slave_addr = {
431
+
.min = 0x60,
432
+
.max = 0x6f,
433
+
},
444
434
};
445
435
446
436
static const struct max310x_devtype max3109_devtype = {
···
453
435
.mode1 = MAX310X_MODE1_AUTOSLEEP_BIT,
454
436
.detect = max3109_detect,
455
437
.power = max310x_power,
438
+
.slave_addr = {
439
+
.min = 0x60,
440
+
.max = 0x6f,
441
+
},
456
442
};
457
443
458
444
static const struct max310x_devtype max14830_devtype = {
···
465
443
.mode1 = MAX310X_MODE1_IRQSEL_BIT,
466
444
.detect = max14830_detect,
467
445
.power = max14830_power,
446
+
.slave_addr = {
447
+
.min = 0x60,
448
+
.max = 0x6f,
449
+
},
468
450
};
469
451
470
452
static bool max310x_reg_writeable(struct device *dev, unsigned int reg)
471
453
{
472
-
switch (reg & 0x1f) {
454
+
switch (reg) {
473
455
case MAX310X_IRQSTS_REG:
474
456
case MAX310X_LSR_IRQSTS_REG:
475
457
case MAX310X_SPCHR_IRQSTS_REG:
···
490
464
491
465
static bool max310x_reg_volatile(struct device *dev, unsigned int reg)
492
466
{
493
-
switch (reg & 0x1f) {
467
+
switch (reg) {
494
468
case MAX310X_RHR_REG:
495
469
case MAX310X_IRQSTS_REG:
496
470
case MAX310X_LSR_IRQSTS_REG:
···
512
486
513
487
static bool max310x_reg_precious(struct device *dev, unsigned int reg)
514
488
{
515
-
switch (reg & 0x1f) {
489
+
switch (reg) {
516
490
case MAX310X_RHR_REG:
517
491
case MAX310X_IRQSTS_REG:
518
492
case MAX310X_SPCHR_IRQSTS_REG:
···
650
624
static void max310x_batch_write(struct uart_port *port, u8 *txbuf, unsigned int len)
651
625
{
652
626
struct max310x_one *one = to_max310x_port(port);
653
-
struct spi_transfer xfer[] = {
654
-
{
655
-
.tx_buf = &one->wr_header,
656
-
.len = sizeof(one->wr_header),
657
-
}, {
658
-
.tx_buf = txbuf,
659
-
.len = len,
660
-
}
661
-
};
662
-
spi_sync_transfer(to_spi_device(port->dev), xfer, ARRAY_SIZE(xfer));
627
+
628
+
regmap_raw_write(one->regmap, MAX310X_THR_REG, txbuf, len);
663
629
}
664
630
665
631
static void max310x_batch_read(struct uart_port *port, u8 *rxbuf, unsigned int len)
666
632
{
667
633
struct max310x_one *one = to_max310x_port(port);
668
-
struct spi_transfer xfer[] = {
669
-
{
670
-
.tx_buf = &one->rd_header,
671
-
.len = sizeof(one->rd_header),
672
-
}, {
673
-
.rx_buf = rxbuf,
674
-
.len = len,
675
-
}
676
-
};
677
-
spi_sync_transfer(to_spi_device(port->dev), xfer, ARRAY_SIZE(xfer));
634
+
635
+
regmap_raw_read(one->regmap, MAX310X_RHR_REG, rxbuf, len);
678
636
}
679
637
680
638
static void max310x_handle_rx(struct uart_port *port, unsigned int rxlen)
···
1036
1026
MAX310X_MODE2_ECHOSUPR_BIT, mode2);
1037
1027
}
1038
1028
1039
-
static int max310x_rs485_config(struct uart_port *port,
1029
+
static int max310x_rs485_config(struct uart_port *port, struct ktermios *termios,
1040
1030
struct serial_rs485 *rs485)
1041
1031
{
1042
1032
struct max310x_one *one = to_max310x_port(port);
···
1045
1035
(rs485->delay_rts_after_send > 0x0f))
1046
1036
return -ERANGE;
1047
1037
1048
-
rs485->flags &= SER_RS485_RTS_ON_SEND | SER_RS485_RX_DURING_TX |
1049
-
SER_RS485_ENABLED;
1050
1038
port->rs485 = *rs485;
1051
1039
1052
1040
schedule_work(&one->rs_work);
···
1257
1249
}
1258
1250
#endif
1259
1251
1252
+
static const struct serial_rs485 max310x_rs485_supported = {
1253
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RX_DURING_TX,
1254
+
.delay_rts_before_send = 1,
1255
+
.delay_rts_after_send = 1,
1256
+
};
1257
+
1260
1258
static int max310x_probe(struct device *dev, const struct max310x_devtype *devtype,
1261
-
struct regmap *regmap, int irq)
1259
+
const struct max310x_if_cfg *if_cfg,
1260
+
struct regmap *regmaps[], int irq)
1262
1261
{
1263
1262
int i, ret, fmin, fmax, freq;
1264
1263
struct max310x_port *s;
1265
1264
u32 uartclk = 0;
1266
1265
bool xtal;
1267
1266
1268
-
if (IS_ERR(regmap))
1269
-
return PTR_ERR(regmap);
1267
+
for (i = 0; i < devtype->nr; i++)
1268
+
if (IS_ERR(regmaps[i]))
1269
+
return PTR_ERR(regmaps[i]);
1270
1270
1271
1271
/* Alloc port structure */
1272
1272
s = devm_kzalloc(dev, struct_size(s, p, devtype->nr), GFP_KERNEL);
···
1321
1305
goto out_clk;
1322
1306
}
1323
1307
1324
-
s->regmap = regmap;
1308
+
s->regmap = regmaps[0];
1325
1309
s->devtype = devtype;
1310
+
s->if_cfg = if_cfg;
1326
1311
dev_set_drvdata(dev, s);
1327
1312
1328
1313
/* Check device to ensure we are talking to what we expect */
···
1332
1315
goto out_clk;
1333
1316
1334
1317
for (i = 0; i < devtype->nr; i++) {
1335
-
unsigned int offs = i << 5;
1336
-
1337
1318
/* Reset port */
1338
-
regmap_write(s->regmap, MAX310X_MODE2_REG + offs,
1319
+
regmap_write(regmaps[i], MAX310X_MODE2_REG,
1339
1320
MAX310X_MODE2_RST_BIT);
1340
1321
/* Clear port reset */
1341
-
regmap_write(s->regmap, MAX310X_MODE2_REG + offs, 0);
1322
+
regmap_write(regmaps[i], MAX310X_MODE2_REG, 0);
1342
1323
1343
1324
/* Wait for port startup */
1344
1325
do {
1345
-
regmap_read(s->regmap,
1346
-
MAX310X_BRGDIVLSB_REG + offs, &ret);
1326
+
regmap_read(regmaps[i], MAX310X_BRGDIVLSB_REG, &ret);
1347
1327
} while (ret != 0x01);
1348
1328
1349
-
regmap_write(s->regmap, MAX310X_MODE1_REG + offs,
1350
-
devtype->mode1);
1329
+
regmap_write(regmaps[i], MAX310X_MODE1_REG, devtype->mode1);
1351
1330
}
1352
1331
1353
1332
uartclk = max310x_set_ref_clk(dev, s, freq, xtal);
···
1366
1353
s->p[i].port.fifosize = MAX310X_FIFO_SIZE;
1367
1354
s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY;
1368
1355
s->p[i].port.iotype = UPIO_PORT;
1369
-
s->p[i].port.iobase = i * 0x20;
1356
+
s->p[i].port.iobase = i;
1370
1357
s->p[i].port.membase = (void __iomem *)~0;
1371
1358
s->p[i].port.uartclk = uartclk;
1372
1359
s->p[i].port.rs485_config = max310x_rs485_config;
1360
+
s->p[i].port.rs485_supported = max310x_rs485_supported;
1373
1361
s->p[i].port.ops = &max310x_ops;
1362
+
s->p[i].regmap = regmaps[i];
1363
+
1374
1364
/* Disable all interrupts */
1375
1365
max310x_port_write(&s->p[i].port, MAX310X_IRQEN_REG, 0);
1376
1366
/* Clear IRQ status register */
···
1384
1368
INIT_WORK(&s->p[i].md_work, max310x_md_proc);
1385
1369
/* Initialize queue for changing RS485 mode */
1386
1370
INIT_WORK(&s->p[i].rs_work, max310x_rs_proc);
1387
-
/* Initialize SPI-transfer buffers */
1388
-
s->p[i].wr_header = (s->p[i].port.iobase + MAX310X_THR_REG) |
1389
-
MAX310X_WRITE_BIT;
1390
-
s->p[i].rd_header = (s->p[i].port.iobase + MAX310X_RHR_REG);
1391
1371
1392
1372
/* Register port */
1393
1373
ret = uart_add_one_port(&max310x_uart, &s->p[i].port);
···
1468
1456
.val_bits = 8,
1469
1457
.write_flag_mask = MAX310X_WRITE_BIT,
1470
1458
.cache_type = REGCACHE_RBTREE,
1459
+
.max_register = MAX310X_REG_1F,
1471
1460
.writeable_reg = max310x_reg_writeable,
1472
1461
.volatile_reg = max310x_reg_volatile,
1473
1462
.precious_reg = max310x_reg_precious,
1474
1463
};
1475
1464
1476
1465
#ifdef CONFIG_SPI_MASTER
1466
+
static int max310x_spi_extended_reg_enable(struct device *dev, bool enable)
1467
+
{
1468
+
struct max310x_port *s = dev_get_drvdata(dev);
1469
+
1470
+
return regmap_write(s->regmap, MAX310X_GLOBALCMD_REG,
1471
+
enable ? MAX310X_EXTREG_ENBL : MAX310X_EXTREG_DSBL);
1472
+
}
1473
+
1474
+
static const struct max310x_if_cfg __maybe_unused max310x_spi_if_cfg = {
1475
+
.extended_reg_enable = max310x_spi_extended_reg_enable,
1476
+
.rev_id_reg = MAX310X_SPI_REVID_EXTREG,
1477
+
};
1478
+
1477
1479
static int max310x_spi_probe(struct spi_device *spi)
1478
1480
{
1479
1481
const struct max310x_devtype *devtype;
1480
-
struct regmap *regmap;
1482
+
struct regmap *regmaps[4];
1483
+
unsigned int i;
1481
1484
int ret;
1482
1485
1483
1486
/* Setup SPI bus */
···
1507
1480
if (!devtype)
1508
1481
devtype = (struct max310x_devtype *)spi_get_device_id(spi)->driver_data;
1509
1482
1510
-
regcfg.max_register = devtype->nr * 0x20 - 1;
1511
-
regmap = devm_regmap_init_spi(spi, ®cfg);
1483
+
for (i = 0; i < devtype->nr; i++) {
1484
+
u8 port_mask = i * 0x20;
1485
+
regcfg.read_flag_mask = port_mask;
1486
+
regcfg.write_flag_mask = port_mask | MAX310X_WRITE_BIT;
1487
+
regmaps[i] = devm_regmap_init_spi(spi, ®cfg);
1488
+
}
1512
1489
1513
-
return max310x_probe(&spi->dev, devtype, regmap, spi->irq);
1490
+
return max310x_probe(&spi->dev, devtype, &max310x_spi_if_cfg, regmaps, spi->irq);
1514
1491
}
1515
1492
1516
1493
static void max310x_spi_remove(struct spi_device *spi)
···
1543
1512
};
1544
1513
#endif
1545
1514
1515
+
#ifdef CONFIG_I2C
1516
+
static int max310x_i2c_extended_reg_enable(struct device *dev, bool enable)
1517
+
{
1518
+
return 0;
1519
+
}
1520
+
1521
+
static struct regmap_config regcfg_i2c = {
1522
+
.reg_bits = 8,
1523
+
.val_bits = 8,
1524
+
.cache_type = REGCACHE_RBTREE,
1525
+
.writeable_reg = max310x_reg_writeable,
1526
+
.volatile_reg = max310x_reg_volatile,
1527
+
.precious_reg = max310x_reg_precious,
1528
+
.max_register = MAX310X_I2C_REVID_EXTREG,
1529
+
};
1530
+
1531
+
static const struct max310x_if_cfg max310x_i2c_if_cfg = {
1532
+
.extended_reg_enable = max310x_i2c_extended_reg_enable,
1533
+
.rev_id_reg = MAX310X_I2C_REVID_EXTREG,
1534
+
};
1535
+
1536
+
static unsigned short max310x_i2c_slave_addr(unsigned short addr,
1537
+
unsigned int nr)
1538
+
{
1539
+
/*
1540
+
* For MAX14830 and MAX3109, the slave address depends on what the
1541
+
* A0 and A1 pins are tied to.
1542
+
* See Table I2C Address Map of the datasheet.
1543
+
* Based on that table, the following formulas were determined.
1544
+
* UART1 - UART0 = 0x10
1545
+
* UART2 - UART1 = 0x20 + 0x10
1546
+
* UART3 - UART2 = 0x10
1547
+
*/
1548
+
1549
+
addr -= nr * 0x10;
1550
+
1551
+
if (nr >= 2)
1552
+
addr -= 0x20;
1553
+
1554
+
return addr;
1555
+
}
1556
+
1557
+
static int max310x_i2c_probe(struct i2c_client *client)
1558
+
{
1559
+
const struct max310x_devtype *devtype =
1560
+
device_get_match_data(&client->dev);
1561
+
struct i2c_client *port_client;
1562
+
struct regmap *regmaps[4];
1563
+
unsigned int i;
1564
+
u8 port_addr;
1565
+
1566
+
if (client->addr < devtype->slave_addr.min ||
1567
+
client->addr > devtype->slave_addr.max)
1568
+
return dev_err_probe(&client->dev, -EINVAL,
1569
+
"Slave addr 0x%x outside of range [0x%x, 0x%x]\n",
1570
+
client->addr, devtype->slave_addr.min,
1571
+
devtype->slave_addr.max);
1572
+
1573
+
regmaps[0] = devm_regmap_init_i2c(client, ®cfg_i2c);
1574
+
1575
+
for (i = 1; i < devtype->nr; i++) {
1576
+
port_addr = max310x_i2c_slave_addr(client->addr, i);
1577
+
port_client = devm_i2c_new_dummy_device(&client->dev,
1578
+
client->adapter,
1579
+
port_addr);
1580
+
1581
+
regmaps[i] = devm_regmap_init_i2c(port_client, ®cfg_i2c);
1582
+
}
1583
+
1584
+
return max310x_probe(&client->dev, devtype, &max310x_i2c_if_cfg,
1585
+
regmaps, client->irq);
1586
+
}
1587
+
1588
+
static int max310x_i2c_remove(struct i2c_client *client)
1589
+
{
1590
+
max310x_remove(&client->dev);
1591
+
1592
+
return 0;
1593
+
}
1594
+
1595
+
static struct i2c_driver max310x_i2c_driver = {
1596
+
.driver = {
1597
+
.name = MAX310X_NAME,
1598
+
.of_match_table = max310x_dt_ids,
1599
+
.pm = &max310x_pm_ops,
1600
+
},
1601
+
.probe_new = max310x_i2c_probe,
1602
+
.remove = max310x_i2c_remove,
1603
+
};
1604
+
#endif
1605
+
1546
1606
static int __init max310x_uart_init(void)
1547
1607
{
1548
1608
int ret;
···
1647
1525
#ifdef CONFIG_SPI_MASTER
1648
1526
ret = spi_register_driver(&max310x_spi_driver);
1649
1527
if (ret)
1650
-
uart_unregister_driver(&max310x_uart);
1528
+
goto err_spi_register;
1651
1529
#endif
1530
+
1531
+
#ifdef CONFIG_I2C
1532
+
ret = i2c_add_driver(&max310x_i2c_driver);
1533
+
if (ret)
1534
+
goto err_i2c_register;
1535
+
#endif
1536
+
1537
+
return 0;
1538
+
1539
+
#ifdef CONFIG_I2C
1540
+
err_i2c_register:
1541
+
spi_unregister_driver(&max310x_spi_driver);
1542
+
#endif
1543
+
1544
+
err_spi_register:
1545
+
uart_unregister_driver(&max310x_uart);
1652
1546
1653
1547
return ret;
1654
1548
}
···
1672
1534
1673
1535
static void __exit max310x_uart_exit(void)
1674
1536
{
1537
+
#ifdef CONFIG_I2C
1538
+
i2c_del_driver(&max310x_i2c_driver);
1539
+
#endif
1540
+
1675
1541
#ifdef CONFIG_SPI_MASTER
1676
1542
spi_unregister_driver(&max310x_spi_driver);
1677
1543
#endif
+8
-2
drivers/tty/serial/mcf.c
+8
-2
drivers/tty/serial/mcf.c
···
431
431
/****************************************************************************/
432
432
433
433
/* Enable or disable the RS485 support */
434
-
static int mcf_config_rs485(struct uart_port *port, struct serial_rs485 *rs485)
434
+
static int mcf_config_rs485(struct uart_port *port, struct ktermios *termios,
435
+
struct serial_rs485 *rs485)
435
436
{
436
437
unsigned char mr1, mr2;
437
438
···
449
448
}
450
449
writeb(mr1, port->membase + MCFUART_UMR);
451
450
writeb(mr2, port->membase + MCFUART_UMR);
452
-
port->rs485 = *rs485;
453
451
454
452
return 0;
455
453
}
454
+
455
+
static const struct serial_rs485 mcf_rs485_supported = {
456
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_AFTER_SEND,
457
+
};
456
458
457
459
/****************************************************************************/
458
460
···
506
502
port->uartclk = MCF_BUSCLK;
507
503
port->flags = UPF_BOOT_AUTOCONF;
508
504
port->rs485_config = mcf_config_rs485;
505
+
port->rs485_supported = mcf_rs485_supported;
509
506
port->ops = &mcf_uart_ops;
510
507
}
511
508
···
634
629
port->ops = &mcf_uart_ops;
635
630
port->flags = UPF_BOOT_AUTOCONF;
636
631
port->rs485_config = mcf_config_rs485;
632
+
port->rs485_supported = mcf_rs485_supported;
637
633
port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_MCF_CONSOLE);
638
634
639
635
uart_add_one_port(&mcf_driver, port);
+1
-1
drivers/tty/serial/meson_uart.c
+1
-1
drivers/tty/serial/meson_uart.c
+266
-264
drivers/tty/serial/msm_serial.c
+266
-264
drivers/tty/serial/msm_serial.c
···
29
29
#include <linux/of_device.h>
30
30
#include <linux/wait.h>
31
31
32
-
#define UART_MR1 0x0000
32
+
#define MSM_UART_MR1 0x0000
33
33
34
-
#define UART_MR1_AUTO_RFR_LEVEL0 0x3F
35
-
#define UART_MR1_AUTO_RFR_LEVEL1 0x3FF00
36
-
#define UART_DM_MR1_AUTO_RFR_LEVEL1 0xFFFFFF00
37
-
#define UART_MR1_RX_RDY_CTL BIT(7)
38
-
#define UART_MR1_CTS_CTL BIT(6)
34
+
#define MSM_UART_MR1_AUTO_RFR_LEVEL0 0x3F
35
+
#define MSM_UART_MR1_AUTO_RFR_LEVEL1 0x3FF00
36
+
#define MSM_UART_DM_MR1_AUTO_RFR_LEVEL1 0xFFFFFF00
37
+
#define MSM_UART_MR1_RX_RDY_CTL BIT(7)
38
+
#define MSM_UART_MR1_CTS_CTL BIT(6)
39
39
40
-
#define UART_MR2 0x0004
41
-
#define UART_MR2_ERROR_MODE BIT(6)
42
-
#define UART_MR2_BITS_PER_CHAR 0x30
43
-
#define UART_MR2_BITS_PER_CHAR_5 (0x0 << 4)
44
-
#define UART_MR2_BITS_PER_CHAR_6 (0x1 << 4)
45
-
#define UART_MR2_BITS_PER_CHAR_7 (0x2 << 4)
46
-
#define UART_MR2_BITS_PER_CHAR_8 (0x3 << 4)
47
-
#define UART_MR2_STOP_BIT_LEN_ONE (0x1 << 2)
48
-
#define UART_MR2_STOP_BIT_LEN_TWO (0x3 << 2)
49
-
#define UART_MR2_PARITY_MODE_NONE 0x0
50
-
#define UART_MR2_PARITY_MODE_ODD 0x1
51
-
#define UART_MR2_PARITY_MODE_EVEN 0x2
52
-
#define UART_MR2_PARITY_MODE_SPACE 0x3
53
-
#define UART_MR2_PARITY_MODE 0x3
40
+
#define MSM_UART_MR2 0x0004
41
+
#define MSM_UART_MR2_ERROR_MODE BIT(6)
42
+
#define MSM_UART_MR2_BITS_PER_CHAR 0x30
43
+
#define MSM_UART_MR2_BITS_PER_CHAR_5 (0x0 << 4)
44
+
#define MSM_UART_MR2_BITS_PER_CHAR_6 (0x1 << 4)
45
+
#define MSM_UART_MR2_BITS_PER_CHAR_7 (0x2 << 4)
46
+
#define MSM_UART_MR2_BITS_PER_CHAR_8 (0x3 << 4)
47
+
#define MSM_UART_MR2_STOP_BIT_LEN_ONE (0x1 << 2)
48
+
#define MSM_UART_MR2_STOP_BIT_LEN_TWO (0x3 << 2)
49
+
#define MSM_UART_MR2_PARITY_MODE_NONE 0x0
50
+
#define MSM_UART_MR2_PARITY_MODE_ODD 0x1
51
+
#define MSM_UART_MR2_PARITY_MODE_EVEN 0x2
52
+
#define MSM_UART_MR2_PARITY_MODE_SPACE 0x3
53
+
#define MSM_UART_MR2_PARITY_MODE 0x3
54
54
55
-
#define UART_CSR 0x0008
55
+
#define MSM_UART_CSR 0x0008
56
56
57
-
#define UART_TF 0x000C
57
+
#define MSM_UART_TF 0x000C
58
58
#define UARTDM_TF 0x0070
59
59
60
-
#define UART_CR 0x0010
61
-
#define UART_CR_CMD_NULL (0 << 4)
62
-
#define UART_CR_CMD_RESET_RX (1 << 4)
63
-
#define UART_CR_CMD_RESET_TX (2 << 4)
64
-
#define UART_CR_CMD_RESET_ERR (3 << 4)
65
-
#define UART_CR_CMD_RESET_BREAK_INT (4 << 4)
66
-
#define UART_CR_CMD_START_BREAK (5 << 4)
67
-
#define UART_CR_CMD_STOP_BREAK (6 << 4)
68
-
#define UART_CR_CMD_RESET_CTS (7 << 4)
69
-
#define UART_CR_CMD_RESET_STALE_INT (8 << 4)
70
-
#define UART_CR_CMD_PACKET_MODE (9 << 4)
71
-
#define UART_CR_CMD_MODE_RESET (12 << 4)
72
-
#define UART_CR_CMD_SET_RFR (13 << 4)
73
-
#define UART_CR_CMD_RESET_RFR (14 << 4)
74
-
#define UART_CR_CMD_PROTECTION_EN (16 << 4)
75
-
#define UART_CR_CMD_STALE_EVENT_DISABLE (6 << 8)
76
-
#define UART_CR_CMD_STALE_EVENT_ENABLE (80 << 4)
77
-
#define UART_CR_CMD_FORCE_STALE (4 << 8)
78
-
#define UART_CR_CMD_RESET_TX_READY (3 << 8)
79
-
#define UART_CR_TX_DISABLE BIT(3)
80
-
#define UART_CR_TX_ENABLE BIT(2)
81
-
#define UART_CR_RX_DISABLE BIT(1)
82
-
#define UART_CR_RX_ENABLE BIT(0)
83
-
#define UART_CR_CMD_RESET_RXBREAK_START ((1 << 11) | (2 << 4))
60
+
#define MSM_UART_CR 0x0010
61
+
#define MSM_UART_CR_CMD_NULL (0 << 4)
62
+
#define MSM_UART_CR_CMD_RESET_RX (1 << 4)
63
+
#define MSM_UART_CR_CMD_RESET_TX (2 << 4)
64
+
#define MSM_UART_CR_CMD_RESET_ERR (3 << 4)
65
+
#define MSM_UART_CR_CMD_RESET_BREAK_INT (4 << 4)
66
+
#define MSM_UART_CR_CMD_START_BREAK (5 << 4)
67
+
#define MSM_UART_CR_CMD_STOP_BREAK (6 << 4)
68
+
#define MSM_UART_CR_CMD_RESET_CTS (7 << 4)
69
+
#define MSM_UART_CR_CMD_RESET_STALE_INT (8 << 4)
70
+
#define MSM_UART_CR_CMD_PACKET_MODE (9 << 4)
71
+
#define MSM_UART_CR_CMD_MODE_RESET (12 << 4)
72
+
#define MSM_UART_CR_CMD_SET_RFR (13 << 4)
73
+
#define MSM_UART_CR_CMD_RESET_RFR (14 << 4)
74
+
#define MSM_UART_CR_CMD_PROTECTION_EN (16 << 4)
75
+
#define MSM_UART_CR_CMD_STALE_EVENT_DISABLE (6 << 8)
76
+
#define MSM_UART_CR_CMD_STALE_EVENT_ENABLE (80 << 4)
77
+
#define MSM_UART_CR_CMD_FORCE_STALE (4 << 8)
78
+
#define MSM_UART_CR_CMD_RESET_TX_READY (3 << 8)
79
+
#define MSM_UART_CR_TX_DISABLE BIT(3)
80
+
#define MSM_UART_CR_TX_ENABLE BIT(2)
81
+
#define MSM_UART_CR_RX_DISABLE BIT(1)
82
+
#define MSM_UART_CR_RX_ENABLE BIT(0)
83
+
#define MSM_UART_CR_CMD_RESET_RXBREAK_START ((1 << 11) | (2 << 4))
84
84
85
-
#define UART_IMR 0x0014
86
-
#define UART_IMR_TXLEV BIT(0)
87
-
#define UART_IMR_RXSTALE BIT(3)
88
-
#define UART_IMR_RXLEV BIT(4)
89
-
#define UART_IMR_DELTA_CTS BIT(5)
90
-
#define UART_IMR_CURRENT_CTS BIT(6)
91
-
#define UART_IMR_RXBREAK_START BIT(10)
85
+
#define MSM_UART_IMR 0x0014
86
+
#define MSM_UART_IMR_TXLEV BIT(0)
87
+
#define MSM_UART_IMR_RXSTALE BIT(3)
88
+
#define MSM_UART_IMR_RXLEV BIT(4)
89
+
#define MSM_UART_IMR_DELTA_CTS BIT(5)
90
+
#define MSM_UART_IMR_CURRENT_CTS BIT(6)
91
+
#define MSM_UART_IMR_RXBREAK_START BIT(10)
92
92
93
-
#define UART_IPR_RXSTALE_LAST 0x20
94
-
#define UART_IPR_STALE_LSB 0x1F
95
-
#define UART_IPR_STALE_TIMEOUT_MSB 0x3FF80
96
-
#define UART_DM_IPR_STALE_TIMEOUT_MSB 0xFFFFFF80
93
+
#define MSM_UART_IPR_RXSTALE_LAST 0x20
94
+
#define MSM_UART_IPR_STALE_LSB 0x1F
95
+
#define MSM_UART_IPR_STALE_TIMEOUT_MSB 0x3FF80
96
+
#define MSM_UART_DM_IPR_STALE_TIMEOUT_MSB 0xFFFFFF80
97
97
98
-
#define UART_IPR 0x0018
99
-
#define UART_TFWR 0x001C
100
-
#define UART_RFWR 0x0020
101
-
#define UART_HCR 0x0024
98
+
#define MSM_UART_IPR 0x0018
99
+
#define MSM_UART_TFWR 0x001C
100
+
#define MSM_UART_RFWR 0x0020
101
+
#define MSM_UART_HCR 0x0024
102
102
103
-
#define UART_MREG 0x0028
104
-
#define UART_NREG 0x002C
105
-
#define UART_DREG 0x0030
106
-
#define UART_MNDREG 0x0034
107
-
#define UART_IRDA 0x0038
108
-
#define UART_MISR_MODE 0x0040
109
-
#define UART_MISR_RESET 0x0044
110
-
#define UART_MISR_EXPORT 0x0048
111
-
#define UART_MISR_VAL 0x004C
112
-
#define UART_TEST_CTRL 0x0050
103
+
#define MSM_UART_MREG 0x0028
104
+
#define MSM_UART_NREG 0x002C
105
+
#define MSM_UART_DREG 0x0030
106
+
#define MSM_UART_MNDREG 0x0034
107
+
#define MSM_UART_IRDA 0x0038
108
+
#define MSM_UART_MISR_MODE 0x0040
109
+
#define MSM_UART_MISR_RESET 0x0044
110
+
#define MSM_UART_MISR_EXPORT 0x0048
111
+
#define MSM_UART_MISR_VAL 0x004C
112
+
#define MSM_UART_TEST_CTRL 0x0050
113
113
114
-
#define UART_SR 0x0008
115
-
#define UART_SR_HUNT_CHAR BIT(7)
116
-
#define UART_SR_RX_BREAK BIT(6)
117
-
#define UART_SR_PAR_FRAME_ERR BIT(5)
118
-
#define UART_SR_OVERRUN BIT(4)
119
-
#define UART_SR_TX_EMPTY BIT(3)
120
-
#define UART_SR_TX_READY BIT(2)
121
-
#define UART_SR_RX_FULL BIT(1)
122
-
#define UART_SR_RX_READY BIT(0)
114
+
#define MSM_UART_SR 0x0008
115
+
#define MSM_UART_SR_HUNT_CHAR BIT(7)
116
+
#define MSM_UART_SR_RX_BREAK BIT(6)
117
+
#define MSM_UART_SR_PAR_FRAME_ERR BIT(5)
118
+
#define MSM_UART_SR_OVERRUN BIT(4)
119
+
#define MSM_UART_SR_TX_EMPTY BIT(3)
120
+
#define MSM_UART_SR_TX_READY BIT(2)
121
+
#define MSM_UART_SR_RX_FULL BIT(1)
122
+
#define MSM_UART_SR_RX_READY BIT(0)
123
123
124
-
#define UART_RF 0x000C
124
+
#define MSM_UART_RF 0x000C
125
125
#define UARTDM_RF 0x0070
126
-
#define UART_MISR 0x0010
127
-
#define UART_ISR 0x0014
128
-
#define UART_ISR_TX_READY BIT(7)
126
+
#define MSM_UART_MISR 0x0010
127
+
#define MSM_UART_ISR 0x0014
128
+
#define MSM_UART_ISR_TX_READY BIT(7)
129
129
130
130
#define UARTDM_RXFS 0x50
131
131
#define UARTDM_RXFS_BUF_SHIFT 0x7
···
181
181
struct msm_dma rx_dma;
182
182
};
183
183
184
-
#define UART_TO_MSM(uart_port) container_of(uart_port, struct msm_port, uart)
184
+
static inline struct msm_port *to_msm_port(struct uart_port *up)
185
+
{
186
+
return container_of(up, struct msm_port, uart);
187
+
}
185
188
186
189
static
187
190
void msm_write(struct uart_port *port, unsigned int val, unsigned int off)
···
203
200
*/
204
201
static void msm_serial_set_mnd_regs_tcxo(struct uart_port *port)
205
202
{
206
-
msm_write(port, 0x06, UART_MREG);
207
-
msm_write(port, 0xF1, UART_NREG);
208
-
msm_write(port, 0x0F, UART_DREG);
209
-
msm_write(port, 0x1A, UART_MNDREG);
203
+
msm_write(port, 0x06, MSM_UART_MREG);
204
+
msm_write(port, 0xF1, MSM_UART_NREG);
205
+
msm_write(port, 0x0F, MSM_UART_DREG);
206
+
msm_write(port, 0x1A, MSM_UART_MNDREG);
210
207
port->uartclk = 1843200;
211
208
}
212
209
···
215
212
*/
216
213
static void msm_serial_set_mnd_regs_tcxoby4(struct uart_port *port)
217
214
{
218
-
msm_write(port, 0x18, UART_MREG);
219
-
msm_write(port, 0xF6, UART_NREG);
220
-
msm_write(port, 0x0F, UART_DREG);
221
-
msm_write(port, 0x0A, UART_MNDREG);
215
+
msm_write(port, 0x18, MSM_UART_MREG);
216
+
msm_write(port, 0xF6, MSM_UART_NREG);
217
+
msm_write(port, 0x0F, MSM_UART_DREG);
218
+
msm_write(port, 0x0A, MSM_UART_MNDREG);
222
219
port->uartclk = 1843200;
223
220
}
224
221
225
222
static void msm_serial_set_mnd_regs(struct uart_port *port)
226
223
{
227
-
struct msm_port *msm_port = UART_TO_MSM(port);
224
+
struct msm_port *msm_port = to_msm_port(port);
228
225
229
226
/*
230
227
* These registers don't exist so we change the clk input rate
···
395
392
{
396
393
unsigned int timeout = 500000;
397
394
398
-
while (!(msm_read(port, UART_SR) & UART_SR_TX_EMPTY)) {
399
-
if (msm_read(port, UART_ISR) & UART_ISR_TX_READY)
395
+
while (!(msm_read(port, MSM_UART_SR) & MSM_UART_SR_TX_EMPTY)) {
396
+
if (msm_read(port, MSM_UART_ISR) & MSM_UART_ISR_TX_READY)
400
397
break;
401
398
udelay(1);
402
399
if (!timeout--)
403
400
break;
404
401
}
405
-
msm_write(port, UART_CR_CMD_RESET_TX_READY, UART_CR);
402
+
msm_write(port, MSM_UART_CR_CMD_RESET_TX_READY, MSM_UART_CR);
406
403
}
407
404
408
405
static void msm_stop_tx(struct uart_port *port)
409
406
{
410
-
struct msm_port *msm_port = UART_TO_MSM(port);
407
+
struct msm_port *msm_port = to_msm_port(port);
411
408
412
-
msm_port->imr &= ~UART_IMR_TXLEV;
413
-
msm_write(port, msm_port->imr, UART_IMR);
409
+
msm_port->imr &= ~MSM_UART_IMR_TXLEV;
410
+
msm_write(port, msm_port->imr, MSM_UART_IMR);
414
411
}
415
412
416
413
static void msm_start_tx(struct uart_port *port)
417
414
{
418
-
struct msm_port *msm_port = UART_TO_MSM(port);
415
+
struct msm_port *msm_port = to_msm_port(port);
419
416
struct msm_dma *dma = &msm_port->tx_dma;
420
417
421
418
/* Already started in DMA mode */
422
419
if (dma->count)
423
420
return;
424
421
425
-
msm_port->imr |= UART_IMR_TXLEV;
426
-
msm_write(port, msm_port->imr, UART_IMR);
422
+
msm_port->imr |= MSM_UART_IMR_TXLEV;
423
+
msm_write(port, msm_port->imr, MSM_UART_IMR);
427
424
}
428
425
429
426
static void msm_reset_dm_count(struct uart_port *port, int count)
···
459
456
msm_write(port, val, UARTDM_DMEN);
460
457
461
458
if (msm_port->is_uartdm > UARTDM_1P3) {
462
-
msm_write(port, UART_CR_CMD_RESET_TX, UART_CR);
463
-
msm_write(port, UART_CR_TX_ENABLE, UART_CR);
459
+
msm_write(port, MSM_UART_CR_CMD_RESET_TX, MSM_UART_CR);
460
+
msm_write(port, MSM_UART_CR_TX_ENABLE, MSM_UART_CR);
464
461
}
465
462
466
463
count = dma->count - state.residue;
···
471
468
xmit->tail &= UART_XMIT_SIZE - 1;
472
469
473
470
/* Restore "Tx FIFO below watermark" interrupt */
474
-
msm_port->imr |= UART_IMR_TXLEV;
475
-
msm_write(port, msm_port->imr, UART_IMR);
471
+
msm_port->imr |= MSM_UART_IMR_TXLEV;
472
+
msm_write(port, msm_port->imr, MSM_UART_IMR);
476
473
477
474
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
478
475
uart_write_wakeup(port);
···
519
516
* Using DMA complete for Tx FIFO reload, no need for
520
517
* "Tx FIFO below watermark" one, disable it
521
518
*/
522
-
msm_port->imr &= ~UART_IMR_TXLEV;
523
-
msm_write(port, msm_port->imr, UART_IMR);
519
+
msm_port->imr &= ~MSM_UART_IMR_TXLEV;
520
+
msm_write(port, msm_port->imr, MSM_UART_IMR);
524
521
525
522
dma->count = count;
526
523
···
562
559
val &= ~dma->enable_bit;
563
560
msm_write(port, val, UARTDM_DMEN);
564
561
565
-
if (msm_read(port, UART_SR) & UART_SR_OVERRUN) {
562
+
if (msm_read(port, MSM_UART_SR) & MSM_UART_SR_OVERRUN) {
566
563
port->icount.overrun++;
567
564
tty_insert_flip_char(tport, 0, TTY_OVERRUN);
568
-
msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR);
565
+
msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);
569
566
}
570
567
571
568
count = msm_read(port, UARTDM_RX_TOTAL_SNAP);
···
587
584
continue;
588
585
}
589
586
590
-
if (!(port->read_status_mask & UART_SR_RX_BREAK))
587
+
if (!(port->read_status_mask & MSM_UART_SR_RX_BREAK))
591
588
flag = TTY_NORMAL;
592
589
593
590
spin_unlock_irqrestore(&port->lock, flags);
···
641
638
* Using DMA for FIFO off-load, no need for "Rx FIFO over
642
639
* watermark" or "stale" interrupts, disable them
643
640
*/
644
-
msm_port->imr &= ~(UART_IMR_RXLEV | UART_IMR_RXSTALE);
641
+
msm_port->imr &= ~(MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE);
645
642
646
643
/*
647
644
* Well, when DMA is ADM3 engine(implied by <= UARTDM v1.3),
648
645
* we need RXSTALE to flush input DMA fifo to memory
649
646
*/
650
647
if (msm_port->is_uartdm < UARTDM_1P4)
651
-
msm_port->imr |= UART_IMR_RXSTALE;
648
+
msm_port->imr |= MSM_UART_IMR_RXSTALE;
652
649
653
-
msm_write(uart, msm_port->imr, UART_IMR);
650
+
msm_write(uart, msm_port->imr, MSM_UART_IMR);
654
651
655
652
dma->count = UARTDM_RX_SIZE;
656
653
657
654
dma_async_issue_pending(dma->chan);
658
655
659
-
msm_write(uart, UART_CR_CMD_RESET_STALE_INT, UART_CR);
660
-
msm_write(uart, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR);
656
+
msm_write(uart, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
657
+
msm_write(uart, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
661
658
662
659
val = msm_read(uart, UARTDM_DMEN);
663
660
val |= dma->enable_bit;
···
679
676
* Switch from DMA to SW/FIFO mode. After clearing Rx BAM (UARTDM_DMEN),
680
677
* receiver must be reset.
681
678
*/
682
-
msm_write(uart, UART_CR_CMD_RESET_RX, UART_CR);
683
-
msm_write(uart, UART_CR_RX_ENABLE, UART_CR);
679
+
msm_write(uart, MSM_UART_CR_CMD_RESET_RX, MSM_UART_CR);
680
+
msm_write(uart, MSM_UART_CR_RX_ENABLE, MSM_UART_CR);
684
681
685
-
msm_write(uart, UART_CR_CMD_RESET_STALE_INT, UART_CR);
682
+
msm_write(uart, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
686
683
msm_write(uart, 0xFFFFFF, UARTDM_DMRX);
687
-
msm_write(uart, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR);
684
+
msm_write(uart, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
688
685
689
686
/* Re-enable RX interrupts */
690
-
msm_port->imr |= (UART_IMR_RXLEV | UART_IMR_RXSTALE);
691
-
msm_write(uart, msm_port->imr, UART_IMR);
687
+
msm_port->imr |= MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE;
688
+
msm_write(uart, msm_port->imr, MSM_UART_IMR);
692
689
}
693
690
694
691
static void msm_stop_rx(struct uart_port *port)
695
692
{
696
-
struct msm_port *msm_port = UART_TO_MSM(port);
693
+
struct msm_port *msm_port = to_msm_port(port);
697
694
struct msm_dma *dma = &msm_port->rx_dma;
698
695
699
-
msm_port->imr &= ~(UART_IMR_RXLEV | UART_IMR_RXSTALE);
700
-
msm_write(port, msm_port->imr, UART_IMR);
696
+
msm_port->imr &= ~(MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE);
697
+
msm_write(port, msm_port->imr, MSM_UART_IMR);
701
698
702
699
if (dma->chan)
703
700
msm_stop_dma(port, dma);
···
705
702
706
703
static void msm_enable_ms(struct uart_port *port)
707
704
{
708
-
struct msm_port *msm_port = UART_TO_MSM(port);
705
+
struct msm_port *msm_port = to_msm_port(port);
709
706
710
-
msm_port->imr |= UART_IMR_DELTA_CTS;
711
-
msm_write(port, msm_port->imr, UART_IMR);
707
+
msm_port->imr |= MSM_UART_IMR_DELTA_CTS;
708
+
msm_write(port, msm_port->imr, MSM_UART_IMR);
712
709
}
713
710
714
711
static void msm_handle_rx_dm(struct uart_port *port, unsigned int misr)
···
717
714
struct tty_port *tport = &port->state->port;
718
715
unsigned int sr;
719
716
int count = 0;
720
-
struct msm_port *msm_port = UART_TO_MSM(port);
717
+
struct msm_port *msm_port = to_msm_port(port);
721
718
722
-
if ((msm_read(port, UART_SR) & UART_SR_OVERRUN)) {
719
+
if ((msm_read(port, MSM_UART_SR) & MSM_UART_SR_OVERRUN)) {
723
720
port->icount.overrun++;
724
721
tty_insert_flip_char(tport, 0, TTY_OVERRUN);
725
-
msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR);
722
+
msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);
726
723
}
727
724
728
-
if (misr & UART_IMR_RXSTALE) {
725
+
if (misr & MSM_UART_IMR_RXSTALE) {
729
726
count = msm_read(port, UARTDM_RX_TOTAL_SNAP) -
730
727
msm_port->old_snap_state;
731
728
msm_port->old_snap_state = 0;
732
729
} else {
733
-
count = 4 * (msm_read(port, UART_RFWR));
730
+
count = 4 * (msm_read(port, MSM_UART_RFWR));
734
731
msm_port->old_snap_state += count;
735
732
}
736
733
···
742
739
unsigned char buf[4];
743
740
int sysrq, r_count, i;
744
741
745
-
sr = msm_read(port, UART_SR);
746
-
if ((sr & UART_SR_RX_READY) == 0) {
742
+
sr = msm_read(port, MSM_UART_SR);
743
+
if ((sr & MSM_UART_SR_RX_READY) == 0) {
747
744
msm_port->old_snap_state -= count;
748
745
break;
749
746
}
···
762
759
continue;
763
760
}
764
761
765
-
if (!(port->read_status_mask & UART_SR_RX_BREAK))
762
+
if (!(port->read_status_mask & MSM_UART_SR_RX_BREAK))
766
763
flag = TTY_NORMAL;
767
764
768
765
spin_unlock(&port->lock);
···
776
773
777
774
tty_flip_buffer_push(tport);
778
775
779
-
if (misr & (UART_IMR_RXSTALE))
780
-
msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR);
776
+
if (misr & (MSM_UART_IMR_RXSTALE))
777
+
msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
781
778
msm_write(port, 0xFFFFFF, UARTDM_DMRX);
782
-
msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR);
779
+
msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
783
780
784
781
/* Try to use DMA */
785
782
msm_start_rx_dma(msm_port);
···
795
792
* Handle overrun. My understanding of the hardware is that overrun
796
793
* is not tied to the RX buffer, so we handle the case out of band.
797
794
*/
798
-
if ((msm_read(port, UART_SR) & UART_SR_OVERRUN)) {
795
+
if ((msm_read(port, MSM_UART_SR) & MSM_UART_SR_OVERRUN)) {
799
796
port->icount.overrun++;
800
797
tty_insert_flip_char(tport, 0, TTY_OVERRUN);
801
-
msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR);
798
+
msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);
802
799
}
803
800
804
801
/* and now the main RX loop */
805
-
while ((sr = msm_read(port, UART_SR)) & UART_SR_RX_READY) {
802
+
while ((sr = msm_read(port, MSM_UART_SR)) & MSM_UART_SR_RX_READY) {
806
803
unsigned int c;
807
804
char flag = TTY_NORMAL;
808
805
int sysrq;
809
806
810
-
c = msm_read(port, UART_RF);
807
+
c = msm_read(port, MSM_UART_RF);
811
808
812
-
if (sr & UART_SR_RX_BREAK) {
809
+
if (sr & MSM_UART_SR_RX_BREAK) {
813
810
port->icount.brk++;
814
811
if (uart_handle_break(port))
815
812
continue;
816
-
} else if (sr & UART_SR_PAR_FRAME_ERR) {
813
+
} else if (sr & MSM_UART_SR_PAR_FRAME_ERR) {
817
814
port->icount.frame++;
818
815
} else {
819
816
port->icount.rx++;
···
822
819
/* Mask conditions we're ignorning. */
823
820
sr &= port->read_status_mask;
824
821
825
-
if (sr & UART_SR_RX_BREAK)
822
+
if (sr & MSM_UART_SR_RX_BREAK)
826
823
flag = TTY_BREAK;
827
-
else if (sr & UART_SR_PAR_FRAME_ERR)
824
+
else if (sr & MSM_UART_SR_PAR_FRAME_ERR)
828
825
flag = TTY_FRAME;
829
826
830
827
spin_unlock(&port->lock);
···
840
837
static void msm_handle_tx_pio(struct uart_port *port, unsigned int tx_count)
841
838
{
842
839
struct circ_buf *xmit = &port->state->xmit;
843
-
struct msm_port *msm_port = UART_TO_MSM(port);
840
+
struct msm_port *msm_port = to_msm_port(port);
844
841
unsigned int num_chars;
845
842
unsigned int tf_pointer = 0;
846
843
void __iomem *tf;
···
848
845
if (msm_port->is_uartdm)
849
846
tf = port->membase + UARTDM_TF;
850
847
else
851
-
tf = port->membase + UART_TF;
848
+
tf = port->membase + MSM_UART_TF;
852
849
853
850
if (tx_count && msm_port->is_uartdm)
854
851
msm_reset_dm_count(port, tx_count);
···
857
854
int i;
858
855
char buf[4] = { 0 };
859
856
860
-
if (!(msm_read(port, UART_SR) & UART_SR_TX_READY))
857
+
if (!(msm_read(port, MSM_UART_SR) & MSM_UART_SR_TX_READY))
861
858
break;
862
859
863
860
if (msm_port->is_uartdm)
···
886
883
887
884
static void msm_handle_tx(struct uart_port *port)
888
885
{
889
-
struct msm_port *msm_port = UART_TO_MSM(port);
886
+
struct msm_port *msm_port = to_msm_port(port);
890
887
struct circ_buf *xmit = &msm_port->uart.state->xmit;
891
888
struct msm_dma *dma = &msm_port->tx_dma;
892
889
unsigned int pio_count, dma_count, dma_min;
···
898
895
if (msm_port->is_uartdm)
899
896
tf = port->membase + UARTDM_TF;
900
897
else
901
-
tf = port->membase + UART_TF;
898
+
tf = port->membase + MSM_UART_TF;
902
899
903
900
buf[0] = port->x_char;
904
901
···
942
939
943
940
static void msm_handle_delta_cts(struct uart_port *port)
944
941
{
945
-
msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR);
942
+
msm_write(port, MSM_UART_CR_CMD_RESET_CTS, MSM_UART_CR);
946
943
port->icount.cts++;
947
944
wake_up_interruptible(&port->state->port.delta_msr_wait);
948
945
}
···
950
947
static irqreturn_t msm_uart_irq(int irq, void *dev_id)
951
948
{
952
949
struct uart_port *port = dev_id;
953
-
struct msm_port *msm_port = UART_TO_MSM(port);
950
+
struct msm_port *msm_port = to_msm_port(port);
954
951
struct msm_dma *dma = &msm_port->rx_dma;
955
952
unsigned long flags;
956
953
unsigned int misr;
957
954
u32 val;
958
955
959
956
spin_lock_irqsave(&port->lock, flags);
960
-
misr = msm_read(port, UART_MISR);
961
-
msm_write(port, 0, UART_IMR); /* disable interrupt */
957
+
misr = msm_read(port, MSM_UART_MISR);
958
+
msm_write(port, 0, MSM_UART_IMR); /* disable interrupt */
962
959
963
-
if (misr & UART_IMR_RXBREAK_START) {
960
+
if (misr & MSM_UART_IMR_RXBREAK_START) {
964
961
msm_port->break_detected = true;
965
-
msm_write(port, UART_CR_CMD_RESET_RXBREAK_START, UART_CR);
962
+
msm_write(port, MSM_UART_CR_CMD_RESET_RXBREAK_START, MSM_UART_CR);
966
963
}
967
964
968
-
if (misr & (UART_IMR_RXLEV | UART_IMR_RXSTALE)) {
965
+
if (misr & (MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE)) {
969
966
if (dma->count) {
970
-
val = UART_CR_CMD_STALE_EVENT_DISABLE;
971
-
msm_write(port, val, UART_CR);
972
-
val = UART_CR_CMD_RESET_STALE_INT;
973
-
msm_write(port, val, UART_CR);
967
+
val = MSM_UART_CR_CMD_STALE_EVENT_DISABLE;
968
+
msm_write(port, val, MSM_UART_CR);
969
+
val = MSM_UART_CR_CMD_RESET_STALE_INT;
970
+
msm_write(port, val, MSM_UART_CR);
974
971
/*
975
972
* Flush DMA input fifo to memory, this will also
976
973
* trigger DMA RX completion
···
982
979
msm_handle_rx(port);
983
980
}
984
981
}
985
-
if (misr & UART_IMR_TXLEV)
982
+
if (misr & MSM_UART_IMR_TXLEV)
986
983
msm_handle_tx(port);
987
-
if (misr & UART_IMR_DELTA_CTS)
984
+
if (misr & MSM_UART_IMR_DELTA_CTS)
988
985
msm_handle_delta_cts(port);
989
986
990
-
msm_write(port, msm_port->imr, UART_IMR); /* restore interrupt */
987
+
msm_write(port, msm_port->imr, MSM_UART_IMR); /* restore interrupt */
991
988
spin_unlock_irqrestore(&port->lock, flags);
992
989
993
990
return IRQ_HANDLED;
···
995
992
996
993
static unsigned int msm_tx_empty(struct uart_port *port)
997
994
{
998
-
return (msm_read(port, UART_SR) & UART_SR_TX_EMPTY) ? TIOCSER_TEMT : 0;
995
+
return (msm_read(port, MSM_UART_SR) & MSM_UART_SR_TX_EMPTY) ? TIOCSER_TEMT : 0;
999
996
}
1000
997
1001
998
static unsigned int msm_get_mctrl(struct uart_port *port)
···
1005
1002
1006
1003
static void msm_reset(struct uart_port *port)
1007
1004
{
1008
-
struct msm_port *msm_port = UART_TO_MSM(port);
1005
+
struct msm_port *msm_port = to_msm_port(port);
1009
1006
unsigned int mr;
1010
1007
1011
1008
/* reset everything */
1012
-
msm_write(port, UART_CR_CMD_RESET_RX, UART_CR);
1013
-
msm_write(port, UART_CR_CMD_RESET_TX, UART_CR);
1014
-
msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR);
1015
-
msm_write(port, UART_CR_CMD_RESET_BREAK_INT, UART_CR);
1016
-
msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR);
1017
-
msm_write(port, UART_CR_CMD_RESET_RFR, UART_CR);
1018
-
mr = msm_read(port, UART_MR1);
1019
-
mr &= ~UART_MR1_RX_RDY_CTL;
1020
-
msm_write(port, mr, UART_MR1);
1009
+
msm_write(port, MSM_UART_CR_CMD_RESET_RX, MSM_UART_CR);
1010
+
msm_write(port, MSM_UART_CR_CMD_RESET_TX, MSM_UART_CR);
1011
+
msm_write(port, MSM_UART_CR_CMD_RESET_ERR, MSM_UART_CR);
1012
+
msm_write(port, MSM_UART_CR_CMD_RESET_BREAK_INT, MSM_UART_CR);
1013
+
msm_write(port, MSM_UART_CR_CMD_RESET_CTS, MSM_UART_CR);
1014
+
msm_write(port, MSM_UART_CR_CMD_RESET_RFR, MSM_UART_CR);
1015
+
mr = msm_read(port, MSM_UART_MR1);
1016
+
mr &= ~MSM_UART_MR1_RX_RDY_CTL;
1017
+
msm_write(port, mr, MSM_UART_MR1);
1021
1018
1022
1019
/* Disable DM modes */
1023
1020
if (msm_port->is_uartdm)
···
1028
1025
{
1029
1026
unsigned int mr;
1030
1027
1031
-
mr = msm_read(port, UART_MR1);
1028
+
mr = msm_read(port, MSM_UART_MR1);
1032
1029
1033
1030
if (!(mctrl & TIOCM_RTS)) {
1034
-
mr &= ~UART_MR1_RX_RDY_CTL;
1035
-
msm_write(port, mr, UART_MR1);
1036
-
msm_write(port, UART_CR_CMD_RESET_RFR, UART_CR);
1031
+
mr &= ~MSM_UART_MR1_RX_RDY_CTL;
1032
+
msm_write(port, mr, MSM_UART_MR1);
1033
+
msm_write(port, MSM_UART_CR_CMD_RESET_RFR, MSM_UART_CR);
1037
1034
} else {
1038
-
mr |= UART_MR1_RX_RDY_CTL;
1039
-
msm_write(port, mr, UART_MR1);
1035
+
mr |= MSM_UART_MR1_RX_RDY_CTL;
1036
+
msm_write(port, mr, MSM_UART_MR1);
1040
1037
}
1041
1038
}
1042
1039
1043
1040
static void msm_break_ctl(struct uart_port *port, int break_ctl)
1044
1041
{
1045
1042
if (break_ctl)
1046
-
msm_write(port, UART_CR_CMD_START_BREAK, UART_CR);
1043
+
msm_write(port, MSM_UART_CR_CMD_START_BREAK, MSM_UART_CR);
1047
1044
else
1048
-
msm_write(port, UART_CR_CMD_STOP_BREAK, UART_CR);
1045
+
msm_write(port, MSM_UART_CR_CMD_STOP_BREAK, MSM_UART_CR);
1049
1046
}
1050
1047
1051
1048
struct msm_baud_map {
···
1058
1055
msm_find_best_baud(struct uart_port *port, unsigned int baud,
1059
1056
unsigned long *rate)
1060
1057
{
1061
-
struct msm_port *msm_port = UART_TO_MSM(port);
1058
+
struct msm_port *msm_port = to_msm_port(port);
1062
1059
unsigned int divisor, result;
1063
1060
unsigned long target, old, best_rate = 0, diff, best_diff = ULONG_MAX;
1064
1061
const struct msm_baud_map *entry, *end, *best;
···
1127
1124
unsigned long *saved_flags)
1128
1125
{
1129
1126
unsigned int rxstale, watermark, mask;
1130
-
struct msm_port *msm_port = UART_TO_MSM(port);
1127
+
struct msm_port *msm_port = to_msm_port(port);
1131
1128
const struct msm_baud_map *entry;
1132
1129
unsigned long flags, rate;
1133
1130
···
1142
1139
*saved_flags = flags;
1143
1140
port->uartclk = rate;
1144
1141
1145
-
msm_write(port, entry->code, UART_CSR);
1142
+
msm_write(port, entry->code, MSM_UART_CSR);
1146
1143
1147
1144
/* RX stale watermark */
1148
1145
rxstale = entry->rxstale;
1149
-
watermark = UART_IPR_STALE_LSB & rxstale;
1146
+
watermark = MSM_UART_IPR_STALE_LSB & rxstale;
1150
1147
if (msm_port->is_uartdm) {
1151
-
mask = UART_DM_IPR_STALE_TIMEOUT_MSB;
1148
+
mask = MSM_UART_DM_IPR_STALE_TIMEOUT_MSB;
1152
1149
} else {
1153
-
watermark |= UART_IPR_RXSTALE_LAST;
1154
-
mask = UART_IPR_STALE_TIMEOUT_MSB;
1150
+
watermark |= MSM_UART_IPR_RXSTALE_LAST;
1151
+
mask = MSM_UART_IPR_STALE_TIMEOUT_MSB;
1155
1152
}
1156
1153
1157
1154
watermark |= mask & (rxstale << 2);
1158
1155
1159
-
msm_write(port, watermark, UART_IPR);
1156
+
msm_write(port, watermark, MSM_UART_IPR);
1160
1157
1161
1158
/* set RX watermark */
1162
1159
watermark = (port->fifosize * 3) / 4;
1163
-
msm_write(port, watermark, UART_RFWR);
1160
+
msm_write(port, watermark, MSM_UART_RFWR);
1164
1161
1165
1162
/* set TX watermark */
1166
-
msm_write(port, 10, UART_TFWR);
1163
+
msm_write(port, 10, MSM_UART_TFWR);
1167
1164
1168
-
msm_write(port, UART_CR_CMD_PROTECTION_EN, UART_CR);
1165
+
msm_write(port, MSM_UART_CR_CMD_PROTECTION_EN, MSM_UART_CR);
1169
1166
msm_reset(port);
1170
1167
1171
1168
/* Enable RX and TX */
1172
-
msm_write(port, UART_CR_TX_ENABLE | UART_CR_RX_ENABLE, UART_CR);
1169
+
msm_write(port, MSM_UART_CR_TX_ENABLE | MSM_UART_CR_RX_ENABLE, MSM_UART_CR);
1173
1170
1174
1171
/* turn on RX and CTS interrupts */
1175
-
msm_port->imr = UART_IMR_RXLEV | UART_IMR_RXSTALE |
1176
-
UART_IMR_CURRENT_CTS | UART_IMR_RXBREAK_START;
1172
+
msm_port->imr = MSM_UART_IMR_RXLEV | MSM_UART_IMR_RXSTALE |
1173
+
MSM_UART_IMR_CURRENT_CTS | MSM_UART_IMR_RXBREAK_START;
1177
1174
1178
-
msm_write(port, msm_port->imr, UART_IMR);
1175
+
msm_write(port, msm_port->imr, MSM_UART_IMR);
1179
1176
1180
1177
if (msm_port->is_uartdm) {
1181
-
msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR);
1178
+
msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
1182
1179
msm_write(port, 0xFFFFFF, UARTDM_DMRX);
1183
-
msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR);
1180
+
msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
1184
1181
}
1185
1182
1186
1183
return baud;
···
1188
1185
1189
1186
static void msm_init_clock(struct uart_port *port)
1190
1187
{
1191
-
struct msm_port *msm_port = UART_TO_MSM(port);
1188
+
struct msm_port *msm_port = to_msm_port(port);
1192
1189
1193
1190
clk_prepare_enable(msm_port->clk);
1194
1191
clk_prepare_enable(msm_port->pclk);
···
1197
1194
1198
1195
static int msm_startup(struct uart_port *port)
1199
1196
{
1200
-
struct msm_port *msm_port = UART_TO_MSM(port);
1197
+
struct msm_port *msm_port = to_msm_port(port);
1201
1198
unsigned int data, rfr_level, mask;
1202
1199
int ret;
1203
1200
···
1212
1209
rfr_level = port->fifosize;
1213
1210
1214
1211
/* set automatic RFR level */
1215
-
data = msm_read(port, UART_MR1);
1212
+
data = msm_read(port, MSM_UART_MR1);
1216
1213
1217
1214
if (msm_port->is_uartdm)
1218
-
mask = UART_DM_MR1_AUTO_RFR_LEVEL1;
1215
+
mask = MSM_UART_DM_MR1_AUTO_RFR_LEVEL1;
1219
1216
else
1220
-
mask = UART_MR1_AUTO_RFR_LEVEL1;
1217
+
mask = MSM_UART_MR1_AUTO_RFR_LEVEL1;
1221
1218
1222
1219
data &= ~mask;
1223
-
data &= ~UART_MR1_AUTO_RFR_LEVEL0;
1220
+
data &= ~MSM_UART_MR1_AUTO_RFR_LEVEL0;
1224
1221
data |= mask & (rfr_level << 2);
1225
-
data |= UART_MR1_AUTO_RFR_LEVEL0 & rfr_level;
1226
-
msm_write(port, data, UART_MR1);
1222
+
data |= MSM_UART_MR1_AUTO_RFR_LEVEL0 & rfr_level;
1223
+
msm_write(port, data, MSM_UART_MR1);
1227
1224
1228
1225
if (msm_port->is_uartdm) {
1229
1226
msm_request_tx_dma(msm_port, msm_port->uart.mapbase);
···
1249
1246
1250
1247
static void msm_shutdown(struct uart_port *port)
1251
1248
{
1252
-
struct msm_port *msm_port = UART_TO_MSM(port);
1249
+
struct msm_port *msm_port = to_msm_port(port);
1253
1250
1254
1251
msm_port->imr = 0;
1255
-
msm_write(port, 0, UART_IMR); /* disable interrupts */
1252
+
msm_write(port, 0, MSM_UART_IMR); /* disable interrupts */
1256
1253
1257
1254
if (msm_port->is_uartdm)
1258
1255
msm_release_dma(msm_port);
···
1265
1262
static void msm_set_termios(struct uart_port *port, struct ktermios *termios,
1266
1263
struct ktermios *old)
1267
1264
{
1268
-
struct msm_port *msm_port = UART_TO_MSM(port);
1265
+
struct msm_port *msm_port = to_msm_port(port);
1269
1266
struct msm_dma *dma = &msm_port->rx_dma;
1270
1267
unsigned long flags;
1271
1268
unsigned int baud, mr;
···
1282
1279
tty_termios_encode_baud_rate(termios, baud, baud);
1283
1280
1284
1281
/* calculate parity */
1285
-
mr = msm_read(port, UART_MR2);
1286
-
mr &= ~UART_MR2_PARITY_MODE;
1282
+
mr = msm_read(port, MSM_UART_MR2);
1283
+
mr &= ~MSM_UART_MR2_PARITY_MODE;
1287
1284
if (termios->c_cflag & PARENB) {
1288
1285
if (termios->c_cflag & PARODD)
1289
-
mr |= UART_MR2_PARITY_MODE_ODD;
1286
+
mr |= MSM_UART_MR2_PARITY_MODE_ODD;
1290
1287
else if (termios->c_cflag & CMSPAR)
1291
-
mr |= UART_MR2_PARITY_MODE_SPACE;
1288
+
mr |= MSM_UART_MR2_PARITY_MODE_SPACE;
1292
1289
else
1293
-
mr |= UART_MR2_PARITY_MODE_EVEN;
1290
+
mr |= MSM_UART_MR2_PARITY_MODE_EVEN;
1294
1291
}
1295
1292
1296
1293
/* calculate bits per char */
1297
-
mr &= ~UART_MR2_BITS_PER_CHAR;
1294
+
mr &= ~MSM_UART_MR2_BITS_PER_CHAR;
1298
1295
switch (termios->c_cflag & CSIZE) {
1299
1296
case CS5:
1300
-
mr |= UART_MR2_BITS_PER_CHAR_5;
1297
+
mr |= MSM_UART_MR2_BITS_PER_CHAR_5;
1301
1298
break;
1302
1299
case CS6:
1303
-
mr |= UART_MR2_BITS_PER_CHAR_6;
1300
+
mr |= MSM_UART_MR2_BITS_PER_CHAR_6;
1304
1301
break;
1305
1302
case CS7:
1306
-
mr |= UART_MR2_BITS_PER_CHAR_7;
1303
+
mr |= MSM_UART_MR2_BITS_PER_CHAR_7;
1307
1304
break;
1308
1305
case CS8:
1309
1306
default:
1310
-
mr |= UART_MR2_BITS_PER_CHAR_8;
1307
+
mr |= MSM_UART_MR2_BITS_PER_CHAR_8;
1311
1308
break;
1312
1309
}
1313
1310
1314
1311
/* calculate stop bits */
1315
-
mr &= ~(UART_MR2_STOP_BIT_LEN_ONE | UART_MR2_STOP_BIT_LEN_TWO);
1312
+
mr &= ~(MSM_UART_MR2_STOP_BIT_LEN_ONE | MSM_UART_MR2_STOP_BIT_LEN_TWO);
1316
1313
if (termios->c_cflag & CSTOPB)
1317
-
mr |= UART_MR2_STOP_BIT_LEN_TWO;
1314
+
mr |= MSM_UART_MR2_STOP_BIT_LEN_TWO;
1318
1315
else
1319
-
mr |= UART_MR2_STOP_BIT_LEN_ONE;
1316
+
mr |= MSM_UART_MR2_STOP_BIT_LEN_ONE;
1320
1317
1321
1318
/* set parity, bits per char, and stop bit */
1322
-
msm_write(port, mr, UART_MR2);
1319
+
msm_write(port, mr, MSM_UART_MR2);
1323
1320
1324
1321
/* calculate and set hardware flow control */
1325
-
mr = msm_read(port, UART_MR1);
1326
-
mr &= ~(UART_MR1_CTS_CTL | UART_MR1_RX_RDY_CTL);
1322
+
mr = msm_read(port, MSM_UART_MR1);
1323
+
mr &= ~(MSM_UART_MR1_CTS_CTL | MSM_UART_MR1_RX_RDY_CTL);
1327
1324
if (termios->c_cflag & CRTSCTS) {
1328
-
mr |= UART_MR1_CTS_CTL;
1329
-
mr |= UART_MR1_RX_RDY_CTL;
1325
+
mr |= MSM_UART_MR1_CTS_CTL;
1326
+
mr |= MSM_UART_MR1_RX_RDY_CTL;
1330
1327
}
1331
-
msm_write(port, mr, UART_MR1);
1328
+
msm_write(port, mr, MSM_UART_MR1);
1332
1329
1333
1330
/* Configure status bits to ignore based on termio flags. */
1334
1331
port->read_status_mask = 0;
1335
1332
if (termios->c_iflag & INPCK)
1336
-
port->read_status_mask |= UART_SR_PAR_FRAME_ERR;
1333
+
port->read_status_mask |= MSM_UART_SR_PAR_FRAME_ERR;
1337
1334
if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
1338
-
port->read_status_mask |= UART_SR_RX_BREAK;
1335
+
port->read_status_mask |= MSM_UART_SR_RX_BREAK;
1339
1336
1340
1337
uart_update_timeout(port, termios->c_cflag, baud);
1341
1338
···
1419
1416
static void msm_power(struct uart_port *port, unsigned int state,
1420
1417
unsigned int oldstate)
1421
1418
{
1422
-
struct msm_port *msm_port = UART_TO_MSM(port);
1419
+
struct msm_port *msm_port = to_msm_port(port);
1423
1420
1424
1421
switch (state) {
1425
1422
case 0:
···
1438
1435
#ifdef CONFIG_CONSOLE_POLL
1439
1436
static int msm_poll_get_char_single(struct uart_port *port)
1440
1437
{
1441
-
struct msm_port *msm_port = UART_TO_MSM(port);
1442
-
unsigned int rf_reg = msm_port->is_uartdm ? UARTDM_RF : UART_RF;
1438
+
struct msm_port *msm_port = to_msm_port(port);
1439
+
unsigned int rf_reg = msm_port->is_uartdm ? UARTDM_RF : MSM_UART_RF;
1443
1440
1444
-
if (!(msm_read(port, UART_SR) & UART_SR_RX_READY))
1441
+
if (!(msm_read(port, MSM_UART_SR) & MSM_UART_SR_RX_READY))
1445
1442
return NO_POLL_CHAR;
1446
1443
1447
1444
return msm_read(port, rf_reg) & 0xff;
···
1459
1456
c = sp[sizeof(slop) - count];
1460
1457
count--;
1461
1458
/* Or if FIFO is empty */
1462
-
} else if (!(msm_read(port, UART_SR) & UART_SR_RX_READY)) {
1459
+
} else if (!(msm_read(port, MSM_UART_SR) & MSM_UART_SR_RX_READY)) {
1463
1460
/*
1464
1461
* If RX packing buffer has less than a word, force stale to
1465
1462
* push contents into RX FIFO
···
1467
1464
count = msm_read(port, UARTDM_RXFS);
1468
1465
count = (count >> UARTDM_RXFS_BUF_SHIFT) & UARTDM_RXFS_BUF_MASK;
1469
1466
if (count) {
1470
-
msm_write(port, UART_CR_CMD_FORCE_STALE, UART_CR);
1467
+
msm_write(port, MSM_UART_CR_CMD_FORCE_STALE, MSM_UART_CR);
1471
1468
slop = msm_read(port, UARTDM_RF);
1472
1469
c = sp[0];
1473
1470
count--;
1474
-
msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR);
1471
+
msm_write(port, MSM_UART_CR_CMD_RESET_STALE_INT, MSM_UART_CR);
1475
1472
msm_write(port, 0xFFFFFF, UARTDM_DMRX);
1476
-
msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE,
1477
-
UART_CR);
1473
+
msm_write(port, MSM_UART_CR_CMD_STALE_EVENT_ENABLE, MSM_UART_CR);
1478
1474
} else {
1479
1475
c = NO_POLL_CHAR;
1480
1476
}
···
1491
1489
{
1492
1490
u32 imr;
1493
1491
int c;
1494
-
struct msm_port *msm_port = UART_TO_MSM(port);
1492
+
struct msm_port *msm_port = to_msm_port(port);
1495
1493
1496
1494
/* Disable all interrupts */
1497
-
imr = msm_read(port, UART_IMR);
1498
-
msm_write(port, 0, UART_IMR);
1495
+
imr = msm_read(port, MSM_UART_IMR);
1496
+
msm_write(port, 0, MSM_UART_IMR);
1499
1497
1500
1498
if (msm_port->is_uartdm)
1501
1499
c = msm_poll_get_char_dm(port);
···
1503
1501
c = msm_poll_get_char_single(port);
1504
1502
1505
1503
/* Enable interrupts */
1506
-
msm_write(port, imr, UART_IMR);
1504
+
msm_write(port, imr, MSM_UART_IMR);
1507
1505
1508
1506
return c;
1509
1507
}
···
1511
1509
static void msm_poll_put_char(struct uart_port *port, unsigned char c)
1512
1510
{
1513
1511
u32 imr;
1514
-
struct msm_port *msm_port = UART_TO_MSM(port);
1512
+
struct msm_port *msm_port = to_msm_port(port);
1515
1513
1516
1514
/* Disable all interrupts */
1517
-
imr = msm_read(port, UART_IMR);
1518
-
msm_write(port, 0, UART_IMR);
1515
+
imr = msm_read(port, MSM_UART_IMR);
1516
+
msm_write(port, 0, MSM_UART_IMR);
1519
1517
1520
1518
if (msm_port->is_uartdm)
1521
1519
msm_reset_dm_count(port, 1);
1522
1520
1523
1521
/* Wait until FIFO is empty */
1524
-
while (!(msm_read(port, UART_SR) & UART_SR_TX_READY))
1522
+
while (!(msm_read(port, MSM_UART_SR) & MSM_UART_SR_TX_READY))
1525
1523
cpu_relax();
1526
1524
1527
1525
/* Write a character */
1528
-
msm_write(port, c, msm_port->is_uartdm ? UARTDM_TF : UART_TF);
1526
+
msm_write(port, c, msm_port->is_uartdm ? UARTDM_TF : MSM_UART_TF);
1529
1527
1530
1528
/* Wait until FIFO is empty */
1531
-
while (!(msm_read(port, UART_SR) & UART_SR_TX_READY))
1529
+
while (!(msm_read(port, MSM_UART_SR) & MSM_UART_SR_TX_READY))
1532
1530
cpu_relax();
1533
1531
1534
1532
/* Enable interrupts */
1535
-
msm_write(port, imr, UART_IMR);
1533
+
msm_write(port, imr, MSM_UART_IMR);
1536
1534
}
1537
1535
#endif
1538
1536
···
1590
1588
},
1591
1589
};
1592
1590
1593
-
#define UART_NR ARRAY_SIZE(msm_uart_ports)
1591
+
#define MSM_UART_NR ARRAY_SIZE(msm_uart_ports)
1594
1592
1595
1593
static inline struct uart_port *msm_get_port_from_line(unsigned int line)
1596
1594
{
···
1611
1609
if (is_uartdm)
1612
1610
tf = port->membase + UARTDM_TF;
1613
1611
else
1614
-
tf = port->membase + UART_TF;
1612
+
tf = port->membase + MSM_UART_TF;
1615
1613
1616
1614
/* Account for newlines that will get a carriage return added */
1617
1615
for (i = 0; i < count; i++)
···
1657
1655
}
1658
1656
}
1659
1657
1660
-
while (!(msm_read(port, UART_SR) & UART_SR_TX_READY))
1658
+
while (!(msm_read(port, MSM_UART_SR) & MSM_UART_SR_TX_READY))
1661
1659
cpu_relax();
1662
1660
1663
1661
iowrite32_rep(tf, buf, 1);
···
1676
1674
struct uart_port *port;
1677
1675
struct msm_port *msm_port;
1678
1676
1679
-
BUG_ON(co->index < 0 || co->index >= UART_NR);
1677
+
BUG_ON(co->index < 0 || co->index >= MSM_UART_NR);
1680
1678
1681
1679
port = msm_get_port_from_line(co->index);
1682
-
msm_port = UART_TO_MSM(port);
1680
+
msm_port = to_msm_port(port);
1683
1681
1684
1682
__msm_console_write(port, s, count, msm_port->is_uartdm);
1685
1683
}
···
1692
1690
int parity = 'n';
1693
1691
int flow = 'n';
1694
1692
1695
-
if (unlikely(co->index >= UART_NR || co->index < 0))
1693
+
if (unlikely(co->index >= MSM_UART_NR || co->index < 0))
1696
1694
return -ENXIO;
1697
1695
1698
1696
port = msm_get_port_from_line(co->index);
···
1773
1771
.owner = THIS_MODULE,
1774
1772
.driver_name = "msm_serial",
1775
1773
.dev_name = "ttyMSM",
1776
-
.nr = UART_NR,
1774
+
.nr = MSM_UART_NR,
1777
1775
.cons = MSM_CONSOLE,
1778
1776
};
1779
1777
···
1803
1801
if (line < 0)
1804
1802
line = atomic_inc_return(&msm_uart_next_id) - 1;
1805
1803
1806
-
if (unlikely(line < 0 || line >= UART_NR))
1804
+
if (unlikely(line < 0 || line >= MSM_UART_NR))
1807
1805
return -ENXIO;
1808
1806
1809
1807
dev_info(&pdev->dev, "msm_serial: detected port #%d\n", line);
1810
1808
1811
1809
port = msm_get_port_from_line(line);
1812
1810
port->dev = &pdev->dev;
1813
-
msm_port = UART_TO_MSM(port);
1811
+
msm_port = to_msm_port(port);
1814
1812
1815
1813
id = of_match_device(msm_uartdm_table, &pdev->dev);
1816
1814
if (id)
-6
drivers/tty/serial/mux.c
-6
drivers/tty/serial/mux.c
···
481
481
port->line = port_cnt;
482
482
port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_MUX_CONSOLE);
483
483
484
-
/* The port->timeout needs to match what is present in
485
-
* uart_wait_until_sent in serial_core.c. Otherwise
486
-
* the time spent in msleep_interruptable will be very
487
-
* long, causing the appearance of a console hang.
488
-
*/
489
-
port->timeout = HZ / 50;
490
484
spin_lock_init(&port->lock);
491
485
492
486
status = uart_add_one_port(&mux_driver, port);
+11
drivers/tty/serial/mvebu-uart.c
+11
drivers/tty/serial/mvebu-uart.c
···
265
265
struct tty_port *tport = &port->state->port;
266
266
unsigned char ch = 0;
267
267
char flag = 0;
268
+
int ret;
268
269
269
270
do {
270
271
if (status & STAT_RX_RDY(port)) {
···
276
275
277
276
if (status & STAT_PAR_ERR)
278
277
port->icount.parity++;
278
+
}
279
+
280
+
/*
281
+
* For UART2, error bits are not cleared on buffer read.
282
+
* This causes interrupt loop and system hang.
283
+
*/
284
+
if (IS_EXTENDED(port) && (status & STAT_BRK_ERR)) {
285
+
ret = readl(port->membase + UART_STAT);
286
+
ret |= STAT_BRK_ERR;
287
+
writel(ret, port->membase + UART_STAT);
279
288
}
280
289
281
290
if (status & STAT_BRK_DET) {
+13
-5
drivers/tty/serial/omap-serial.c
+13
-5
drivers/tty/serial/omap-serial.c
···
19
19
#include <linux/module.h>
20
20
#include <linux/init.h>
21
21
#include <linux/console.h>
22
+
#include <linux/serial.h>
22
23
#include <linux/serial_reg.h>
23
24
#include <linux/delay.h>
24
25
#include <linux/slab.h>
···
1103
1102
return up->name;
1104
1103
}
1105
1104
1106
-
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1107
-
1108
1105
static void __maybe_unused wait_for_xmitr(struct uart_omap_port *up)
1109
1106
{
1110
1107
unsigned int status, tmout = 10000;
···
1117
1118
if (--tmout == 0)
1118
1119
break;
1119
1120
udelay(1);
1120
-
} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1121
+
} while (!uart_lsr_tx_empty(status));
1121
1122
1122
1123
/* Wait up to 1s for flow control if necessary */
1123
1124
if (up->port.flags & UPF_CONS_FLOW) {
···
1185
1186
1186
1187
for (;;) {
1187
1188
status = omap_serial_early_in(port, UART_LSR);
1188
-
if ((status & BOTH_EMPTY) == BOTH_EMPTY)
1189
+
if (uart_lsr_tx_empty(status))
1189
1190
break;
1190
1191
cpu_relax();
1191
1192
}
···
1324
1325
1325
1326
/* Enable or disable the rs485 support */
1326
1327
static int
1327
-
serial_omap_config_rs485(struct uart_port *port, struct serial_rs485 *rs485)
1328
+
serial_omap_config_rs485(struct uart_port *port, struct ktermios *termios,
1329
+
struct serial_rs485 *rs485)
1328
1330
{
1329
1331
struct uart_omap_port *up = to_uart_omap_port(port);
1330
1332
unsigned int mode;
···
1559
1559
return 0;
1560
1560
}
1561
1561
1562
+
static const struct serial_rs485 serial_omap_rs485_supported = {
1563
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND |
1564
+
SER_RS485_RX_DURING_TX,
1565
+
.delay_rts_before_send = 1,
1566
+
.delay_rts_after_send = 1,
1567
+
};
1568
+
1562
1569
static int serial_omap_probe(struct platform_device *pdev)
1563
1570
{
1564
1571
struct omap_uart_port_info *omap_up_info = dev_get_platdata(&pdev->dev);
···
1643
1636
up->port.flags = omap_up_info->flags;
1644
1637
up->port.uartclk = omap_up_info->uartclk;
1645
1638
up->port.rs485_config = serial_omap_config_rs485;
1639
+
up->port.rs485_supported = serial_omap_rs485_supported;
1646
1640
if (!up->port.uartclk) {
1647
1641
up->port.uartclk = DEFAULT_CLK_SPEED;
1648
1642
dev_warn(&pdev->dev,
+1
-1
drivers/tty/serial/owl-uart.c
+1
-1
drivers/tty/serial/owl-uart.c
+3
-4
drivers/tty/serial/pch_uart.c
+3
-4
drivers/tty/serial/pch_uart.c
···
3
3
*Copyright (C) 2011 LAPIS Semiconductor Co., Ltd.
4
4
*/
5
5
#include <linux/kernel.h>
6
+
#include <linux/serial.h>
6
7
#include <linux/serial_reg.h>
7
8
#include <linux/slab.h>
8
9
#include <linux/module.h>
···
189
188
#define PCH_UART_HAL_OUT (PCH_UART_MCR_OUT)
190
189
#define PCH_UART_HAL_LOOP (PCH_UART_MCR_LOOP)
191
190
#define PCH_UART_HAL_AFE (PCH_UART_MCR_AFE)
192
-
193
-
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
194
191
195
192
#define DEFAULT_UARTCLK 1843200 /* 1.8432 MHz */
196
193
#define CMITC_UARTCLK 192000000 /* 192.0000 MHz */
···
1515
1516
* Finally, wait for transmitter to become empty
1516
1517
* and restore the IER
1517
1518
*/
1518
-
wait_for_xmitr(priv, BOTH_EMPTY);
1519
+
wait_for_xmitr(priv, UART_LSR_BOTH_EMPTY);
1519
1520
iowrite8(ier, priv->membase + UART_IER);
1520
1521
}
1521
1522
#endif /* CONFIG_CONSOLE_POLL */
···
1601
1602
* Finally, wait for transmitter to become empty
1602
1603
* and restore the IER
1603
1604
*/
1604
-
wait_for_xmitr(priv, BOTH_EMPTY);
1605
+
wait_for_xmitr(priv, UART_LSR_BOTH_EMPTY);
1605
1606
iowrite8(ier, priv->membase + UART_IER);
1606
1607
1607
1608
if (port_locked)
+3
-1
drivers/tty/serial/pic32_uart.c
+3
-1
drivers/tty/serial/pic32_uart.c
···
503
503
if (!sport->irq_fault_name) {
504
504
dev_err(port->dev, "%s: kasprintf err!", __func__);
505
505
ret = -ENOMEM;
506
-
goto out_done;
506
+
goto out_disable_clk;
507
507
}
508
508
irq_set_status_flags(sport->irq_fault, IRQ_NOAUTOEN);
509
509
ret = request_irq(sport->irq_fault, pic32_uart_fault_interrupt,
···
579
579
out_f:
580
580
free_irq(sport->irq_fault, port);
581
581
kfree(sport->irq_fault_name);
582
+
out_disable_clk:
583
+
clk_disable_unprepare(sport->clk);
582
584
out_done:
583
585
return ret;
584
586
}
-1
drivers/tty/serial/pmac_zilog.c
-1
drivers/tty/serial/pmac_zilog.c
+2
-3
drivers/tty/serial/pxa.c
+2
-3
drivers/tty/serial/pxa.c
···
23
23
#include <linux/init.h>
24
24
#include <linux/console.h>
25
25
#include <linux/sysrq.h>
26
+
#include <linux/serial.h>
26
27
#include <linux/serial_reg.h>
27
28
#include <linux/circ_buf.h>
28
29
#include <linux/delay.h>
···
576
575
577
576
#ifdef CONFIG_SERIAL_PXA_CONSOLE
578
577
579
-
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
580
-
581
578
/*
582
579
* Wait for transmitter & holding register to empty
583
580
*/
···
593
594
if (--tmout == 0)
594
595
break;
595
596
udelay(1);
596
-
} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
597
+
} while (!uart_lsr_tx_empty(status));
597
598
598
599
/* Wait up to 1s for flow control if necessary */
599
600
if (up->port.flags & UPF_CONS_FLOW) {
+56
-38
drivers/tty/serial/qcom_geni_serial.c
+56
-38
drivers/tty/serial/qcom_geni_serial.c
···
943
943
return 0;
944
944
}
945
945
946
+
static unsigned long find_clk_rate_in_tol(struct clk *clk, unsigned int desired_clk,
947
+
unsigned int *clk_div, unsigned int percent_tol)
948
+
{
949
+
unsigned long freq;
950
+
unsigned long div, maxdiv;
951
+
u64 mult;
952
+
unsigned long offset, abs_tol, achieved;
953
+
954
+
abs_tol = div_u64((u64)desired_clk * percent_tol, 100);
955
+
maxdiv = CLK_DIV_MSK >> CLK_DIV_SHFT;
956
+
div = 1;
957
+
while (div <= maxdiv) {
958
+
mult = (u64)div * desired_clk;
959
+
if (mult != (unsigned long)mult)
960
+
break;
961
+
962
+
offset = div * abs_tol;
963
+
freq = clk_round_rate(clk, mult - offset);
964
+
965
+
/* Can only get lower if we're done */
966
+
if (freq < mult - offset)
967
+
break;
968
+
969
+
/*
970
+
* Re-calculate div in case rounding skipped rates but we
971
+
* ended up at a good one, then check for a match.
972
+
*/
973
+
div = DIV_ROUND_CLOSEST(freq, desired_clk);
974
+
achieved = DIV_ROUND_CLOSEST(freq, div);
975
+
if (achieved <= desired_clk + abs_tol &&
976
+
achieved >= desired_clk - abs_tol) {
977
+
*clk_div = div;
978
+
return freq;
979
+
}
980
+
981
+
div = DIV_ROUND_UP(freq, desired_clk);
982
+
}
983
+
984
+
return 0;
985
+
}
986
+
946
987
static unsigned long get_clk_div_rate(struct clk *clk, unsigned int baud,
947
988
unsigned int sampling_rate, unsigned int *clk_div)
948
989
{
949
990
unsigned long ser_clk;
950
991
unsigned long desired_clk;
951
-
unsigned long freq, prev;
952
-
unsigned long div, maxdiv;
953
-
int64_t mult;
954
992
955
993
desired_clk = baud * sampling_rate;
956
-
if (!desired_clk) {
957
-
pr_err("%s: Invalid frequency\n", __func__);
994
+
if (!desired_clk)
958
995
return 0;
959
-
}
960
996
961
-
maxdiv = CLK_DIV_MSK >> CLK_DIV_SHFT;
962
-
prev = 0;
963
-
964
-
for (div = 1; div <= maxdiv; div++) {
965
-
mult = div * desired_clk;
966
-
if (mult > ULONG_MAX)
967
-
break;
968
-
969
-
freq = clk_round_rate(clk, (unsigned long)mult);
970
-
if (!(freq % desired_clk)) {
971
-
ser_clk = freq;
972
-
break;
973
-
}
974
-
975
-
if (!prev)
976
-
ser_clk = freq;
977
-
else if (prev == freq)
978
-
break;
979
-
980
-
prev = freq;
981
-
}
982
-
983
-
if (!ser_clk) {
984
-
pr_err("%s: Can't find matching DFS entry for baud %d\n",
985
-
__func__, baud);
986
-
return ser_clk;
987
-
}
988
-
989
-
*clk_div = ser_clk / desired_clk;
990
-
if (!(*clk_div))
991
-
*clk_div = 1;
997
+
/*
998
+
* try to find a clock rate within 2% tolerance, then within 5%
999
+
*/
1000
+
ser_clk = find_clk_rate_in_tol(clk, desired_clk, clk_div, 2);
1001
+
if (!ser_clk)
1002
+
ser_clk = find_clk_rate_in_tol(clk, desired_clk, clk_div, 5);
992
1003
993
1004
return ser_clk;
994
1005
}
···
1034
1023
1035
1024
clk_rate = get_clk_div_rate(port->se.clk, baud,
1036
1025
sampling_rate, &clk_div);
1037
-
if (!clk_rate)
1026
+
if (!clk_rate) {
1027
+
dev_err(port->se.dev,
1028
+
"Couldn't find suitable clock rate for %u\n",
1029
+
baud * sampling_rate);
1038
1030
goto out_restart_rx;
1031
+
}
1032
+
1033
+
dev_dbg(port->se.dev, "desired_rate-%u, clk_rate-%lu, clk_div-%u\n",
1034
+
baud * sampling_rate, clk_rate, clk_div);
1039
1035
1040
1036
uport->uartclk = clk_rate;
1041
1037
dev_pm_opp_set_rate(uport->dev, clk_rate);
+1
-1
drivers/tty/serial/rda-uart.c
+1
-1
drivers/tty/serial/rda-uart.c
+33
-57
drivers/tty/serial/samsung_tty.c
+33
-57
drivers/tty/serial/samsung_tty.c
···
48
48
#define S3C24XX_SERIAL_MAJOR 204
49
49
#define S3C24XX_SERIAL_MINOR 64
50
50
51
+
#ifdef CONFIG_ARM64
52
+
#define UART_NR 12
53
+
#else
54
+
#define UART_NR CONFIG_SERIAL_SAMSUNG_UARTS
55
+
#endif
56
+
51
57
#define S3C24XX_TX_PIO 1
52
58
#define S3C24XX_TX_DMA 2
53
59
#define S3C24XX_RX_PIO 1
···
93
87
struct s3c24xx_serial_drv_data {
94
88
const struct s3c24xx_uart_info info;
95
89
const struct s3c2410_uartcfg def_cfg;
96
-
const unsigned int fifosize[CONFIG_SERIAL_SAMSUNG_UARTS];
90
+
const unsigned int fifosize[UART_NR];
97
91
};
98
92
99
93
struct s3c24xx_uart_dma {
···
1017
1011
static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
1018
1012
{
1019
1013
unsigned int umcon = rd_regl(port, S3C2410_UMCON);
1014
+
unsigned int ucon = rd_regl(port, S3C2410_UCON);
1020
1015
1021
1016
if (mctrl & TIOCM_RTS)
1022
1017
umcon |= S3C2410_UMCOM_RTS_LOW;
···
1025
1018
umcon &= ~S3C2410_UMCOM_RTS_LOW;
1026
1019
1027
1020
wr_regl(port, S3C2410_UMCON, umcon);
1021
+
1022
+
if (mctrl & TIOCM_LOOP)
1023
+
ucon |= S3C2410_UCON_LOOPBACK;
1024
+
else
1025
+
ucon &= ~S3C2410_UCON_LOOPBACK;
1026
+
1027
+
wr_regl(port, S3C2410_UCON, ucon);
1028
1028
}
1029
1029
1030
1030
static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_state)
···
1815
1801
static struct uart_driver s3c24xx_uart_drv = {
1816
1802
.owner = THIS_MODULE,
1817
1803
.driver_name = "s3c2410_serial",
1818
-
.nr = CONFIG_SERIAL_SAMSUNG_UARTS,
1804
+
.nr = UART_NR,
1819
1805
.cons = S3C24XX_SERIAL_CONSOLE,
1820
1806
.dev_name = S3C24XX_SERIAL_NAME,
1821
1807
.major = S3C24XX_SERIAL_MAJOR,
1822
1808
.minor = S3C24XX_SERIAL_MINOR,
1823
1809
};
1824
1810
1825
-
#define __PORT_LOCK_UNLOCKED(i) \
1826
-
__SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[i].port.lock)
1827
-
static struct s3c24xx_uart_port
1828
-
s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS] = {
1829
-
[0] = {
1830
-
.port = {
1831
-
.lock = __PORT_LOCK_UNLOCKED(0),
1832
-
.iotype = UPIO_MEM,
1833
-
.uartclk = 0,
1834
-
.fifosize = 16,
1835
-
.ops = &s3c24xx_serial_ops,
1836
-
.flags = UPF_BOOT_AUTOCONF,
1837
-
.line = 0,
1838
-
}
1839
-
},
1840
-
[1] = {
1841
-
.port = {
1842
-
.lock = __PORT_LOCK_UNLOCKED(1),
1843
-
.iotype = UPIO_MEM,
1844
-
.uartclk = 0,
1845
-
.fifosize = 16,
1846
-
.ops = &s3c24xx_serial_ops,
1847
-
.flags = UPF_BOOT_AUTOCONF,
1848
-
.line = 1,
1849
-
}
1850
-
},
1851
-
#if CONFIG_SERIAL_SAMSUNG_UARTS > 2
1852
-
[2] = {
1853
-
.port = {
1854
-
.lock = __PORT_LOCK_UNLOCKED(2),
1855
-
.iotype = UPIO_MEM,
1856
-
.uartclk = 0,
1857
-
.fifosize = 16,
1858
-
.ops = &s3c24xx_serial_ops,
1859
-
.flags = UPF_BOOT_AUTOCONF,
1860
-
.line = 2,
1861
-
}
1862
-
},
1863
-
#endif
1864
-
#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
1865
-
[3] = {
1866
-
.port = {
1867
-
.lock = __PORT_LOCK_UNLOCKED(3),
1868
-
.iotype = UPIO_MEM,
1869
-
.uartclk = 0,
1870
-
.fifosize = 16,
1871
-
.ops = &s3c24xx_serial_ops,
1872
-
.flags = UPF_BOOT_AUTOCONF,
1873
-
.line = 3,
1874
-
}
1875
-
}
1876
-
#endif
1877
-
};
1878
-
#undef __PORT_LOCK_UNLOCKED
1811
+
static struct s3c24xx_uart_port s3c24xx_serial_ports[UART_NR];
1812
+
1813
+
static void s3c24xx_serial_init_port_default(int index) {
1814
+
struct uart_port *port = &s3c24xx_serial_ports[index].port;
1815
+
1816
+
spin_lock_init(&port->lock);
1817
+
1818
+
port->iotype = UPIO_MEM;
1819
+
port->uartclk = 0;
1820
+
port->fifosize = 16;
1821
+
port->ops = &s3c24xx_serial_ops;
1822
+
port->flags = UPF_BOOT_AUTOCONF;
1823
+
port->line = index;
1824
+
}
1879
1825
1880
1826
/* s3c24xx_serial_resetport
1881
1827
*
···
2150
2176
return -EINVAL;
2151
2177
}
2152
2178
ourport = &s3c24xx_serial_ports[index];
2179
+
2180
+
s3c24xx_serial_init_port_default(index);
2153
2181
2154
2182
ourport->drv_data = s3c24xx_get_driver_data(pdev);
2155
2183
if (!ourport->drv_data) {
···
2551
2575
2552
2576
/* is this a valid port */
2553
2577
2554
-
if (co->index == -1 || co->index >= CONFIG_SERIAL_SAMSUNG_UARTS)
2578
+
if (co->index == -1 || co->index >= UART_NR)
2555
2579
co->index = 0;
2556
2580
2557
2581
port = &s3c24xx_serial_ports[co->index].port;
+8
-2
drivers/tty/serial/sc16is7xx.c
+8
-2
drivers/tty/serial/sc16is7xx.c
···
1127
1127
spin_unlock_irqrestore(&port->lock, flags);
1128
1128
}
1129
1129
1130
-
static int sc16is7xx_config_rs485(struct uart_port *port,
1130
+
static int sc16is7xx_config_rs485(struct uart_port *port, struct ktermios *termios,
1131
1131
struct serial_rs485 *rs485)
1132
1132
{
1133
1133
struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
···
1143
1143
return -EINVAL;
1144
1144
}
1145
1145
1146
-
port->rs485 = *rs485;
1147
1146
one->config.flags |= SC16IS7XX_RECONF_RS485;
1148
1147
kthread_queue_work(&s->kworker, &one->reg_work);
1149
1148
···
1353
1354
}
1354
1355
#endif
1355
1356
1357
+
static const struct serial_rs485 sc16is7xx_rs485_supported = {
1358
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_AFTER_SEND,
1359
+
.delay_rts_before_send = 1,
1360
+
.delay_rts_after_send = 1, /* Not supported but keep returning -EINVAL */
1361
+
};
1362
+
1356
1363
static int sc16is7xx_probe(struct device *dev,
1357
1364
const struct sc16is7xx_devtype *devtype,
1358
1365
struct regmap *regmap, int irq)
···
1461
1456
s->p[i].port.iotype = UPIO_PORT;
1462
1457
s->p[i].port.uartclk = freq;
1463
1458
s->p[i].port.rs485_config = sc16is7xx_config_rs485;
1459
+
s->p[i].port.rs485_supported = sc16is7xx_rs485_supported;
1464
1460
s->p[i].port.ops = &sc16is7xx_ops;
1465
1461
s->p[i].old_mctrl = 0;
1466
1462
s->p[i].port.line = sc16is7xx_alloc_line();
+3
-2
drivers/tty/serial/serial-tegra.c
+3
-2
drivers/tty/serial/serial-tegra.c
···
441
441
442
442
if (unlikely(lsr & TEGRA_UART_LSR_ANY)) {
443
443
if (lsr & UART_LSR_OE) {
444
-
/* Overrrun error */
444
+
/* Overrun error */
445
445
flag = TTY_OVERRUN;
446
446
tup->uport.icount.overrun++;
447
447
dev_dbg(tup->uport.dev, "Got overrun errors\n");
···
1080
1080
tup->rx_in_progress = 1;
1081
1081
1082
1082
/*
1083
-
* Enable IE_RXS for the receive status interrupts like line errros.
1083
+
* Enable IE_RXS for the receive status interrupts like line errors.
1084
1084
* Enable IE_RX_TIMEOUT to get the bytes which cannot be DMA'd.
1085
1085
*
1086
1086
* EORD is different interrupt than RX_TIMEOUT - RX_TIMEOUT occurs when
···
1667
1667
node = of_find_matching_node(NULL, tegra_uart_of_match);
1668
1668
if (node)
1669
1669
match = of_match_node(tegra_uart_of_match, node);
1670
+
of_node_put(node);
1670
1671
if (match)
1671
1672
cdata = match->data;
1672
1673
if (cdata)
+296
-156
drivers/tty/serial/serial_core.c
+296
-156
drivers/tty/serial/serial_core.c
···
97
97
return state->uart_port;
98
98
}
99
99
100
-
/*
101
-
* This routine is used by the interrupt handler to schedule processing in
102
-
* the software interrupt portion of the driver.
100
+
/**
101
+
* uart_write_wakeup - schedule write processing
102
+
* @port: port to be processed
103
+
*
104
+
* This routine is used by the interrupt handler to schedule processing in the
105
+
* software interrupt portion of the driver. A driver is expected to call this
106
+
* function when the number of characters in the transmit buffer have dropped
107
+
* below a threshold.
108
+
*
109
+
* Locking: @port->lock should be held
103
110
*/
104
111
void uart_write_wakeup(struct uart_port *port)
105
112
{
···
334
327
}
335
328
336
329
/**
337
-
* uart_update_timeout - update per-port FIFO timeout.
338
-
* @port: uart_port structure describing the port
339
-
* @cflag: termios cflag value
340
-
* @baud: speed of the port
330
+
* uart_update_timeout - update per-port frame timing information
331
+
* @port: uart_port structure describing the port
332
+
* @cflag: termios cflag value
333
+
* @baud: speed of the port
341
334
*
342
-
* Set the port FIFO timeout value. The @cflag value should
343
-
* reflect the actual hardware settings.
335
+
* Set the @port frame timing information from which the FIFO timeout value is
336
+
* derived. The @cflag value should reflect the actual hardware settings as
337
+
* number of bits, parity, stop bits and baud rate is taken into account here.
338
+
*
339
+
* Locking: caller is expected to take @port->lock
344
340
*/
345
341
void
346
342
uart_update_timeout(struct uart_port *port, unsigned int cflag,
···
353
343
u64 frame_time;
354
344
355
345
frame_time = (u64)size * NSEC_PER_SEC;
356
-
size *= port->fifosize;
357
-
358
-
/*
359
-
* Figure the timeout to send the above number of bits.
360
-
* Add .02 seconds of slop
361
-
*/
362
-
port->timeout = (HZ * size) / baud + HZ/50;
363
346
port->frame_time = DIV64_U64_ROUND_UP(frame_time, baud);
364
347
}
365
348
EXPORT_SYMBOL(uart_update_timeout);
366
349
367
350
/**
368
-
* uart_get_baud_rate - return baud rate for a particular port
369
-
* @port: uart_port structure describing the port in question.
370
-
* @termios: desired termios settings.
371
-
* @old: old termios (or NULL)
372
-
* @min: minimum acceptable baud rate
373
-
* @max: maximum acceptable baud rate
351
+
* uart_get_baud_rate - return baud rate for a particular port
352
+
* @port: uart_port structure describing the port in question.
353
+
* @termios: desired termios settings
354
+
* @old: old termios (or %NULL)
355
+
* @min: minimum acceptable baud rate
356
+
* @max: maximum acceptable baud rate
374
357
*
375
-
* Decode the termios structure into a numeric baud rate,
376
-
* taking account of the magic 38400 baud rate (with spd_*
377
-
* flags), and mapping the %B0 rate to 9600 baud.
358
+
* Decode the termios structure into a numeric baud rate, taking account of the
359
+
* magic 38400 baud rate (with spd_* flags), and mapping the %B0 rate to 9600
360
+
* baud.
378
361
*
379
-
* If the new baud rate is invalid, try the old termios setting.
380
-
* If it's still invalid, we try 9600 baud.
362
+
* If the new baud rate is invalid, try the @old termios setting. If it's still
363
+
* invalid, we try 9600 baud.
381
364
*
382
-
* Update the @termios structure to reflect the baud rate
383
-
* we're actually going to be using. Don't do this for the case
384
-
* where B0 is requested ("hang up").
365
+
* The @termios structure is updated to reflect the baud rate we're actually
366
+
* going to be using. Don't do this for the case where B0 is requested ("hang
367
+
* up").
368
+
*
369
+
* Locking: caller dependent
385
370
*/
386
371
unsigned int
387
372
uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
···
461
456
EXPORT_SYMBOL(uart_get_baud_rate);
462
457
463
458
/**
464
-
* uart_get_divisor - return uart clock divisor
465
-
* @port: uart_port structure describing the port.
466
-
* @baud: desired baud rate
459
+
* uart_get_divisor - return uart clock divisor
460
+
* @port: uart_port structure describing the port
461
+
* @baud: desired baud rate
467
462
*
468
-
* Calculate the uart clock divisor for the port.
463
+
* Calculate the divisor (baud_base / baud) for the specified @baud,
464
+
* appropriately rounded.
465
+
*
466
+
* If 38400 baud and custom divisor is selected, return the custom divisor
467
+
* instead.
468
+
*
469
+
* Locking: caller dependent
469
470
*/
470
471
unsigned int
471
472
uart_get_divisor(struct uart_port *port, unsigned int baud)
···
1034
1023
}
1035
1024
1036
1025
/**
1037
-
* uart_get_lsr_info - get line status register info
1038
-
* @tty: tty associated with the UART
1039
-
* @state: UART being queried
1040
-
* @value: returned modem value
1026
+
* uart_get_lsr_info - get line status register info
1027
+
* @tty: tty associated with the UART
1028
+
* @state: UART being queried
1029
+
* @value: returned modem value
1041
1030
*/
1042
1031
static int uart_get_lsr_info(struct tty_struct *tty,
1043
1032
struct uart_state *state, unsigned int __user *value)
···
1287
1276
return 0;
1288
1277
}
1289
1278
1279
+
#define SER_RS485_LEGACY_FLAGS (SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | \
1280
+
SER_RS485_RTS_AFTER_SEND | SER_RS485_RX_DURING_TX | \
1281
+
SER_RS485_TERMINATE_BUS)
1282
+
1283
+
static int uart_check_rs485_flags(struct uart_port *port, struct serial_rs485 *rs485)
1284
+
{
1285
+
u32 flags = rs485->flags;
1286
+
1287
+
/* Don't return -EINVAL for unsupported legacy flags */
1288
+
flags &= ~SER_RS485_LEGACY_FLAGS;
1289
+
1290
+
/*
1291
+
* For any bit outside of the legacy ones that is not supported by
1292
+
* the driver, return -EINVAL.
1293
+
*/
1294
+
if (flags & ~port->rs485_supported.flags)
1295
+
return -EINVAL;
1296
+
1297
+
/* Asking for address w/o addressing mode? */
1298
+
if (!(rs485->flags & SER_RS485_ADDRB) &&
1299
+
(rs485->flags & (SER_RS485_ADDR_RECV|SER_RS485_ADDR_DEST)))
1300
+
return -EINVAL;
1301
+
1302
+
/* Address given but not enabled? */
1303
+
if (!(rs485->flags & SER_RS485_ADDR_RECV) && rs485->addr_recv)
1304
+
return -EINVAL;
1305
+
if (!(rs485->flags & SER_RS485_ADDR_DEST) && rs485->addr_dest)
1306
+
return -EINVAL;
1307
+
1308
+
return 0;
1309
+
}
1310
+
1311
+
static void uart_sanitize_serial_rs485_delays(struct uart_port *port,
1312
+
struct serial_rs485 *rs485)
1313
+
{
1314
+
if (!port->rs485_supported.delay_rts_before_send) {
1315
+
if (rs485->delay_rts_before_send) {
1316
+
dev_warn_ratelimited(port->dev,
1317
+
"%s (%d): RTS delay before sending not supported\n",
1318
+
port->name, port->line);
1319
+
}
1320
+
rs485->delay_rts_before_send = 0;
1321
+
} else if (rs485->delay_rts_before_send > RS485_MAX_RTS_DELAY) {
1322
+
rs485->delay_rts_before_send = RS485_MAX_RTS_DELAY;
1323
+
dev_warn_ratelimited(port->dev,
1324
+
"%s (%d): RTS delay before sending clamped to %u ms\n",
1325
+
port->name, port->line, rs485->delay_rts_before_send);
1326
+
}
1327
+
1328
+
if (!port->rs485_supported.delay_rts_after_send) {
1329
+
if (rs485->delay_rts_after_send) {
1330
+
dev_warn_ratelimited(port->dev,
1331
+
"%s (%d): RTS delay after sending not supported\n",
1332
+
port->name, port->line);
1333
+
}
1334
+
rs485->delay_rts_after_send = 0;
1335
+
} else if (rs485->delay_rts_after_send > RS485_MAX_RTS_DELAY) {
1336
+
rs485->delay_rts_after_send = RS485_MAX_RTS_DELAY;
1337
+
dev_warn_ratelimited(port->dev,
1338
+
"%s (%d): RTS delay after sending clamped to %u ms\n",
1339
+
port->name, port->line, rs485->delay_rts_after_send);
1340
+
}
1341
+
}
1342
+
1343
+
static void uart_sanitize_serial_rs485(struct uart_port *port, struct serial_rs485 *rs485)
1344
+
{
1345
+
u32 supported_flags = port->rs485_supported.flags;
1346
+
1347
+
if (!(rs485->flags & SER_RS485_ENABLED)) {
1348
+
memset(rs485, 0, sizeof(*rs485));
1349
+
return;
1350
+
}
1351
+
1352
+
/* Pick sane settings if the user hasn't */
1353
+
if ((supported_flags & (SER_RS485_RTS_ON_SEND|SER_RS485_RTS_AFTER_SEND)) &&
1354
+
!(rs485->flags & SER_RS485_RTS_ON_SEND) ==
1355
+
!(rs485->flags & SER_RS485_RTS_AFTER_SEND)) {
1356
+
dev_warn_ratelimited(port->dev,
1357
+
"%s (%d): invalid RTS setting, using RTS_ON_SEND instead\n",
1358
+
port->name, port->line);
1359
+
rs485->flags |= SER_RS485_RTS_ON_SEND;
1360
+
rs485->flags &= ~SER_RS485_RTS_AFTER_SEND;
1361
+
supported_flags |= SER_RS485_RTS_ON_SEND|SER_RS485_RTS_AFTER_SEND;
1362
+
}
1363
+
1364
+
rs485->flags &= supported_flags;
1365
+
1366
+
uart_sanitize_serial_rs485_delays(port, rs485);
1367
+
1368
+
/* Return clean padding area to userspace */
1369
+
memset(rs485->padding0, 0, sizeof(rs485->padding0));
1370
+
memset(rs485->padding1, 0, sizeof(rs485->padding1));
1371
+
}
1372
+
1373
+
static void uart_set_rs485_termination(struct uart_port *port,
1374
+
const struct serial_rs485 *rs485)
1375
+
{
1376
+
if (!(rs485->flags & SER_RS485_ENABLED))
1377
+
return;
1378
+
1379
+
gpiod_set_value_cansleep(port->rs485_term_gpio,
1380
+
!!(rs485->flags & SER_RS485_TERMINATE_BUS));
1381
+
}
1382
+
1383
+
int uart_rs485_config(struct uart_port *port)
1384
+
{
1385
+
struct serial_rs485 *rs485 = &port->rs485;
1386
+
int ret;
1387
+
1388
+
uart_sanitize_serial_rs485(port, rs485);
1389
+
uart_set_rs485_termination(port, rs485);
1390
+
1391
+
ret = port->rs485_config(port, NULL, rs485);
1392
+
if (ret)
1393
+
memset(rs485, 0, sizeof(*rs485));
1394
+
1395
+
return ret;
1396
+
}
1397
+
EXPORT_SYMBOL_GPL(uart_rs485_config);
1398
+
1290
1399
static int uart_get_rs485_config(struct uart_port *port,
1291
1400
struct serial_rs485 __user *rs485)
1292
1401
{
···
1423
1292
return 0;
1424
1293
}
1425
1294
1426
-
static int uart_set_rs485_config(struct uart_port *port,
1295
+
static int uart_set_rs485_config(struct tty_struct *tty, struct uart_port *port,
1427
1296
struct serial_rs485 __user *rs485_user)
1428
1297
{
1429
1298
struct serial_rs485 rs485;
···
1436
1305
if (copy_from_user(&rs485, rs485_user, sizeof(*rs485_user)))
1437
1306
return -EFAULT;
1438
1307
1439
-
/* pick sane settings if the user hasn't */
1440
-
if (!(rs485.flags & SER_RS485_RTS_ON_SEND) ==
1441
-
!(rs485.flags & SER_RS485_RTS_AFTER_SEND)) {
1442
-
dev_warn_ratelimited(port->dev,
1443
-
"%s (%d): invalid RTS setting, using RTS_ON_SEND instead\n",
1444
-
port->name, port->line);
1445
-
rs485.flags |= SER_RS485_RTS_ON_SEND;
1446
-
rs485.flags &= ~SER_RS485_RTS_AFTER_SEND;
1447
-
}
1448
-
1449
-
if (rs485.delay_rts_before_send > RS485_MAX_RTS_DELAY) {
1450
-
rs485.delay_rts_before_send = RS485_MAX_RTS_DELAY;
1451
-
dev_warn_ratelimited(port->dev,
1452
-
"%s (%d): RTS delay before sending clamped to %u ms\n",
1453
-
port->name, port->line, rs485.delay_rts_before_send);
1454
-
}
1455
-
1456
-
if (rs485.delay_rts_after_send > RS485_MAX_RTS_DELAY) {
1457
-
rs485.delay_rts_after_send = RS485_MAX_RTS_DELAY;
1458
-
dev_warn_ratelimited(port->dev,
1459
-
"%s (%d): RTS delay after sending clamped to %u ms\n",
1460
-
port->name, port->line, rs485.delay_rts_after_send);
1461
-
}
1462
-
/* Return clean padding area to userspace */
1463
-
memset(rs485.padding, 0, sizeof(rs485.padding));
1308
+
ret = uart_check_rs485_flags(port, &rs485);
1309
+
if (ret)
1310
+
return ret;
1311
+
uart_sanitize_serial_rs485(port, &rs485);
1312
+
uart_set_rs485_termination(port, &rs485);
1464
1313
1465
1314
spin_lock_irqsave(&port->lock, flags);
1466
-
ret = port->rs485_config(port, &rs485);
1315
+
ret = port->rs485_config(port, &tty->termios, &rs485);
1467
1316
if (!ret)
1468
1317
port->rs485 = rs485;
1469
1318
spin_unlock_irqrestore(&port->lock, flags);
···
1552
1441
if (ret != -ENOIOCTLCMD)
1553
1442
goto out;
1554
1443
1444
+
/* rs485_config requires more locking than others */
1445
+
if (cmd == TIOCGRS485)
1446
+
down_write(&tty->termios_rwsem);
1447
+
1555
1448
mutex_lock(&port->mutex);
1556
1449
uport = uart_port_check(state);
1557
1450
···
1579
1464
break;
1580
1465
1581
1466
case TIOCSRS485:
1582
-
ret = uart_set_rs485_config(uport, uarg);
1467
+
ret = uart_set_rs485_config(tty, uport, uarg);
1583
1468
break;
1584
1469
1585
1470
case TIOCSISO7816:
···
1596
1481
}
1597
1482
out_up:
1598
1483
mutex_unlock(&port->mutex);
1484
+
if (cmd == TIOCGRS485)
1485
+
up_write(&tty->termios_rwsem);
1599
1486
out:
1600
1487
return ret;
1601
1488
}
···
1745
1628
{
1746
1629
struct uart_state *state = tty->driver_data;
1747
1630
struct uart_port *port;
1748
-
unsigned long char_time, expire;
1631
+
unsigned long char_time, expire, fifo_timeout;
1749
1632
1750
1633
port = uart_port_ref(state);
1751
1634
if (!port)
···
1775
1658
* amount of time to send the entire FIFO, it probably won't
1776
1659
* ever clear. This assumes the UART isn't doing flow
1777
1660
* control, which is currently the case. Hence, if it ever
1778
-
* takes longer than port->timeout, this is probably due to a
1661
+
* takes longer than FIFO timeout, this is probably due to a
1779
1662
* UART bug of some kind. So, we clamp the timeout parameter at
1780
-
* 2*port->timeout.
1663
+
* 2 * FIFO timeout.
1781
1664
*/
1782
-
if (timeout == 0 || timeout > 2 * port->timeout)
1783
-
timeout = 2 * port->timeout;
1665
+
fifo_timeout = uart_fifo_timeout(port);
1666
+
if (timeout == 0 || timeout > 2 * fifo_timeout)
1667
+
timeout = 2 * fifo_timeout;
1784
1668
}
1785
1669
1786
1670
expire = jiffies + timeout;
···
2067
1949
2068
1950
#if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
2069
1951
/**
2070
-
* uart_console_write - write a console message to a serial port
2071
-
* @port: the port to write the message
2072
-
* @s: array of characters
2073
-
* @count: number of characters in string to write
2074
-
* @putchar: function to write character to port
1952
+
* uart_console_write - write a console message to a serial port
1953
+
* @port: the port to write the message
1954
+
* @s: array of characters
1955
+
* @count: number of characters in string to write
1956
+
* @putchar: function to write character to port
2075
1957
*/
2076
1958
void uart_console_write(struct uart_port *port, const char *s,
2077
1959
unsigned int count,
···
2087
1969
}
2088
1970
EXPORT_SYMBOL_GPL(uart_console_write);
2089
1971
2090
-
/*
2091
-
* Check whether an invalid uart number has been specified, and
2092
-
* if so, search for the first available port that does have
2093
-
* console support.
1972
+
/**
1973
+
* uart_get_console - get uart port for console
1974
+
* @ports: ports to search in
1975
+
* @nr: number of @ports
1976
+
* @co: console to search for
1977
+
* Returns: uart_port for the console @co
1978
+
*
1979
+
* Check whether an invalid uart number has been specified (as @co->index), and
1980
+
* if so, search for the first available port that does have console support.
2094
1981
*/
2095
1982
struct uart_port * __init
2096
1983
uart_get_console(struct uart_port *ports, int nr, struct console *co)
···
2115
1992
}
2116
1993
2117
1994
/**
2118
-
* uart_parse_earlycon - Parse earlycon options
2119
-
* @p: ptr to 2nd field (ie., just beyond '<name>,')
2120
-
* @iotype: ptr for decoded iotype (out)
2121
-
* @addr: ptr for decoded mapbase/iobase (out)
2122
-
* @options: ptr for <options> field; NULL if not present (out)
1995
+
* uart_parse_earlycon - Parse earlycon options
1996
+
* @p: ptr to 2nd field (ie., just beyond '<name>,')
1997
+
* @iotype: ptr for decoded iotype (out)
1998
+
* @addr: ptr for decoded mapbase/iobase (out)
1999
+
* @options: ptr for <options> field; %NULL if not present (out)
2123
2000
*
2124
-
* Decodes earlycon kernel command line parameters of the form
2125
-
* earlycon=<name>,io|mmio|mmio16|mmio32|mmio32be|mmio32native,<addr>,<options>
2126
-
* console=<name>,io|mmio|mmio16|mmio32|mmio32be|mmio32native,<addr>,<options>
2001
+
* Decodes earlycon kernel command line parameters of the form:
2002
+
* * earlycon=<name>,io|mmio|mmio16|mmio32|mmio32be|mmio32native,<addr>,<options>
2003
+
* * console=<name>,io|mmio|mmio16|mmio32|mmio32be|mmio32native,<addr>,<options>
2127
2004
*
2128
-
* The optional form
2005
+
* The optional form:
2006
+
* * earlycon=<name>,0x<addr>,<options>
2007
+
* * console=<name>,0x<addr>,<options>
2129
2008
*
2130
-
* earlycon=<name>,0x<addr>,<options>
2131
-
* console=<name>,0x<addr>,<options>
2009
+
* is also accepted; the returned @iotype will be %UPIO_MEM.
2132
2010
*
2133
-
* is also accepted; the returned @iotype will be UPIO_MEM.
2134
-
*
2135
-
* Returns 0 on success or -EINVAL on failure
2011
+
* Returns: 0 on success or -%EINVAL on failure
2136
2012
*/
2137
2013
int uart_parse_earlycon(char *p, unsigned char *iotype, resource_size_t *addr,
2138
2014
char **options)
···
2176
2054
EXPORT_SYMBOL_GPL(uart_parse_earlycon);
2177
2055
2178
2056
/**
2179
-
* uart_parse_options - Parse serial port baud/parity/bits/flow control.
2180
-
* @options: pointer to option string
2181
-
* @baud: pointer to an 'int' variable for the baud rate.
2182
-
* @parity: pointer to an 'int' variable for the parity.
2183
-
* @bits: pointer to an 'int' variable for the number of data bits.
2184
-
* @flow: pointer to an 'int' variable for the flow control character.
2057
+
* uart_parse_options - Parse serial port baud/parity/bits/flow control.
2058
+
* @options: pointer to option string
2059
+
* @baud: pointer to an 'int' variable for the baud rate.
2060
+
* @parity: pointer to an 'int' variable for the parity.
2061
+
* @bits: pointer to an 'int' variable for the number of data bits.
2062
+
* @flow: pointer to an 'int' variable for the flow control character.
2185
2063
*
2186
-
* uart_parse_options decodes a string containing the serial console
2187
-
* options. The format of the string is <baud><parity><bits><flow>,
2188
-
* eg: 115200n8r
2064
+
* uart_parse_options() decodes a string containing the serial console
2065
+
* options. The format of the string is <baud><parity><bits><flow>,
2066
+
* eg: 115200n8r
2189
2067
*/
2190
2068
void
2191
2069
uart_parse_options(const char *options, int *baud, int *parity,
···
2206
2084
EXPORT_SYMBOL_GPL(uart_parse_options);
2207
2085
2208
2086
/**
2209
-
* uart_set_options - setup the serial console parameters
2210
-
* @port: pointer to the serial ports uart_port structure
2211
-
* @co: console pointer
2212
-
* @baud: baud rate
2213
-
* @parity: parity character - 'n' (none), 'o' (odd), 'e' (even)
2214
-
* @bits: number of data bits
2215
-
* @flow: flow control character - 'r' (rts)
2087
+
* uart_set_options - setup the serial console parameters
2088
+
* @port: pointer to the serial ports uart_port structure
2089
+
* @co: console pointer
2090
+
* @baud: baud rate
2091
+
* @parity: parity character - 'n' (none), 'o' (odd), 'e' (even)
2092
+
* @bits: number of data bits
2093
+
* @flow: flow control character - 'r' (rts)
2216
2094
*/
2217
2095
int
2218
2096
uart_set_options(struct uart_port *port, struct console *co,
···
2699
2577
};
2700
2578
2701
2579
/**
2702
-
* uart_register_driver - register a driver with the uart core layer
2703
-
* @drv: low level driver structure
2580
+
* uart_register_driver - register a driver with the uart core layer
2581
+
* @drv: low level driver structure
2704
2582
*
2705
-
* Register a uart driver with the core driver. We in turn register
2706
-
* with the tty layer, and initialise the core driver per-port state.
2583
+
* Register a uart driver with the core driver. We in turn register with the
2584
+
* tty layer, and initialise the core driver per-port state.
2707
2585
*
2708
-
* We have a proc file in /proc/tty/driver which is named after the
2709
-
* normal driver.
2586
+
* We have a proc file in /proc/tty/driver which is named after the normal
2587
+
* driver.
2710
2588
*
2711
-
* drv->port should be NULL, and the per-port structures should be
2712
-
* registered using uart_add_one_port after this call has succeeded.
2589
+
* @drv->port should be %NULL, and the per-port structures should be registered
2590
+
* using uart_add_one_port() after this call has succeeded.
2591
+
*
2592
+
* Locking: none, Interrupts: enabled
2713
2593
*/
2714
2594
int uart_register_driver(struct uart_driver *drv)
2715
2595
{
···
2775
2651
EXPORT_SYMBOL(uart_register_driver);
2776
2652
2777
2653
/**
2778
-
* uart_unregister_driver - remove a driver from the uart core layer
2779
-
* @drv: low level driver structure
2654
+
* uart_unregister_driver - remove a driver from the uart core layer
2655
+
* @drv: low level driver structure
2780
2656
*
2781
-
* Remove all references to a driver from the core driver. The low
2782
-
* level driver must have removed all its ports via the
2783
-
* uart_remove_one_port() if it registered them with uart_add_one_port().
2784
-
* (ie, drv->port == NULL)
2657
+
* Remove all references to a driver from the core driver. The low level
2658
+
* driver must have removed all its ports via the uart_remove_one_port() if it
2659
+
* registered them with uart_add_one_port(). (I.e. @drv->port is %NULL.)
2660
+
*
2661
+
* Locking: none, Interrupts: enabled
2785
2662
*/
2786
2663
void uart_unregister_driver(struct uart_driver *drv)
2787
2664
{
···
3031
2906
};
3032
2907
3033
2908
/**
3034
-
* uart_add_one_port - attach a driver-defined port structure
3035
-
* @drv: pointer to the uart low level driver structure for this port
3036
-
* @uport: uart port structure to use for this port.
2909
+
* uart_add_one_port - attach a driver-defined port structure
2910
+
* @drv: pointer to the uart low level driver structure for this port
2911
+
* @uport: uart port structure to use for this port.
3037
2912
*
3038
-
* Context: task context, might sleep
2913
+
* Context: task context, might sleep
3039
2914
*
3040
-
* This allows the driver to register its own uart_port structure
3041
-
* with the core driver. The main purpose is to allow the low
3042
-
* level uart drivers to expand uart_port, rather than having yet
3043
-
* more levels of structures.
2915
+
* This allows the driver @drv to register its own uart_port structure with the
2916
+
* core driver. The main purpose is to allow the low level uart drivers to
2917
+
* expand uart_port, rather than having yet more levels of structures.
3044
2918
*/
3045
2919
int uart_add_one_port(struct uart_driver *drv, struct uart_port *uport)
3046
2920
{
···
3134
3010
EXPORT_SYMBOL(uart_add_one_port);
3135
3011
3136
3012
/**
3137
-
* uart_remove_one_port - detach a driver defined port structure
3138
-
* @drv: pointer to the uart low level driver structure for this port
3139
-
* @uport: uart port structure for this port
3013
+
* uart_remove_one_port - detach a driver defined port structure
3014
+
* @drv: pointer to the uart low level driver structure for this port
3015
+
* @uport: uart port structure for this port
3140
3016
*
3141
-
* Context: task context, might sleep
3017
+
* Context: task context, might sleep
3142
3018
*
3143
-
* This unhooks (and hangs up) the specified port structure from the
3144
-
* core driver. No further calls will be made to the low-level code
3145
-
* for this port.
3019
+
* This unhooks (and hangs up) the specified port structure from the core
3020
+
* driver. No further calls will be made to the low-level code for this port.
3146
3021
*/
3147
3022
int uart_remove_one_port(struct uart_driver *drv, struct uart_port *uport)
3148
3023
{
···
3213
3090
}
3214
3091
EXPORT_SYMBOL(uart_remove_one_port);
3215
3092
3216
-
/*
3217
-
* Are the two ports equivalent?
3093
+
/**
3094
+
* uart_match_port - are the two ports equivalent?
3095
+
* @port1: first port
3096
+
* @port2: second port
3097
+
*
3098
+
* This utility function can be used to determine whether two uart_port
3099
+
* structures describe the same port.
3218
3100
*/
3219
3101
bool uart_match_port(const struct uart_port *port1,
3220
3102
const struct uart_port *port2)
···
3247
3119
EXPORT_SYMBOL(uart_match_port);
3248
3120
3249
3121
/**
3250
-
* uart_handle_dcd_change - handle a change of carrier detect state
3251
-
* @uport: uart_port structure for the open port
3252
-
* @status: new carrier detect status, nonzero if active
3122
+
* uart_handle_dcd_change - handle a change of carrier detect state
3123
+
* @uport: uart_port structure for the open port
3124
+
* @status: new carrier detect status, nonzero if active
3253
3125
*
3254
-
* Caller must hold uport->lock
3126
+
* Caller must hold uport->lock.
3255
3127
*/
3256
3128
void uart_handle_dcd_change(struct uart_port *uport, unsigned int status)
3257
3129
{
···
3282
3154
EXPORT_SYMBOL_GPL(uart_handle_dcd_change);
3283
3155
3284
3156
/**
3285
-
* uart_handle_cts_change - handle a change of clear-to-send state
3286
-
* @uport: uart_port structure for the open port
3287
-
* @status: new clear to send status, nonzero if active
3157
+
* uart_handle_cts_change - handle a change of clear-to-send state
3158
+
* @uport: uart_port structure for the open port
3159
+
* @status: new clear to send status, nonzero if active
3288
3160
*
3289
-
* Caller must hold uport->lock
3161
+
* Caller must hold uport->lock.
3290
3162
*/
3291
3163
void uart_handle_cts_change(struct uart_port *uport, unsigned int status)
3292
3164
{
···
3357
3229
static DECLARE_WORK(sysrq_enable_work, uart_sysrq_on);
3358
3230
3359
3231
/**
3360
-
* uart_try_toggle_sysrq - Enables SysRq from serial line
3361
-
* @port: uart_port structure where char(s) after BREAK met
3362
-
* @ch: new character in the sequence after received BREAK
3232
+
* uart_try_toggle_sysrq - Enables SysRq from serial line
3233
+
* @port: uart_port structure where char(s) after BREAK met
3234
+
* @ch: new character in the sequence after received BREAK
3363
3235
*
3364
-
* Enables magic SysRq when the required sequence is met on port
3365
-
* (see CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE).
3236
+
* Enables magic SysRq when the required sequence is met on port
3237
+
* (see CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE).
3366
3238
*
3367
-
* Returns false if @ch is out of enabling sequence and should be
3368
-
* handled some other way, true if @ch was consumed.
3239
+
* Returns: %false if @ch is out of enabling sequence and should be
3240
+
* handled some other way, %true if @ch was consumed.
3369
3241
*/
3370
3242
bool uart_try_toggle_sysrq(struct uart_port *port, unsigned int ch)
3371
3243
{
···
3417
3289
rs485conf->delay_rts_after_send = 0;
3418
3290
}
3419
3291
3292
+
uart_sanitize_serial_rs485_delays(port, rs485conf);
3293
+
3420
3294
/*
3421
3295
* Clear full-duplex and enabled flags, set RTS polarity to active high
3422
3296
* to get to a defined state with the following properties:
···
3451
3321
port->rs485_term_gpio = NULL;
3452
3322
return dev_err_probe(dev, ret, "Cannot get rs485-term-gpios\n");
3453
3323
}
3324
+
if (port->rs485_term_gpio)
3325
+
port->rs485_supported.flags |= SER_RS485_TERMINATE_BUS;
3454
3326
3455
3327
return 0;
3456
3328
}
3457
3329
EXPORT_SYMBOL_GPL(uart_get_rs485_mode);
3330
+
3331
+
/* Compile-time assertions for serial_rs485 layout */
3332
+
static_assert(offsetof(struct serial_rs485, padding) ==
3333
+
(offsetof(struct serial_rs485, delay_rts_after_send) + sizeof(__u32)));
3334
+
static_assert(offsetof(struct serial_rs485, padding1) ==
3335
+
offsetof(struct serial_rs485, padding[1]));
3336
+
static_assert((offsetof(struct serial_rs485, padding[4]) + sizeof(__u32)) ==
3337
+
sizeof(struct serial_rs485));
3458
3338
3459
3339
MODULE_DESCRIPTION("Serial driver core");
3460
3340
MODULE_LICENSE("GPL");
+48
drivers/tty/serial/serial_mctrl_gpio.c
+48
drivers/tty/serial/serial_mctrl_gpio.c
···
42
42
return mctrl_gpios_desc[idx].flags & GPIOD_FLAGS_BIT_DIR_OUT;
43
43
}
44
44
45
+
/**
46
+
* mctrl_gpio_set - set gpios according to mctrl state
47
+
* @gpios: gpios to set
48
+
* @mctrl: state to set
49
+
*
50
+
* Set the gpios according to the mctrl state.
51
+
*/
45
52
void mctrl_gpio_set(struct mctrl_gpios *gpios, unsigned int mctrl)
46
53
{
47
54
enum mctrl_gpio_idx i;
···
70
63
}
71
64
EXPORT_SYMBOL_GPL(mctrl_gpio_set);
72
65
66
+
/**
67
+
* mctrl_gpio_to_gpiod - obtain gpio_desc of modem line index
68
+
* @gpios: gpios to look into
69
+
* @gidx: index of the modem line
70
+
* Returns: the gpio_desc structure associated to the modem line index
71
+
*/
73
72
struct gpio_desc *mctrl_gpio_to_gpiod(struct mctrl_gpios *gpios,
74
73
enum mctrl_gpio_idx gidx)
75
74
{
···
86
73
}
87
74
EXPORT_SYMBOL_GPL(mctrl_gpio_to_gpiod);
88
75
76
+
/**
77
+
* mctrl_gpio_get - update mctrl with the gpios values.
78
+
* @gpios: gpios to get the info from
79
+
* @mctrl: mctrl to set
80
+
* Returns: modified mctrl (the same value as in @mctrl)
81
+
*
82
+
* Update mctrl with the gpios values.
83
+
*/
89
84
unsigned int mctrl_gpio_get(struct mctrl_gpios *gpios, unsigned int *mctrl)
90
85
{
91
86
enum mctrl_gpio_idx i;
···
210
189
return IRQ_HANDLED;
211
190
}
212
191
192
+
/**
193
+
* mctrl_gpio_init - initialize uart gpios
194
+
* @port: port to initialize gpios for
195
+
* @idx: index of the gpio in the @port's device
196
+
*
197
+
* This will get the {cts,rts,...}-gpios from device tree if they are present
198
+
* and request them, set direction etc, and return an allocated structure.
199
+
* `devm_*` functions are used, so there's no need to call mctrl_gpio_free().
200
+
* As this sets up the irq handling, make sure to not handle changes to the
201
+
* gpio input lines in your driver, too.
202
+
*/
213
203
struct mctrl_gpios *mctrl_gpio_init(struct uart_port *port, unsigned int idx)
214
204
{
215
205
struct mctrl_gpios *gpios;
···
267
235
}
268
236
EXPORT_SYMBOL_GPL(mctrl_gpio_init);
269
237
238
+
/**
239
+
* mctrl_gpio_free - explicitly free uart gpios
240
+
* @dev: uart port's device
241
+
* @gpios: gpios structure to be freed
242
+
*
243
+
* This will free the requested gpios in mctrl_gpio_init(). As `devm_*`
244
+
* functions are used, there's generally no need to call this function.
245
+
*/
270
246
void mctrl_gpio_free(struct device *dev, struct mctrl_gpios *gpios)
271
247
{
272
248
enum mctrl_gpio_idx i;
···
293
253
}
294
254
EXPORT_SYMBOL_GPL(mctrl_gpio_free);
295
255
256
+
/**
257
+
* mctrl_gpio_enable_ms - enable irqs and handling of changes to the ms lines
258
+
* @gpios: gpios to enable
259
+
*/
296
260
void mctrl_gpio_enable_ms(struct mctrl_gpios *gpios)
297
261
{
298
262
enum mctrl_gpio_idx i;
···
322
278
}
323
279
EXPORT_SYMBOL_GPL(mctrl_gpio_enable_ms);
324
280
281
+
/**
282
+
* mctrl_gpio_disable_ms - disable irqs and handling of changes to the ms lines
283
+
* @gpios: gpios to disable
284
+
*/
325
285
void mctrl_gpio_disable_ms(struct mctrl_gpios *gpios)
326
286
{
327
287
enum mctrl_gpio_idx i;
-10
drivers/tty/serial/sifive.c
-10
drivers/tty/serial/sifive.c
···
4
4
* Copyright (C) 2018 Paul Walmsley <paul@pwsan.com>
5
5
* Copyright (C) 2018-2019 SiFive
6
6
*
7
-
* This program is free software; you can redistribute it and/or modify
8
-
* it under the terms of the GNU General Public License as published by
9
-
* the Free Software Foundation; either version 2 of the License, or
10
-
* (at your option) any later version.
11
-
*
12
-
* This program is distributed in the hope that it will be useful,
13
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
14
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15
-
* GNU General Public License for more details.
16
-
*
17
7
* Based partially on:
18
8
* - drivers/tty/serial/pxa.c
19
9
* - drivers/tty/serial/amba-pl011.c
-1
drivers/tty/serial/st-asc.c
-1
drivers/tty/serial/st-asc.c
+78
-1
drivers/tty/serial/stm32-usart.c
+78
-1
drivers/tty/serial/stm32-usart.c
···
35
35
#include "serial_mctrl_gpio.h"
36
36
#include "stm32-usart.h"
37
37
38
+
39
+
/* Register offsets */
40
+
static struct stm32_usart_info stm32f4_info = {
41
+
.ofs = {
42
+
.isr = 0x00,
43
+
.rdr = 0x04,
44
+
.tdr = 0x04,
45
+
.brr = 0x08,
46
+
.cr1 = 0x0c,
47
+
.cr2 = 0x10,
48
+
.cr3 = 0x14,
49
+
.gtpr = 0x18,
50
+
.rtor = UNDEF_REG,
51
+
.rqr = UNDEF_REG,
52
+
.icr = UNDEF_REG,
53
+
},
54
+
.cfg = {
55
+
.uart_enable_bit = 13,
56
+
.has_7bits_data = false,
57
+
.fifosize = 1,
58
+
}
59
+
};
60
+
61
+
static struct stm32_usart_info stm32f7_info = {
62
+
.ofs = {
63
+
.cr1 = 0x00,
64
+
.cr2 = 0x04,
65
+
.cr3 = 0x08,
66
+
.brr = 0x0c,
67
+
.gtpr = 0x10,
68
+
.rtor = 0x14,
69
+
.rqr = 0x18,
70
+
.isr = 0x1c,
71
+
.icr = 0x20,
72
+
.rdr = 0x24,
73
+
.tdr = 0x28,
74
+
},
75
+
.cfg = {
76
+
.uart_enable_bit = 0,
77
+
.has_7bits_data = true,
78
+
.has_swap = true,
79
+
.fifosize = 1,
80
+
}
81
+
};
82
+
83
+
static struct stm32_usart_info stm32h7_info = {
84
+
.ofs = {
85
+
.cr1 = 0x00,
86
+
.cr2 = 0x04,
87
+
.cr3 = 0x08,
88
+
.brr = 0x0c,
89
+
.gtpr = 0x10,
90
+
.rtor = 0x14,
91
+
.rqr = 0x18,
92
+
.isr = 0x1c,
93
+
.icr = 0x20,
94
+
.rdr = 0x24,
95
+
.tdr = 0x28,
96
+
},
97
+
.cfg = {
98
+
.uart_enable_bit = 0,
99
+
.has_7bits_data = true,
100
+
.has_swap = true,
101
+
.has_wakeup = true,
102
+
.has_fifo = true,
103
+
.fifosize = 16,
104
+
}
105
+
};
106
+
38
107
static void stm32_usart_stop_tx(struct uart_port *port);
39
108
static void stm32_usart_transmit_chars(struct uart_port *port);
40
109
static void __maybe_unused stm32_usart_console_putchar(struct uart_port *port, unsigned char ch);
···
168
99
*cr1 |= rs485_deat_dedt;
169
100
}
170
101
171
-
static int stm32_usart_config_rs485(struct uart_port *port,
102
+
static int stm32_usart_config_rs485(struct uart_port *port, struct ktermios *termios,
172
103
struct serial_rs485 *rs485conf)
173
104
{
174
105
struct stm32_port *stm32_port = to_stm32_port(port);
···
1446
1377
clk_disable_unprepare(stm32port->clk);
1447
1378
}
1448
1379
1380
+
static const struct serial_rs485 stm32_rs485_supported = {
1381
+
.flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND |
1382
+
SER_RS485_RX_DURING_TX,
1383
+
.delay_rts_before_send = 1,
1384
+
.delay_rts_after_send = 1,
1385
+
};
1386
+
1449
1387
static int stm32_usart_init_port(struct stm32_port *stm32port,
1450
1388
struct platform_device *pdev)
1451
1389
{
···
1472
1396
port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_STM32_CONSOLE);
1473
1397
port->irq = irq;
1474
1398
port->rs485_config = stm32_usart_config_rs485;
1399
+
port->rs485_supported = stm32_rs485_supported;
1475
1400
1476
1401
ret = stm32_usart_init_rs485(port, pdev);
1477
1402
if (ret)
-68
drivers/tty/serial/stm32-usart.h
-68
drivers/tty/serial/stm32-usart.h
···
38
38
39
39
#define UNDEF_REG 0xff
40
40
41
-
/* Register offsets */
42
-
struct stm32_usart_info stm32f4_info = {
43
-
.ofs = {
44
-
.isr = 0x00,
45
-
.rdr = 0x04,
46
-
.tdr = 0x04,
47
-
.brr = 0x08,
48
-
.cr1 = 0x0c,
49
-
.cr2 = 0x10,
50
-
.cr3 = 0x14,
51
-
.gtpr = 0x18,
52
-
.rtor = UNDEF_REG,
53
-
.rqr = UNDEF_REG,
54
-
.icr = UNDEF_REG,
55
-
},
56
-
.cfg = {
57
-
.uart_enable_bit = 13,
58
-
.has_7bits_data = false,
59
-
.fifosize = 1,
60
-
}
61
-
};
62
-
63
-
struct stm32_usart_info stm32f7_info = {
64
-
.ofs = {
65
-
.cr1 = 0x00,
66
-
.cr2 = 0x04,
67
-
.cr3 = 0x08,
68
-
.brr = 0x0c,
69
-
.gtpr = 0x10,
70
-
.rtor = 0x14,
71
-
.rqr = 0x18,
72
-
.isr = 0x1c,
73
-
.icr = 0x20,
74
-
.rdr = 0x24,
75
-
.tdr = 0x28,
76
-
},
77
-
.cfg = {
78
-
.uart_enable_bit = 0,
79
-
.has_7bits_data = true,
80
-
.has_swap = true,
81
-
.fifosize = 1,
82
-
}
83
-
};
84
-
85
-
struct stm32_usart_info stm32h7_info = {
86
-
.ofs = {
87
-
.cr1 = 0x00,
88
-
.cr2 = 0x04,
89
-
.cr3 = 0x08,
90
-
.brr = 0x0c,
91
-
.gtpr = 0x10,
92
-
.rtor = 0x14,
93
-
.rqr = 0x18,
94
-
.isr = 0x1c,
95
-
.icr = 0x20,
96
-
.rdr = 0x24,
97
-
.tdr = 0x28,
98
-
},
99
-
.cfg = {
100
-
.uart_enable_bit = 0,
101
-
.has_7bits_data = true,
102
-
.has_swap = true,
103
-
.has_wakeup = true,
104
-
.has_fifo = true,
105
-
.fifosize = 16,
106
-
}
107
-
};
108
-
109
41
/* USART_SR (F4) / USART_ISR (F7) */
110
42
#define USART_SR_PE BIT(0)
111
43
#define USART_SR_FE BIT(1)
+1
-3
drivers/tty/serial/sunsu.c
+1
-3
drivers/tty/serial/sunsu.c
···
1249
1249
1250
1250
#ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1251
1251
1252
-
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1253
-
1254
1252
/*
1255
1253
* Wait for transmitter & holding register to empty
1256
1254
*/
···
1266
1268
if (--tmout == 0)
1267
1269
break;
1268
1270
udelay(1);
1269
-
} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1271
+
} while (!uart_lsr_tx_empty(status));
1270
1272
1271
1273
/* Wait up to 1s for flow control if necessary */
1272
1274
if (up->port.flags & UPF_CONS_FLOW) {
+2
drivers/tty/serial/ucc_uart.c
+2
drivers/tty/serial/ucc_uart.c
-934
drivers/tty/serial/vr41xx_siu.c
-934
drivers/tty/serial/vr41xx_siu.c
···
1
-
// SPDX-License-Identifier: GPL-2.0+
2
-
/*
3
-
* Driver for NEC VR4100 series Serial Interface Unit.
4
-
*
5
-
* Copyright (C) 2004-2008 Yoichi Yuasa <yuasa@linux-mips.org>
6
-
*
7
-
* Based on drivers/serial/8250.c, by Russell King.
8
-
*/
9
-
10
-
#include <linux/console.h>
11
-
#include <linux/errno.h>
12
-
#include <linux/init.h>
13
-
#include <linux/interrupt.h>
14
-
#include <linux/ioport.h>
15
-
#include <linux/module.h>
16
-
#include <linux/platform_device.h>
17
-
#include <linux/serial.h>
18
-
#include <linux/serial_core.h>
19
-
#include <linux/serial_reg.h>
20
-
#include <linux/tty.h>
21
-
#include <linux/tty_flip.h>
22
-
23
-
#include <linux/io.h>
24
-
#include <asm/vr41xx/siu.h>
25
-
#include <asm/vr41xx/vr41xx.h>
26
-
27
-
#define SIU_BAUD_BASE 1152000
28
-
#define SIU_MAJOR 204
29
-
#define SIU_MINOR_BASE 82
30
-
31
-
#define RX_MAX_COUNT 256
32
-
#define TX_MAX_COUNT 15
33
-
34
-
#define SIUIRSEL 0x08
35
-
#define TMICMODE 0x20
36
-
#define TMICTX 0x10
37
-
#define IRMSEL 0x0c
38
-
#define IRMSEL_HP 0x08
39
-
#define IRMSEL_TEMIC 0x04
40
-
#define IRMSEL_SHARP 0x00
41
-
#define IRUSESEL 0x02
42
-
#define SIRSEL 0x01
43
-
44
-
static struct uart_port siu_uart_ports[SIU_PORTS_MAX] = {
45
-
[0 ... SIU_PORTS_MAX-1] = {
46
-
.lock = __SPIN_LOCK_UNLOCKED(siu_uart_ports->lock),
47
-
.irq = 0,
48
-
},
49
-
};
50
-
51
-
#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
52
-
static uint8_t lsr_break_flag[SIU_PORTS_MAX];
53
-
#endif
54
-
55
-
#define siu_read(port, offset) readb((port)->membase + (offset))
56
-
#define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
57
-
58
-
void vr41xx_select_siu_interface(siu_interface_t interface)
59
-
{
60
-
struct uart_port *port;
61
-
unsigned long flags;
62
-
uint8_t irsel;
63
-
64
-
port = &siu_uart_ports[0];
65
-
66
-
spin_lock_irqsave(&port->lock, flags);
67
-
68
-
irsel = siu_read(port, SIUIRSEL);
69
-
if (interface == SIU_INTERFACE_IRDA)
70
-
irsel |= SIRSEL;
71
-
else
72
-
irsel &= ~SIRSEL;
73
-
siu_write(port, SIUIRSEL, irsel);
74
-
75
-
spin_unlock_irqrestore(&port->lock, flags);
76
-
}
77
-
EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
78
-
79
-
void vr41xx_use_irda(irda_use_t use)
80
-
{
81
-
struct uart_port *port;
82
-
unsigned long flags;
83
-
uint8_t irsel;
84
-
85
-
port = &siu_uart_ports[0];
86
-
87
-
spin_lock_irqsave(&port->lock, flags);
88
-
89
-
irsel = siu_read(port, SIUIRSEL);
90
-
if (use == FIR_USE_IRDA)
91
-
irsel |= IRUSESEL;
92
-
else
93
-
irsel &= ~IRUSESEL;
94
-
siu_write(port, SIUIRSEL, irsel);
95
-
96
-
spin_unlock_irqrestore(&port->lock, flags);
97
-
}
98
-
EXPORT_SYMBOL_GPL(vr41xx_use_irda);
99
-
100
-
void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
101
-
{
102
-
struct uart_port *port;
103
-
unsigned long flags;
104
-
uint8_t irsel;
105
-
106
-
port = &siu_uart_ports[0];
107
-
108
-
spin_lock_irqsave(&port->lock, flags);
109
-
110
-
irsel = siu_read(port, SIUIRSEL);
111
-
irsel &= ~(IRMSEL | TMICTX | TMICMODE);
112
-
switch (module) {
113
-
case SHARP_IRDA:
114
-
irsel |= IRMSEL_SHARP;
115
-
break;
116
-
case TEMIC_IRDA:
117
-
irsel |= IRMSEL_TEMIC | TMICMODE;
118
-
if (speed == IRDA_TX_4MBPS)
119
-
irsel |= TMICTX;
120
-
break;
121
-
case HP_IRDA:
122
-
irsel |= IRMSEL_HP;
123
-
break;
124
-
default:
125
-
break;
126
-
}
127
-
siu_write(port, SIUIRSEL, irsel);
128
-
129
-
spin_unlock_irqrestore(&port->lock, flags);
130
-
}
131
-
EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
132
-
133
-
static inline void siu_clear_fifo(struct uart_port *port)
134
-
{
135
-
siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
136
-
siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
137
-
UART_FCR_CLEAR_XMIT);
138
-
siu_write(port, UART_FCR, 0);
139
-
}
140
-
141
-
static inline unsigned long siu_port_size(struct uart_port *port)
142
-
{
143
-
switch (port->type) {
144
-
case PORT_VR41XX_SIU:
145
-
return 11UL;
146
-
case PORT_VR41XX_DSIU:
147
-
return 8UL;
148
-
}
149
-
150
-
return 0;
151
-
}
152
-
153
-
static inline unsigned int siu_check_type(struct uart_port *port)
154
-
{
155
-
if (port->line == 0)
156
-
return PORT_VR41XX_SIU;
157
-
if (port->line == 1 && port->irq)
158
-
return PORT_VR41XX_DSIU;
159
-
160
-
return PORT_UNKNOWN;
161
-
}
162
-
163
-
static inline const char *siu_type_name(struct uart_port *port)
164
-
{
165
-
switch (port->type) {
166
-
case PORT_VR41XX_SIU:
167
-
return "SIU";
168
-
case PORT_VR41XX_DSIU:
169
-
return "DSIU";
170
-
}
171
-
172
-
return NULL;
173
-
}
174
-
175
-
static unsigned int siu_tx_empty(struct uart_port *port)
176
-
{
177
-
uint8_t lsr;
178
-
179
-
lsr = siu_read(port, UART_LSR);
180
-
if (lsr & UART_LSR_TEMT)
181
-
return TIOCSER_TEMT;
182
-
183
-
return 0;
184
-
}
185
-
186
-
static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
187
-
{
188
-
uint8_t mcr = 0;
189
-
190
-
if (mctrl & TIOCM_DTR)
191
-
mcr |= UART_MCR_DTR;
192
-
if (mctrl & TIOCM_RTS)
193
-
mcr |= UART_MCR_RTS;
194
-
if (mctrl & TIOCM_OUT1)
195
-
mcr |= UART_MCR_OUT1;
196
-
if (mctrl & TIOCM_OUT2)
197
-
mcr |= UART_MCR_OUT2;
198
-
if (mctrl & TIOCM_LOOP)
199
-
mcr |= UART_MCR_LOOP;
200
-
201
-
siu_write(port, UART_MCR, mcr);
202
-
}
203
-
204
-
static unsigned int siu_get_mctrl(struct uart_port *port)
205
-
{
206
-
uint8_t msr;
207
-
unsigned int mctrl = 0;
208
-
209
-
msr = siu_read(port, UART_MSR);
210
-
if (msr & UART_MSR_DCD)
211
-
mctrl |= TIOCM_CAR;
212
-
if (msr & UART_MSR_RI)
213
-
mctrl |= TIOCM_RNG;
214
-
if (msr & UART_MSR_DSR)
215
-
mctrl |= TIOCM_DSR;
216
-
if (msr & UART_MSR_CTS)
217
-
mctrl |= TIOCM_CTS;
218
-
219
-
return mctrl;
220
-
}
221
-
222
-
static void siu_stop_tx(struct uart_port *port)
223
-
{
224
-
unsigned long flags;
225
-
uint8_t ier;
226
-
227
-
spin_lock_irqsave(&port->lock, flags);
228
-
229
-
ier = siu_read(port, UART_IER);
230
-
ier &= ~UART_IER_THRI;
231
-
siu_write(port, UART_IER, ier);
232
-
233
-
spin_unlock_irqrestore(&port->lock, flags);
234
-
}
235
-
236
-
static void siu_start_tx(struct uart_port *port)
237
-
{
238
-
unsigned long flags;
239
-
uint8_t ier;
240
-
241
-
spin_lock_irqsave(&port->lock, flags);
242
-
243
-
ier = siu_read(port, UART_IER);
244
-
ier |= UART_IER_THRI;
245
-
siu_write(port, UART_IER, ier);
246
-
247
-
spin_unlock_irqrestore(&port->lock, flags);
248
-
}
249
-
250
-
static void siu_stop_rx(struct uart_port *port)
251
-
{
252
-
unsigned long flags;
253
-
uint8_t ier;
254
-
255
-
spin_lock_irqsave(&port->lock, flags);
256
-
257
-
ier = siu_read(port, UART_IER);
258
-
ier &= ~UART_IER_RLSI;
259
-
siu_write(port, UART_IER, ier);
260
-
261
-
port->read_status_mask &= ~UART_LSR_DR;
262
-
263
-
spin_unlock_irqrestore(&port->lock, flags);
264
-
}
265
-
266
-
static void siu_enable_ms(struct uart_port *port)
267
-
{
268
-
unsigned long flags;
269
-
uint8_t ier;
270
-
271
-
spin_lock_irqsave(&port->lock, flags);
272
-
273
-
ier = siu_read(port, UART_IER);
274
-
ier |= UART_IER_MSI;
275
-
siu_write(port, UART_IER, ier);
276
-
277
-
spin_unlock_irqrestore(&port->lock, flags);
278
-
}
279
-
280
-
static void siu_break_ctl(struct uart_port *port, int ctl)
281
-
{
282
-
unsigned long flags;
283
-
uint8_t lcr;
284
-
285
-
spin_lock_irqsave(&port->lock, flags);
286
-
287
-
lcr = siu_read(port, UART_LCR);
288
-
if (ctl == -1)
289
-
lcr |= UART_LCR_SBC;
290
-
else
291
-
lcr &= ~UART_LCR_SBC;
292
-
siu_write(port, UART_LCR, lcr);
293
-
294
-
spin_unlock_irqrestore(&port->lock, flags);
295
-
}
296
-
297
-
static inline void receive_chars(struct uart_port *port, uint8_t *status)
298
-
{
299
-
uint8_t lsr, ch;
300
-
char flag;
301
-
int max_count = RX_MAX_COUNT;
302
-
303
-
lsr = *status;
304
-
305
-
do {
306
-
ch = siu_read(port, UART_RX);
307
-
port->icount.rx++;
308
-
flag = TTY_NORMAL;
309
-
310
-
#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
311
-
lsr |= lsr_break_flag[port->line];
312
-
lsr_break_flag[port->line] = 0;
313
-
#endif
314
-
if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
315
-
UART_LSR_PE | UART_LSR_OE))) {
316
-
if (lsr & UART_LSR_BI) {
317
-
lsr &= ~(UART_LSR_FE | UART_LSR_PE);
318
-
port->icount.brk++;
319
-
320
-
if (uart_handle_break(port))
321
-
goto ignore_char;
322
-
}
323
-
324
-
if (lsr & UART_LSR_FE)
325
-
port->icount.frame++;
326
-
if (lsr & UART_LSR_PE)
327
-
port->icount.parity++;
328
-
if (lsr & UART_LSR_OE)
329
-
port->icount.overrun++;
330
-
331
-
lsr &= port->read_status_mask;
332
-
if (lsr & UART_LSR_BI)
333
-
flag = TTY_BREAK;
334
-
if (lsr & UART_LSR_FE)
335
-
flag = TTY_FRAME;
336
-
if (lsr & UART_LSR_PE)
337
-
flag = TTY_PARITY;
338
-
}
339
-
340
-
if (uart_handle_sysrq_char(port, ch))
341
-
goto ignore_char;
342
-
343
-
uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
344
-
345
-
ignore_char:
346
-
lsr = siu_read(port, UART_LSR);
347
-
} while ((lsr & UART_LSR_DR) && (max_count-- > 0));
348
-
349
-
tty_flip_buffer_push(&port->state->port);
350
-
351
-
*status = lsr;
352
-
}
353
-
354
-
static inline void check_modem_status(struct uart_port *port)
355
-
{
356
-
uint8_t msr;
357
-
358
-
msr = siu_read(port, UART_MSR);
359
-
if ((msr & UART_MSR_ANY_DELTA) == 0)
360
-
return;
361
-
if (msr & UART_MSR_DDCD)
362
-
uart_handle_dcd_change(port, msr & UART_MSR_DCD);
363
-
if (msr & UART_MSR_TERI)
364
-
port->icount.rng++;
365
-
if (msr & UART_MSR_DDSR)
366
-
port->icount.dsr++;
367
-
if (msr & UART_MSR_DCTS)
368
-
uart_handle_cts_change(port, msr & UART_MSR_CTS);
369
-
370
-
wake_up_interruptible(&port->state->port.delta_msr_wait);
371
-
}
372
-
373
-
static inline void transmit_chars(struct uart_port *port)
374
-
{
375
-
struct circ_buf *xmit;
376
-
int max_count = TX_MAX_COUNT;
377
-
378
-
xmit = &port->state->xmit;
379
-
380
-
if (port->x_char) {
381
-
siu_write(port, UART_TX, port->x_char);
382
-
port->icount.tx++;
383
-
port->x_char = 0;
384
-
return;
385
-
}
386
-
387
-
if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
388
-
siu_stop_tx(port);
389
-
return;
390
-
}
391
-
392
-
do {
393
-
siu_write(port, UART_TX, xmit->buf[xmit->tail]);
394
-
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
395
-
port->icount.tx++;
396
-
if (uart_circ_empty(xmit))
397
-
break;
398
-
} while (max_count-- > 0);
399
-
400
-
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
401
-
uart_write_wakeup(port);
402
-
403
-
if (uart_circ_empty(xmit))
404
-
siu_stop_tx(port);
405
-
}
406
-
407
-
static irqreturn_t siu_interrupt(int irq, void *dev_id)
408
-
{
409
-
struct uart_port *port;
410
-
uint8_t iir, lsr;
411
-
412
-
port = (struct uart_port *)dev_id;
413
-
414
-
iir = siu_read(port, UART_IIR);
415
-
if (iir & UART_IIR_NO_INT)
416
-
return IRQ_NONE;
417
-
418
-
lsr = siu_read(port, UART_LSR);
419
-
if (lsr & UART_LSR_DR)
420
-
receive_chars(port, &lsr);
421
-
422
-
check_modem_status(port);
423
-
424
-
if (lsr & UART_LSR_THRE)
425
-
transmit_chars(port);
426
-
427
-
return IRQ_HANDLED;
428
-
}
429
-
430
-
static int siu_startup(struct uart_port *port)
431
-
{
432
-
int retval;
433
-
434
-
if (port->membase == NULL)
435
-
return -ENODEV;
436
-
437
-
siu_clear_fifo(port);
438
-
439
-
(void)siu_read(port, UART_LSR);
440
-
(void)siu_read(port, UART_RX);
441
-
(void)siu_read(port, UART_IIR);
442
-
(void)siu_read(port, UART_MSR);
443
-
444
-
if (siu_read(port, UART_LSR) == 0xff)
445
-
return -ENODEV;
446
-
447
-
retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
448
-
if (retval)
449
-
return retval;
450
-
451
-
if (port->type == PORT_VR41XX_DSIU)
452
-
vr41xx_enable_dsiuint(DSIUINT_ALL);
453
-
454
-
siu_write(port, UART_LCR, UART_LCR_WLEN8);
455
-
456
-
spin_lock_irq(&port->lock);
457
-
siu_set_mctrl(port, port->mctrl);
458
-
spin_unlock_irq(&port->lock);
459
-
460
-
siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
461
-
462
-
(void)siu_read(port, UART_LSR);
463
-
(void)siu_read(port, UART_RX);
464
-
(void)siu_read(port, UART_IIR);
465
-
(void)siu_read(port, UART_MSR);
466
-
467
-
return 0;
468
-
}
469
-
470
-
static void siu_shutdown(struct uart_port *port)
471
-
{
472
-
unsigned long flags;
473
-
uint8_t lcr;
474
-
475
-
siu_write(port, UART_IER, 0);
476
-
477
-
spin_lock_irqsave(&port->lock, flags);
478
-
479
-
port->mctrl &= ~TIOCM_OUT2;
480
-
siu_set_mctrl(port, port->mctrl);
481
-
482
-
spin_unlock_irqrestore(&port->lock, flags);
483
-
484
-
lcr = siu_read(port, UART_LCR);
485
-
lcr &= ~UART_LCR_SBC;
486
-
siu_write(port, UART_LCR, lcr);
487
-
488
-
siu_clear_fifo(port);
489
-
490
-
(void)siu_read(port, UART_RX);
491
-
492
-
if (port->type == PORT_VR41XX_DSIU)
493
-
vr41xx_disable_dsiuint(DSIUINT_ALL);
494
-
495
-
free_irq(port->irq, port);
496
-
}
497
-
498
-
static void siu_set_termios(struct uart_port *port, struct ktermios *new,
499
-
struct ktermios *old)
500
-
{
501
-
tcflag_t c_cflag, c_iflag;
502
-
uint8_t lcr, fcr, ier;
503
-
unsigned int baud, quot;
504
-
unsigned long flags;
505
-
506
-
c_cflag = new->c_cflag;
507
-
lcr = UART_LCR_WLEN(tty_get_char_size(c_cflag));
508
-
509
-
if (c_cflag & CSTOPB)
510
-
lcr |= UART_LCR_STOP;
511
-
if (c_cflag & PARENB)
512
-
lcr |= UART_LCR_PARITY;
513
-
if ((c_cflag & PARODD) != PARODD)
514
-
lcr |= UART_LCR_EPAR;
515
-
if (c_cflag & CMSPAR)
516
-
lcr |= UART_LCR_SPAR;
517
-
518
-
baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
519
-
quot = uart_get_divisor(port, baud);
520
-
521
-
fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
522
-
523
-
spin_lock_irqsave(&port->lock, flags);
524
-
525
-
uart_update_timeout(port, c_cflag, baud);
526
-
527
-
c_iflag = new->c_iflag;
528
-
529
-
port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
530
-
if (c_iflag & INPCK)
531
-
port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
532
-
if (c_iflag & (IGNBRK | BRKINT | PARMRK))
533
-
port->read_status_mask |= UART_LSR_BI;
534
-
535
-
port->ignore_status_mask = 0;
536
-
if (c_iflag & IGNPAR)
537
-
port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
538
-
if (c_iflag & IGNBRK) {
539
-
port->ignore_status_mask |= UART_LSR_BI;
540
-
if (c_iflag & IGNPAR)
541
-
port->ignore_status_mask |= UART_LSR_OE;
542
-
}
543
-
544
-
if ((c_cflag & CREAD) == 0)
545
-
port->ignore_status_mask |= UART_LSR_DR;
546
-
547
-
ier = siu_read(port, UART_IER);
548
-
ier &= ~UART_IER_MSI;
549
-
if (UART_ENABLE_MS(port, c_cflag))
550
-
ier |= UART_IER_MSI;
551
-
siu_write(port, UART_IER, ier);
552
-
553
-
siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
554
-
555
-
siu_write(port, UART_DLL, (uint8_t)quot);
556
-
siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
557
-
558
-
siu_write(port, UART_LCR, lcr);
559
-
560
-
siu_write(port, UART_FCR, fcr);
561
-
562
-
siu_set_mctrl(port, port->mctrl);
563
-
564
-
spin_unlock_irqrestore(&port->lock, flags);
565
-
}
566
-
567
-
static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
568
-
{
569
-
switch (state) {
570
-
case 0:
571
-
switch (port->type) {
572
-
case PORT_VR41XX_SIU:
573
-
vr41xx_supply_clock(SIU_CLOCK);
574
-
break;
575
-
case PORT_VR41XX_DSIU:
576
-
vr41xx_supply_clock(DSIU_CLOCK);
577
-
break;
578
-
}
579
-
break;
580
-
case 3:
581
-
switch (port->type) {
582
-
case PORT_VR41XX_SIU:
583
-
vr41xx_mask_clock(SIU_CLOCK);
584
-
break;
585
-
case PORT_VR41XX_DSIU:
586
-
vr41xx_mask_clock(DSIU_CLOCK);
587
-
break;
588
-
}
589
-
break;
590
-
}
591
-
}
592
-
593
-
static const char *siu_type(struct uart_port *port)
594
-
{
595
-
return siu_type_name(port);
596
-
}
597
-
598
-
static void siu_release_port(struct uart_port *port)
599
-
{
600
-
unsigned long size;
601
-
602
-
if (port->flags & UPF_IOREMAP) {
603
-
iounmap(port->membase);
604
-
port->membase = NULL;
605
-
}
606
-
607
-
size = siu_port_size(port);
608
-
release_mem_region(port->mapbase, size);
609
-
}
610
-
611
-
static int siu_request_port(struct uart_port *port)
612
-
{
613
-
unsigned long size;
614
-
struct resource *res;
615
-
616
-
size = siu_port_size(port);
617
-
res = request_mem_region(port->mapbase, size, siu_type_name(port));
618
-
if (res == NULL)
619
-
return -EBUSY;
620
-
621
-
if (port->flags & UPF_IOREMAP) {
622
-
port->membase = ioremap(port->mapbase, size);
623
-
if (port->membase == NULL) {
624
-
release_resource(res);
625
-
return -ENOMEM;
626
-
}
627
-
}
628
-
629
-
return 0;
630
-
}
631
-
632
-
static void siu_config_port(struct uart_port *port, int flags)
633
-
{
634
-
if (flags & UART_CONFIG_TYPE) {
635
-
port->type = siu_check_type(port);
636
-
(void)siu_request_port(port);
637
-
}
638
-
}
639
-
640
-
static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
641
-
{
642
-
if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
643
-
return -EINVAL;
644
-
if (port->irq != serial->irq)
645
-
return -EINVAL;
646
-
if (port->iotype != serial->io_type)
647
-
return -EINVAL;
648
-
if (port->mapbase != (unsigned long)serial->iomem_base)
649
-
return -EINVAL;
650
-
651
-
return 0;
652
-
}
653
-
654
-
static const struct uart_ops siu_uart_ops = {
655
-
.tx_empty = siu_tx_empty,
656
-
.set_mctrl = siu_set_mctrl,
657
-
.get_mctrl = siu_get_mctrl,
658
-
.stop_tx = siu_stop_tx,
659
-
.start_tx = siu_start_tx,
660
-
.stop_rx = siu_stop_rx,
661
-
.enable_ms = siu_enable_ms,
662
-
.break_ctl = siu_break_ctl,
663
-
.startup = siu_startup,
664
-
.shutdown = siu_shutdown,
665
-
.set_termios = siu_set_termios,
666
-
.pm = siu_pm,
667
-
.type = siu_type,
668
-
.release_port = siu_release_port,
669
-
.request_port = siu_request_port,
670
-
.config_port = siu_config_port,
671
-
.verify_port = siu_verify_port,
672
-
};
673
-
674
-
static int siu_init_ports(struct platform_device *pdev)
675
-
{
676
-
struct uart_port *port;
677
-
struct resource *res;
678
-
int *type = dev_get_platdata(&pdev->dev);
679
-
int i;
680
-
681
-
if (!type)
682
-
return 0;
683
-
684
-
port = siu_uart_ports;
685
-
for (i = 0; i < SIU_PORTS_MAX; i++) {
686
-
port->type = type[i];
687
-
if (port->type == PORT_UNKNOWN)
688
-
continue;
689
-
port->irq = platform_get_irq(pdev, i);
690
-
port->uartclk = SIU_BAUD_BASE * 16;
691
-
port->fifosize = 16;
692
-
port->regshift = 0;
693
-
port->iotype = UPIO_MEM;
694
-
port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
695
-
port->line = i;
696
-
res = platform_get_resource(pdev, IORESOURCE_MEM, i);
697
-
port->mapbase = res->start;
698
-
port++;
699
-
}
700
-
701
-
return i;
702
-
}
703
-
704
-
#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
705
-
706
-
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
707
-
708
-
static void wait_for_xmitr(struct uart_port *port)
709
-
{
710
-
int timeout = 10000;
711
-
uint8_t lsr, msr;
712
-
713
-
do {
714
-
lsr = siu_read(port, UART_LSR);
715
-
if (lsr & UART_LSR_BI)
716
-
lsr_break_flag[port->line] = UART_LSR_BI;
717
-
718
-
if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
719
-
break;
720
-
} while (timeout-- > 0);
721
-
722
-
if (port->flags & UPF_CONS_FLOW) {
723
-
timeout = 1000000;
724
-
725
-
do {
726
-
msr = siu_read(port, UART_MSR);
727
-
if ((msr & UART_MSR_CTS) != 0)
728
-
break;
729
-
} while (timeout-- > 0);
730
-
}
731
-
}
732
-
733
-
static void siu_console_putchar(struct uart_port *port, unsigned char ch)
734
-
{
735
-
wait_for_xmitr(port);
736
-
siu_write(port, UART_TX, ch);
737
-
}
738
-
739
-
static void siu_console_write(struct console *con, const char *s, unsigned count)
740
-
{
741
-
struct uart_port *port;
742
-
uint8_t ier;
743
-
744
-
port = &siu_uart_ports[con->index];
745
-
746
-
ier = siu_read(port, UART_IER);
747
-
siu_write(port, UART_IER, 0);
748
-
749
-
uart_console_write(port, s, count, siu_console_putchar);
750
-
751
-
wait_for_xmitr(port);
752
-
siu_write(port, UART_IER, ier);
753
-
}
754
-
755
-
static int __init siu_console_setup(struct console *con, char *options)
756
-
{
757
-
struct uart_port *port;
758
-
int baud = 9600;
759
-
int parity = 'n';
760
-
int bits = 8;
761
-
int flow = 'n';
762
-
763
-
if (con->index >= SIU_PORTS_MAX)
764
-
con->index = 0;
765
-
766
-
port = &siu_uart_ports[con->index];
767
-
if (port->membase == NULL) {
768
-
if (port->mapbase == 0)
769
-
return -ENODEV;
770
-
port->membase = ioremap(port->mapbase, siu_port_size(port));
771
-
}
772
-
773
-
if (port->type == PORT_VR41XX_SIU)
774
-
vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
775
-
776
-
if (options != NULL)
777
-
uart_parse_options(options, &baud, &parity, &bits, &flow);
778
-
779
-
return uart_set_options(port, con, baud, parity, bits, flow);
780
-
}
781
-
782
-
static struct uart_driver siu_uart_driver;
783
-
784
-
static struct console siu_console = {
785
-
.name = "ttyVR",
786
-
.write = siu_console_write,
787
-
.device = uart_console_device,
788
-
.setup = siu_console_setup,
789
-
.flags = CON_PRINTBUFFER,
790
-
.index = -1,
791
-
.data = &siu_uart_driver,
792
-
};
793
-
794
-
static int siu_console_init(void)
795
-
{
796
-
struct uart_port *port;
797
-
int i;
798
-
799
-
for (i = 0; i < SIU_PORTS_MAX; i++) {
800
-
port = &siu_uart_ports[i];
801
-
port->ops = &siu_uart_ops;
802
-
}
803
-
804
-
register_console(&siu_console);
805
-
806
-
return 0;
807
-
}
808
-
809
-
console_initcall(siu_console_init);
810
-
811
-
void __init vr41xx_siu_early_setup(struct uart_port *port)
812
-
{
813
-
if (port->type == PORT_UNKNOWN)
814
-
return;
815
-
816
-
siu_uart_ports[port->line].line = port->line;
817
-
siu_uart_ports[port->line].type = port->type;
818
-
siu_uart_ports[port->line].uartclk = SIU_BAUD_BASE * 16;
819
-
siu_uart_ports[port->line].mapbase = port->mapbase;
820
-
siu_uart_ports[port->line].ops = &siu_uart_ops;
821
-
}
822
-
823
-
#define SERIAL_VR41XX_CONSOLE &siu_console
824
-
#else
825
-
#define SERIAL_VR41XX_CONSOLE NULL
826
-
#endif
827
-
828
-
static struct uart_driver siu_uart_driver = {
829
-
.owner = THIS_MODULE,
830
-
.driver_name = "SIU",
831
-
.dev_name = "ttyVR",
832
-
.major = SIU_MAJOR,
833
-
.minor = SIU_MINOR_BASE,
834
-
.cons = SERIAL_VR41XX_CONSOLE,
835
-
};
836
-
837
-
static int siu_probe(struct platform_device *dev)
838
-
{
839
-
struct uart_port *port;
840
-
int num, i, retval;
841
-
842
-
num = siu_init_ports(dev);
843
-
if (num <= 0)
844
-
return -ENODEV;
845
-
846
-
siu_uart_driver.nr = num;
847
-
retval = uart_register_driver(&siu_uart_driver);
848
-
if (retval)
849
-
return retval;
850
-
851
-
for (i = 0; i < num; i++) {
852
-
port = &siu_uart_ports[i];
853
-
port->ops = &siu_uart_ops;
854
-
port->dev = &dev->dev;
855
-
port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_VR41XX_CONSOLE);
856
-
857
-
retval = uart_add_one_port(&siu_uart_driver, port);
858
-
if (retval < 0) {
859
-
port->dev = NULL;
860
-
break;
861
-
}
862
-
}
863
-
864
-
if (i == 0 && retval < 0) {
865
-
uart_unregister_driver(&siu_uart_driver);
866
-
return retval;
867
-
}
868
-
869
-
return 0;
870
-
}
871
-
872
-
static int siu_remove(struct platform_device *dev)
873
-
{
874
-
struct uart_port *port;
875
-
int i;
876
-
877
-
for (i = 0; i < siu_uart_driver.nr; i++) {
878
-
port = &siu_uart_ports[i];
879
-
if (port->dev == &dev->dev) {
880
-
uart_remove_one_port(&siu_uart_driver, port);
881
-
port->dev = NULL;
882
-
}
883
-
}
884
-
885
-
uart_unregister_driver(&siu_uart_driver);
886
-
887
-
return 0;
888
-
}
889
-
890
-
static int siu_suspend(struct platform_device *dev, pm_message_t state)
891
-
{
892
-
struct uart_port *port;
893
-
int i;
894
-
895
-
for (i = 0; i < siu_uart_driver.nr; i++) {
896
-
port = &siu_uart_ports[i];
897
-
if ((port->type == PORT_VR41XX_SIU ||
898
-
port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
899
-
uart_suspend_port(&siu_uart_driver, port);
900
-
901
-
}
902
-
903
-
return 0;
904
-
}
905
-
906
-
static int siu_resume(struct platform_device *dev)
907
-
{
908
-
struct uart_port *port;
909
-
int i;
910
-
911
-
for (i = 0; i < siu_uart_driver.nr; i++) {
912
-
port = &siu_uart_ports[i];
913
-
if ((port->type == PORT_VR41XX_SIU ||
914
-
port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
915
-
uart_resume_port(&siu_uart_driver, port);
916
-
}
917
-
918
-
return 0;
919
-
}
920
-
921
-
static struct platform_driver siu_device_driver = {
922
-
.probe = siu_probe,
923
-
.remove = siu_remove,
924
-
.suspend = siu_suspend,
925
-
.resume = siu_resume,
926
-
.driver = {
927
-
.name = "SIU",
928
-
},
929
-
};
930
-
931
-
module_platform_driver(siu_device_driver);
932
-
933
-
MODULE_LICENSE("GPL");
934
-
MODULE_ALIAS("platform:SIU");
+50
-9
drivers/tty/tty_buffer.c
+50
-9
drivers/tty/tty_buffer.c
···
5
5
6
6
#include <linux/types.h>
7
7
#include <linux/errno.h>
8
+
#include <linux/minmax.h>
8
9
#include <linux/tty.h>
9
10
#include <linux/tty_driver.h>
10
11
#include <linux/tty_flip.h>
···
105
104
p->size = size;
106
105
p->next = NULL;
107
106
p->commit = 0;
107
+
p->lookahead = 0;
108
108
p->read = 0;
109
109
p->flags = 0;
110
110
}
···
236
234
buf->head = next;
237
235
}
238
236
buf->head->read = buf->head->commit;
237
+
buf->head->lookahead = buf->head->read;
239
238
240
239
if (ld && ld->ops->flush_buffer)
241
240
ld->ops->flush_buffer(tty);
···
279
276
if (n != NULL) {
280
277
n->flags = flags;
281
278
buf->tail = n;
282
-
/* paired w/ acquire in flush_to_ldisc(); ensures
283
-
* flush_to_ldisc() sees buffer data.
279
+
/*
280
+
* Paired w/ acquire in flush_to_ldisc() and lookahead_bufs()
281
+
* ensures they see all buffer data.
284
282
*/
285
283
smp_store_release(&b->commit, b->used);
286
-
/* paired w/ acquire in flush_to_ldisc(); ensures the
287
-
* latest commit value can be read before the head is
288
-
* advanced to the next buffer
284
+
/*
285
+
* Paired w/ acquire in flush_to_ldisc() and lookahead_bufs()
286
+
* ensures the latest commit value can be read before the head
287
+
* is advanced to the next buffer.
289
288
*/
290
289
smp_store_release(&b->next, n);
291
290
} else if (change)
···
464
459
}
465
460
EXPORT_SYMBOL_GPL(tty_ldisc_receive_buf);
466
461
462
+
static void lookahead_bufs(struct tty_port *port, struct tty_buffer *head)
463
+
{
464
+
head->lookahead = max(head->lookahead, head->read);
465
+
466
+
while (head) {
467
+
struct tty_buffer *next;
468
+
unsigned char *p, *f = NULL;
469
+
unsigned int count;
470
+
471
+
/*
472
+
* Paired w/ release in __tty_buffer_request_room();
473
+
* ensures commit value read is not stale if the head
474
+
* is advancing to the next buffer.
475
+
*/
476
+
next = smp_load_acquire(&head->next);
477
+
/*
478
+
* Paired w/ release in __tty_buffer_request_room() or in
479
+
* tty_buffer_flush(); ensures we see the committed buffer data.
480
+
*/
481
+
count = smp_load_acquire(&head->commit) - head->lookahead;
482
+
if (!count) {
483
+
head = next;
484
+
continue;
485
+
}
486
+
487
+
p = char_buf_ptr(head, head->lookahead);
488
+
if (~head->flags & TTYB_NORMAL)
489
+
f = flag_buf_ptr(head, head->lookahead);
490
+
491
+
port->client_ops->lookahead_buf(port, p, f, count);
492
+
head->lookahead += count;
493
+
}
494
+
}
495
+
467
496
static int
468
497
receive_buf(struct tty_port *port, struct tty_buffer *head, int count)
469
498
{
···
535
496
while (1) {
536
497
struct tty_buffer *head = buf->head;
537
498
struct tty_buffer *next;
538
-
int count;
499
+
int count, rcvd;
539
500
540
501
/* Ldisc or user is trying to gain exclusive access */
541
502
if (atomic_read(&buf->priority))
···
558
519
continue;
559
520
}
560
521
561
-
count = receive_buf(port, head, count);
562
-
if (!count)
522
+
rcvd = receive_buf(port, head, count);
523
+
head->read += rcvd;
524
+
if (rcvd < count)
525
+
lookahead_bufs(port, head);
526
+
if (!rcvd)
563
527
break;
564
-
head->read += count;
565
528
566
529
if (need_resched())
567
530
cond_resched();
+1
-1
drivers/tty/tty_io.c
+1
-1
drivers/tty/tty_io.c
+4
drivers/tty/tty_ioctl.c
+4
drivers/tty/tty_ioctl.c
···
319
319
bits++;
320
320
if (cflag & PARENB)
321
321
bits++;
322
+
if (cflag & ADDRB)
323
+
bits++;
322
324
323
325
return bits;
324
326
}
···
355
353
old_termios = tty->termios;
356
354
tty->termios = *new_termios;
357
355
unset_locked_termios(tty, &old_termios);
356
+
/* Reset any ADDRB changes, ADDRB is changed through ->rs485_config() */
357
+
tty->termios.c_cflag ^= (tty->termios.c_cflag ^ old_termios.c_cflag) & ADDRB;
358
358
359
359
if (tty->ops->set_termios)
360
360
tty->ops->set_termios(tty, &old_termios);
+21
drivers/tty/tty_port.c
+21
drivers/tty/tty_port.c
···
43
43
return ret;
44
44
}
45
45
46
+
static void tty_port_default_lookahead_buf(struct tty_port *port, const unsigned char *p,
47
+
const unsigned char *f, unsigned int count)
48
+
{
49
+
struct tty_struct *tty;
50
+
struct tty_ldisc *disc;
51
+
52
+
tty = READ_ONCE(port->itty);
53
+
if (!tty)
54
+
return;
55
+
56
+
disc = tty_ldisc_ref(tty);
57
+
if (!disc)
58
+
return;
59
+
60
+
if (disc->ops->lookahead_buf)
61
+
disc->ops->lookahead_buf(disc->tty, p, f, count);
62
+
63
+
tty_ldisc_deref(disc);
64
+
}
65
+
46
66
static void tty_port_default_wakeup(struct tty_port *port)
47
67
{
48
68
struct tty_struct *tty = tty_port_tty_get(port);
···
75
55
76
56
const struct tty_port_client_operations tty_port_default_client_ops = {
77
57
.receive_buf = tty_port_default_receive_buf,
58
+
.lookahead_buf = tty_port_default_lookahead_buf,
78
59
.write_wakeup = tty_port_default_wakeup,
79
60
};
80
61
EXPORT_SYMBOL_GPL(tty_port_default_client_ops);
+1
-1
drivers/tty/vt/Makefile
+1
-1
drivers/tty/vt/Makefile
+367
-307
drivers/tty/vt/consolemap.c
+367
-307
drivers/tty/vt/consolemap.c
···
23
23
* stack overflow.
24
24
*/
25
25
26
+
#include <linux/bitfield.h>
27
+
#include <linux/bits.h>
26
28
#include <linux/module.h>
27
29
#include <linux/kd.h>
28
30
#include <linux/errno.h>
···
38
36
#include <linux/vt_kern.h>
39
37
#include <linux/string.h>
40
38
41
-
static unsigned short translations[][256] = {
39
+
static unsigned short translations[][E_TABSZ] = {
42
40
/* 8-bit Latin-1 mapped to Unicode -- trivial mapping */
43
-
{
41
+
[LAT1_MAP] = {
44
42
0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007,
45
43
0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f,
46
44
0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017,
···
73
71
0x00e8, 0x00e9, 0x00ea, 0x00eb, 0x00ec, 0x00ed, 0x00ee, 0x00ef,
74
72
0x00f0, 0x00f1, 0x00f2, 0x00f3, 0x00f4, 0x00f5, 0x00f6, 0x00f7,
75
73
0x00f8, 0x00f9, 0x00fa, 0x00fb, 0x00fc, 0x00fd, 0x00fe, 0x00ff
76
-
},
74
+
},
77
75
/* VT100 graphics mapped to Unicode */
78
-
{
76
+
[GRAF_MAP] = {
79
77
0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007,
80
78
0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x000d, 0x000e, 0x000f,
81
79
0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017,
···
110
108
0x00f8, 0x00f9, 0x00fa, 0x00fb, 0x00fc, 0x00fd, 0x00fe, 0x00ff
111
109
},
112
110
/* IBM Codepage 437 mapped to Unicode */
113
-
{
114
-
0x0000, 0x263a, 0x263b, 0x2665, 0x2666, 0x2663, 0x2660, 0x2022,
111
+
[IBMPC_MAP] = {
112
+
0x0000, 0x263a, 0x263b, 0x2665, 0x2666, 0x2663, 0x2660, 0x2022,
115
113
0x25d8, 0x25cb, 0x25d9, 0x2642, 0x2640, 0x266a, 0x266b, 0x263c,
116
114
0x25b6, 0x25c0, 0x2195, 0x203c, 0x00b6, 0x00a7, 0x25ac, 0x21a8,
117
115
0x2191, 0x2193, 0x2192, 0x2190, 0x221f, 0x2194, 0x25b2, 0x25bc,
···
143
141
0x03a6, 0x0398, 0x03a9, 0x03b4, 0x221e, 0x03c6, 0x03b5, 0x2229,
144
142
0x2261, 0x00b1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00f7, 0x2248,
145
143
0x00b0, 0x2219, 0x00b7, 0x221a, 0x207f, 0x00b2, 0x25a0, 0x00a0
146
-
},
144
+
},
147
145
/* User mapping -- default to codes for direct font mapping */
148
-
{
146
+
[USER_MAP] = {
149
147
0xf000, 0xf001, 0xf002, 0xf003, 0xf004, 0xf005, 0xf006, 0xf007,
150
148
0xf008, 0xf009, 0xf00a, 0xf00b, 0xf00c, 0xf00d, 0xf00e, 0xf00f,
151
149
0xf010, 0xf011, 0xf012, 0xf013, 0xf014, 0xf015, 0xf016, 0xf017,
···
186
184
187
185
#define MAX_GLYPH 512 /* Max possible glyph value */
188
186
189
-
static int inv_translate[MAX_NR_CONSOLES];
187
+
static enum translation_map inv_translate[MAX_NR_CONSOLES];
190
188
191
-
struct uni_pagedir {
192
-
u16 **uni_pgdir[32];
189
+
#define UNI_DIRS 32U
190
+
#define UNI_DIR_ROWS 32U
191
+
#define UNI_ROW_GLYPHS 64U
192
+
193
+
#define UNI_DIR_BITS GENMASK(15, 11)
194
+
#define UNI_ROW_BITS GENMASK(10, 6)
195
+
#define UNI_GLYPH_BITS GENMASK( 5, 0)
196
+
197
+
#define UNI_DIR(uni) FIELD_GET(UNI_DIR_BITS, (uni))
198
+
#define UNI_ROW(uni) FIELD_GET(UNI_ROW_BITS, (uni))
199
+
#define UNI_GLYPH(uni) FIELD_GET(UNI_GLYPH_BITS, (uni))
200
+
201
+
#define UNI(dir, row, glyph) (FIELD_PREP(UNI_DIR_BITS, (dir)) | \
202
+
FIELD_PREP(UNI_ROW_BITS, (row)) | \
203
+
FIELD_PREP(UNI_GLYPH_BITS, (glyph)))
204
+
205
+
/**
206
+
* struct uni_pagedict -- unicode directory
207
+
*
208
+
* @uni_pgdir: 32*32*64 table with glyphs
209
+
* @refcount: reference count of this structure
210
+
* @sum: checksum
211
+
* @inverse_translations: best-effort inverse mapping
212
+
* @inverse_trans_unicode: best-effort inverse mapping to unicode
213
+
*/
214
+
struct uni_pagedict {
215
+
u16 **uni_pgdir[UNI_DIRS];
193
216
unsigned long refcount;
194
217
unsigned long sum;
195
-
unsigned char *inverse_translations[4];
218
+
unsigned char *inverse_translations[LAST_MAP + 1];
196
219
u16 *inverse_trans_unicode;
197
220
};
198
221
199
-
static struct uni_pagedir *dflt;
222
+
static struct uni_pagedict *dflt;
200
223
201
-
static void set_inverse_transl(struct vc_data *conp, struct uni_pagedir *p, int i)
224
+
static void set_inverse_transl(struct vc_data *conp, struct uni_pagedict *dict,
225
+
enum translation_map m)
202
226
{
203
-
int j, glyph;
204
-
unsigned short *t = translations[i];
205
-
unsigned char *q;
206
-
207
-
if (!p) return;
208
-
q = p->inverse_translations[i];
227
+
unsigned short *t = translations[m];
228
+
unsigned char *inv;
209
229
210
-
if (!q) {
211
-
q = p->inverse_translations[i] = kmalloc(MAX_GLYPH, GFP_KERNEL);
212
-
if (!q) return;
230
+
if (!dict)
231
+
return;
232
+
inv = dict->inverse_translations[m];
233
+
234
+
if (!inv) {
235
+
inv = dict->inverse_translations[m] = kmalloc(MAX_GLYPH,
236
+
GFP_KERNEL);
237
+
if (!inv)
238
+
return;
213
239
}
214
-
memset(q, 0, MAX_GLYPH);
240
+
memset(inv, 0, MAX_GLYPH);
215
241
216
-
for (j = 0; j < E_TABSZ; j++) {
217
-
glyph = conv_uni_to_pc(conp, t[j]);
218
-
if (glyph >= 0 && glyph < MAX_GLYPH && q[glyph] < 32) {
242
+
for (unsigned int ch = 0; ch < ARRAY_SIZE(translations[m]); ch++) {
243
+
int glyph = conv_uni_to_pc(conp, t[ch]);
244
+
if (glyph >= 0 && glyph < MAX_GLYPH && inv[glyph] < 32) {
219
245
/* prefer '-' above SHY etc. */
220
-
q[glyph] = j;
246
+
inv[glyph] = ch;
221
247
}
222
248
}
223
249
}
224
250
225
-
static void set_inverse_trans_unicode(struct vc_data *conp,
226
-
struct uni_pagedir *p)
251
+
static void set_inverse_trans_unicode(struct uni_pagedict *dict)
227
252
{
228
-
int i, j, k, glyph;
229
-
u16 **p1, *p2;
230
-
u16 *q;
253
+
unsigned int d, r, g;
254
+
u16 *inv;
231
255
232
-
if (!p) return;
233
-
q = p->inverse_trans_unicode;
234
-
if (!q) {
235
-
q = p->inverse_trans_unicode =
236
-
kmalloc_array(MAX_GLYPH, sizeof(u16), GFP_KERNEL);
237
-
if (!q)
256
+
if (!dict)
257
+
return;
258
+
259
+
inv = dict->inverse_trans_unicode;
260
+
if (!inv) {
261
+
inv = dict->inverse_trans_unicode = kmalloc_array(MAX_GLYPH,
262
+
sizeof(*inv), GFP_KERNEL);
263
+
if (!inv)
238
264
return;
239
265
}
240
-
memset(q, 0, MAX_GLYPH * sizeof(u16));
266
+
memset(inv, 0, MAX_GLYPH * sizeof(*inv));
241
267
242
-
for (i = 0; i < 32; i++) {
243
-
p1 = p->uni_pgdir[i];
244
-
if (!p1)
268
+
for (d = 0; d < UNI_DIRS; d++) {
269
+
u16 **dir = dict->uni_pgdir[d];
270
+
if (!dir)
245
271
continue;
246
-
for (j = 0; j < 32; j++) {
247
-
p2 = p1[j];
248
-
if (!p2)
272
+
for (r = 0; r < UNI_DIR_ROWS; r++) {
273
+
u16 *row = dir[r];
274
+
if (!row)
249
275
continue;
250
-
for (k = 0; k < 64; k++) {
251
-
glyph = p2[k];
252
-
if (glyph >= 0 && glyph < MAX_GLYPH
253
-
&& q[glyph] < 32)
254
-
q[glyph] = (i << 11) + (j << 6) + k;
276
+
for (g = 0; g < UNI_ROW_GLYPHS; g++) {
277
+
u16 glyph = row[g];
278
+
if (glyph < MAX_GLYPH && inv[glyph] < 32)
279
+
inv[glyph] = UNI(d, r, g);
255
280
}
256
281
}
257
282
}
258
283
}
259
284
260
-
unsigned short *set_translate(int m, struct vc_data *vc)
285
+
unsigned short *set_translate(enum translation_map m, struct vc_data *vc)
261
286
{
262
287
inv_translate[vc->vc_num] = m;
263
288
return translations[m];
···
297
268
* was active.
298
269
* Still, it is now possible to a certain extent to cut and paste non-ASCII.
299
270
*/
300
-
u16 inverse_translate(const struct vc_data *conp, int glyph, int use_unicode)
271
+
u16 inverse_translate(const struct vc_data *conp, u16 glyph, bool use_unicode)
301
272
{
302
-
struct uni_pagedir *p;
303
-
int m;
304
-
if (glyph < 0 || glyph >= MAX_GLYPH)
273
+
struct uni_pagedict *p;
274
+
enum translation_map m;
275
+
276
+
if (glyph >= MAX_GLYPH)
305
277
return 0;
306
-
else {
307
-
p = *conp->vc_uni_pagedir_loc;
308
-
if (!p)
278
+
279
+
p = *conp->uni_pagedict_loc;
280
+
if (!p)
281
+
return glyph;
282
+
283
+
if (use_unicode) {
284
+
if (!p->inverse_trans_unicode)
309
285
return glyph;
310
-
else if (use_unicode) {
311
-
if (!p->inverse_trans_unicode)
312
-
return glyph;
313
-
else
314
-
return p->inverse_trans_unicode[glyph];
315
-
} else {
316
-
m = inv_translate[conp->vc_num];
317
-
if (!p->inverse_translations[m])
318
-
return glyph;
319
-
else
320
-
return p->inverse_translations[m][glyph];
321
-
}
286
+
287
+
return p->inverse_trans_unicode[glyph];
322
288
}
289
+
290
+
m = inv_translate[conp->vc_num];
291
+
if (!p->inverse_translations[m])
292
+
return glyph;
293
+
294
+
return p->inverse_translations[m][glyph];
323
295
}
324
296
EXPORT_SYMBOL_GPL(inverse_translate);
325
297
326
298
static void update_user_maps(void)
327
299
{
328
300
int i;
329
-
struct uni_pagedir *p, *q = NULL;
330
-
301
+
struct uni_pagedict *p, *q = NULL;
302
+
331
303
for (i = 0; i < MAX_NR_CONSOLES; i++) {
332
304
if (!vc_cons_allocated(i))
333
305
continue;
334
-
p = *vc_cons[i].d->vc_uni_pagedir_loc;
306
+
p = *vc_cons[i].d->uni_pagedict_loc;
335
307
if (p && p != q) {
336
308
set_inverse_transl(vc_cons[i].d, p, USER_MAP);
337
-
set_inverse_trans_unicode(vc_cons[i].d, p);
309
+
set_inverse_trans_unicode(p);
338
310
q = p;
339
311
}
340
312
}
···
351
321
*/
352
322
int con_set_trans_old(unsigned char __user * arg)
353
323
{
354
-
int i;
355
324
unsigned short inbuf[E_TABSZ];
356
-
unsigned char ubuf[E_TABSZ];
325
+
unsigned int i;
326
+
unsigned char ch;
357
327
358
-
if (copy_from_user(ubuf, arg, E_TABSZ))
359
-
return -EFAULT;
360
-
361
-
for (i = 0; i < E_TABSZ ; i++)
362
-
inbuf[i] = UNI_DIRECT_BASE | ubuf[i];
328
+
for (i = 0; i < ARRAY_SIZE(inbuf); i++) {
329
+
if (get_user(ch, &arg[i]))
330
+
return -EFAULT;
331
+
inbuf[i] = UNI_DIRECT_BASE | ch;
332
+
}
363
333
364
334
console_lock();
365
335
memcpy(translations[USER_MAP], inbuf, sizeof(inbuf));
···
375
345
unsigned char outbuf[E_TABSZ];
376
346
377
347
console_lock();
378
-
for (i = 0; i < E_TABSZ ; i++)
348
+
for (i = 0; i < ARRAY_SIZE(outbuf); i++)
379
349
{
380
350
ch = conv_uni_to_pc(vc_cons[fg_console].d, p[i]);
381
351
outbuf[i] = (ch & ~0xff) ? 0 : ch;
···
411
381
}
412
382
413
383
/*
414
-
* Unicode -> current font conversion
384
+
* Unicode -> current font conversion
415
385
*
416
386
* A font has at most 512 chars, usually 256.
417
387
* But one font position may represent several Unicode chars.
···
423
393
extern u8 dfont_unicount[]; /* Defined in console_defmap.c */
424
394
extern u16 dfont_unitable[];
425
395
426
-
static void con_release_unimap(struct uni_pagedir *p)
396
+
static void con_release_unimap(struct uni_pagedict *dict)
427
397
{
428
-
u16 **p1;
429
-
int i, j;
398
+
unsigned int d, r;
430
399
431
-
if (p == dflt) dflt = NULL;
432
-
for (i = 0; i < 32; i++) {
433
-
p1 = p->uni_pgdir[i];
434
-
if (p1 != NULL) {
435
-
for (j = 0; j < 32; j++)
436
-
kfree(p1[j]);
437
-
kfree(p1);
400
+
if (dict == dflt)
401
+
dflt = NULL;
402
+
403
+
for (d = 0; d < UNI_DIRS; d++) {
404
+
u16 **dir = dict->uni_pgdir[d];
405
+
if (dir != NULL) {
406
+
for (r = 0; r < UNI_DIR_ROWS; r++)
407
+
kfree(dir[r]);
408
+
kfree(dir);
438
409
}
439
-
p->uni_pgdir[i] = NULL;
410
+
dict->uni_pgdir[d] = NULL;
440
411
}
441
-
for (i = 0; i < 4; i++) {
442
-
kfree(p->inverse_translations[i]);
443
-
p->inverse_translations[i] = NULL;
412
+
413
+
for (r = 0; r < ARRAY_SIZE(dict->inverse_translations); r++) {
414
+
kfree(dict->inverse_translations[r]);
415
+
dict->inverse_translations[r] = NULL;
444
416
}
445
-
kfree(p->inverse_trans_unicode);
446
-
p->inverse_trans_unicode = NULL;
417
+
418
+
kfree(dict->inverse_trans_unicode);
419
+
dict->inverse_trans_unicode = NULL;
447
420
}
448
421
449
422
/* Caller must hold the console lock */
450
423
void con_free_unimap(struct vc_data *vc)
451
424
{
452
-
struct uni_pagedir *p;
425
+
struct uni_pagedict *p;
453
426
454
-
p = *vc->vc_uni_pagedir_loc;
427
+
p = *vc->uni_pagedict_loc;
455
428
if (!p)
456
429
return;
457
-
*vc->vc_uni_pagedir_loc = NULL;
430
+
*vc->uni_pagedict_loc = NULL;
458
431
if (--p->refcount)
459
432
return;
460
433
con_release_unimap(p);
461
434
kfree(p);
462
435
}
463
-
464
-
static int con_unify_unimap(struct vc_data *conp, struct uni_pagedir *p)
436
+
437
+
static int con_unify_unimap(struct vc_data *conp, struct uni_pagedict *dict1)
465
438
{
466
-
int i, j, k;
467
-
struct uni_pagedir *q;
468
-
469
-
for (i = 0; i < MAX_NR_CONSOLES; i++) {
470
-
if (!vc_cons_allocated(i))
439
+
struct uni_pagedict *dict2;
440
+
unsigned int cons, d, r;
441
+
442
+
for (cons = 0; cons < MAX_NR_CONSOLES; cons++) {
443
+
if (!vc_cons_allocated(cons))
471
444
continue;
472
-
q = *vc_cons[i].d->vc_uni_pagedir_loc;
473
-
if (!q || q == p || q->sum != p->sum)
445
+
dict2 = *vc_cons[cons].d->uni_pagedict_loc;
446
+
if (!dict2 || dict2 == dict1 || dict2->sum != dict1->sum)
474
447
continue;
475
-
for (j = 0; j < 32; j++) {
476
-
u16 **p1, **q1;
477
-
p1 = p->uni_pgdir[j]; q1 = q->uni_pgdir[j];
478
-
if (!p1 && !q1)
448
+
for (d = 0; d < UNI_DIRS; d++) {
449
+
u16 **dir1 = dict1->uni_pgdir[d];
450
+
u16 **dir2 = dict2->uni_pgdir[d];
451
+
if (!dir1 && !dir2)
479
452
continue;
480
-
if (!p1 || !q1)
453
+
if (!dir1 || !dir2)
481
454
break;
482
-
for (k = 0; k < 32; k++) {
483
-
if (!p1[k] && !q1[k])
455
+
for (r = 0; r < UNI_DIR_ROWS; r++) {
456
+
if (!dir1[r] && !dir2[r])
484
457
continue;
485
-
if (!p1[k] || !q1[k])
458
+
if (!dir1[r] || !dir2[r])
486
459
break;
487
-
if (memcmp(p1[k], q1[k], 64*sizeof(u16)))
460
+
if (memcmp(dir1[r], dir2[r], UNI_ROW_GLYPHS *
461
+
sizeof(*dir1[r])))
488
462
break;
489
463
}
490
-
if (k < 32)
464
+
if (r < UNI_DIR_ROWS)
491
465
break;
492
466
}
493
-
if (j == 32) {
494
-
q->refcount++;
495
-
*conp->vc_uni_pagedir_loc = q;
496
-
con_release_unimap(p);
497
-
kfree(p);
467
+
if (d == UNI_DIRS) {
468
+
dict2->refcount++;
469
+
*conp->uni_pagedict_loc = dict2;
470
+
con_release_unimap(dict1);
471
+
kfree(dict1);
498
472
return 1;
499
473
}
500
474
}
···
506
472
}
507
473
508
474
static int
509
-
con_insert_unipair(struct uni_pagedir *p, u_short unicode, u_short fontpos)
475
+
con_insert_unipair(struct uni_pagedict *p, u_short unicode, u_short fontpos)
510
476
{
511
-
int i, n;
512
-
u16 **p1, *p2;
477
+
u16 **dir, *row;
478
+
unsigned int n;
513
479
514
-
p1 = p->uni_pgdir[n = unicode >> 11];
515
-
if (!p1) {
516
-
p1 = p->uni_pgdir[n] = kmalloc_array(32, sizeof(u16 *),
517
-
GFP_KERNEL);
518
-
if (!p1) return -ENOMEM;
519
-
for (i = 0; i < 32; i++)
520
-
p1[i] = NULL;
480
+
n = UNI_DIR(unicode);
481
+
dir = p->uni_pgdir[n];
482
+
if (!dir) {
483
+
dir = p->uni_pgdir[n] = kcalloc(UNI_DIR_ROWS, sizeof(*dir),
484
+
GFP_KERNEL);
485
+
if (!dir)
486
+
return -ENOMEM;
521
487
}
522
488
523
-
p2 = p1[n = (unicode >> 6) & 0x1f];
524
-
if (!p2) {
525
-
p2 = p1[n] = kmalloc_array(64, sizeof(u16), GFP_KERNEL);
526
-
if (!p2) return -ENOMEM;
527
-
memset(p2, 0xff, 64*sizeof(u16)); /* No glyphs for the characters (yet) */
489
+
n = UNI_ROW(unicode);
490
+
row = dir[n];
491
+
if (!row) {
492
+
row = dir[n] = kmalloc_array(UNI_ROW_GLYPHS, sizeof(*row),
493
+
GFP_KERNEL);
494
+
if (!row)
495
+
return -ENOMEM;
496
+
/* No glyphs for the characters (yet) */
497
+
memset(row, 0xff, UNI_ROW_GLYPHS * sizeof(*row));
528
498
}
529
499
530
-
p2[unicode & 0x3f] = fontpos;
531
-
500
+
row[UNI_GLYPH(unicode)] = fontpos;
501
+
532
502
p->sum += (fontpos << 20U) + unicode;
503
+
504
+
return 0;
505
+
}
506
+
507
+
static int con_allocate_new(struct vc_data *vc)
508
+
{
509
+
struct uni_pagedict *new, *old = *vc->uni_pagedict_loc;
510
+
511
+
new = kzalloc(sizeof(*new), GFP_KERNEL);
512
+
if (!new)
513
+
return -ENOMEM;
514
+
515
+
new->refcount = 1;
516
+
*vc->uni_pagedict_loc = new;
517
+
518
+
if (old)
519
+
old->refcount--;
533
520
534
521
return 0;
535
522
}
···
558
503
/* Caller must hold the lock */
559
504
static int con_do_clear_unimap(struct vc_data *vc)
560
505
{
561
-
struct uni_pagedir *p, *q;
506
+
struct uni_pagedict *old = *vc->uni_pagedict_loc;
562
507
563
-
p = *vc->vc_uni_pagedir_loc;
564
-
if (!p || --p->refcount) {
565
-
q = kzalloc(sizeof(*p), GFP_KERNEL);
566
-
if (!q) {
567
-
if (p)
568
-
p->refcount++;
569
-
return -ENOMEM;
570
-
}
571
-
q->refcount=1;
572
-
*vc->vc_uni_pagedir_loc = q;
573
-
} else {
574
-
if (p == dflt) dflt = NULL;
575
-
p->refcount++;
576
-
p->sum = 0;
577
-
con_release_unimap(p);
578
-
}
508
+
if (!old || old->refcount > 1)
509
+
return con_allocate_new(vc);
510
+
511
+
old->sum = 0;
512
+
con_release_unimap(old);
513
+
579
514
return 0;
580
515
}
581
516
···
577
532
console_unlock();
578
533
return ret;
579
534
}
580
-
535
+
536
+
static struct uni_pagedict *con_unshare_unimap(struct vc_data *vc,
537
+
struct uni_pagedict *old)
538
+
{
539
+
struct uni_pagedict *new;
540
+
unsigned int d, r, g;
541
+
int ret;
542
+
u16 uni = 0;
543
+
544
+
ret = con_allocate_new(vc);
545
+
if (ret)
546
+
return ERR_PTR(ret);
547
+
548
+
new = *vc->uni_pagedict_loc;
549
+
550
+
/*
551
+
* uni_pgdir is a 32*32*64 table with rows allocated when its first
552
+
* entry is added. The unicode value must still be incremented for
553
+
* empty rows. We are copying entries from "old" to "new".
554
+
*/
555
+
for (d = 0; d < UNI_DIRS; d++) {
556
+
u16 **dir = old->uni_pgdir[d];
557
+
if (!dir) {
558
+
/* Account for empty table */
559
+
uni += UNI_DIR_ROWS * UNI_ROW_GLYPHS;
560
+
continue;
561
+
}
562
+
563
+
for (r = 0; r < UNI_DIR_ROWS; r++) {
564
+
u16 *row = dir[r];
565
+
if (!row) {
566
+
/* Account for row of 64 empty entries */
567
+
uni += UNI_ROW_GLYPHS;
568
+
continue;
569
+
}
570
+
571
+
for (g = 0; g < UNI_ROW_GLYPHS; g++, uni++) {
572
+
if (row[g] == 0xffff)
573
+
continue;
574
+
/*
575
+
* Found one, copy entry for unicode uni with
576
+
* fontpos value row[g].
577
+
*/
578
+
ret = con_insert_unipair(new, uni, row[g]);
579
+
if (ret) {
580
+
old->refcount++;
581
+
*vc->uni_pagedict_loc = old;
582
+
con_release_unimap(new);
583
+
kfree(new);
584
+
return ERR_PTR(ret);
585
+
}
586
+
}
587
+
}
588
+
}
589
+
590
+
return new;
591
+
}
592
+
581
593
int con_set_unimap(struct vc_data *vc, ushort ct, struct unipair __user *list)
582
594
{
583
-
int err = 0, err1, i;
584
-
struct uni_pagedir *p, *q;
595
+
int err = 0, err1;
596
+
struct uni_pagedict *dict;
585
597
struct unipair *unilist, *plist;
586
598
587
599
if (!ct)
588
600
return 0;
589
601
590
-
unilist = vmemdup_user(list, array_size(sizeof(struct unipair), ct));
602
+
unilist = vmemdup_user(list, array_size(sizeof(*unilist), ct));
591
603
if (IS_ERR(unilist))
592
604
return PTR_ERR(unilist);
593
605
594
606
console_lock();
595
607
596
608
/* Save original vc_unipagdir_loc in case we allocate a new one */
597
-
p = *vc->vc_uni_pagedir_loc;
598
-
599
-
if (!p) {
609
+
dict = *vc->uni_pagedict_loc;
610
+
if (!dict) {
600
611
err = -EINVAL;
601
-
602
612
goto out_unlock;
603
613
}
604
-
605
-
if (p->refcount > 1) {
606
-
int j, k;
607
-
u16 **p1, *p2, l;
608
-
609
-
err1 = con_do_clear_unimap(vc);
610
-
if (err1) {
611
-
err = err1;
614
+
615
+
if (dict->refcount > 1) {
616
+
dict = con_unshare_unimap(vc, dict);
617
+
if (IS_ERR(dict)) {
618
+
err = PTR_ERR(dict);
612
619
goto out_unlock;
613
620
}
614
-
615
-
/*
616
-
* Since refcount was > 1, con_clear_unimap() allocated a
617
-
* a new uni_pagedir for this vc. Re: p != q
618
-
*/
619
-
q = *vc->vc_uni_pagedir_loc;
620
-
621
-
/*
622
-
* uni_pgdir is a 32*32*64 table with rows allocated
623
-
* when its first entry is added. The unicode value must
624
-
* still be incremented for empty rows. We are copying
625
-
* entries from "p" (old) to "q" (new).
626
-
*/
627
-
l = 0; /* unicode value */
628
-
for (i = 0; i < 32; i++) {
629
-
p1 = p->uni_pgdir[i];
630
-
if (p1)
631
-
for (j = 0; j < 32; j++) {
632
-
p2 = p1[j];
633
-
if (p2) {
634
-
for (k = 0; k < 64; k++, l++)
635
-
if (p2[k] != 0xffff) {
636
-
/*
637
-
* Found one, copy entry for unicode
638
-
* l with fontpos value p2[k].
639
-
*/
640
-
err1 = con_insert_unipair(q, l, p2[k]);
641
-
if (err1) {
642
-
p->refcount++;
643
-
*vc->vc_uni_pagedir_loc = p;
644
-
con_release_unimap(q);
645
-
kfree(q);
646
-
err = err1;
647
-
goto out_unlock;
648
-
}
649
-
}
650
-
} else {
651
-
/* Account for row of 64 empty entries */
652
-
l += 64;
653
-
}
654
-
}
655
-
else
656
-
/* Account for empty table */
657
-
l += 32 * 64;
658
-
}
659
-
660
-
/*
661
-
* Finished copying font table, set vc_uni_pagedir to new table
662
-
*/
663
-
p = q;
664
-
} else if (p == dflt) {
621
+
} else if (dict == dflt) {
665
622
dflt = NULL;
666
623
}
667
624
···
671
624
* Insert user specified unicode pairs into new table.
672
625
*/
673
626
for (plist = unilist; ct; ct--, plist++) {
674
-
err1 = con_insert_unipair(p, plist->unicode, plist->fontpos);
627
+
err1 = con_insert_unipair(dict, plist->unicode, plist->fontpos);
675
628
if (err1)
676
629
err = err1;
677
630
}
678
-
631
+
679
632
/*
680
633
* Merge with fontmaps of any other virtual consoles.
681
634
*/
682
-
if (con_unify_unimap(vc, p))
635
+
if (con_unify_unimap(vc, dict))
683
636
goto out_unlock;
684
637
685
-
for (i = 0; i <= 3; i++)
686
-
set_inverse_transl(vc, p, i); /* Update inverse translations */
687
-
set_inverse_trans_unicode(vc, p);
638
+
for (enum translation_map m = FIRST_MAP; m <= LAST_MAP; m++)
639
+
set_inverse_transl(vc, dict, m);
640
+
set_inverse_trans_unicode(dict);
688
641
689
642
out_unlock:
690
643
console_unlock();
···
699
652
* Loads the unimap for the hardware font, as defined in uni_hash.tbl.
700
653
* The representation used was the most compact I could come up
701
654
* with. This routine is executed at video setup, and when the
702
-
* PIO_FONTRESET ioctl is called.
655
+
* PIO_FONTRESET ioctl is called.
703
656
*
704
657
* The caller must hold the console lock
705
658
*/
706
659
int con_set_default_unimap(struct vc_data *vc)
707
660
{
708
-
int i, j, err = 0, err1;
709
-
u16 *q;
710
-
struct uni_pagedir *p;
661
+
struct uni_pagedict *dict;
662
+
unsigned int fontpos, count;
663
+
int err = 0, err1;
664
+
u16 *dfont;
711
665
712
666
if (dflt) {
713
-
p = *vc->vc_uni_pagedir_loc;
714
-
if (p == dflt)
667
+
dict = *vc->uni_pagedict_loc;
668
+
if (dict == dflt)
715
669
return 0;
716
670
717
671
dflt->refcount++;
718
-
*vc->vc_uni_pagedir_loc = dflt;
719
-
if (p && !--p->refcount) {
720
-
con_release_unimap(p);
721
-
kfree(p);
672
+
*vc->uni_pagedict_loc = dflt;
673
+
if (dict && !--dict->refcount) {
674
+
con_release_unimap(dict);
675
+
kfree(dict);
722
676
}
723
677
return 0;
724
678
}
725
-
679
+
726
680
/* The default font is always 256 characters */
727
681
728
682
err = con_do_clear_unimap(vc);
729
683
if (err)
730
684
return err;
731
-
732
-
p = *vc->vc_uni_pagedir_loc;
733
-
q = dfont_unitable;
734
-
735
-
for (i = 0; i < 256; i++)
736
-
for (j = dfont_unicount[i]; j; j--) {
737
-
err1 = con_insert_unipair(p, *(q++), i);
685
+
686
+
dict = *vc->uni_pagedict_loc;
687
+
dfont = dfont_unitable;
688
+
689
+
for (fontpos = 0; fontpos < 256U; fontpos++)
690
+
for (count = dfont_unicount[fontpos]; count; count--) {
691
+
err1 = con_insert_unipair(dict, *(dfont++), fontpos);
738
692
if (err1)
739
693
err = err1;
740
694
}
741
-
742
-
if (con_unify_unimap(vc, p)) {
743
-
dflt = *vc->vc_uni_pagedir_loc;
695
+
696
+
if (con_unify_unimap(vc, dict)) {
697
+
dflt = *vc->uni_pagedict_loc;
744
698
return err;
745
699
}
746
700
747
-
for (i = 0; i <= 3; i++)
748
-
set_inverse_transl(vc, p, i); /* Update all inverse translations */
749
-
set_inverse_trans_unicode(vc, p);
750
-
dflt = p;
701
+
for (enum translation_map m = FIRST_MAP; m <= LAST_MAP; m++)
702
+
set_inverse_transl(vc, dict, m);
703
+
set_inverse_trans_unicode(dict);
704
+
dflt = dict;
751
705
return err;
752
706
}
753
707
EXPORT_SYMBOL(con_set_default_unimap);
···
762
714
*/
763
715
int con_copy_unimap(struct vc_data *dst_vc, struct vc_data *src_vc)
764
716
{
765
-
struct uni_pagedir *q;
717
+
struct uni_pagedict *src;
766
718
767
-
if (!*src_vc->vc_uni_pagedir_loc)
719
+
if (!*src_vc->uni_pagedict_loc)
768
720
return -EINVAL;
769
-
if (*dst_vc->vc_uni_pagedir_loc == *src_vc->vc_uni_pagedir_loc)
721
+
if (*dst_vc->uni_pagedict_loc == *src_vc->uni_pagedict_loc)
770
722
return 0;
771
723
con_free_unimap(dst_vc);
772
-
q = *src_vc->vc_uni_pagedir_loc;
773
-
q->refcount++;
774
-
*dst_vc->vc_uni_pagedir_loc = q;
724
+
src = *src_vc->uni_pagedict_loc;
725
+
src->refcount++;
726
+
*dst_vc->uni_pagedict_loc = src;
775
727
return 0;
776
728
}
777
729
EXPORT_SYMBOL(con_copy_unimap);
···
782
734
* Read the console unicode data for this console. Called from the ioctl
783
735
* handlers.
784
736
*/
785
-
int con_get_unimap(struct vc_data *vc, ushort ct, ushort __user *uct, struct unipair __user *list)
737
+
int con_get_unimap(struct vc_data *vc, ushort ct, ushort __user *uct,
738
+
struct unipair __user *list)
786
739
{
787
-
int i, j, k, ret = 0;
788
740
ushort ect;
789
-
u16 **p1, *p2;
790
-
struct uni_pagedir *p;
741
+
struct uni_pagedict *dict;
791
742
struct unipair *unilist;
743
+
unsigned int d, r, g;
744
+
int ret = 0;
792
745
793
-
unilist = kvmalloc_array(ct, sizeof(struct unipair), GFP_KERNEL);
746
+
unilist = kvmalloc_array(ct, sizeof(*unilist), GFP_KERNEL);
794
747
if (!unilist)
795
748
return -ENOMEM;
796
749
797
750
console_lock();
798
751
799
752
ect = 0;
800
-
if (*vc->vc_uni_pagedir_loc) {
801
-
p = *vc->vc_uni_pagedir_loc;
802
-
for (i = 0; i < 32; i++) {
803
-
p1 = p->uni_pgdir[i];
804
-
if (p1)
805
-
for (j = 0; j < 32; j++) {
806
-
p2 = *(p1++);
807
-
if (p2)
808
-
for (k = 0; k < 64; k++, p2++) {
809
-
if (*p2 >= MAX_GLYPH)
810
-
continue;
811
-
if (ect < ct) {
812
-
unilist[ect].unicode =
813
-
(i<<11)+(j<<6)+k;
814
-
unilist[ect].fontpos = *p2;
815
-
}
816
-
ect++;
753
+
dict = *vc->uni_pagedict_loc;
754
+
if (!dict)
755
+
goto unlock;
756
+
757
+
for (d = 0; d < UNI_DIRS; d++) {
758
+
u16 **dir = dict->uni_pgdir[d];
759
+
if (!dir)
760
+
continue;
761
+
762
+
for (r = 0; r < UNI_DIR_ROWS; r++) {
763
+
u16 *row = dir[r];
764
+
if (!row)
765
+
continue;
766
+
767
+
for (g = 0; g < UNI_ROW_GLYPHS; g++, row++) {
768
+
if (*row >= MAX_GLYPH)
769
+
continue;
770
+
if (ect < ct) {
771
+
unilist[ect].unicode = UNI(d, r, g);
772
+
unilist[ect].fontpos = *row;
817
773
}
774
+
ect++;
818
775
}
819
776
}
820
777
}
778
+
unlock:
821
779
console_unlock();
822
-
if (copy_to_user(list, unilist, min(ect, ct) * sizeof(struct unipair)))
780
+
if (copy_to_user(list, unilist, min(ect, ct) * sizeof(*unilist)))
823
781
ret = -EFAULT;
824
-
put_user(ect, uct);
782
+
if (put_user(ect, uct))
783
+
ret = -EFAULT;
825
784
kvfree(unilist);
826
785
return ret ? ret : (ect <= ct) ? 0 : -ENOMEM;
827
786
}
···
853
798
int conv_uni_to_8bit(u32 uni)
854
799
{
855
800
int c;
856
-
for (c = 0; c < 0x100; c++)
801
+
for (c = 0; c < ARRAY_SIZE(translations[USER_MAP]); c++)
857
802
if (translations[USER_MAP][c] == uni ||
858
803
(translations[USER_MAP][c] == (c | 0xf000) && uni == c))
859
804
return c;
860
805
return -1;
861
806
}
862
807
863
-
int
864
-
conv_uni_to_pc(struct vc_data *conp, long ucs)
808
+
int conv_uni_to_pc(struct vc_data *conp, long ucs)
865
809
{
866
-
int h;
867
-
u16 **p1, *p2;
868
-
struct uni_pagedir *p;
869
-
810
+
struct uni_pagedict *dict;
811
+
u16 **dir, *row, glyph;
812
+
870
813
/* Only 16-bit codes supported at this time */
871
814
if (ucs > 0xffff)
872
815
return -4; /* Not found */
···
879
826
*/
880
827
else if ((ucs & ~UNI_DIRECT_MASK) == UNI_DIRECT_BASE)
881
828
return ucs & UNI_DIRECT_MASK;
882
-
883
-
if (!*conp->vc_uni_pagedir_loc)
829
+
830
+
dict = *conp->uni_pagedict_loc;
831
+
if (!dict)
884
832
return -3;
885
833
886
-
p = *conp->vc_uni_pagedir_loc;
887
-
if ((p1 = p->uni_pgdir[ucs >> 11]) &&
888
-
(p2 = p1[(ucs >> 6) & 0x1f]) &&
889
-
(h = p2[ucs & 0x3f]) < MAX_GLYPH)
890
-
return h;
834
+
dir = dict->uni_pgdir[UNI_DIR(ucs)];
835
+
if (!dir)
836
+
return -4;
891
837
892
-
return -4; /* not found */
838
+
row = dir[UNI_ROW(ucs)];
839
+
if (!row)
840
+
return -4;
841
+
842
+
glyph = row[UNI_GLYPH(ucs)];
843
+
if (glyph >= MAX_GLYPH)
844
+
return -4;
845
+
846
+
return glyph;
893
847
}
894
848
895
849
/*
···
904
844
* initialized. It must be possible to call kmalloc(..., GFP_KERNEL)
905
845
* from this function, hence the call from sys_setup.
906
846
*/
907
-
void __init
847
+
void __init
908
848
console_map_init(void)
909
849
{
910
850
int i;
911
-
851
+
912
852
for (i = 0; i < MAX_NR_CONSOLES; i++)
913
-
if (vc_cons_allocated(i) && !*vc_cons[i].d->vc_uni_pagedir_loc)
853
+
if (vc_cons_allocated(i) && !*vc_cons[i].d->uni_pagedict_loc)
914
854
con_set_default_unimap(vc_cons[i].d);
915
855
}
916
856
+3
-3
drivers/tty/vt/defkeymap.c_shipped
+3
-3
drivers/tty/vt/defkeymap.c_shipped
···
1
1
// SPDX-License-Identifier: GPL-2.0
2
-
/* Do not edit this file! It was automatically generated by */
3
-
/* loadkeys --mktable defkeymap.map > defkeymap.c */
2
+
/* Do not edit this file! It was automatically generated by */
3
+
/* loadkeys --mktable --unicode defkeymap.map > defkeymap.c */
4
4
5
5
#include <linux/types.h>
6
6
#include <linux/keyboard.h>
···
139
139
0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
140
140
};
141
141
142
-
ushort *key_maps[MAX_NR_KEYMAPS] = {
142
+
unsigned short *key_maps[MAX_NR_KEYMAPS] = {
143
143
plain_map, shift_map, altgr_map, NULL,
144
144
ctrl_map, shift_ctrl_map, NULL, NULL,
145
145
alt_map, NULL, NULL, NULL,
+2
-1
drivers/tty/vt/selection.c
+2
-1
drivers/tty/vt/selection.c
+8
-8
drivers/tty/vt/vt.c
+8
-8
drivers/tty/vt/vt.c
···
344
344
/* allocate everything in one go */
345
345
memsize = cols * rows * sizeof(char32_t);
346
346
memsize += rows * sizeof(char32_t *);
347
-
p = vmalloc(memsize);
347
+
p = vzalloc(memsize);
348
348
if (!p)
349
349
return NULL;
350
350
···
1063
1063
__module_get(vc->vc_sw->owner);
1064
1064
vc->vc_num = num;
1065
1065
vc->vc_display_fg = &master_display_fg;
1066
-
if (vc->vc_uni_pagedir_loc)
1066
+
if (vc->uni_pagedict_loc)
1067
1067
con_free_unimap(vc);
1068
-
vc->vc_uni_pagedir_loc = &vc->vc_uni_pagedir;
1069
-
vc->vc_uni_pagedir = NULL;
1068
+
vc->uni_pagedict_loc = &vc->uni_pagedict;
1069
+
vc->uni_pagedict = NULL;
1070
1070
vc->vc_hi_font_mask = 0;
1071
1071
vc->vc_complement_mask = 0;
1072
1072
vc->vc_can_do_color = 0;
···
1136
1136
1137
1137
visual_init(vc, currcons, 1);
1138
1138
1139
-
if (!*vc->vc_uni_pagedir_loc)
1139
+
if (!*vc->uni_pagedict_loc)
1140
1140
con_set_default_unimap(vc);
1141
1141
1142
1142
err = -EINVAL;
···
3939
3939
bind = con_is_bound(con->con);
3940
3940
console_unlock();
3941
3941
3942
-
return snprintf(buf, PAGE_SIZE, "%i\n", bind);
3942
+
return sysfs_emit(buf, "%i\n", bind);
3943
3943
}
3944
3944
3945
3945
static ssize_t show_name(struct device *dev, struct device_attribute *attr,
···
3947
3947
{
3948
3948
struct con_driver *con = dev_get_drvdata(dev);
3949
3949
3950
-
return snprintf(buf, PAGE_SIZE, "%s %s\n",
3950
+
return sysfs_emit(buf, "%s %s\n",
3951
3951
(con->flag & CON_DRIVER_FLAG_MODULE) ? "(M)" : "(S)",
3952
3952
con->desc);
3953
3953
···
4741
4741
4742
4742
if (uniscr)
4743
4743
return uniscr->lines[n / vc->vc_cols][n % vc->vc_cols];
4744
-
return inverse_translate(vc, screen_glyph(vc, n * 2), 1);
4744
+
return inverse_translate(vc, screen_glyph(vc, n * 2), true);
4745
4745
}
4746
4746
EXPORT_SYMBOL_GPL(screen_glyph_unicode);
4747
4747
+1
-1
drivers/usb/misc/sisusbvga/sisusb_con.c
+1
-1
drivers/usb/misc/sisusbvga/sisusb_con.c
+6
-6
drivers/video/console/vgacon.c
+6
-6
drivers/video/console/vgacon.c
···
75
75
static int vgacon_set_origin(struct vc_data *c);
76
76
static void vgacon_save_screen(struct vc_data *c);
77
77
static void vgacon_invert_region(struct vc_data *c, u16 * p, int count);
78
-
static struct uni_pagedir *vgacon_uni_pagedir;
78
+
static struct uni_pagedict *vgacon_uni_pagedir;
79
79
static int vgacon_refcount;
80
80
81
81
/* Description of the hardware situation */
···
342
342
343
343
static void vgacon_init(struct vc_data *c, int init)
344
344
{
345
-
struct uni_pagedir *p;
345
+
struct uni_pagedict *p;
346
346
347
347
/*
348
348
* We cannot be loaded as a module, therefore init will be 1
···
367
367
c->vc_complement_mask = 0x7700;
368
368
if (vga_512_chars)
369
369
c->vc_hi_font_mask = 0x0800;
370
-
p = *c->vc_uni_pagedir_loc;
371
-
if (c->vc_uni_pagedir_loc != &vgacon_uni_pagedir) {
370
+
p = *c->uni_pagedict_loc;
371
+
if (c->uni_pagedict_loc != &vgacon_uni_pagedir) {
372
372
con_free_unimap(c);
373
-
c->vc_uni_pagedir_loc = &vgacon_uni_pagedir;
373
+
c->uni_pagedict_loc = &vgacon_uni_pagedir;
374
374
vgacon_refcount++;
375
375
}
376
376
if (!vgacon_uni_pagedir && p)
···
392
392
393
393
if (!--vgacon_refcount)
394
394
con_free_unimap(c);
395
-
c->vc_uni_pagedir_loc = &c->vc_uni_pagedir;
395
+
c->uni_pagedict_loc = &c->uni_pagedict;
396
396
con_set_default_unimap(c);
397
397
}
398
398
+4
-4
drivers/video/fbdev/core/fbcon.c
+4
-4
drivers/video/fbdev/core/fbcon.c
···
1060
1060
vc->vc_complement_mask <<= 1;
1061
1061
}
1062
1062
1063
-
if (!*svc->vc_uni_pagedir_loc)
1063
+
if (!*svc->uni_pagedict_loc)
1064
1064
con_set_default_unimap(svc);
1065
-
if (!*vc->vc_uni_pagedir_loc)
1065
+
if (!*vc->uni_pagedict_loc)
1066
1066
con_copy_unimap(vc, svc);
1067
1067
1068
1068
ops = info->fbcon_par;
···
1384
1384
vc->vc_complement_mask <<= 1;
1385
1385
}
1386
1386
1387
-
if (!*svc->vc_uni_pagedir_loc)
1387
+
if (!*svc->uni_pagedict_loc)
1388
1388
con_set_default_unimap(svc);
1389
-
if (!*vc->vc_uni_pagedir_loc)
1389
+
if (!*vc->uni_pagedict_loc)
1390
1390
con_copy_unimap(vc, svc);
1391
1391
1392
1392
cols = FBCON_SWAP(ops->rotate, info->var.xres, info->var.yres);
+3
-3
include/linux/console_struct.h
+3
-3
include/linux/console_struct.h
···
17
17
#include <linux/vt.h>
18
18
#include <linux/workqueue.h>
19
19
20
-
struct uni_pagedir;
20
+
struct uni_pagedict;
21
21
struct uni_screen;
22
22
23
23
#define NPAR 16
···
157
157
unsigned int vc_bell_duration; /* Console bell duration */
158
158
unsigned short vc_cur_blink_ms; /* Cursor blink duration */
159
159
struct vc_data **vc_display_fg; /* [!] Ptr to var holding fg console for this display */
160
-
struct uni_pagedir *vc_uni_pagedir;
161
-
struct uni_pagedir **vc_uni_pagedir_loc; /* [!] Location of uni_pagedir variable for this console */
160
+
struct uni_pagedict *uni_pagedict;
161
+
struct uni_pagedict **uni_pagedict_loc; /* [!] Location of uni_pagedict variable for this console */
162
162
struct uni_screen *vc_uni_screen; /* unicode screen content */
163
163
/* additional information is in vt_kern.h */
164
164
};
+43
-17
include/linux/consolemap.h
+43
-17
include/linux/consolemap.h
···
7
7
#ifndef __LINUX_CONSOLEMAP_H__
8
8
#define __LINUX_CONSOLEMAP_H__
9
9
10
-
#define LAT1_MAP 0
11
-
#define GRAF_MAP 1
12
-
#define IBMPC_MAP 2
13
-
#define USER_MAP 3
10
+
enum translation_map {
11
+
LAT1_MAP,
12
+
GRAF_MAP,
13
+
IBMPC_MAP,
14
+
USER_MAP,
15
+
16
+
FIRST_MAP = LAT1_MAP,
17
+
LAST_MAP = USER_MAP,
18
+
};
14
19
15
20
#include <linux/types.h>
16
21
17
-
#ifdef CONFIG_CONSOLE_TRANSLATIONS
18
22
struct vc_data;
19
23
20
-
extern u16 inverse_translate(const struct vc_data *conp, int glyph,
21
-
int use_unicode);
22
-
extern unsigned short *set_translate(int m, struct vc_data *vc);
23
-
extern int conv_uni_to_pc(struct vc_data *conp, long ucs);
24
-
extern u32 conv_8bit_to_uni(unsigned char c);
25
-
extern int conv_uni_to_8bit(u32 uni);
24
+
#ifdef CONFIG_CONSOLE_TRANSLATIONS
25
+
u16 inverse_translate(const struct vc_data *conp, u16 glyph, bool use_unicode);
26
+
unsigned short *set_translate(enum translation_map m, struct vc_data *vc);
27
+
int conv_uni_to_pc(struct vc_data *conp, long ucs);
28
+
u32 conv_8bit_to_uni(unsigned char c);
29
+
int conv_uni_to_8bit(u32 uni);
26
30
void console_map_init(void);
27
31
#else
28
-
#define inverse_translate(conp, glyph, uni) ((uint16_t)glyph)
29
-
#define set_translate(m, vc) ((unsigned short *)NULL)
30
-
#define conv_uni_to_pc(conp, ucs) ((int) (ucs > 0xff ? -1: ucs))
31
-
#define conv_8bit_to_uni(c) ((uint32_t)(c))
32
-
#define conv_uni_to_8bit(c) ((int) ((c) & 0xff))
33
-
#define console_map_init(c) do { ; } while (0)
32
+
static inline u16 inverse_translate(const struct vc_data *conp, u16 glyph,
33
+
bool use_unicode)
34
+
{
35
+
return glyph;
36
+
}
37
+
38
+
static inline unsigned short *set_translate(enum translation_map m,
39
+
struct vc_data *vc)
40
+
{
41
+
return NULL;
42
+
}
43
+
44
+
static inline int conv_uni_to_pc(struct vc_data *conp, long ucs)
45
+
{
46
+
return ucs > 0xff ? -1 : ucs;
47
+
}
48
+
49
+
static inline u32 conv_8bit_to_uni(unsigned char c)
50
+
{
51
+
return c;
52
+
}
53
+
54
+
static inline int conv_uni_to_8bit(u32 uni)
55
+
{
56
+
return uni & 0xff;
57
+
}
58
+
59
+
static inline void console_map_init(void) { }
34
60
#endif /* CONFIG_CONSOLE_TRANSLATIONS */
35
61
36
62
#endif /* __LINUX_CONSOLEMAP_H__ */
+9
-6
include/linux/serial.h
+9
-6
include/linux/serial.h
···
9
9
#ifndef _LINUX_SERIAL_H
10
10
#define _LINUX_SERIAL_H
11
11
12
-
#include <asm/page.h>
13
12
#include <uapi/linux/serial.h>
13
+
#include <uapi/linux/serial_reg.h>
14
14
15
15
/* Helper for dealing with UART_LCR_WLEN* defines */
16
16
#define UART_LCR_WLEN(x) ((x) - 5)
17
+
18
+
/* FIFO and shifting register empty */
19
+
#define UART_LSR_BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
20
+
21
+
static inline bool uart_lsr_tx_empty(u16 lsr)
22
+
{
23
+
return (lsr & UART_LSR_BOTH_EMPTY) == UART_LSR_BOTH_EMPTY;
24
+
}
17
25
18
26
/*
19
27
* Counters of the input lines (CTS, DSR, RI, CD) interrupts
···
32
24
__u32 frame, parity, overrun, brk;
33
25
__u32 buf_overrun;
34
26
};
35
-
36
-
/*
37
-
* The size of the serial xmit buffer is 1 page, or 4096 bytes
38
-
*/
39
-
#define SERIAL_XMIT_SIZE PAGE_SIZE
40
27
41
28
#include <linux/compiler.h>
42
29
+4
-3
include/linux/serial_8250.h
+4
-3
include/linux/serial_8250.h
···
119
119
* be immediately processed.
120
120
*/
121
121
#define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
122
-
unsigned char lsr_saved_flags;
122
+
u16 lsr_saved_flags;
123
+
u16 lsr_save_mask;
123
124
#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
124
125
unsigned char msr_saved_flags;
125
126
···
171
170
unsigned int quot_frac);
172
171
extern int fsl8250_handle_irq(struct uart_port *port);
173
172
int serial8250_handle_irq(struct uart_port *port, unsigned int iir);
174
-
unsigned char serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr);
175
-
void serial8250_read_char(struct uart_8250_port *up, unsigned char lsr);
173
+
u16 serial8250_rx_chars(struct uart_8250_port *up, u16 lsr);
174
+
void serial8250_read_char(struct uart_8250_port *up, u16 lsr);
176
175
void serial8250_tx_chars(struct uart_8250_port *up);
177
176
unsigned int serial8250_modem_status(struct uart_8250_port *up);
178
177
void serial8250_init_port(struct uart_8250_port *up);
+346
-18
include/linux/serial_core.h
+346
-18
include/linux/serial_core.h
···
31
31
struct device;
32
32
struct gpio_desc;
33
33
34
-
/*
34
+
/**
35
+
* struct uart_ops -- interface between serial_core and the driver
36
+
*
35
37
* This structure describes all the operations that can be done on the
36
-
* physical hardware. See Documentation/driver-api/serial/driver.rst for details.
38
+
* physical hardware.
39
+
*
40
+
* @tx_empty: ``unsigned int ()(struct uart_port *port)``
41
+
*
42
+
* This function tests whether the transmitter fifo and shifter for the
43
+
* @port is empty. If it is empty, this function should return
44
+
* %TIOCSER_TEMT, otherwise return 0. If the port does not support this
45
+
* operation, then it should return %TIOCSER_TEMT.
46
+
*
47
+
* Locking: none.
48
+
* Interrupts: caller dependent.
49
+
* This call must not sleep
50
+
*
51
+
* @set_mctrl: ``void ()(struct uart_port *port, unsigned int mctrl)``
52
+
*
53
+
* This function sets the modem control lines for @port to the state
54
+
* described by @mctrl. The relevant bits of @mctrl are:
55
+
*
56
+
* - %TIOCM_RTS RTS signal.
57
+
* - %TIOCM_DTR DTR signal.
58
+
* - %TIOCM_OUT1 OUT1 signal.
59
+
* - %TIOCM_OUT2 OUT2 signal.
60
+
* - %TIOCM_LOOP Set the port into loopback mode.
61
+
*
62
+
* If the appropriate bit is set, the signal should be driven
63
+
* active. If the bit is clear, the signal should be driven
64
+
* inactive.
65
+
*
66
+
* Locking: @port->lock taken.
67
+
* Interrupts: locally disabled.
68
+
* This call must not sleep
69
+
*
70
+
* @get_mctrl: ``unsigned int ()(struct uart_port *port)``
71
+
*
72
+
* Returns the current state of modem control inputs of @port. The state
73
+
* of the outputs should not be returned, since the core keeps track of
74
+
* their state. The state information should include:
75
+
*
76
+
* - %TIOCM_CAR state of DCD signal
77
+
* - %TIOCM_CTS state of CTS signal
78
+
* - %TIOCM_DSR state of DSR signal
79
+
* - %TIOCM_RI state of RI signal
80
+
*
81
+
* The bit is set if the signal is currently driven active. If
82
+
* the port does not support CTS, DCD or DSR, the driver should
83
+
* indicate that the signal is permanently active. If RI is
84
+
* not available, the signal should not be indicated as active.
85
+
*
86
+
* Locking: @port->lock taken.
87
+
* Interrupts: locally disabled.
88
+
* This call must not sleep
89
+
*
90
+
* @stop_tx: ``void ()(struct uart_port *port)``
91
+
*
92
+
* Stop transmitting characters. This might be due to the CTS line
93
+
* becoming inactive or the tty layer indicating we want to stop
94
+
* transmission due to an %XOFF character.
95
+
*
96
+
* The driver should stop transmitting characters as soon as possible.
97
+
*
98
+
* Locking: @port->lock taken.
99
+
* Interrupts: locally disabled.
100
+
* This call must not sleep
101
+
*
102
+
* @start_tx: ``void ()(struct uart_port *port)``
103
+
*
104
+
* Start transmitting characters.
105
+
*
106
+
* Locking: @port->lock taken.
107
+
* Interrupts: locally disabled.
108
+
* This call must not sleep
109
+
*
110
+
* @throttle: ``void ()(struct uart_port *port)``
111
+
*
112
+
* Notify the serial driver that input buffers for the line discipline are
113
+
* close to full, and it should somehow signal that no more characters
114
+
* should be sent to the serial port.
115
+
* This will be called only if hardware assisted flow control is enabled.
116
+
*
117
+
* Locking: serialized with @unthrottle() and termios modification by the
118
+
* tty layer.
119
+
*
120
+
* @unthrottle: ``void ()(struct uart_port *port)``
121
+
*
122
+
* Notify the serial driver that characters can now be sent to the serial
123
+
* port without fear of overrunning the input buffers of the line
124
+
* disciplines.
125
+
*
126
+
* This will be called only if hardware assisted flow control is enabled.
127
+
*
128
+
* Locking: serialized with @throttle() and termios modification by the
129
+
* tty layer.
130
+
*
131
+
* @send_xchar: ``void ()(struct uart_port *port, char ch)``
132
+
*
133
+
* Transmit a high priority character, even if the port is stopped. This
134
+
* is used to implement XON/XOFF flow control and tcflow(). If the serial
135
+
* driver does not implement this function, the tty core will append the
136
+
* character to the circular buffer and then call start_tx() / stop_tx()
137
+
* to flush the data out.
138
+
*
139
+
* Do not transmit if @ch == '\0' (%__DISABLED_CHAR).
140
+
*
141
+
* Locking: none.
142
+
* Interrupts: caller dependent.
143
+
*
144
+
* @stop_rx: ``void ()(struct uart_port *port)``
145
+
*
146
+
* Stop receiving characters; the @port is in the process of being closed.
147
+
*
148
+
* Locking: @port->lock taken.
149
+
* Interrupts: locally disabled.
150
+
* This call must not sleep
151
+
*
152
+
* @enable_ms: ``void ()(struct uart_port *port)``
153
+
*
154
+
* Enable the modem status interrupts.
155
+
*
156
+
* This method may be called multiple times. Modem status interrupts
157
+
* should be disabled when the @shutdown() method is called.
158
+
*
159
+
* Locking: @port->lock taken.
160
+
* Interrupts: locally disabled.
161
+
* This call must not sleep
162
+
*
163
+
* @break_ctl: ``void ()(struct uart_port *port, int ctl)``
164
+
*
165
+
* Control the transmission of a break signal. If @ctl is nonzero, the
166
+
* break signal should be transmitted. The signal should be terminated
167
+
* when another call is made with a zero @ctl.
168
+
*
169
+
* Locking: caller holds tty_port->mutex
170
+
*
171
+
* @startup: ``int ()(struct uart_port *port)``
172
+
*
173
+
* Grab any interrupt resources and initialise any low level driver state.
174
+
* Enable the port for reception. It should not activate RTS nor DTR;
175
+
* this will be done via a separate call to @set_mctrl().
176
+
*
177
+
* This method will only be called when the port is initially opened.
178
+
*
179
+
* Locking: port_sem taken.
180
+
* Interrupts: globally disabled.
181
+
*
182
+
* @shutdown: ``void ()(struct uart_port *port)``
183
+
*
184
+
* Disable the @port, disable any break condition that may be in effect,
185
+
* and free any interrupt resources. It should not disable RTS nor DTR;
186
+
* this will have already been done via a separate call to @set_mctrl().
187
+
*
188
+
* Drivers must not access @port->state once this call has completed.
189
+
*
190
+
* This method will only be called when there are no more users of this
191
+
* @port.
192
+
*
193
+
* Locking: port_sem taken.
194
+
* Interrupts: caller dependent.
195
+
*
196
+
* @flush_buffer: ``void ()(struct uart_port *port)``
197
+
*
198
+
* Flush any write buffers, reset any DMA state and stop any ongoing DMA
199
+
* transfers.
200
+
*
201
+
* This will be called whenever the @port->state->xmit circular buffer is
202
+
* cleared.
203
+
*
204
+
* Locking: @port->lock taken.
205
+
* Interrupts: locally disabled.
206
+
* This call must not sleep
207
+
*
208
+
* @set_termios: ``void ()(struct uart_port *port, struct ktermios *new,
209
+
* struct ktermios *old)``
210
+
*
211
+
* Change the @port parameters, including word length, parity, stop bits.
212
+
* Update @port->read_status_mask and @port->ignore_status_mask to
213
+
* indicate the types of events we are interested in receiving. Relevant
214
+
* ktermios::c_cflag bits are:
215
+
*
216
+
* - %CSIZE - word size
217
+
* - %CSTOPB - 2 stop bits
218
+
* - %PARENB - parity enable
219
+
* - %PARODD - odd parity (when %PARENB is in force)
220
+
* - %ADDRB - address bit (changed through uart_port::rs485_config()).
221
+
* - %CREAD - enable reception of characters (if not set, still receive
222
+
* characters from the port, but throw them away).
223
+
* - %CRTSCTS - if set, enable CTS status change reporting.
224
+
* - %CLOCAL - if not set, enable modem status change reporting.
225
+
*
226
+
* Relevant ktermios::c_iflag bits are:
227
+
*
228
+
* - %INPCK - enable frame and parity error events to be passed to the TTY
229
+
* layer.
230
+
* - %BRKINT / %PARMRK - both of these enable break events to be passed to
231
+
* the TTY layer.
232
+
* - %IGNPAR - ignore parity and framing errors.
233
+
* - %IGNBRK - ignore break errors. If %IGNPAR is also set, ignore overrun
234
+
* errors as well.
235
+
*
236
+
* The interaction of the ktermios::c_iflag bits is as follows (parity
237
+
* error given as an example):
238
+
*
239
+
* ============ ======= ======= =========================================
240
+
* Parity error INPCK IGNPAR
241
+
* ============ ======= ======= =========================================
242
+
* n/a 0 n/a character received, marked as %TTY_NORMAL
243
+
* None 1 n/a character received, marked as %TTY_NORMAL
244
+
* Yes 1 0 character received, marked as %TTY_PARITY
245
+
* Yes 1 1 character discarded
246
+
* ============ ======= ======= =========================================
247
+
*
248
+
* Other flags may be used (eg, xon/xoff characters) if your hardware
249
+
* supports hardware "soft" flow control.
250
+
*
251
+
* Locking: caller holds tty_port->mutex
252
+
* Interrupts: caller dependent.
253
+
* This call must not sleep
254
+
*
255
+
* @set_ldisc: ``void ()(struct uart_port *port, struct ktermios *termios)``
256
+
*
257
+
* Notifier for discipline change. See
258
+
* Documentation/driver-api/tty/tty_ldisc.rst.
259
+
*
260
+
* Locking: caller holds tty_port->mutex
261
+
*
262
+
* @pm: ``void ()(struct uart_port *port, unsigned int state,
263
+
* unsigned int oldstate)``
264
+
*
265
+
* Perform any power management related activities on the specified @port.
266
+
* @state indicates the new state (defined by enum uart_pm_state),
267
+
* @oldstate indicates the previous state.
268
+
*
269
+
* This function should not be used to grab any resources.
270
+
*
271
+
* This will be called when the @port is initially opened and finally
272
+
* closed, except when the @port is also the system console. This will
273
+
* occur even if %CONFIG_PM is not set.
274
+
*
275
+
* Locking: none.
276
+
* Interrupts: caller dependent.
277
+
*
278
+
* @type: ``const char *()(struct uart_port *port)``
279
+
*
280
+
* Return a pointer to a string constant describing the specified @port,
281
+
* or return %NULL, in which case the string 'unknown' is substituted.
282
+
*
283
+
* Locking: none.
284
+
* Interrupts: caller dependent.
285
+
*
286
+
* @release_port: ``void ()(struct uart_port *port)``
287
+
*
288
+
* Release any memory and IO region resources currently in use by the
289
+
* @port.
290
+
*
291
+
* Locking: none.
292
+
* Interrupts: caller dependent.
293
+
*
294
+
* @request_port: ``int ()(struct uart_port *port)``
295
+
*
296
+
* Request any memory and IO region resources required by the port. If any
297
+
* fail, no resources should be registered when this function returns, and
298
+
* it should return -%EBUSY on failure.
299
+
*
300
+
* Locking: none.
301
+
* Interrupts: caller dependent.
302
+
*
303
+
* @config_port: ``void ()(struct uart_port *port, int type)``
304
+
*
305
+
* Perform any autoconfiguration steps required for the @port. @type
306
+
* contains a bit mask of the required configuration. %UART_CONFIG_TYPE
307
+
* indicates that the port requires detection and identification.
308
+
* @port->type should be set to the type found, or %PORT_UNKNOWN if no
309
+
* port was detected.
310
+
*
311
+
* %UART_CONFIG_IRQ indicates autoconfiguration of the interrupt signal,
312
+
* which should be probed using standard kernel autoprobing techniques.
313
+
* This is not necessary on platforms where ports have interrupts
314
+
* internally hard wired (eg, system on a chip implementations).
315
+
*
316
+
* Locking: none.
317
+
* Interrupts: caller dependent.
318
+
*
319
+
* @verify_port: ``int ()(struct uart_port *port,
320
+
* struct serial_struct *serinfo)``
321
+
*
322
+
* Verify the new serial port information contained within @serinfo is
323
+
* suitable for this port type.
324
+
*
325
+
* Locking: none.
326
+
* Interrupts: caller dependent.
327
+
*
328
+
* @ioctl: ``int ()(struct uart_port *port, unsigned int cmd,
329
+
* unsigned long arg)``
330
+
*
331
+
* Perform any port specific IOCTLs. IOCTL commands must be defined using
332
+
* the standard numbering system found in <asm/ioctl.h>.
333
+
*
334
+
* Locking: none.
335
+
* Interrupts: caller dependent.
336
+
*
337
+
* @poll_init: ``int ()(struct uart_port *port)``
338
+
*
339
+
* Called by kgdb to perform the minimal hardware initialization needed to
340
+
* support @poll_put_char() and @poll_get_char(). Unlike @startup(), this
341
+
* should not request interrupts.
342
+
*
343
+
* Locking: %tty_mutex and tty_port->mutex taken.
344
+
* Interrupts: n/a.
345
+
*
346
+
* @poll_put_char: ``void ()(struct uart_port *port, unsigned char ch)``
347
+
*
348
+
* Called by kgdb to write a single character @ch directly to the serial
349
+
* @port. It can and should block until there is space in the TX FIFO.
350
+
*
351
+
* Locking: none.
352
+
* Interrupts: caller dependent.
353
+
* This call must not sleep
354
+
*
355
+
* @poll_get_char: ``int ()(struct uart_port *port)``
356
+
*
357
+
* Called by kgdb to read a single character directly from the serial
358
+
* port. If data is available, it should be returned; otherwise the
359
+
* function should return %NO_POLL_CHAR immediately.
360
+
*
361
+
* Locking: none.
362
+
* Interrupts: caller dependent.
363
+
* This call must not sleep
37
364
*/
38
365
struct uart_ops {
39
366
unsigned int (*tx_empty)(struct uart_port *);
···
383
56
void (*set_ldisc)(struct uart_port *, struct ktermios *);
384
57
void (*pm)(struct uart_port *, unsigned int state,
385
58
unsigned int oldstate);
386
-
387
-
/*
388
-
* Return a string describing the type of the port
389
-
*/
390
59
const char *(*type)(struct uart_port *);
391
-
392
-
/*
393
-
* Release IO and memory resources used by the port.
394
-
* This includes iounmap if necessary.
395
-
*/
396
60
void (*release_port)(struct uart_port *);
397
-
398
-
/*
399
-
* Request IO and memory resources used by the port.
400
-
* This includes iomapping the port if necessary.
401
-
*/
402
61
int (*request_port)(struct uart_port *);
403
62
void (*config_port)(struct uart_port *, int);
404
63
int (*verify_port)(struct uart_port *, struct serial_struct *);
···
446
133
unsigned int old);
447
134
void (*handle_break)(struct uart_port *);
448
135
int (*rs485_config)(struct uart_port *,
136
+
struct ktermios *termios,
449
137
struct serial_rs485 *rs485);
450
138
int (*iso7816_config)(struct uart_port *,
451
139
struct serial_iso7816 *iso7816);
···
546
232
547
233
int hw_stopped; /* sw-assisted CTS flow state */
548
234
unsigned int mctrl; /* current modem ctrl settings */
549
-
unsigned int timeout; /* character-based timeout */
550
235
unsigned int frame_time; /* frame timing in ns */
551
236
unsigned int type; /* port type */
552
237
const struct uart_ops *ops;
···
568
255
struct attribute_group *attr_group; /* port specific attributes */
569
256
const struct attribute_group **tty_groups; /* all attributes (serial core use only) */
570
257
struct serial_rs485 rs485;
258
+
struct serial_rs485 rs485_supported; /* Supported mask for serial_rs485 */
571
259
struct gpio_desc *rs485_term_gpio; /* enable RS485 bus termination */
572
260
struct serial_iso7816 iso7816;
573
261
void *private_data; /* generic platform data pointer */
···
648
334
unsigned int max);
649
335
unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
650
336
337
+
/*
338
+
* Calculates FIFO drain time.
339
+
*/
340
+
static inline unsigned long uart_fifo_timeout(struct uart_port *port)
341
+
{
342
+
u64 fifo_timeout = (u64)READ_ONCE(port->frame_time) * port->fifosize;
343
+
344
+
/* Add .02 seconds of slop */
345
+
fifo_timeout += 20 * NSEC_PER_MSEC;
346
+
347
+
return max(nsecs_to_jiffies(fifo_timeout), 1UL);
348
+
}
349
+
651
350
/* Base timer interval for polling */
652
351
static inline int uart_poll_timeout(struct uart_port *port)
653
352
{
654
-
int timeout = port->timeout;
353
+
int timeout = uart_fifo_timeout(port);
655
354
656
355
return timeout > 6 ? (timeout / 2 - 2) : 1;
657
356
}
···
925
598
!((cflag) & CLOCAL))
926
599
927
600
int uart_get_rs485_mode(struct uart_port *port);
601
+
int uart_rs485_config(struct uart_port *port);
928
602
#endif /* LINUX_SERIAL_CORE_H */
+1
-1
include/linux/serial_s3c.h
+1
-1
include/linux/serial_s3c.h
···
83
83
#define S3C2410_UCON_RXIRQMODE (1<<0)
84
84
#define S3C2410_UCON_RXFIFO_TOI (1<<7)
85
85
#define S3C2443_UCON_RXERR_IRQEN (1<<6)
86
-
#define S3C2443_UCON_LOOPBACK (1<<5)
86
+
#define S3C2410_UCON_LOOPBACK (1<<5)
87
87
88
88
#define S3C2410_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
89
89
S3C2410_UCON_RXILEVEL | \
+1
include/linux/tty_buffer.h
+1
include/linux/tty_buffer.h
+14
include/linux/tty_ldisc.h
+14
include/linux/tty_ldisc.h
···
186
186
* indicate all data received is %TTY_NORMAL. If assigned, prefer this
187
187
* function for automatic flow control.
188
188
*
189
+
* @lookahead_buf: [DRV] ``void ()(struct tty_struct *tty,
190
+
* const unsigned char *cp, const char *fp, int count)``
191
+
*
192
+
* This function is called by the low-level tty driver for characters
193
+
* not eaten by ->receive_buf() or ->receive_buf2(). It is useful for
194
+
* processing high-priority characters such as software flow-control
195
+
* characters that could otherwise get stuck into the intermediate
196
+
* buffer until tty has room to receive them. Ldisc must be able to
197
+
* handle later a ->receive_buf() or ->receive_buf2() call for the
198
+
* same characters (e.g. by skipping the actions for high-priority
199
+
* characters already handled by ->lookahead_buf()).
200
+
*
189
201
* @owner: module containting this ldisc (for reference counting)
190
202
*
191
203
* This structure defines the interface between the tty line discipline
···
241
229
void (*dcd_change)(struct tty_struct *tty, unsigned int status);
242
230
int (*receive_buf2)(struct tty_struct *tty, const unsigned char *cp,
243
231
const char *fp, int count);
232
+
void (*lookahead_buf)(struct tty_struct *tty, const unsigned char *cp,
233
+
const unsigned char *fp, unsigned int count);
244
234
245
235
struct module *owner;
246
236
};
+2
include/linux/tty_port.h
+2
include/linux/tty_port.h
···
40
40
41
41
struct tty_port_client_operations {
42
42
int (*receive_buf)(struct tty_port *port, const unsigned char *, const unsigned char *, size_t);
43
+
void (*lookahead_buf)(struct tty_port *port, const unsigned char *cp,
44
+
const unsigned char *fp, unsigned int count);
43
45
void (*write_wakeup)(struct tty_port *port);
44
46
};
45
47
+1
include/uapi/asm-generic/termbits-common.h
+1
include/uapi/asm-generic/termbits-common.h
+18
-2
include/uapi/linux/serial.h
+18
-2
include/uapi/linux/serial.h
···
126
126
#define SER_RS485_TERMINATE_BUS (1 << 5) /* Enable bus
127
127
termination
128
128
(if supported) */
129
+
130
+
/* RS-485 addressing mode */
131
+
#define SER_RS485_ADDRB (1 << 6) /* Enable addressing mode */
132
+
#define SER_RS485_ADDR_RECV (1 << 7) /* Receive address filter */
133
+
#define SER_RS485_ADDR_DEST (1 << 8) /* Destination address */
134
+
129
135
__u32 delay_rts_before_send; /* Delay before send (milliseconds) */
130
136
__u32 delay_rts_after_send; /* Delay after send (milliseconds) */
131
-
__u32 padding[5]; /* Memory is cheap, new structs
132
-
are a royal PITA .. */
137
+
138
+
/* The fields below are defined by flags */
139
+
union {
140
+
__u32 padding[5]; /* Memory is cheap, new structs are a pain */
141
+
142
+
struct {
143
+
__u8 addr_recv;
144
+
__u8 addr_dest;
145
+
__u8 padding0[2];
146
+
__u32 padding1[4];
147
+
};
148
+
};
133
149
};
134
150
135
151
/*
-4
include/uapi/linux/serial_core.h
-4
include/uapi/linux/serial_core.h
+2
-2
include/uapi/linux/serial_reg.h
+2
-2
include/uapi/linux/serial_reg.h
···
139
139
#define UART_LSR_PE 0x04 /* Parity error indicator */
140
140
#define UART_LSR_OE 0x02 /* Overrun error indicator */
141
141
#define UART_LSR_DR 0x01 /* Receiver data ready */
142
-
#define UART_LSR_BRK_ERROR_BITS 0x1E /* BI, FE, PE, OE bits */
142
+
#define UART_LSR_BRK_ERROR_BITS (UART_LSR_BI|UART_LSR_FE|UART_LSR_PE|UART_LSR_OE)
143
143
144
144
#define UART_MSR 6 /* In: Modem Status Register */
145
145
#define UART_MSR_DCD 0x80 /* Data Carrier Detect */
···
150
150
#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */
151
151
#define UART_MSR_DDSR 0x02 /* Delta DSR */
152
152
#define UART_MSR_DCTS 0x01 /* Delta CTS */
153
-
#define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */
153
+
#define UART_MSR_ANY_DELTA (UART_MSR_DDCD|UART_MSR_TERI|UART_MSR_DDSR|UART_MSR_DCTS)
154
154
155
155
#define UART_SCR 7 /* I/O: Scratch Register */
156
156