Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
pmdomain: Merge branch dt into next
Merge the immutable branch dt into next, to allow the DT bindings to be
tested together with changes that are targeted for v6.18.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+42
-6
+24
-6
Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml
+24
-6
Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml
···
19
19
20
20
properties:
21
21
compatible:
22
-
enum:
23
-
- marvell,pxa1908-apbc
24
-
- marvell,pxa1908-apbcp
25
-
- marvell,pxa1908-mpmu
26
-
- marvell,pxa1908-apmu
22
+
oneOf:
23
+
- enum:
24
+
- marvell,pxa1908-apbc
25
+
- marvell,pxa1908-apbcp
26
+
- marvell,pxa1908-mpmu
27
+
- items:
28
+
- const: marvell,pxa1908-apmu
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+
- const: syscon
27
30
28
31
reg:
29
32
maxItems: 1
30
33
31
34
'#clock-cells':
35
+
const: 1
36
+
37
+
'#power-domain-cells':
32
38
const: 1
33
39
34
40
required:
···
44
38
45
39
additionalProperties: false
46
40
41
+
if:
42
+
not:
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+
properties:
44
+
compatible:
45
+
contains:
46
+
const: marvell,pxa1908-apmu
47
+
48
+
then:
49
+
properties:
50
+
'#power-domain-cells': false
51
+
47
52
examples:
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53
# APMU block:
49
54
- |
50
55
clock-controller@d4282800 {
51
-
compatible = "marvell,pxa1908-apmu";
56
+
compatible = "marvell,pxa1908-apmu", "syscon";
52
57
reg = <0xd4282800 0x400>;
53
58
#clock-cells = <1>;
59
+
#power-domain-cells = <1>;
54
60
};
+1
MAINTAINERS
+1
MAINTAINERS
···
2872
2872
F: arch/arm64/boot/dts/marvell/mmp/
2873
2873
F: drivers/clk/mmp/clk-pxa1908*.c
2874
2874
F: include/dt-bindings/clock/marvell,pxa1908.h
2875
+
F: include/dt-bindings/power/marvell,pxa1908-power.h
2875
2876
2876
2877
ARM/Mediatek RTC DRIVER
2877
2878
M: Eddie Huang <eddie.huang@mediatek.com>
+17
include/dt-bindings/power/marvell,pxa1908-power.h
+17
include/dt-bindings/power/marvell,pxa1908-power.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
2
+
/*
3
+
* Marvell PXA1908 power domains
4
+
*
5
+
* Copyright 2025, Duje Mihanović <duje@dujemihanovic.xyz>
6
+
*/
7
+
8
+
#ifndef __DTS_MARVELL_PXA1908_POWER_H
9
+
#define __DTS_MARVELL_PXA1908_POWER_H
10
+
11
+
#define PXA1908_POWER_DOMAIN_VPU 0
12
+
#define PXA1908_POWER_DOMAIN_GPU 1
13
+
#define PXA1908_POWER_DOMAIN_GPU2D 2
14
+
#define PXA1908_POWER_DOMAIN_DSI 3
15
+
#define PXA1908_POWER_DOMAIN_ISP 4
16
+
17
+
#endif