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ARM: dts: r9a06g032: Add internal PCI bridge node

Add the device node for the r9a06g032 internal PCI bridge device.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20220429134143.628428-6-herve.codina@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

authored by

Herve Codina and committed by
Geert Uytterhoeven
627632dc d8ff11cd

+29
+29
arch/arm/boot/dts/r9a06g032.dtsi
··· 117 117 }; 118 118 }; 119 119 120 + pci_usb: pci@40030000 { 121 + compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1"; 122 + device_type = "pci"; 123 + clocks = <&sysctrl R9A06G032_HCLK_USBH>, 124 + <&sysctrl R9A06G032_HCLK_USBPM>, 125 + <&sysctrl R9A06G032_CLK_PCI_USB>; 126 + clock-names = "hclkh", "hclkpm", "pciclk"; 127 + power-domains = <&sysctrl>; 128 + reg = <0x40030000 0xc00>, 129 + <0x40020000 0x1100>; 130 + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 131 + status = "disabled"; 132 + 133 + bus-range = <0 0>; 134 + #address-cells = <3>; 135 + #size-cells = <2>; 136 + #interrupt-cells = <1>; 137 + ranges = <0x02000000 0 0x40020000 0x40020000 0 0x00010000>; 138 + /* Should map all possible DDR as inbound ranges, but 139 + * the IP only supports a 256MB, 512MB, or 1GB window. 140 + * flags, PCI addr (64-bit), CPU addr, PCI size (64-bit) 141 + */ 142 + dma-ranges = <0x42000000 0 0x80000000 0x80000000 0 0x40000000>; 143 + interrupt-map-mask = <0xf800 0 0 0x7>; 144 + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH 145 + 0x0800 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH 146 + 0x1000 0 0 2 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 147 + }; 148 + 120 149 uart0: serial@40060000 { 121 150 compatible = "renesas,r9a06g032-uart", "renesas,rzn1-uart", "snps,dw-apb-uart"; 122 151 reg = <0x40060000 0x400>;