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drm/msm/dpu: Simplify using local 'ctl' variable

In few places we store 'phys_enc->hw_ctl' to local 'ctl' variable so use
it everywhere. No functional change.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/632389/
Link: https://lore.kernel.org/r/20250114155959.583889-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

authored by

Krzysztof Kozlowski and committed by
Dmitry Baryshkov
629ac9f0 23c0a9d3

+16 -16
+16 -16
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
··· 2183 2183 memset(&mixer, 0, sizeof(mixer)); 2184 2184 2185 2185 /* reset all mixers for this encoder */ 2186 - if (phys_enc->hw_ctl->ops.clear_all_blendstages) 2187 - phys_enc->hw_ctl->ops.clear_all_blendstages(phys_enc->hw_ctl); 2186 + if (ctl->ops.clear_all_blendstages) 2187 + ctl->ops.clear_all_blendstages(ctl); 2188 2188 2189 2189 global_state = dpu_kms_get_existing_global_state(phys_enc->dpu_kms); 2190 2190 ··· 2193 2193 2194 2194 for (i = 0; i < num_lm; i++) { 2195 2195 hw_mixer[i] = to_dpu_hw_mixer(hw_lm[i]); 2196 - if (phys_enc->hw_ctl->ops.update_pending_flush_mixer) 2197 - phys_enc->hw_ctl->ops.update_pending_flush_mixer(ctl, hw_mixer[i]->idx); 2196 + if (ctl->ops.update_pending_flush_mixer) 2197 + ctl->ops.update_pending_flush_mixer(ctl, hw_mixer[i]->idx); 2198 2198 2199 2199 /* clear all blendstages */ 2200 - if (phys_enc->hw_ctl->ops.setup_blendstage) 2201 - phys_enc->hw_ctl->ops.setup_blendstage(ctl, hw_mixer[i]->idx, NULL); 2200 + if (ctl->ops.setup_blendstage) 2201 + ctl->ops.setup_blendstage(ctl, hw_mixer[i]->idx, NULL); 2202 2202 } 2203 2203 } 2204 2204 ··· 2250 2250 2251 2251 dpu_enc = to_dpu_encoder_virt(phys_enc->parent); 2252 2252 2253 - phys_enc->hw_ctl->ops.reset(ctl); 2253 + ctl->ops.reset(ctl); 2254 2254 2255 2255 dpu_encoder_helper_reset_mixers(phys_enc); 2256 2256 ··· 2265 2265 phys_enc->hw_wb->ops.bind_pingpong_blk(phys_enc->hw_wb, PINGPONG_NONE); 2266 2266 2267 2267 /* mark WB flush as pending */ 2268 - if (phys_enc->hw_ctl->ops.update_pending_flush_wb) 2269 - phys_enc->hw_ctl->ops.update_pending_flush_wb(ctl, phys_enc->hw_wb->idx); 2268 + if (ctl->ops.update_pending_flush_wb) 2269 + ctl->ops.update_pending_flush_wb(ctl, phys_enc->hw_wb->idx); 2270 2270 } else { 2271 2271 for (i = 0; i < dpu_enc->num_phys_encs; i++) { 2272 2272 if (dpu_enc->phys_encs[i] && phys_enc->hw_intf->ops.bind_pingpong_blk) ··· 2275 2275 PINGPONG_NONE); 2276 2276 2277 2277 /* mark INTF flush as pending */ 2278 - if (phys_enc->hw_ctl->ops.update_pending_flush_intf) 2279 - phys_enc->hw_ctl->ops.update_pending_flush_intf(phys_enc->hw_ctl, 2278 + if (ctl->ops.update_pending_flush_intf) 2279 + ctl->ops.update_pending_flush_intf(ctl, 2280 2280 dpu_enc->phys_encs[i]->hw_intf->idx); 2281 2281 } 2282 2282 } ··· 2288 2288 if (phys_enc->hw_pp && phys_enc->hw_pp->merge_3d) { 2289 2289 phys_enc->hw_pp->merge_3d->ops.setup_3d_mode(phys_enc->hw_pp->merge_3d, 2290 2290 BLEND_3D_NONE); 2291 - if (phys_enc->hw_ctl->ops.update_pending_flush_merge_3d) 2292 - phys_enc->hw_ctl->ops.update_pending_flush_merge_3d(ctl, 2291 + if (ctl->ops.update_pending_flush_merge_3d) 2292 + ctl->ops.update_pending_flush_merge_3d(ctl, 2293 2293 phys_enc->hw_pp->merge_3d->idx); 2294 2294 } 2295 2295 ··· 2297 2297 if (phys_enc->hw_cdm->ops.bind_pingpong_blk && phys_enc->hw_pp) 2298 2298 phys_enc->hw_cdm->ops.bind_pingpong_blk(phys_enc->hw_cdm, 2299 2299 PINGPONG_NONE); 2300 - if (phys_enc->hw_ctl->ops.update_pending_flush_cdm) 2301 - phys_enc->hw_ctl->ops.update_pending_flush_cdm(phys_enc->hw_ctl, 2302 - phys_enc->hw_cdm->idx); 2300 + if (ctl->ops.update_pending_flush_cdm) 2301 + ctl->ops.update_pending_flush_cdm(ctl, 2302 + phys_enc->hw_cdm->idx); 2303 2303 } 2304 2304 2305 2305 if (dpu_enc->dsc) {