Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk fixes from Michael Turquette:
"Fix a bug in the at91 clk driver, two compile time warnings in sunxi
clk drivers, and one bug in a sunxi clk driver introduced in the 4.7
merge window"
* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: at91: fix clk_programmable_set_parent()
clk: sunxi: remove unused variable
clk: sunxi: display: Add per-clock flags
clk: sunxi: tcon-ch1: Do not return a negative error in get_parent
+5
-6
+1
-1
drivers/clk/at91/clk-programmable.c
+1
-1
drivers/clk/at91/clk-programmable.c
···
99
99
struct clk_programmable *prog = to_clk_programmable(hw);
100
100
const struct clk_programmable_layout *layout = prog->layout;
101
101
unsigned int mask = layout->css_mask;
102
-
unsigned int pckr = 0;
102
+
unsigned int pckr = index;
103
103
104
104
if (layout->have_slck_mck)
105
105
mask |= AT91_PMC_CSSMCK_MCK;
+4
-1
drivers/clk/sunxi/clk-sun4i-display.c
+4
-1
drivers/clk/sunxi/clk-sun4i-display.c
···
33
33
34
34
u8 width_div;
35
35
u8 width_mux;
36
+
37
+
u32 flags;
36
38
};
37
39
38
40
struct reset_data {
···
168
166
data->has_div ? &div->hw : NULL,
169
167
data->has_div ? &clk_divider_ops : NULL,
170
168
&gate->hw, &clk_gate_ops,
171
-
0);
169
+
data->flags);
172
170
if (IS_ERR(clk)) {
173
171
pr_err("%s: Couldn't register the clock\n", clk_name);
174
172
goto free_div;
···
234
232
.offset_rst = 29,
235
233
.offset_mux = 24,
236
234
.width_mux = 2,
235
+
.flags = CLK_SET_RATE_PARENT,
237
236
};
238
237
239
238
static void __init sun4i_a10_tcon_ch0_setup(struct device_node *node)
-4
drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
-4
drivers/clk/sunxi/clk-sun4i-tcon-ch1.c
···
79
79
static u8 tcon_ch1_get_parent(struct clk_hw *hw)
80
80
{
81
81
struct tcon_ch1_clk *tclk = hw_to_tclk(hw);
82
-
int num_parents = clk_hw_get_num_parents(hw);
83
82
u32 reg;
84
83
85
84
reg = readl(tclk->reg) >> TCON_CH1_SCLK2_MUX_SHIFT;
86
85
reg &= reg >> TCON_CH1_SCLK2_MUX_MASK;
87
-
88
-
if (reg >= num_parents)
89
-
return -EINVAL;
90
86
91
87
return reg;
92
88
}