Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
net: dsa: mv88e6xxx: Make global2 support mandatory
Early generations of the mv88e6xxx did not have the global 2
registers. In order to keep the driver slim, it was decided to make
the code for these registers optional. Over time, more generations of
switches have been added, always supporting global 2 and adding more
and more registers. No effort has been made to keep these additional
registers also optional to slim the driver down when used for older
generations. Optional global 2 now just gives additional development
and maintenance burden for no real gain.
Make global 2 support always compiled in.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Tested-by: Vladimir Oltean <olteanv@gmail.com>
Link: https://lore.kernel.org/r/20210127003210.663173-1-andrew@lunn.ch
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
authored by
Andrew Lunn
and committed by
Jakub Kicinski
63368a74
5998dd02
+3
-213
-12
drivers/net/dsa/mv88e6xxx/Kconfig
-12
drivers/net/dsa/mv88e6xxx/Kconfig
···
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9
This driver adds support for most of the Marvell 88E6xxx models of
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Ethernet switch chips, except 88E6060.
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-
config NET_DSA_MV88E6XXX_GLOBAL2
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bool "Switch Global 2 Registers support"
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default y
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depends on NET_DSA_MV88E6XXX
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help
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This registers set at internal SMI address 0x1C provides extended
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features like EEPROM interface, trunking, cross-chip setup, etc.
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-
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It is required on most chips. If the chip you compile the support for
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doesn't have such registers set, say N here. In doubt, say Y.
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-
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config NET_DSA_MV88E6XXX_PTP
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bool "PTP support for Marvell 88E6xxx"
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default n
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depends on NET_DSA_MV88E6XXX_GLOBAL2
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depends on PTP_1588_CLOCK
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help
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Say Y to enable PTP hardware timestamping on Marvell 88E6xxx switch
+3
-3
drivers/net/dsa/mv88e6xxx/Makefile
+3
-3
drivers/net/dsa/mv88e6xxx/Makefile
···
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mv88e6xxx-objs += global1.o
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mv88e6xxx-objs += global1_atu.o
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mv88e6xxx-objs += global1_vtu.o
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mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_GLOBAL2) += global2.o
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mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_GLOBAL2) += global2_avb.o
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mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_GLOBAL2) += global2_scratch.o
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+
mv88e6xxx-objs += global2.o
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+
mv88e6xxx-objs += global2_avb.o
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mv88e6xxx-objs += global2_scratch.o
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mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_PTP) += hwtstamp.o
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mv88e6xxx-objs += phy.o
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mv88e6xxx-objs += port.o
-4
drivers/net/dsa/mv88e6xxx/chip.c
-4
drivers/net/dsa/mv88e6xxx/chip.c
···
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/* Update the compatible info with the probed one */
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chip->info = info;
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err = mv88e6xxx_g2_require(chip);
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if (err)
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return err;
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-
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dev_info(chip->dev, "switch 0x%x detected: %s, revision %u\n",
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chip->info->prod_num, chip->info->name, rev);
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5232
-194
drivers/net/dsa/mv88e6xxx/global2.h
-194
drivers/net/dsa/mv88e6xxx/global2.h
···
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#define MV88E6352_G2_SCRATCH_GPIO_PCTL_TRIG 1
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#define MV88E6352_G2_SCRATCH_GPIO_PCTL_EVREQ 2
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#ifdef CONFIG_NET_DSA_MV88E6XXX_GLOBAL2
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-
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static inline int mv88e6xxx_g2_require(struct mv88e6xxx_chip *chip)
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{
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return 0;
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}
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-
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int mv88e6xxx_g2_read(struct mv88e6xxx_chip *chip, int reg, u16 *val);
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int mv88e6xxx_g2_write(struct mv88e6xxx_chip *chip, int reg, u16 val);
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int mv88e6xxx_g2_wait_bit(struct mv88e6xxx_chip *chip, int reg,
···
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bool external);
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int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip, u16 kind, u16 bin);
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int mv88e6xxx_g2_atu_stats_get(struct mv88e6xxx_chip *chip, u16 *stats);
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-
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#else /* !CONFIG_NET_DSA_MV88E6XXX_GLOBAL2 */
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static inline int mv88e6xxx_g2_require(struct mv88e6xxx_chip *chip)
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-
{
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if (chip->info->global2_addr) {
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dev_err(chip->dev, "this chip requires CONFIG_NET_DSA_MV88E6XXX_GLOBAL2 enabled\n");
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return -EOPNOTSUPP;
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-
}
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return 0;
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}
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static inline int mv88e6xxx_g2_read(struct mv88e6xxx_chip *chip, int reg, u16 *val)
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{
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return -EOPNOTSUPP;
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-
}
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static inline int mv88e6xxx_g2_write(struct mv88e6xxx_chip *chip, int reg, u16 val)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_wait_bit(struct mv88e6xxx_chip *chip,
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int reg, int bit, int val)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6352_g2_irl_init_all(struct mv88e6xxx_chip *chip,
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int port)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6390_g2_irl_init_all(struct mv88e6xxx_chip *chip,
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int port)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_smi_phy_read(struct mv88e6xxx_chip *chip,
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struct mii_bus *bus,
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int addr, int reg, u16 *val)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_smi_phy_write(struct mv88e6xxx_chip *chip,
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struct mii_bus *bus,
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int addr, int reg, u16 val)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_set_switch_mac(struct mv88e6xxx_chip *chip,
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u8 *addr)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_get_eeprom8(struct mv88e6xxx_chip *chip,
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struct ethtool_eeprom *eeprom,
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u8 *data)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_set_eeprom8(struct mv88e6xxx_chip *chip,
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struct ethtool_eeprom *eeprom,
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u8 *data)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_get_eeprom16(struct mv88e6xxx_chip *chip,
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struct ethtool_eeprom *eeprom,
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u8 *data)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_set_eeprom16(struct mv88e6xxx_chip *chip,
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struct ethtool_eeprom *eeprom,
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u8 *data)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_pvt_write(struct mv88e6xxx_chip *chip,
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int src_dev, int src_port, u16 data)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_misc_4_bit_port(struct mv88e6xxx_chip *chip)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_irq_setup(struct mv88e6xxx_chip *chip)
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{
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return -EOPNOTSUPP;
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}
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static inline void mv88e6xxx_g2_irq_free(struct mv88e6xxx_chip *chip)
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{
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}
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static inline int mv88e6xxx_g2_irq_mdio_setup(struct mv88e6xxx_chip *chip,
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struct mii_bus *bus)
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{
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return 0;
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}
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static inline void mv88e6xxx_g2_irq_mdio_free(struct mv88e6xxx_chip *chip,
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struct mii_bus *bus)
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{
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}
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static inline int mv88e6185_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6352_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_pot_clear(struct mv88e6xxx_chip *chip)
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{
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return -EOPNOTSUPP;
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}
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static const struct mv88e6xxx_irq_ops mv88e6097_watchdog_ops = {};
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static const struct mv88e6xxx_irq_ops mv88e6250_watchdog_ops = {};
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static const struct mv88e6xxx_irq_ops mv88e6390_watchdog_ops = {};
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static const struct mv88e6xxx_avb_ops mv88e6165_avb_ops = {};
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static const struct mv88e6xxx_avb_ops mv88e6352_avb_ops = {};
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static const struct mv88e6xxx_avb_ops mv88e6390_avb_ops = {};
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static const struct mv88e6xxx_gpio_ops mv88e6352_gpio_ops = {};
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static inline int mv88e6xxx_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,
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bool external)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_trunk_clear(struct mv88e6xxx_chip *chip)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_trunk_mask_write(struct mv88e6xxx_chip *chip,
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int num, bool hash, u16 mask)
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{
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return -EOPNOTSUPP;
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-
}
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static inline int mv88e6xxx_g2_trunk_mapping_write(struct mv88e6xxx_chip *chip,
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int id, u16 map)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_device_mapping_write(struct mv88e6xxx_chip *chip,
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int target, int port)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip,
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u16 kind, u16 bin)
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{
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return -EOPNOTSUPP;
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}
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static inline int mv88e6xxx_g2_atu_stats_get(struct mv88e6xxx_chip *chip,
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u16 *stats)
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{
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return -EOPNOTSUPP;
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}
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#endif /* CONFIG_NET_DSA_MV88E6XXX_GLOBAL2 */
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#endif /* _MV88E6XXX_GLOBAL2_H */