Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'powerpc-5.13-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman:
- Fix a regression in the conversion of the 64-bit BookE interrupt
entry to C.
- Fix KVM hosts running with the hash MMU since the recent KVM gfn
changes.
- Fix a deadlock in our paravirt spinlocks when hcall tracing is
enabled.
- Several fixes for oopses in our runtime code patching for security
mitigations.
- A couple of minor fixes for the recent conversion of 32-bit interrupt
entry/exit to C.
- Fix __get_user() causing spurious crashes in sigreturn due to a bad
inline asm constraint, spotted with GCC 11.
- A fix for the way we track IRQ masking state vs NMI interrupts when
using the new scv system call entry path.
- A couple more minor fixes.
Thanks to Cédric Le Goater, Christian Zigotzky, Christophe Leroy,
Naveen N. Rao, Nicholas Piggin Paul Menzel, and Sean Christopherson.
* tag 'powerpc-5.13-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/64e/interrupt: Fix nvgprs being clobbered
powerpc/64s: Make NMI record implicitly soft-masked code as irqs disabled
powerpc/64s: Fix stf mitigation patching w/strict RWX & hash
powerpc/64s: Fix entry flush patching w/strict RWX & hash
powerpc/64s: Fix crashes when toggling entry flush barrier
powerpc/64s: Fix crashes when toggling stf barrier
KVM: PPC: Book3S HV: Fix kvm_unmap_gfn_range_hv() for Hash MMU
powerpc/legacy_serial: Fix UBSAN: array-index-out-of-bounds
powerpc/signal: Fix possible build failure with unsafe_copy_fpr_{to/from}_user
powerpc/uaccess: Fix __get_user() with CONFIG_CC_HAS_ASM_GOTO_OUTPUT
powerpc/pseries: warn if recursing into the hcall tracing code
powerpc/pseries: use notrace hcall variant for H_CEDE idle
powerpc/pseries: Don't trace hcall tracing wrapper
powerpc/pseries: Fix hcall tracing recursion in pv queued spinlocks
powerpc/syscall: Calling kuap_save_and_lock() is wrong
powerpc/interrupts: Fix kuep_unlock() call
+175
-75
+3
arch/powerpc/include/asm/hvcall.h
+3
arch/powerpc/include/asm/hvcall.h
···
448
448
*/
449
449
long plpar_hcall_norets(unsigned long opcode, ...);
450
450
451
+
/* Variant which does not do hcall tracing */
452
+
long plpar_hcall_norets_notrace(unsigned long opcode, ...);
453
+
451
454
/**
452
455
* plpar_hcall: - Make a pseries hypervisor call
453
456
* @opcode: The hypervisor call to make.
+7
-2
arch/powerpc/include/asm/interrupt.h
+7
-2
arch/powerpc/include/asm/interrupt.h
···
153
153
*/
154
154
static inline void interrupt_exit_prepare(struct pt_regs *regs, struct interrupt_state *state)
155
155
{
156
-
if (user_mode(regs))
157
-
kuep_unlock();
158
156
}
159
157
160
158
static inline void interrupt_async_enter_prepare(struct pt_regs *regs, struct interrupt_state *state)
···
219
221
*/
220
222
local_paca->irq_soft_mask = IRQS_ALL_DISABLED;
221
223
local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
224
+
225
+
if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) && !(regs->msr & MSR_PR) &&
226
+
regs->nip < (unsigned long)__end_interrupts) {
227
+
// Kernel code running below __end_interrupts is
228
+
// implicitly soft-masked.
229
+
regs->softe = IRQS_ALL_DISABLED;
230
+
}
222
231
223
232
/* Don't do any per-CPU operations until interrupt state is fixed */
224
233
+19
-3
arch/powerpc/include/asm/paravirt.h
+19
-3
arch/powerpc/include/asm/paravirt.h
···
28
28
return be32_to_cpu(yield_count);
29
29
}
30
30
31
+
/*
32
+
* Spinlock code confers and prods, so don't trace the hcalls because the
33
+
* tracing code takes spinlocks which can cause recursion deadlocks.
34
+
*
35
+
* These calls are made while the lock is not held: the lock slowpath yields if
36
+
* it can not acquire the lock, and unlock slow path might prod if a waiter has
37
+
* yielded). So this may not be a problem for simple spin locks because the
38
+
* tracing does not technically recurse on the lock, but we avoid it anyway.
39
+
*
40
+
* However the queued spin lock contended path is more strictly ordered: the
41
+
* H_CONFER hcall is made after the task has queued itself on the lock, so then
42
+
* recursing on that lock will cause the task to then queue up again behind the
43
+
* first instance (or worse: queued spinlocks use tricks that assume a context
44
+
* never waits on more than one spinlock, so such recursion may cause random
45
+
* corruption in the lock code).
46
+
*/
31
47
static inline void yield_to_preempted(int cpu, u32 yield_count)
32
48
{
33
-
plpar_hcall_norets(H_CONFER, get_hard_smp_processor_id(cpu), yield_count);
49
+
plpar_hcall_norets_notrace(H_CONFER, get_hard_smp_processor_id(cpu), yield_count);
34
50
}
35
51
36
52
static inline void prod_cpu(int cpu)
37
53
{
38
-
plpar_hcall_norets(H_PROD, get_hard_smp_processor_id(cpu));
54
+
plpar_hcall_norets_notrace(H_PROD, get_hard_smp_processor_id(cpu));
39
55
}
40
56
41
57
static inline void yield_to_any(void)
42
58
{
43
-
plpar_hcall_norets(H_CONFER, -1, 0);
59
+
plpar_hcall_norets_notrace(H_CONFER, -1, 0);
44
60
}
45
61
#else
46
62
static inline bool is_shared_processor(void)
+5
-1
arch/powerpc/include/asm/plpar_wrappers.h
+5
-1
arch/powerpc/include/asm/plpar_wrappers.h
···
28
28
29
29
static inline long cede_processor(void)
30
30
{
31
-
return plpar_hcall_norets(H_CEDE);
31
+
/*
32
+
* We cannot call tracepoints inside RCU idle regions which
33
+
* means we must not trace H_CEDE.
34
+
*/
35
+
return plpar_hcall_norets_notrace(H_CEDE);
32
36
}
33
37
34
38
static inline long extended_cede_processor(unsigned long latency_hint)
+1
-1
arch/powerpc/include/asm/uaccess.h
+1
-1
arch/powerpc/include/asm/uaccess.h
+24
-14
arch/powerpc/kernel/exceptions-64e.S
+24
-14
arch/powerpc/kernel/exceptions-64e.S
···
340
340
andi. r10,r10,IRQS_DISABLED; /* yes -> go out of line */ \
341
341
bne masked_interrupt_book3e_##n
342
342
343
+
/*
344
+
* Additional regs must be re-loaded from paca before EXCEPTION_COMMON* is
345
+
* called, because that does SAVE_NVGPRS which must see the original register
346
+
* values, otherwise the scratch values might be restored when exiting the
347
+
* interrupt.
348
+
*/
343
349
#define PROLOG_ADDITION_2REGS_GEN(n) \
344
350
std r14,PACA_EXGEN+EX_R14(r13); \
345
351
std r15,PACA_EXGEN+EX_R15(r13)
···
541
535
PROLOG_ADDITION_2REGS)
542
536
mfspr r14,SPRN_DEAR
543
537
mfspr r15,SPRN_ESR
538
+
std r14,_DAR(r1)
539
+
std r15,_DSISR(r1)
540
+
ld r14,PACA_EXGEN+EX_R14(r13)
541
+
ld r15,PACA_EXGEN+EX_R15(r13)
544
542
EXCEPTION_COMMON(0x300)
545
543
b storage_fault_common
546
544
···
554
544
PROLOG_ADDITION_2REGS)
555
545
li r15,0
556
546
mr r14,r10
547
+
std r14,_DAR(r1)
548
+
std r15,_DSISR(r1)
549
+
ld r14,PACA_EXGEN+EX_R14(r13)
550
+
ld r15,PACA_EXGEN+EX_R15(r13)
557
551
EXCEPTION_COMMON(0x400)
558
552
b storage_fault_common
559
553
···
571
557
PROLOG_ADDITION_2REGS)
572
558
mfspr r14,SPRN_DEAR
573
559
mfspr r15,SPRN_ESR
560
+
std r14,_DAR(r1)
561
+
std r15,_DSISR(r1)
562
+
ld r14,PACA_EXGEN+EX_R14(r13)
563
+
ld r15,PACA_EXGEN+EX_R15(r13)
574
564
EXCEPTION_COMMON(0x600)
575
565
b alignment_more /* no room, go out of line */
576
566
···
583
565
NORMAL_EXCEPTION_PROLOG(0x700, BOOKE_INTERRUPT_PROGRAM,
584
566
PROLOG_ADDITION_1REG)
585
567
mfspr r14,SPRN_ESR
586
-
EXCEPTION_COMMON(0x700)
587
568
std r14,_DSISR(r1)
588
-
addi r3,r1,STACK_FRAME_OVERHEAD
589
569
ld r14,PACA_EXGEN+EX_R14(r13)
570
+
EXCEPTION_COMMON(0x700)
571
+
addi r3,r1,STACK_FRAME_OVERHEAD
590
572
bl program_check_exception
591
573
REST_NVGPRS(r1)
592
574
b interrupt_return
···
743
725
* normal exception
744
726
*/
745
727
mfspr r14,SPRN_DBSR
746
-
EXCEPTION_COMMON_CRIT(0xd00)
747
728
std r14,_DSISR(r1)
748
-
addi r3,r1,STACK_FRAME_OVERHEAD
749
729
ld r14,PACA_EXCRIT+EX_R14(r13)
750
730
ld r15,PACA_EXCRIT+EX_R15(r13)
731
+
EXCEPTION_COMMON_CRIT(0xd00)
732
+
addi r3,r1,STACK_FRAME_OVERHEAD
751
733
bl DebugException
752
734
REST_NVGPRS(r1)
753
735
b interrupt_return
···
814
796
* normal exception
815
797
*/
816
798
mfspr r14,SPRN_DBSR
817
-
EXCEPTION_COMMON_DBG(0xd08)
818
799
std r14,_DSISR(r1)
819
-
addi r3,r1,STACK_FRAME_OVERHEAD
820
800
ld r14,PACA_EXDBG+EX_R14(r13)
821
801
ld r15,PACA_EXDBG+EX_R15(r13)
802
+
EXCEPTION_COMMON_DBG(0xd08)
803
+
addi r3,r1,STACK_FRAME_OVERHEAD
822
804
bl DebugException
823
805
REST_NVGPRS(r1)
824
806
b interrupt_return
···
949
931
* original values stashed away in the PACA
950
932
*/
951
933
storage_fault_common:
952
-
std r14,_DAR(r1)
953
-
std r15,_DSISR(r1)
954
934
addi r3,r1,STACK_FRAME_OVERHEAD
955
-
ld r14,PACA_EXGEN+EX_R14(r13)
956
-
ld r15,PACA_EXGEN+EX_R15(r13)
957
935
bl do_page_fault
958
936
b interrupt_return
959
937
···
958
944
* continues here.
959
945
*/
960
946
alignment_more:
961
-
std r14,_DAR(r1)
962
-
std r15,_DSISR(r1)
963
947
addi r3,r1,STACK_FRAME_OVERHEAD
964
-
ld r14,PACA_EXGEN+EX_R14(r13)
965
-
ld r15,PACA_EXGEN+EX_R15(r13)
966
948
bl alignment_exception
967
949
REST_NVGPRS(r1)
968
950
b interrupt_return
+1
-3
arch/powerpc/kernel/interrupt.c
+1
-3
arch/powerpc/kernel/interrupt.c
···
34
34
syscall_fn f;
35
35
36
36
kuep_lock();
37
-
#ifdef CONFIG_PPC32
38
-
kuap_save_and_lock(regs);
39
-
#endif
40
37
41
38
regs->orig_gpr3 = r3;
42
39
···
424
427
425
428
/* Restore user access locks last */
426
429
kuap_user_restore(regs);
430
+
kuep_unlock();
427
431
428
432
return ret;
429
433
}
+5
-2
arch/powerpc/kernel/legacy_serial.c
+5
-2
arch/powerpc/kernel/legacy_serial.c
···
356
356
357
357
static int __init ioremap_legacy_serial_console(void)
358
358
{
359
-
struct legacy_serial_info *info = &legacy_serial_infos[legacy_serial_console];
360
-
struct plat_serial8250_port *port = &legacy_serial_ports[legacy_serial_console];
359
+
struct plat_serial8250_port *port;
360
+
struct legacy_serial_info *info;
361
361
void __iomem *vaddr;
362
362
363
363
if (legacy_serial_console < 0)
364
364
return 0;
365
+
366
+
info = &legacy_serial_infos[legacy_serial_console];
367
+
port = &legacy_serial_ports[legacy_serial_console];
365
368
366
369
if (!info->early_addr)
367
370
return 0;
+2
-2
arch/powerpc/kernel/signal.h
+2
-2
arch/powerpc/kernel/signal.h
···
166
166
}
167
167
#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
168
168
#else
169
-
#define unsafe_copy_fpr_to_user(to, task, label) do { } while (0)
169
+
#define unsafe_copy_fpr_to_user(to, task, label) do { if (0) goto label;} while (0)
170
170
171
-
#define unsafe_copy_fpr_from_user(task, from, label) do { } while (0)
171
+
#define unsafe_copy_fpr_from_user(task, from, label) do { if (0) goto label;} while (0)
172
172
173
173
static inline unsigned long
174
174
copy_fpr_to_user(void __user *to, struct task_struct *task)
+1
-1
arch/powerpc/kvm/book3s_64_mmu_hv.c
+1
-1
arch/powerpc/kvm/book3s_64_mmu_hv.c
+85
-29
arch/powerpc/lib/feature-fixups.c
+85
-29
arch/powerpc/lib/feature-fixups.c
···
14
14
#include <linux/string.h>
15
15
#include <linux/init.h>
16
16
#include <linux/sched/mm.h>
17
+
#include <linux/stop_machine.h>
17
18
#include <asm/cputable.h>
18
19
#include <asm/code-patching.h>
19
20
#include <asm/page.h>
···
150
149
151
150
pr_devel("patching dest %lx\n", (unsigned long)dest);
152
151
153
-
patch_instruction((struct ppc_inst *)dest, ppc_inst(instrs[0]));
154
-
155
-
if (types & STF_BARRIER_FALLBACK)
152
+
// See comment in do_entry_flush_fixups() RE order of patching
153
+
if (types & STF_BARRIER_FALLBACK) {
154
+
patch_instruction((struct ppc_inst *)dest, ppc_inst(instrs[0]));
155
+
patch_instruction((struct ppc_inst *)(dest + 2), ppc_inst(instrs[2]));
156
156
patch_branch((struct ppc_inst *)(dest + 1),
157
-
(unsigned long)&stf_barrier_fallback,
158
-
BRANCH_SET_LINK);
159
-
else
160
-
patch_instruction((struct ppc_inst *)(dest + 1),
161
-
ppc_inst(instrs[1]));
162
-
163
-
patch_instruction((struct ppc_inst *)(dest + 2), ppc_inst(instrs[2]));
157
+
(unsigned long)&stf_barrier_fallback, BRANCH_SET_LINK);
158
+
} else {
159
+
patch_instruction((struct ppc_inst *)(dest + 1), ppc_inst(instrs[1]));
160
+
patch_instruction((struct ppc_inst *)(dest + 2), ppc_inst(instrs[2]));
161
+
patch_instruction((struct ppc_inst *)dest, ppc_inst(instrs[0]));
162
+
}
164
163
}
165
164
166
165
printk(KERN_DEBUG "stf-barrier: patched %d entry locations (%s barrier)\n", i,
···
228
227
: "unknown");
229
228
}
230
229
230
+
static int __do_stf_barrier_fixups(void *data)
231
+
{
232
+
enum stf_barrier_type *types = data;
233
+
234
+
do_stf_entry_barrier_fixups(*types);
235
+
do_stf_exit_barrier_fixups(*types);
236
+
237
+
return 0;
238
+
}
231
239
232
240
void do_stf_barrier_fixups(enum stf_barrier_type types)
233
241
{
234
-
do_stf_entry_barrier_fixups(types);
235
-
do_stf_exit_barrier_fixups(types);
242
+
/*
243
+
* The call to the fallback entry flush, and the fallback/sync-ori exit
244
+
* flush can not be safely patched in/out while other CPUs are executing
245
+
* them. So call __do_stf_barrier_fixups() on one CPU while all other CPUs
246
+
* spin in the stop machine core with interrupts hard disabled.
247
+
*/
248
+
stop_machine(__do_stf_barrier_fixups, &types, NULL);
236
249
}
237
250
238
251
void do_uaccess_flush_fixups(enum l1d_flush_type types)
···
299
284
: "unknown");
300
285
}
301
286
302
-
void do_entry_flush_fixups(enum l1d_flush_type types)
287
+
static int __do_entry_flush_fixups(void *data)
303
288
{
289
+
enum l1d_flush_type types = *(enum l1d_flush_type *)data;
304
290
unsigned int instrs[3], *dest;
305
291
long *start, *end;
306
292
int i;
···
325
309
if (types & L1D_FLUSH_MTTRIG)
326
310
instrs[i++] = 0x7c12dba6; /* mtspr TRIG2,r0 (SPR #882) */
327
311
312
+
/*
313
+
* If we're patching in or out the fallback flush we need to be careful about the
314
+
* order in which we patch instructions. That's because it's possible we could
315
+
* take a page fault after patching one instruction, so the sequence of
316
+
* instructions must be safe even in a half patched state.
317
+
*
318
+
* To make that work, when patching in the fallback flush we patch in this order:
319
+
* - the mflr (dest)
320
+
* - the mtlr (dest + 2)
321
+
* - the branch (dest + 1)
322
+
*
323
+
* That ensures the sequence is safe to execute at any point. In contrast if we
324
+
* patch the mtlr last, it's possible we could return from the branch and not
325
+
* restore LR, leading to a crash later.
326
+
*
327
+
* When patching out the fallback flush (either with nops or another flush type),
328
+
* we patch in this order:
329
+
* - the branch (dest + 1)
330
+
* - the mtlr (dest + 2)
331
+
* - the mflr (dest)
332
+
*
333
+
* Note we are protected by stop_machine() from other CPUs executing the code in a
334
+
* semi-patched state.
335
+
*/
336
+
328
337
start = PTRRELOC(&__start___entry_flush_fixup);
329
338
end = PTRRELOC(&__stop___entry_flush_fixup);
330
339
for (i = 0; start < end; start++, i++) {
···
357
316
358
317
pr_devel("patching dest %lx\n", (unsigned long)dest);
359
318
360
-
patch_instruction((struct ppc_inst *)dest, ppc_inst(instrs[0]));
361
-
362
-
if (types == L1D_FLUSH_FALLBACK)
363
-
patch_branch((struct ppc_inst *)(dest + 1), (unsigned long)&entry_flush_fallback,
364
-
BRANCH_SET_LINK);
365
-
else
319
+
if (types == L1D_FLUSH_FALLBACK) {
320
+
patch_instruction((struct ppc_inst *)dest, ppc_inst(instrs[0]));
321
+
patch_instruction((struct ppc_inst *)(dest + 2), ppc_inst(instrs[2]));
322
+
patch_branch((struct ppc_inst *)(dest + 1),
323
+
(unsigned long)&entry_flush_fallback, BRANCH_SET_LINK);
324
+
} else {
366
325
patch_instruction((struct ppc_inst *)(dest + 1), ppc_inst(instrs[1]));
367
-
368
-
patch_instruction((struct ppc_inst *)(dest + 2), ppc_inst(instrs[2]));
326
+
patch_instruction((struct ppc_inst *)(dest + 2), ppc_inst(instrs[2]));
327
+
patch_instruction((struct ppc_inst *)dest, ppc_inst(instrs[0]));
328
+
}
369
329
}
370
330
371
331
start = PTRRELOC(&__start___scv_entry_flush_fixup);
···
376
334
377
335
pr_devel("patching dest %lx\n", (unsigned long)dest);
378
336
379
-
patch_instruction((struct ppc_inst *)dest, ppc_inst(instrs[0]));
380
-
381
-
if (types == L1D_FLUSH_FALLBACK)
382
-
patch_branch((struct ppc_inst *)(dest + 1), (unsigned long)&scv_entry_flush_fallback,
383
-
BRANCH_SET_LINK);
384
-
else
337
+
if (types == L1D_FLUSH_FALLBACK) {
338
+
patch_instruction((struct ppc_inst *)dest, ppc_inst(instrs[0]));
339
+
patch_instruction((struct ppc_inst *)(dest + 2), ppc_inst(instrs[2]));
340
+
patch_branch((struct ppc_inst *)(dest + 1),
341
+
(unsigned long)&scv_entry_flush_fallback, BRANCH_SET_LINK);
342
+
} else {
385
343
patch_instruction((struct ppc_inst *)(dest + 1), ppc_inst(instrs[1]));
386
-
387
-
patch_instruction((struct ppc_inst *)(dest + 2), ppc_inst(instrs[2]));
344
+
patch_instruction((struct ppc_inst *)(dest + 2), ppc_inst(instrs[2]));
345
+
patch_instruction((struct ppc_inst *)dest, ppc_inst(instrs[0]));
346
+
}
388
347
}
389
348
390
349
···
397
354
: "ori type" :
398
355
(types & L1D_FLUSH_MTTRIG) ? "mttrig type"
399
356
: "unknown");
357
+
358
+
return 0;
359
+
}
360
+
361
+
void do_entry_flush_fixups(enum l1d_flush_type types)
362
+
{
363
+
/*
364
+
* The call to the fallback flush can not be safely patched in/out while
365
+
* other CPUs are executing it. So call __do_entry_flush_fixups() on one
366
+
* CPU while all other CPUs spin in the stop machine core with interrupts
367
+
* hard disabled.
368
+
*/
369
+
stop_machine(__do_entry_flush_fixups, &types, NULL);
400
370
}
401
371
402
372
void do_rfi_flush_fixups(enum l1d_flush_type types)
+10
arch/powerpc/platforms/pseries/hvCall.S
+10
arch/powerpc/platforms/pseries/hvCall.S
···
102
102
#define HCALL_BRANCH(LABEL)
103
103
#endif
104
104
105
+
_GLOBAL_TOC(plpar_hcall_norets_notrace)
106
+
HMT_MEDIUM
107
+
108
+
mfcr r0
109
+
stw r0,8(r1)
110
+
HVSC /* invoke the hypervisor */
111
+
lwz r0,8(r1)
112
+
mtcrf 0xff,r0
113
+
blr /* return r3 = status */
114
+
105
115
_GLOBAL_TOC(plpar_hcall_norets)
106
116
HMT_MEDIUM
107
117
+12
-17
arch/powerpc/platforms/pseries/lpar.c
+12
-17
arch/powerpc/platforms/pseries/lpar.c
···
1829
1829
#endif
1830
1830
1831
1831
/*
1832
-
* Since the tracing code might execute hcalls we need to guard against
1833
-
* recursion. One example of this are spinlocks calling H_YIELD on
1834
-
* shared processor partitions.
1832
+
* Keep track of hcall tracing depth and prevent recursion. Warn if any is
1833
+
* detected because it may indicate a problem. This will not catch all
1834
+
* problems with tracing code making hcalls, because the tracing might have
1835
+
* been invoked from a non-hcall, so the first hcall could recurse into it
1836
+
* without warning here, but this better than nothing.
1837
+
*
1838
+
* Hcalls with specific problems being traced should use the _notrace
1839
+
* plpar_hcall variants.
1835
1840
*/
1836
1841
static DEFINE_PER_CPU(unsigned int, hcall_trace_depth);
1837
1842
1838
1843
1839
-
void __trace_hcall_entry(unsigned long opcode, unsigned long *args)
1844
+
notrace void __trace_hcall_entry(unsigned long opcode, unsigned long *args)
1840
1845
{
1841
1846
unsigned long flags;
1842
1847
unsigned int *depth;
1843
-
1844
-
/*
1845
-
* We cannot call tracepoints inside RCU idle regions which
1846
-
* means we must not trace H_CEDE.
1847
-
*/
1848
-
if (opcode == H_CEDE)
1849
-
return;
1850
1848
1851
1849
local_irq_save(flags);
1852
1850
1853
1851
depth = this_cpu_ptr(&hcall_trace_depth);
1854
1852
1855
-
if (*depth)
1853
+
if (WARN_ON_ONCE(*depth))
1856
1854
goto out;
1857
1855
1858
1856
(*depth)++;
···
1862
1864
local_irq_restore(flags);
1863
1865
}
1864
1866
1865
-
void __trace_hcall_exit(long opcode, long retval, unsigned long *retbuf)
1867
+
notrace void __trace_hcall_exit(long opcode, long retval, unsigned long *retbuf)
1866
1868
{
1867
1869
unsigned long flags;
1868
1870
unsigned int *depth;
1869
-
1870
-
if (opcode == H_CEDE)
1871
-
return;
1872
1871
1873
1872
local_irq_save(flags);
1874
1873
1875
1874
depth = this_cpu_ptr(&hcall_trace_depth);
1876
1875
1877
-
if (*depth)
1876
+
if (*depth) /* Don't warn again on the way out */
1878
1877
goto out;
1879
1878
1880
1879
(*depth)++;