tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'mips_fixes_5.4_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS fixes from Paul Burton:

- Build fixes for CONFIG_OPTIMIZE_INLINING=y builds in which the
compiler may choose not to inline __xchg() & __cmpxchg().

- A build fix for Loongson configurations with GCC 9.x.

- Expose some extra HWCAP bits to indicate support for various
instruction set extensions to userland.

- Fix bad stack access in firmware handling code for old SNI
RM200/300/400 machines.

* tag 'mips_fixes_5.4_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
MIPS: Disable Loongson MMI instructions for kernel build
MIPS: elf_hwcap: Export userspace ASEs
MIPS: fw: sni: Fix out of bounds init of o32 stack
MIPS: include: Mark __xchg as __always_inline
MIPS: include: Mark __cmpxchg as __always_inline

Linus Torvalds 63f9bff5 db60a5a0

+55 -5
+1 -1
arch/mips/fw/sni/sniprom.c
··· 43 43 44 44 /* O32 stack has to be 8-byte aligned. */ 45 45 static u64 o32_stk[4096]; 46 - #define O32_STK &o32_stk[sizeof(o32_stk)] 46 + #define O32_STK (&o32_stk[ARRAY_SIZE(o32_stk)]) 47 47 48 48 #define __PROM_O32(fun, arg) fun arg __asm__(#fun); \ 49 49 __asm__(#fun " = call_o32")
+5 -4
arch/mips/include/asm/cmpxchg.h
··· 77 77 extern unsigned long __xchg_small(volatile void *ptr, unsigned long val, 78 78 unsigned int size); 79 79 80 - static inline unsigned long __xchg(volatile void *ptr, unsigned long x, 81 - int size) 80 + static __always_inline 81 + unsigned long __xchg(volatile void *ptr, unsigned long x, int size) 82 82 { 83 83 switch (size) { 84 84 case 1: ··· 153 153 extern unsigned long __cmpxchg_small(volatile void *ptr, unsigned long old, 154 154 unsigned long new, unsigned int size); 155 155 156 - static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, 157 - unsigned long new, unsigned int size) 156 + static __always_inline 157 + unsigned long __cmpxchg(volatile void *ptr, unsigned long old, 158 + unsigned long new, unsigned int size) 158 159 { 159 160 switch (size) { 160 161 case 1:
+11
arch/mips/include/uapi/asm/hwcap.h
··· 6 6 #define HWCAP_MIPS_R6 (1 << 0) 7 7 #define HWCAP_MIPS_MSA (1 << 1) 8 8 #define HWCAP_MIPS_CRC32 (1 << 2) 9 + #define HWCAP_MIPS_MIPS16 (1 << 3) 10 + #define HWCAP_MIPS_MDMX (1 << 4) 11 + #define HWCAP_MIPS_MIPS3D (1 << 5) 12 + #define HWCAP_MIPS_SMARTMIPS (1 << 6) 13 + #define HWCAP_MIPS_DSP (1 << 7) 14 + #define HWCAP_MIPS_DSP2 (1 << 8) 15 + #define HWCAP_MIPS_DSP3 (1 << 9) 16 + #define HWCAP_MIPS_MIPS16E2 (1 << 10) 17 + #define HWCAP_LOONGSON_MMI (1 << 11) 18 + #define HWCAP_LOONGSON_EXT (1 << 12) 19 + #define HWCAP_LOONGSON_EXT2 (1 << 13) 9 20 10 21 #endif /* _UAPI_ASM_HWCAP_H */
+33
arch/mips/kernel/cpu-probe.c
··· 2180 2180 elf_hwcap |= HWCAP_MIPS_MSA; 2181 2181 } 2182 2182 2183 + if (cpu_has_mips16) 2184 + elf_hwcap |= HWCAP_MIPS_MIPS16; 2185 + 2186 + if (cpu_has_mdmx) 2187 + elf_hwcap |= HWCAP_MIPS_MDMX; 2188 + 2189 + if (cpu_has_mips3d) 2190 + elf_hwcap |= HWCAP_MIPS_MIPS3D; 2191 + 2192 + if (cpu_has_smartmips) 2193 + elf_hwcap |= HWCAP_MIPS_SMARTMIPS; 2194 + 2195 + if (cpu_has_dsp) 2196 + elf_hwcap |= HWCAP_MIPS_DSP; 2197 + 2198 + if (cpu_has_dsp2) 2199 + elf_hwcap |= HWCAP_MIPS_DSP2; 2200 + 2201 + if (cpu_has_dsp3) 2202 + elf_hwcap |= HWCAP_MIPS_DSP3; 2203 + 2204 + if (cpu_has_mips16e2) 2205 + elf_hwcap |= HWCAP_MIPS_MIPS16E2; 2206 + 2207 + if (cpu_has_loongson_mmi) 2208 + elf_hwcap |= HWCAP_LOONGSON_MMI; 2209 + 2210 + if (cpu_has_loongson_ext) 2211 + elf_hwcap |= HWCAP_LOONGSON_EXT; 2212 + 2213 + if (cpu_has_loongson_ext2) 2214 + elf_hwcap |= HWCAP_LOONGSON_EXT2; 2215 + 2183 2216 if (cpu_has_vz) 2184 2217 cpu_probe_vz(c); 2185 2218
+4
arch/mips/loongson64/Platform
··· 66 66 $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) 67 67 endif 68 68 69 + # Some -march= flags enable MMI instructions, and GCC complains about that 70 + # support being enabled alongside -msoft-float. Thus explicitly disable MMI. 71 + cflags-y += $(call cc-option,-mno-loongson-mmi) 72 + 69 73 # 70 74 # Loongson Machines' Support 71 75 #
+1
arch/mips/vdso/Makefile
··· 15 15 $(filter -mmicromips,$(KBUILD_CFLAGS)) \ 16 16 $(filter -march=%,$(KBUILD_CFLAGS)) \ 17 17 $(filter -m%-float,$(KBUILD_CFLAGS)) \ 18 + $(filter -mno-loongson-%,$(KBUILD_CFLAGS)) \ 18 19 -D__VDSO__ 19 20 20 21 ifdef CONFIG_CC_IS_CLANG