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Merge tag 'gpio-fixes-for-v6.14-rc3-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux

Pull gpio fixes from Bartosz Golaszewski:

- fix interrupt handling issues in gpio-bcm-kona

- add an ACPI quirk for Acer Nitro ANV14 fixing an issue with spurious
wake up events

- add missing return value checks to gpio-stmpe

- fix a crash in error path in gpiochip_get_ngpios()

* tag 'gpio-fixes-for-v6.14-rc3-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
gpiolib: Fix crash on error in gpiochip_get_ngpios()
gpio: stmpe: Check return value of stmpe_reg_read in stmpe_gpio_irq_sync_unlock
gpiolib: acpi: Add a quirk for Acer Nitro ANV14
gpio: bcm-kona: Add missing newline to dev_err format string
gpio: bcm-kona: Make sure GPIO bits are unlocked when requesting IRQ
gpio: bcm-kona: Fix GPIO lock/unlock for banks above bank 0

+87 -19
+58 -13
drivers/gpio/gpio-bcm-kona.c
··· 69 69 struct bcm_kona_gpio_bank { 70 70 int id; 71 71 int irq; 72 + /* 73 + * Used to keep track of lock/unlock operations for each GPIO in the 74 + * bank. 75 + * 76 + * All GPIOs are locked by default (see bcm_kona_gpio_reset), and the 77 + * unlock count for all GPIOs is 0 by default. Each unlock increments 78 + * the counter, and each lock decrements the counter. 79 + * 80 + * The lock function only locks the GPIO once its unlock counter is 81 + * down to 0. This is necessary because the GPIO is unlocked in two 82 + * places in this driver: once for requested GPIOs, and once for 83 + * requested IRQs. Since it is possible for a GPIO to be requested 84 + * as both a GPIO and an IRQ, we need to ensure that we don't lock it 85 + * too early. 86 + */ 87 + u8 gpio_unlock_count[GPIO_PER_BANK]; 72 88 /* Used in the interrupt handler */ 73 89 struct bcm_kona_gpio *kona_gpio; 74 90 }; ··· 102 86 u32 val; 103 87 unsigned long flags; 104 88 int bank_id = GPIO_BANK(gpio); 89 + int bit = GPIO_BIT(gpio); 90 + struct bcm_kona_gpio_bank *bank = &kona_gpio->banks[bank_id]; 105 91 106 - raw_spin_lock_irqsave(&kona_gpio->lock, flags); 92 + if (bank->gpio_unlock_count[bit] == 0) { 93 + dev_err(kona_gpio->gpio_chip.parent, 94 + "Unbalanced locks for GPIO %u\n", gpio); 95 + return; 96 + } 107 97 108 - val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); 109 - val |= BIT(gpio); 110 - bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val); 98 + if (--bank->gpio_unlock_count[bit] == 0) { 99 + raw_spin_lock_irqsave(&kona_gpio->lock, flags); 111 100 112 - raw_spin_unlock_irqrestore(&kona_gpio->lock, flags); 101 + val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); 102 + val |= BIT(bit); 103 + bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val); 104 + 105 + raw_spin_unlock_irqrestore(&kona_gpio->lock, flags); 106 + } 113 107 } 114 108 115 109 static void bcm_kona_gpio_unlock_gpio(struct bcm_kona_gpio *kona_gpio, ··· 128 102 u32 val; 129 103 unsigned long flags; 130 104 int bank_id = GPIO_BANK(gpio); 105 + int bit = GPIO_BIT(gpio); 106 + struct bcm_kona_gpio_bank *bank = &kona_gpio->banks[bank_id]; 131 107 132 - raw_spin_lock_irqsave(&kona_gpio->lock, flags); 108 + if (bank->gpio_unlock_count[bit] == 0) { 109 + raw_spin_lock_irqsave(&kona_gpio->lock, flags); 133 110 134 - val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); 135 - val &= ~BIT(gpio); 136 - bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val); 111 + val = readl(kona_gpio->reg_base + GPIO_PWD_STATUS(bank_id)); 112 + val &= ~BIT(bit); 113 + bcm_kona_gpio_write_lock_regs(kona_gpio->reg_base, bank_id, val); 137 114 138 - raw_spin_unlock_irqrestore(&kona_gpio->lock, flags); 115 + raw_spin_unlock_irqrestore(&kona_gpio->lock, flags); 116 + } 117 + 118 + ++bank->gpio_unlock_count[bit]; 139 119 } 140 120 141 121 static int bcm_kona_gpio_get_dir(struct gpio_chip *chip, unsigned gpio) ··· 392 360 393 361 kona_gpio = irq_data_get_irq_chip_data(d); 394 362 reg_base = kona_gpio->reg_base; 363 + 395 364 raw_spin_lock_irqsave(&kona_gpio->lock, flags); 396 365 397 366 val = readl(reg_base + GPIO_INT_MASK(bank_id)); ··· 415 382 416 383 kona_gpio = irq_data_get_irq_chip_data(d); 417 384 reg_base = kona_gpio->reg_base; 385 + 418 386 raw_spin_lock_irqsave(&kona_gpio->lock, flags); 419 387 420 388 val = readl(reg_base + GPIO_INT_MSKCLR(bank_id)); ··· 511 477 static int bcm_kona_gpio_irq_reqres(struct irq_data *d) 512 478 { 513 479 struct bcm_kona_gpio *kona_gpio = irq_data_get_irq_chip_data(d); 480 + unsigned int gpio = d->hwirq; 514 481 515 - return gpiochip_reqres_irq(&kona_gpio->gpio_chip, d->hwirq); 482 + /* 483 + * We need to unlock the GPIO before any other operations are performed 484 + * on the relevant GPIO configuration registers 485 + */ 486 + bcm_kona_gpio_unlock_gpio(kona_gpio, gpio); 487 + 488 + return gpiochip_reqres_irq(&kona_gpio->gpio_chip, gpio); 516 489 } 517 490 518 491 static void bcm_kona_gpio_irq_relres(struct irq_data *d) 519 492 { 520 493 struct bcm_kona_gpio *kona_gpio = irq_data_get_irq_chip_data(d); 494 + unsigned int gpio = d->hwirq; 521 495 522 - gpiochip_relres_irq(&kona_gpio->gpio_chip, d->hwirq); 496 + /* Once we no longer use it, lock the GPIO again */ 497 + bcm_kona_gpio_lock_gpio(kona_gpio, gpio); 498 + 499 + gpiochip_relres_irq(&kona_gpio->gpio_chip, gpio); 523 500 } 524 501 525 502 static struct irq_chip bcm_gpio_irq_chip = { ··· 659 614 bank->irq = platform_get_irq(pdev, i); 660 615 bank->kona_gpio = kona_gpio; 661 616 if (bank->irq < 0) { 662 - dev_err(dev, "Couldn't get IRQ for bank %d", i); 617 + dev_err(dev, "Couldn't get IRQ for bank %d\n", i); 663 618 ret = -ENOENT; 664 619 goto err_irq_domain; 665 620 }
+12 -3
drivers/gpio/gpio-stmpe.c
··· 191 191 [REG_IE][CSB] = STMPE_IDX_IEGPIOR_CSB, 192 192 [REG_IE][MSB] = STMPE_IDX_IEGPIOR_MSB, 193 193 }; 194 - int i, j; 194 + int ret, i, j; 195 195 196 196 /* 197 197 * STMPE1600: to be able to get IRQ from pins, ··· 199 199 * GPSR or GPCR registers 200 200 */ 201 201 if (stmpe->partnum == STMPE1600) { 202 - stmpe_reg_read(stmpe, stmpe->regs[STMPE_IDX_GPMR_LSB]); 203 - stmpe_reg_read(stmpe, stmpe->regs[STMPE_IDX_GPMR_CSB]); 202 + ret = stmpe_reg_read(stmpe, stmpe->regs[STMPE_IDX_GPMR_LSB]); 203 + if (ret < 0) { 204 + dev_err(stmpe->dev, "Failed to read GPMR_LSB: %d\n", ret); 205 + goto err; 206 + } 207 + ret = stmpe_reg_read(stmpe, stmpe->regs[STMPE_IDX_GPMR_CSB]); 208 + if (ret < 0) { 209 + dev_err(stmpe->dev, "Failed to read GPMR_CSB: %d\n", ret); 210 + goto err; 211 + } 204 212 } 205 213 206 214 for (i = 0; i < CACHE_NR_REGS; i++) { ··· 230 222 } 231 223 } 232 224 225 + err: 233 226 mutex_unlock(&stmpe_gpio->irq_lock); 234 227 } 235 228
+14
drivers/gpio/gpiolib-acpi.c
··· 1689 1689 .ignore_wake = "PNP0C50:00@8", 1690 1690 }, 1691 1691 }, 1692 + { 1693 + /* 1694 + * Spurious wakeups from GPIO 11 1695 + * Found in BIOS 1.04 1696 + * https://gitlab.freedesktop.org/drm/amd/-/issues/3954 1697 + */ 1698 + .matches = { 1699 + DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 1700 + DMI_MATCH(DMI_PRODUCT_FAMILY, "Acer Nitro V 14"), 1701 + }, 1702 + .driver_data = &(struct acpi_gpiolib_dmi_quirk) { 1703 + .ignore_interrupt = "AMDI0030:00@11", 1704 + }, 1705 + }, 1692 1706 {} /* Terminating entry */ 1693 1707 }; 1694 1708
+3 -3
drivers/gpio/gpiolib.c
··· 904 904 } 905 905 906 906 if (gc->ngpio == 0) { 907 - chip_err(gc, "tried to insert a GPIO chip with zero lines\n"); 907 + dev_err(dev, "tried to insert a GPIO chip with zero lines\n"); 908 908 return -EINVAL; 909 909 } 910 910 911 911 if (gc->ngpio > FASTPATH_NGPIO) 912 - chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n", 913 - gc->ngpio, FASTPATH_NGPIO); 912 + dev_warn(dev, "line cnt %u is greater than fast path cnt %u\n", 913 + gc->ngpio, FASTPATH_NGPIO); 914 914 915 915 return 0; 916 916 }