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Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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iio: adc: rzg2l_adc: Add support for Renesas RZ/G3S

Add ADC support for the Renesas RZ/G3S SoC. The key features of this IP
include:
- 9 channels, with one dedicated to reading the temperature reported by the
Thermal Sensor Unit (TSU)
- A different default ADCMP value, which is written to the ADM3 register.
- Different default sampling rates
- ADM3.ADSMP field is 8 bits wide
- ADINT.INTEN field is 11 bits wide

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://patch.msgid.link/20241206111337.726244-14-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

Claudiu Beznea and committed by
Jonathan Cameron 645fb7c2 4af77fea

+9
+9
drivers/iio/adc/rzg2l_adc.c
··· 504 504 .adivc = true 505 505 }; 506 506 507 + static const struct rzg2l_adc_hw_params rzg3s_hw_params = { 508 + .num_channels = 9, 509 + .default_adcmp = 0x1d, 510 + .default_adsmp = { 0x7f, 0xff }, 511 + .adsmp_mask = GENMASK(7, 0), 512 + .adint_inten_mask = GENMASK(11, 0), 513 + }; 514 + 507 515 static const struct of_device_id rzg2l_adc_match[] = { 516 + { .compatible = "renesas,r9a08g045-adc", .data = &rzg3s_hw_params }, 508 517 { .compatible = "renesas,rzg2l-adc", .data = &rzg2l_hw_params }, 509 518 { /* sentinel */ } 510 519 };