tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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lib/crc: make arch-optimized code use subsys_initcall

Make the architecture-optimized CRC code do its CPU feature checks in
subsys_initcalls instead of arch_initcalls. This makes it consistent
with arch/*/lib/crypto/ and ensures that it runs after initcalls that
possibly could be a prerequisite for kernel-mode FPU, such as x86's
xfd_update_static_branch() and loongarch's init_euen_mask().

Note: as far as I can tell, x86's xfd_update_static_branch() isn't
*actually* needed for kernel-mode FPU. loongarch's init_euen_mask() is
needed to enable save/restore of the vector registers, but loongarch
doesn't yet have any CRC or crypto code that uses vector registers
anyway. Regardless, let's be consistent with arch/*/lib/crypto/ and
robust against any potential future dependency on an arch_initcall.

Link: https://lore.kernel.org/r/20250510035959.87995-1-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@google.com>

Eric Biggers 648c7fb1 46e33116

+11 -11
+1 -1
arch/arm/lib/crc-t10dif.c
··· 60 60 } 61 61 return 0; 62 62 } 63 - arch_initcall(crc_t10dif_arm_init); 63 + subsys_initcall(crc_t10dif_arm_init); 64 64 65 65 static void __exit crc_t10dif_arm_exit(void) 66 66 {
+1 -1
arch/arm/lib/crc32.c
··· 103 103 static_branch_enable(&have_pmull); 104 104 return 0; 105 105 } 106 - arch_initcall(crc32_arm_init); 106 + subsys_initcall(crc32_arm_init); 107 107 108 108 static void __exit crc32_arm_exit(void) 109 109 {
+1 -1
arch/arm64/lib/crc-t10dif.c
··· 61 61 } 62 62 return 0; 63 63 } 64 - arch_initcall(crc_t10dif_arm64_init); 64 + subsys_initcall(crc_t10dif_arm64_init); 65 65 66 66 static void __exit crc_t10dif_arm64_exit(void) 67 67 {
+1 -1
arch/loongarch/lib/crc32-loongarch.c
··· 114 114 static_branch_enable(&have_crc32); 115 115 return 0; 116 116 } 117 - arch_initcall(crc32_loongarch_init); 117 + subsys_initcall(crc32_loongarch_init); 118 118 119 119 static void __exit crc32_loongarch_exit(void) 120 120 {
+1 -1
arch/mips/lib/crc32-mips.c
··· 163 163 static_branch_enable(&have_crc32); 164 164 return 0; 165 165 } 166 - arch_initcall(crc32_mips_init); 166 + subsys_initcall(crc32_mips_init); 167 167 168 168 static void __exit crc32_mips_exit(void) 169 169 {
+1 -1
arch/powerpc/lib/crc-t10dif.c
··· 71 71 static_branch_enable(&have_vec_crypto); 72 72 return 0; 73 73 } 74 - arch_initcall(crc_t10dif_powerpc_init); 74 + subsys_initcall(crc_t10dif_powerpc_init); 75 75 76 76 static void __exit crc_t10dif_powerpc_exit(void) 77 77 {
+1 -1
arch/powerpc/lib/crc32.c
··· 72 72 static_branch_enable(&have_vec_crypto); 73 73 return 0; 74 74 } 75 - arch_initcall(crc32_powerpc_init); 75 + subsys_initcall(crc32_powerpc_init); 76 76 77 77 static void __exit crc32_powerpc_exit(void) 78 78 {
+1 -1
arch/sparc/lib/crc32.c
··· 74 74 pr_info("Using sparc64 crc32c opcode optimized CRC32C implementation\n"); 75 75 return 0; 76 76 } 77 - arch_initcall(crc32_sparc_init); 77 + subsys_initcall(crc32_sparc_init); 78 78 79 79 static void __exit crc32_sparc_exit(void) 80 80 {
+1 -1
arch/x86/lib/crc-t10dif.c
··· 29 29 } 30 30 return 0; 31 31 } 32 - arch_initcall(crc_t10dif_x86_init); 32 + subsys_initcall(crc_t10dif_x86_init); 33 33 34 34 static void __exit crc_t10dif_x86_exit(void) 35 35 {
+1 -1
arch/x86/lib/crc32.c
··· 88 88 } 89 89 return 0; 90 90 } 91 - arch_initcall(crc32_x86_init); 91 + subsys_initcall(crc32_x86_init); 92 92 93 93 static void __exit crc32_x86_exit(void) 94 94 {
+1 -1
arch/x86/lib/crc64.c
··· 39 39 } 40 40 return 0; 41 41 } 42 - arch_initcall(crc64_x86_init); 42 + subsys_initcall(crc64_x86_init); 43 43 44 44 static void __exit crc64_x86_exit(void) 45 45 {