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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:

- Update the linker script to use L1_CACHE_BYTES instead of hard-coded
64. We recently changed L1_CACHE_BYTES to 128

- Improve race condition reporting on set_pte_at() and change the BUG
to WARN_ONCE. With hardware update of the accessed/dirty state, we
need to ensure that set_pte_at() does not inadvertently override
hardware updated state. The patch also makes the checks ignore
!pte_valid() new entries

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: Improve error reporting on set_pte_at() checks
arm64: update linker script to increased L1_CACHE_BYTES value

+11 -6
+8 -4
arch/arm64/include/asm/pgtable.h
··· 276 276 * hardware updates of the pte (ptep_set_access_flags safely changes 277 277 * valid ptes without going through an invalid entry). 278 278 */ 279 - if (IS_ENABLED(CONFIG_DEBUG_VM) && IS_ENABLED(CONFIG_ARM64_HW_AFDBM) && 280 - pte_valid(*ptep)) { 281 - BUG_ON(!pte_young(pte)); 282 - BUG_ON(pte_write(*ptep) && !pte_dirty(pte)); 279 + if (IS_ENABLED(CONFIG_ARM64_HW_AFDBM) && 280 + pte_valid(*ptep) && pte_valid(pte)) { 281 + VM_WARN_ONCE(!pte_young(pte), 282 + "%s: racy access flag clearing: 0x%016llx -> 0x%016llx", 283 + __func__, pte_val(*ptep), pte_val(pte)); 284 + VM_WARN_ONCE(pte_write(*ptep) && !pte_dirty(pte), 285 + "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx", 286 + __func__, pte_val(*ptep), pte_val(pte)); 283 287 } 284 288 285 289 set_pte(ptep, pte);
+3 -2
arch/arm64/kernel/vmlinux.lds.S
··· 5 5 */ 6 6 7 7 #include <asm-generic/vmlinux.lds.h> 8 + #include <asm/cache.h> 8 9 #include <asm/kernel-pgtable.h> 9 10 #include <asm/thread_info.h> 10 11 #include <asm/memory.h> ··· 141 140 ARM_EXIT_KEEP(EXIT_DATA) 142 141 } 143 142 144 - PERCPU_SECTION(64) 143 + PERCPU_SECTION(L1_CACHE_BYTES) 145 144 146 145 . = ALIGN(PAGE_SIZE); 147 146 __init_end = .; ··· 159 158 . = ALIGN(PAGE_SIZE); 160 159 _data = .; 161 160 _sdata = .; 162 - RW_DATA_SECTION(64, PAGE_SIZE, THREAD_SIZE) 161 + RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE) 163 162 PECOFF_EDATA_PADDING 164 163 _edata = .; 165 164