Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'arc-5.1-final' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC fixes from Vineet Gupta:
"A few minor fixes for ARC.
- regression in memset if line size !64
- avoid panic if PAE and IOC"
* tag 'arc-5.1-final' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: memset: fix build with L1_CACHE_SHIFT != 6
ARC: [hsdk] Make it easier to add PAE40 region to DTB
ARC: PAE40: don't panic and instead turn off hw ioc
+25
-23
+7
-6
arch/arc/boot/dts/hsdk.dts
+7
-6
arch/arc/boot/dts/hsdk.dts
···
18
18
model = "snps,hsdk";
19
19
compatible = "snps,hsdk";
20
20
21
-
#address-cells = <1>;
22
-
#size-cells = <1>;
21
+
#address-cells = <2>;
22
+
#size-cells = <2>;
23
23
24
24
chosen {
25
25
bootargs = "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
···
105
105
#size-cells = <1>;
106
106
interrupt-parent = <&idu_intc>;
107
107
108
-
ranges = <0x00000000 0xf0000000 0x10000000>;
108
+
ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
109
109
110
110
cgu_rst: reset-controller@8a0 {
111
111
compatible = "snps,hsdk-reset";
···
269
269
};
270
270
271
271
memory@80000000 {
272
-
#address-cells = <1>;
273
-
#size-cells = <1>;
272
+
#address-cells = <2>;
273
+
#size-cells = <2>;
274
274
device_type = "memory";
275
-
reg = <0x80000000 0x40000000>; /* 1 GiB */
275
+
reg = <0x0 0x80000000 0x0 0x40000000>; /* 1 GB lowmem */
276
+
/* 0x1 0x00000000 0x0 0x40000000>; 1 GB highmem */
276
277
};
277
278
};
+2
-2
arch/arc/lib/memset-archs.S
+2
-2
arch/arc/lib/memset-archs.S
+16
-15
arch/arc/mm/cache.c
+16
-15
arch/arc/mm/cache.c
···
113
113
}
114
114
115
115
READ_BCR(ARC_REG_CLUSTER_BCR, cbcr);
116
-
if (cbcr.c)
116
+
if (cbcr.c) {
117
117
ioc_exists = 1;
118
-
else
118
+
119
+
/*
120
+
* As for today we don't support both IOC and ZONE_HIGHMEM enabled
121
+
* simultaneously. This happens because as of today IOC aperture covers
122
+
* only ZONE_NORMAL (low mem) and any dma transactions outside this
123
+
* region won't be HW coherent.
124
+
* If we want to use both IOC and ZONE_HIGHMEM we can use
125
+
* bounce_buffer to handle dma transactions to HIGHMEM.
126
+
* Also it is possible to modify dma_direct cache ops or increase IOC
127
+
* aperture size if we are planning to use HIGHMEM without PAE.
128
+
*/
129
+
if (IS_ENABLED(CONFIG_HIGHMEM) || is_pae40_enabled())
130
+
ioc_enable = 0;
131
+
} else {
119
132
ioc_enable = 0;
133
+
}
120
134
121
135
/* HS 2.0 didn't have AUX_VOL */
122
136
if (cpuinfo_arc700[cpu].core.family > 0x51) {
···
1171
1157
1172
1158
if (!ioc_enable)
1173
1159
return;
1174
-
1175
-
/*
1176
-
* As for today we don't support both IOC and ZONE_HIGHMEM enabled
1177
-
* simultaneously. This happens because as of today IOC aperture covers
1178
-
* only ZONE_NORMAL (low mem) and any dma transactions outside this
1179
-
* region won't be HW coherent.
1180
-
* If we want to use both IOC and ZONE_HIGHMEM we can use
1181
-
* bounce_buffer to handle dma transactions to HIGHMEM.
1182
-
* Also it is possible to modify dma_direct cache ops or increase IOC
1183
-
* aperture size if we are planning to use HIGHMEM without PAE.
1184
-
*/
1185
-
if (IS_ENABLED(CONFIG_HIGHMEM))
1186
-
panic("IOC and HIGHMEM can't be used simultaneously");
1187
1160
1188
1161
/* Flush + invalidate + disable L1 dcache */
1189
1162
__dc_disable();