Merge branch 'lan78xx-preparations-for-phylink'

+55 -31

1 changed file

expand all

drivers

net

usb

lan78xx.c

+55 -31

drivers/net/usb/lan78xx.c

··· 674 674 buf &= ~mask; 675 675 buf |= (mask & data); 676 676 677 - ret = lan78xx_write_reg(dev, reg, buf); 678 - if (ret < 0) 679 - return ret; 680 - 681 - return 0; 677 + return lan78xx_write_reg(dev, reg, buf); 682 678 } 683 679 684 680 static int lan78xx_read_stats(struct lan78xx_net *dev, ··· 955 959 } 956 960 957 961 /* Loop until the read is completed with timeout called with phy_mutex held */ 958 - static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev) 962 + static int lan78xx_mdiobus_wait_not_busy(struct lan78xx_net *dev) 959 963 { 960 964 unsigned long start_time = jiffies; 961 965 u32 val; ··· 963 967 964 968 do { 965 969 ret = lan78xx_read_reg(dev, MII_ACC, &val); 966 - if (unlikely(ret < 0)) 967 - return -EIO; 970 + if (ret < 0) 971 + return ret; 968 972 969 973 if (!(val & MII_ACC_MII_BUSY_)) 970 974 return 0; 971 975 } while (!time_after(jiffies, start_time + HZ)); 972 976 973 - return -EIO; 977 + return -ETIMEDOUT; 974 978 } 975 979 976 980 static inline u32 mii_access(int id, int index, int read) ··· 1604 1608 * bus can result in the MAC interface locking up and not 1605 1609 * completing register access transactions. 1606 1610 */ 1607 - ret = lan78xx_phy_wait_not_busy(dev); 1611 + ret = lan78xx_mdiobus_wait_not_busy(dev); 1608 1612 if (ret < 0) 1609 1613 goto done; 1610 1614 ··· 2149 2153 .get_regs = lan78xx_get_regs, 2150 2154 }; 2151 2155 2152 - static void lan78xx_init_mac_address(struct lan78xx_net *dev) 2156 + static int lan78xx_init_mac_address(struct lan78xx_net *dev) 2153 2157 { 2154 2158 u32 addr_lo, addr_hi; 2155 2159 u8 addr[6]; 2160 + int ret; 2156 2161 2157 - lan78xx_read_reg(dev, RX_ADDRL, &addr_lo); 2158 - lan78xx_read_reg(dev, RX_ADDRH, &addr_hi); 2162 + ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo); 2163 + if (ret < 0) 2164 + return ret; 2165 + 2166 + ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi); 2167 + if (ret < 0) 2168 + return ret; 2159 2169 2160 2170 addr[0] = addr_lo & 0xFF; 2161 2171 addr[1] = (addr_lo >> 8) & 0xFF; ··· 2194 2192 (addr[2] << 16) | (addr[3] << 24); 2195 2193 addr_hi = addr[4] | (addr[5] << 8); 2196 2194 2197 - lan78xx_write_reg(dev, RX_ADDRL, addr_lo); 2198 - lan78xx_write_reg(dev, RX_ADDRH, addr_hi); 2195 + ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo); 2196 + if (ret < 0) 2197 + return ret; 2198 + 2199 + ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi); 2200 + if (ret < 0) 2201 + return ret; 2199 2202 } 2200 2203 2201 - lan78xx_write_reg(dev, MAF_LO(0), addr_lo); 2202 - lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_); 2204 + ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo); 2205 + if (ret < 0) 2206 + return ret; 2207 + 2208 + ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_); 2209 + if (ret < 0) 2210 + return ret; 2203 2211 2204 2212 eth_hw_addr_set(dev->net, addr); 2213 + 2214 + return 0; 2205 2215 } 2206 2216 2207 2217 /* MDIO read and write wrappers for phylib */ ··· 2230 2216 mutex_lock(&dev->phy_mutex); 2231 2217 2232 2218 /* confirm MII not busy */ 2233 - ret = lan78xx_phy_wait_not_busy(dev); 2219 + ret = lan78xx_mdiobus_wait_not_busy(dev); 2234 2220 if (ret < 0) 2235 2221 goto done; 2236 2222 ··· 2240 2226 if (ret < 0) 2241 2227 goto done; 2242 2228 2243 - ret = lan78xx_phy_wait_not_busy(dev); 2229 + ret = lan78xx_mdiobus_wait_not_busy(dev); 2244 2230 if (ret < 0) 2245 2231 goto done; 2246 2232 ··· 2271 2257 mutex_lock(&dev->phy_mutex); 2272 2258 2273 2259 /* confirm MII not busy */ 2274 - ret = lan78xx_phy_wait_not_busy(dev); 2260 + ret = lan78xx_mdiobus_wait_not_busy(dev); 2275 2261 if (ret < 0) 2276 2262 goto done; 2277 2263 ··· 2286 2272 if (ret < 0) 2287 2273 goto done; 2288 2274 2289 - ret = lan78xx_phy_wait_not_busy(dev); 2275 + ret = lan78xx_mdiobus_wait_not_busy(dev); 2290 2276 if (ret < 0) 2291 2277 goto done; 2292 2278 ··· 2459 2445 2460 2446 mutex_init(&dev->domain_data.irq_lock); 2461 2447 2462 - lan78xx_read_reg(dev, INT_EP_CTL, &buf); 2448 + ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf); 2449 + if (ret < 0) 2450 + return ret; 2451 + 2463 2452 dev->domain_data.irqenable = buf; 2464 2453 2465 2454 dev->domain_data.irqchip = &lan78xx_irqchip; ··· 2759 2742 struct lan78xx_net *dev = netdev_priv(netdev); 2760 2743 struct sockaddr *addr = p; 2761 2744 u32 addr_lo, addr_hi; 2745 + int ret; 2762 2746 2763 2747 if (netif_running(netdev)) 2764 2748 return -EBUSY; ··· 2776 2758 addr_hi = netdev->dev_addr[4] | 2777 2759 netdev->dev_addr[5] << 8; 2778 2760 2779 - lan78xx_write_reg(dev, RX_ADDRL, addr_lo); 2780 - lan78xx_write_reg(dev, RX_ADDRH, addr_hi); 2761 + ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo); 2762 + if (ret < 0) 2763 + return ret; 2764 + 2765 + ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi); 2766 + if (ret < 0) 2767 + return ret; 2781 2768 2782 2769 /* Added to support MAC address changes */ 2783 - lan78xx_write_reg(dev, MAF_LO(0), addr_lo); 2784 - lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_); 2770 + ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo); 2771 + if (ret < 0) 2772 + return ret; 2785 2773 2786 - return 0; 2774 + return lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_); 2787 2775 } 2788 2776 2789 2777 /* Enable or disable Rx checksum offload engine */ ··· 2822 2798 2823 2799 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 2824 2800 2825 - lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 2826 - 2827 - return 0; 2801 + return lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 2828 2802 } 2829 2803 2830 2804 static void lan78xx_deferred_vlan_write(struct work_struct *param) ··· 3009 2987 } 3010 2988 } while (buf & HW_CFG_LRST_); 3011 2989 3012 - lan78xx_init_mac_address(dev); 2990 + ret = lan78xx_init_mac_address(dev); 2991 + if (ret < 0) 2992 + return ret; 3013 2993 3014 2994 /* save DEVID for later usage */ 3015 2995 ret = lan78xx_read_reg(dev, ID_REV, &buf);

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