Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'sh-for-linus' of git://github.com/pmundt/linux-sh
Pull SuperH fixes from Paul Mundt.
* tag 'sh-for-linus' of git://github.com/pmundt/linux-sh:
sh: fix clock-sh7757 for the latest sh_mobile_sdhi driver
serial: sh-sci: use serial_port_in/out vs sci_in/out.
sh: vsyscall: Fix up .eh_frame generation.
sh: dma: Fix up device attribute mismatch from sysdev fallout.
sh: dwarf unwinder depends on SHcompact.
sh: fix up fallout from system.h disintegration.
+147
-105
+1
arch/sh/Kconfig.debug
+1
arch/sh/Kconfig.debug
+1
arch/sh/boards/board-sh7785lcr.c
+1
arch/sh/boards/board-sh7785lcr.c
+1
arch/sh/boards/mach-hp6xx/pm.c
+1
arch/sh/boards/mach-hp6xx/pm.c
+1
-1
arch/sh/drivers/dma/dma-sysfs.c
+1
-1
arch/sh/drivers/dma/dma-sysfs.c
+1
arch/sh/kernel/cpu/fpu.c
+1
arch/sh/kernel/cpu/fpu.c
+1
arch/sh/kernel/cpu/sh2a/fpu.c
+1
arch/sh/kernel/cpu/sh2a/fpu.c
+1
arch/sh/kernel/cpu/sh4/fpu.c
+1
arch/sh/kernel/cpu/sh4/fpu.c
+1
-1
arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+1
-1
arch/sh/kernel/cpu/sh4a/clock-sh7757.c
···
113
113
CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
114
114
115
115
/* MSTP32 clocks */
116
-
CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP004]),
116
+
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP004]),
117
117
CLKDEV_CON_ID("riic0", &mstp_clks[MSTP000]),
118
118
CLKDEV_CON_ID("riic1", &mstp_clks[MSTP000]),
119
119
CLKDEV_CON_ID("riic2", &mstp_clks[MSTP000]),
+1
arch/sh/kernel/cpu/shmobile/pm.c
+1
arch/sh/kernel/cpu/shmobile/pm.c
+1
-1
arch/sh/kernel/idle.c
+1
-1
arch/sh/kernel/idle.c
+1
arch/sh/kernel/kgdb.c
+1
arch/sh/kernel/kgdb.c
+1
arch/sh/kernel/process_32.c
+1
arch/sh/kernel/process_32.c
+1
arch/sh/kernel/smp.c
+1
arch/sh/kernel/smp.c
+35
arch/sh/kernel/vsyscall/vsyscall-sigreturn.S
+35
arch/sh/kernel/vsyscall/vsyscall-sigreturn.S
···
34
34
1: .short __NR_rt_sigreturn
35
35
.LEND_rt_sigreturn:
36
36
.size __kernel_rt_sigreturn,.-.LSTART_rt_sigreturn
37
+
.previous
37
38
38
39
.section .eh_frame,"a",@progbits
40
+
.LCIE1:
41
+
.ualong .LCIE1_end - .LCIE1_start
42
+
.LCIE1_start:
43
+
.ualong 0 /* CIE ID */
44
+
.byte 0x1 /* Version number */
45
+
.string "zRS" /* NUL-terminated augmentation string */
46
+
.uleb128 0x1 /* Code alignment factor */
47
+
.sleb128 -4 /* Data alignment factor */
48
+
.byte 0x11 /* Return address register column */
49
+
.uleb128 0x1 /* Augmentation length and data */
50
+
.byte 0x1b /* DW_EH_PE_pcrel | DW_EH_PE_sdata4. */
51
+
.byte 0xc, 0xf, 0x0 /* DW_CFA_def_cfa: r15 ofs 0 */
52
+
53
+
.align 2
54
+
.LCIE1_end:
55
+
56
+
.ualong .LFDE0_end-.LFDE0_start /* Length FDE0 */
57
+
.LFDE0_start:
58
+
.ualong .LFDE0_start-.LCIE1 /* CIE pointer */
59
+
.ualong .LSTART_sigreturn-. /* PC-relative start address */
60
+
.ualong .LEND_sigreturn-.LSTART_sigreturn
61
+
.uleb128 0 /* Augmentation */
62
+
.align 2
63
+
.LFDE0_end:
64
+
65
+
.ualong .LFDE1_end-.LFDE1_start /* Length FDE1 */
66
+
.LFDE1_start:
67
+
.ualong .LFDE1_start-.LCIE1 /* CIE pointer */
68
+
.ualong .LSTART_rt_sigreturn-. /* PC-relative start address */
69
+
.ualong .LEND_rt_sigreturn-.LSTART_rt_sigreturn
70
+
.uleb128 0 /* Augmentation */
71
+
.align 2
72
+
.LFDE1_end:
73
+
39
74
.previous
+10
-13
arch/sh/kernel/vsyscall/vsyscall-trapa.S
+10
-13
arch/sh/kernel/vsyscall/vsyscall-trapa.S
···
3
3
.type __kernel_vsyscall,@function
4
4
__kernel_vsyscall:
5
5
.LSTART_vsyscall:
6
-
/* XXX: We'll have to do something here once we opt to use the vDSO
7
-
* page for something other than the signal trampoline.. as well as
8
-
* fill out .eh_frame -- PFM. */
6
+
trapa #0x10
7
+
nop
9
8
.LEND_vsyscall:
10
9
.size __kernel_vsyscall,.-.LSTART_vsyscall
10
+
.previous
11
11
12
12
.section .eh_frame,"a",@progbits
13
-
.previous
14
13
.LCIE:
15
14
.ualong .LCIE_end - .LCIE_start
16
15
.LCIE_start:
17
16
.ualong 0 /* CIE ID */
18
17
.byte 0x1 /* Version number */
19
-
.string "zRS" /* NUL-terminated augmentation string */
18
+
.string "zR" /* NUL-terminated augmentation string */
20
19
.uleb128 0x1 /* Code alignment factor */
21
20
.sleb128 -4 /* Data alignment factor */
22
21
.byte 0x11 /* Return address register column */
23
-
/* Augmentation length and data (none) */
24
-
.byte 0xc /* DW_CFA_def_cfa */
25
-
.uleb128 0xf /* r15 */
26
-
.uleb128 0x0 /* offset 0 */
27
-
22
+
.uleb128 0x1 /* Augmentation length and data */
23
+
.byte 0x1b /* DW_EH_PE_pcrel | DW_EH_PE_sdata4. */
24
+
.byte 0xc,0xf,0x0 /* DW_CFA_def_cfa: r15 ofs 0 */
28
25
.align 2
29
26
.LCIE_end:
30
27
31
28
.ualong .LFDE_end-.LFDE_start /* Length FDE */
32
29
.LFDE_start:
33
-
.ualong .LCIE /* CIE pointer */
34
-
.ualong .LSTART_vsyscall-. /* start address */
30
+
.ualong .LFDE_start-.LCIE /* CIE pointer */
31
+
.ualong .LSTART_vsyscall-. /* PC-relative start address */
35
32
.ualong .LEND_vsyscall-.LSTART_vsyscall
36
-
.uleb128 0
33
+
.uleb128 0 /* Augmentation */
37
34
.align 2
38
35
.LFDE_end:
39
36
.previous
+1
arch/sh/mm/cache-sh4.c
+1
arch/sh/mm/cache-sh4.c
+1
arch/sh/mm/flush-sh4.c
+1
arch/sh/mm/flush-sh4.c
+1
arch/sh/mm/sram.c
+1
arch/sh/mm/sram.c
+82
-85
drivers/tty/serial/sh-sci.c
+82
-85
drivers/tty/serial/sh-sci.c
···
355
355
WARN(1, "Invalid register access\n");
356
356
}
357
357
358
-
#define sci_in(up, offset) (up->serial_in(up, offset))
359
-
#define sci_out(up, offset, value) (up->serial_out(up, offset, value))
360
-
361
358
static int sci_probe_regmap(struct plat_sci_port *cfg)
362
359
{
363
360
switch (cfg->type) {
···
419
422
int c;
420
423
421
424
do {
422
-
status = sci_in(port, SCxSR);
425
+
status = serial_port_in(port, SCxSR);
423
426
if (status & SCxSR_ERRORS(port)) {
424
-
sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
427
+
serial_port_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
425
428
continue;
426
429
}
427
430
break;
···
430
433
if (!(status & SCxSR_RDxF(port)))
431
434
return NO_POLL_CHAR;
432
435
433
-
c = sci_in(port, SCxRDR);
436
+
c = serial_port_in(port, SCxRDR);
434
437
435
438
/* Dummy read */
436
-
sci_in(port, SCxSR);
437
-
sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
439
+
serial_port_in(port, SCxSR);
440
+
serial_port_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
438
441
439
442
return c;
440
443
}
···
445
448
unsigned short status;
446
449
447
450
do {
448
-
status = sci_in(port, SCxSR);
451
+
status = serial_port_in(port, SCxSR);
449
452
} while (!(status & SCxSR_TDxE(port)));
450
453
451
-
sci_out(port, SCxTDR, c);
452
-
sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
454
+
serial_port_out(port, SCxTDR, c);
455
+
serial_port_out(port, SCxSR, SCxSR_TDxE_CLEAR(port) & ~SCxSR_TEND(port));
453
456
}
454
457
#endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
455
458
···
477
480
((!(cflag & CRTSCTS)))) {
478
481
unsigned short status;
479
482
480
-
status = sci_in(port, SCSPTR);
483
+
status = serial_port_in(port, SCSPTR);
481
484
status &= ~SCSPTR_CTSIO;
482
485
status |= SCSPTR_RTSIO;
483
-
sci_out(port, SCSPTR, status); /* Set RTS = 1 */
486
+
serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
484
487
}
485
488
}
486
489
···
490
493
491
494
reg = sci_getreg(port, SCTFDR);
492
495
if (reg->size)
493
-
return sci_in(port, SCTFDR) & 0xff;
496
+
return serial_port_in(port, SCTFDR) & 0xff;
494
497
495
498
reg = sci_getreg(port, SCFDR);
496
499
if (reg->size)
497
-
return sci_in(port, SCFDR) >> 8;
500
+
return serial_port_in(port, SCFDR) >> 8;
498
501
499
-
return !(sci_in(port, SCxSR) & SCI_TDRE);
502
+
return !(serial_port_in(port, SCxSR) & SCI_TDRE);
500
503
}
501
504
502
505
static int sci_txroom(struct uart_port *port)
···
510
513
511
514
reg = sci_getreg(port, SCRFDR);
512
515
if (reg->size)
513
-
return sci_in(port, SCRFDR) & 0xff;
516
+
return serial_port_in(port, SCRFDR) & 0xff;
514
517
515
518
reg = sci_getreg(port, SCFDR);
516
519
if (reg->size)
517
-
return sci_in(port, SCFDR) & ((port->fifosize << 1) - 1);
520
+
return serial_port_in(port, SCFDR) & ((port->fifosize << 1) - 1);
518
521
519
-
return (sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
522
+
return (serial_port_in(port, SCxSR) & SCxSR_RDxF(port)) != 0;
520
523
}
521
524
522
525
/*
···
544
547
unsigned short ctrl;
545
548
int count;
546
549
547
-
status = sci_in(port, SCxSR);
550
+
status = serial_port_in(port, SCxSR);
548
551
if (!(status & SCxSR_TDxE(port))) {
549
-
ctrl = sci_in(port, SCSCR);
552
+
ctrl = serial_port_in(port, SCSCR);
550
553
if (uart_circ_empty(xmit))
551
554
ctrl &= ~SCSCR_TIE;
552
555
else
553
556
ctrl |= SCSCR_TIE;
554
-
sci_out(port, SCSCR, ctrl);
557
+
serial_port_out(port, SCSCR, ctrl);
555
558
return;
556
559
}
557
560
···
570
573
break;
571
574
}
572
575
573
-
sci_out(port, SCxTDR, c);
576
+
serial_port_out(port, SCxTDR, c);
574
577
575
578
port->icount.tx++;
576
579
} while (--count > 0);
577
580
578
-
sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
581
+
serial_port_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
579
582
580
583
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
581
584
uart_write_wakeup(port);
582
585
if (uart_circ_empty(xmit)) {
583
586
sci_stop_tx(port);
584
587
} else {
585
-
ctrl = sci_in(port, SCSCR);
588
+
ctrl = serial_port_in(port, SCSCR);
586
589
587
590
if (port->type != PORT_SCI) {
588
-
sci_in(port, SCxSR); /* Dummy read */
589
-
sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
591
+
serial_port_in(port, SCxSR); /* Dummy read */
592
+
serial_port_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
590
593
}
591
594
592
595
ctrl |= SCSCR_TIE;
593
-
sci_out(port, SCSCR, ctrl);
596
+
serial_port_out(port, SCSCR, ctrl);
594
597
}
595
598
}
596
599
···
605
608
unsigned short status;
606
609
unsigned char flag;
607
610
608
-
status = sci_in(port, SCxSR);
611
+
status = serial_port_in(port, SCxSR);
609
612
if (!(status & SCxSR_RDxF(port)))
610
613
return;
611
614
···
618
621
break;
619
622
620
623
if (port->type == PORT_SCI) {
621
-
char c = sci_in(port, SCxRDR);
624
+
char c = serial_port_in(port, SCxRDR);
622
625
if (uart_handle_sysrq_char(port, c) ||
623
626
sci_port->break_flag)
624
627
count = 0;
···
626
629
tty_insert_flip_char(tty, c, TTY_NORMAL);
627
630
} else {
628
631
for (i = 0; i < count; i++) {
629
-
char c = sci_in(port, SCxRDR);
632
+
char c = serial_port_in(port, SCxRDR);
630
633
631
-
status = sci_in(port, SCxSR);
634
+
status = serial_port_in(port, SCxSR);
632
635
#if defined(CONFIG_CPU_SH3)
633
636
/* Skip "chars" during break */
634
637
if (sci_port->break_flag) {
···
669
672
}
670
673
}
671
674
672
-
sci_in(port, SCxSR); /* dummy read */
673
-
sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
675
+
serial_port_in(port, SCxSR); /* dummy read */
676
+
serial_port_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
674
677
675
678
copied += count;
676
679
port->icount.rx += count;
···
680
683
/* Tell the rest of the system the news. New characters! */
681
684
tty_flip_buffer_push(tty);
682
685
} else {
683
-
sci_in(port, SCxSR); /* dummy read */
684
-
sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
686
+
serial_port_in(port, SCxSR); /* dummy read */
687
+
serial_port_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
685
688
}
686
689
}
687
690
···
723
726
static int sci_handle_errors(struct uart_port *port)
724
727
{
725
728
int copied = 0;
726
-
unsigned short status = sci_in(port, SCxSR);
729
+
unsigned short status = serial_port_in(port, SCxSR);
727
730
struct tty_struct *tty = port->state->port.tty;
728
731
struct sci_port *s = to_sci_port(port);
729
732
···
801
804
if (!reg->size)
802
805
return 0;
803
806
804
-
if ((sci_in(port, SCLSR) & (1 << s->cfg->overrun_bit))) {
805
-
sci_out(port, SCLSR, 0);
807
+
if ((serial_port_in(port, SCLSR) & (1 << s->cfg->overrun_bit))) {
808
+
serial_port_out(port, SCLSR, 0);
806
809
807
810
port->icount.overrun++;
808
811
···
819
822
static int sci_handle_breaks(struct uart_port *port)
820
823
{
821
824
int copied = 0;
822
-
unsigned short status = sci_in(port, SCxSR);
825
+
unsigned short status = serial_port_in(port, SCxSR);
823
826
struct tty_struct *tty = port->state->port.tty;
824
827
struct sci_port *s = to_sci_port(port);
825
828
···
856
859
struct sci_port *s = to_sci_port(port);
857
860
858
861
if (s->chan_rx) {
859
-
u16 scr = sci_in(port, SCSCR);
860
-
u16 ssr = sci_in(port, SCxSR);
862
+
u16 scr = serial_port_in(port, SCSCR);
863
+
u16 ssr = serial_port_in(port, SCxSR);
861
864
862
865
/* Disable future Rx interrupts */
863
866
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
···
866
869
} else {
867
870
scr &= ~SCSCR_RIE;
868
871
}
869
-
sci_out(port, SCSCR, scr);
872
+
serial_port_out(port, SCSCR, scr);
870
873
/* Clear current interrupt */
871
-
sci_out(port, SCxSR, ssr & ~(1 | SCxSR_RDxF(port)));
874
+
serial_port_out(port, SCxSR, ssr & ~(1 | SCxSR_RDxF(port)));
872
875
dev_dbg(port->dev, "Rx IRQ %lu: setup t-out in %u jiffies\n",
873
876
jiffies, s->rx_timeout);
874
877
mod_timer(&s->rx_timer, jiffies + s->rx_timeout);
···
906
909
if (port->type == PORT_SCI) {
907
910
if (sci_handle_errors(port)) {
908
911
/* discard character in rx buffer */
909
-
sci_in(port, SCxSR);
910
-
sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
912
+
serial_port_in(port, SCxSR);
913
+
serial_port_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
911
914
}
912
915
} else {
913
916
sci_handle_fifo_overrun(port);
914
917
sci_rx_interrupt(irq, ptr);
915
918
}
916
919
917
-
sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
920
+
serial_port_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
918
921
919
922
/* Kick the transmission */
920
923
sci_tx_interrupt(irq, ptr);
···
928
931
929
932
/* Handle BREAKs */
930
933
sci_handle_breaks(port);
931
-
sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
934
+
serial_port_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
932
935
933
936
return IRQ_HANDLED;
934
937
}
···
952
955
struct sci_port *s = to_sci_port(port);
953
956
irqreturn_t ret = IRQ_NONE;
954
957
955
-
ssr_status = sci_in(port, SCxSR);
956
-
scr_status = sci_in(port, SCSCR);
958
+
ssr_status = serial_port_in(port, SCxSR);
959
+
scr_status = serial_port_in(port, SCSCR);
957
960
err_enabled = scr_status & port_rx_irq_mask(port);
958
961
959
962
/* Tx Interrupt */
···
1167
1170
1168
1171
static unsigned int sci_tx_empty(struct uart_port *port)
1169
1172
{
1170
-
unsigned short status = sci_in(port, SCxSR);
1173
+
unsigned short status = serial_port_in(port, SCxSR);
1171
1174
unsigned short in_tx_fifo = sci_txfill(port);
1172
1175
1173
1176
return (status & SCxSR_TEND(port)) && !in_tx_fifo ? TIOCSER_TEMT : 0;
···
1195
1198
*/
1196
1199
reg = sci_getreg(port, SCFCR);
1197
1200
if (reg->size)
1198
-
sci_out(port, SCFCR, sci_in(port, SCFCR) | 1);
1201
+
serial_port_out(port, SCFCR, serial_port_in(port, SCFCR) | 1);
1199
1202
}
1200
1203
}
1201
1204
···
1237
1240
} else {
1238
1241
s->cookie_tx = -EINVAL;
1239
1242
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
1240
-
u16 ctrl = sci_in(port, SCSCR);
1241
-
sci_out(port, SCSCR, ctrl & ~SCSCR_TIE);
1243
+
u16 ctrl = serial_port_in(port, SCSCR);
1244
+
serial_port_out(port, SCSCR, ctrl & ~SCSCR_TIE);
1242
1245
}
1243
1246
}
1244
1247
···
1491
1494
1492
1495
#ifdef CONFIG_SERIAL_SH_SCI_DMA
1493
1496
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
1494
-
u16 new, scr = sci_in(port, SCSCR);
1497
+
u16 new, scr = serial_port_in(port, SCSCR);
1495
1498
if (s->chan_tx)
1496
1499
new = scr | 0x8000;
1497
1500
else
1498
1501
new = scr & ~0x8000;
1499
1502
if (new != scr)
1500
-
sci_out(port, SCSCR, new);
1503
+
serial_port_out(port, SCSCR, new);
1501
1504
}
1502
1505
1503
1506
if (s->chan_tx && !uart_circ_empty(&s->port.state->xmit) &&
···
1509
1512
1510
1513
if (!s->chan_tx || port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
1511
1514
/* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
1512
-
ctrl = sci_in(port, SCSCR);
1513
-
sci_out(port, SCSCR, ctrl | SCSCR_TIE);
1515
+
ctrl = serial_port_in(port, SCSCR);
1516
+
serial_port_out(port, SCSCR, ctrl | SCSCR_TIE);
1514
1517
}
1515
1518
}
1516
1519
···
1519
1522
unsigned short ctrl;
1520
1523
1521
1524
/* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
1522
-
ctrl = sci_in(port, SCSCR);
1525
+
ctrl = serial_port_in(port, SCSCR);
1523
1526
1524
1527
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1525
1528
ctrl &= ~0x8000;
1526
1529
1527
1530
ctrl &= ~SCSCR_TIE;
1528
1531
1529
-
sci_out(port, SCSCR, ctrl);
1532
+
serial_port_out(port, SCSCR, ctrl);
1530
1533
}
1531
1534
1532
1535
static void sci_start_rx(struct uart_port *port)
1533
1536
{
1534
1537
unsigned short ctrl;
1535
1538
1536
-
ctrl = sci_in(port, SCSCR) | port_rx_irq_mask(port);
1539
+
ctrl = serial_port_in(port, SCSCR) | port_rx_irq_mask(port);
1537
1540
1538
1541
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1539
1542
ctrl &= ~0x4000;
1540
1543
1541
-
sci_out(port, SCSCR, ctrl);
1544
+
serial_port_out(port, SCSCR, ctrl);
1542
1545
}
1543
1546
1544
1547
static void sci_stop_rx(struct uart_port *port)
1545
1548
{
1546
1549
unsigned short ctrl;
1547
1550
1548
-
ctrl = sci_in(port, SCSCR);
1551
+
ctrl = serial_port_in(port, SCSCR);
1549
1552
1550
1553
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB)
1551
1554
ctrl &= ~0x4000;
1552
1555
1553
1556
ctrl &= ~port_rx_irq_mask(port);
1554
1557
1555
-
sci_out(port, SCSCR, ctrl);
1558
+
serial_port_out(port, SCSCR, ctrl);
1556
1559
}
1557
1560
1558
1561
static void sci_enable_ms(struct uart_port *port)
···
1586
1589
{
1587
1590
struct sci_port *s = (struct sci_port *)arg;
1588
1591
struct uart_port *port = &s->port;
1589
-
u16 scr = sci_in(port, SCSCR);
1592
+
u16 scr = serial_port_in(port, SCSCR);
1590
1593
1591
1594
if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
1592
1595
scr &= ~0x4000;
1593
1596
enable_irq(s->cfg->irqs[1]);
1594
1597
}
1595
-
sci_out(port, SCSCR, scr | SCSCR_RIE);
1598
+
serial_port_out(port, SCSCR, scr | SCSCR_RIE);
1596
1599
dev_dbg(port->dev, "DMA Rx timed out\n");
1597
1600
schedule_work(&s->work_rx);
1598
1601
}
···
1773
1776
unsigned int status;
1774
1777
1775
1778
do {
1776
-
status = sci_in(port, SCxSR);
1779
+
status = serial_port_in(port, SCxSR);
1777
1780
} while (!(status & SCxSR_TEND(port)));
1778
1781
1779
-
sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
1782
+
serial_port_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
1780
1783
1781
1784
reg = sci_getreg(port, SCFCR);
1782
1785
if (reg->size)
1783
-
sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
1786
+
serial_port_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
1784
1787
}
1785
1788
1786
1789
static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
···
1809
1812
1810
1813
sci_reset(port);
1811
1814
1812
-
smr_val = sci_in(port, SCSMR) & 3;
1815
+
smr_val = serial_port_in(port, SCSMR) & 3;
1813
1816
1814
1817
if ((termios->c_cflag & CSIZE) == CS7)
1815
1818
smr_val |= 0x40;
···
1822
1825
1823
1826
uart_update_timeout(port, termios->c_cflag, baud);
1824
1827
1825
-
sci_out(port, SCSMR, smr_val);
1828
+
serial_port_out(port, SCSMR, smr_val);
1826
1829
1827
1830
dev_dbg(port->dev, "%s: SMR %x, t %x, SCSCR %x\n", __func__, smr_val, t,
1828
1831
s->cfg->scscr);
1829
1832
1830
1833
if (t > 0) {
1831
1834
if (t >= 256) {
1832
-
sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
1835
+
serial_port_out(port, SCSMR, (serial_port_in(port, SCSMR) & ~3) | 1);
1833
1836
t >>= 2;
1834
1837
} else
1835
-
sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
1838
+
serial_port_out(port, SCSMR, serial_port_in(port, SCSMR) & ~3);
1836
1839
1837
-
sci_out(port, SCBRR, t);
1840
+
serial_port_out(port, SCBRR, t);
1838
1841
udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
1839
1842
}
1840
1843
···
1842
1845
1843
1846
reg = sci_getreg(port, SCFCR);
1844
1847
if (reg->size) {
1845
-
unsigned short ctrl = sci_in(port, SCFCR);
1848
+
unsigned short ctrl = serial_port_in(port, SCFCR);
1846
1849
1847
1850
if (s->cfg->capabilities & SCIx_HAVE_RTSCTS) {
1848
1851
if (termios->c_cflag & CRTSCTS)
···
1858
1861
*/
1859
1862
ctrl &= ~(SCFCR_RFRST | SCFCR_TFRST);
1860
1863
1861
-
sci_out(port, SCFCR, ctrl);
1864
+
serial_port_out(port, SCFCR, ctrl);
1862
1865
}
1863
1866
1864
-
sci_out(port, SCSCR, s->cfg->scscr);
1867
+
serial_port_out(port, SCSCR, s->cfg->scscr);
1865
1868
1866
1869
#ifdef CONFIG_SERIAL_SH_SCI_DMA
1867
1870
/*
···
2163
2166
2164
2167
/* wait until fifo is empty and last bit has been transmitted */
2165
2168
bits = SCxSR_TDxE(port) | SCxSR_TEND(port);
2166
-
while ((sci_in(port, SCxSR) & bits) != bits)
2169
+
while ((serial_port_in(port, SCxSR) & bits) != bits)
2167
2170
cpu_relax();
2168
2171
2169
2172
sci_port_disable(sci_port);
···
2257
2260
if (uart_console(port)) {
2258
2261
struct plat_sci_reg *reg;
2259
2262
2260
-
sci_port->saved_smr = sci_in(port, SCSMR);
2261
-
sci_port->saved_brr = sci_in(port, SCBRR);
2263
+
sci_port->saved_smr = serial_port_in(port, SCSMR);
2264
+
sci_port->saved_brr = serial_port_in(port, SCBRR);
2262
2265
2263
2266
reg = sci_getreg(port, SCFCR);
2264
2267
if (reg->size)
2265
-
sci_port->saved_fcr = sci_in(port, SCFCR);
2268
+
sci_port->saved_fcr = serial_port_in(port, SCFCR);
2266
2269
else
2267
2270
sci_port->saved_fcr = 0;
2268
2271
}
···
2276
2279
2277
2280
if (uart_console(port)) {
2278
2281
sci_reset(port);
2279
-
sci_out(port, SCSMR, sci_port->saved_smr);
2280
-
sci_out(port, SCBRR, sci_port->saved_brr);
2282
+
serial_port_out(port, SCSMR, sci_port->saved_smr);
2283
+
serial_port_out(port, SCBRR, sci_port->saved_brr);
2281
2284
2282
2285
if (sci_port->saved_fcr)
2283
-
sci_out(port, SCFCR, sci_port->saved_fcr);
2286
+
serial_port_out(port, SCFCR, sci_port->saved_fcr);
2284
2287
2285
-
sci_out(port, SCSCR, sci_port->cfg->scscr);
2288
+
serial_port_out(port, SCSCR, sci_port->cfg->scscr);
2286
2289
}
2287
2290
return 0;
2288
2291
}
+4
-4
drivers/tty/serial/sh-sci.h
+4
-4
drivers/tty/serial/sh-sci.h
···
20
20
defined(CONFIG_ARCH_SH7372) || \
21
21
defined(CONFIG_ARCH_R8A7740)
22
22
23
-
# define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc)
24
-
# define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73)
25
-
# define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf)
26
-
# define SCxSR_BREAK_CLEAR(port) (sci_in(port, SCxSR) & 0xffe3)
23
+
# define SCxSR_RDxF_CLEAR(port) (serial_port_in(port, SCxSR) & 0xfffc)
24
+
# define SCxSR_ERROR_CLEAR(port) (serial_port_in(port, SCxSR) & 0xfd73)
25
+
# define SCxSR_TDxE_CLEAR(port) (serial_port_in(port, SCxSR) & 0xffdf)
26
+
# define SCxSR_BREAK_CLEAR(port) (serial_port_in(port, SCxSR) & 0xffe3)
27
27
#else
28
28
# define SCxSR_RDxF_CLEAR(port) (((port)->type == PORT_SCI) ? 0xbc : 0x00fc)
29
29
# define SCxSR_ERROR_CLEAR(port) (((port)->type == PORT_SCI) ? 0xc4 : 0x0073)