Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'input-for-v5.19-rc0' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Pull input updates from Dmitry Torokhov:
- a new driver for the Azoteq IQS7222A/B/C capacitive touch controller
- a new driver for Raspberry Pi Sense HAT joystick
- sun4i-lradc-keys gained support of R329 and D1 variants, plus it can
be now used as a wakeup source
- pm8941-pwrkey can now properly handle PON GEN3 variants; the driver
also implements software debouncing and has a workaround for missing
key press events
- assorted driver fixes and cleanups
* tag 'input-for-v5.19-rc0' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: (29 commits)
Input: stmfts - do not leave device disabled in stmfts_input_open
Input: gpio-keys - cancel delayed work only in case of GPIO
Input: cypress_ps2 - fix typo in comment
Input: vmmouse - disable vmmouse before entering suspend mode
dt-bindings: google,cros-ec-keyb: Fixup bad compatible match
Input: cros-ec-keyb - allow skipping keyboard registration
dt-bindings: google,cros-ec-keyb: Introduce switches only compatible
Input: psmouse-smbus - avoid flush_scheduled_work() usage
Input: bcm-keypad - remove unneeded NULL check before clk_disable_unprepare
Input: sparcspkr - fix refcount leak in bbc_beep_probe
Input: sun4i-lradc-keys - add support for R329 and D1
Input: sun4i-lradc-keys - add optional clock/reset support
dt-bindings: input: sun4i-lradc-keys: Add R329 and D1 compatibles
Input: sun4i-lradc-keys - add wakeup support
Input: pm8941-pwrkey - simulate missed key press events
Input: pm8941-pwrkey - add software key press debouncing support
Input: pm8941-pwrkey - add support for PON GEN3 base addresses
Input: pm8941-pwrkey - fix error message
Input: synaptics-rmi4 - remove unnecessary flush_workqueue()
Input: ep93xx_keypad - use devm_platform_ioremap_resource() helper
...
+3853
-69
+22
Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml
+22
Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml
···
18
18
- items:
19
19
- const: allwinner,sun50i-a64-lradc
20
20
- const: allwinner,sun8i-a83t-r-lradc
21
+
- const: allwinner,sun50i-r329-lradc
22
+
- items:
23
+
- const: allwinner,sun20i-d1-lradc
24
+
- const: allwinner,sun50i-r329-lradc
21
25
22
26
reg:
27
+
maxItems: 1
28
+
29
+
clocks:
30
+
maxItems: 1
31
+
32
+
resets:
23
33
maxItems: 1
24
34
25
35
interrupts:
···
77
67
- reg
78
68
- interrupts
79
69
- vref-supply
70
+
71
+
if:
72
+
properties:
73
+
compatible:
74
+
contains:
75
+
enum:
76
+
- allwinner,sun50i-r329-lradc
77
+
78
+
then:
79
+
required:
80
+
- clocks
81
+
- resets
80
82
81
83
additionalProperties: false
82
84
+960
Documentation/devicetree/bindings/input/azoteq,iqs7222.yaml
+960
Documentation/devicetree/bindings/input/azoteq,iqs7222.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/input/azoteq,iqs7222.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Azoteq IQS7222A/B/C Capacitive Touch Controller
8
+
9
+
maintainers:
10
+
- Jeff LaBundy <jeff@labundy.com>
11
+
12
+
description: |
13
+
The Azoteq IQS7222A, IQS7222B and IQS7222C are multichannel capacitive touch
14
+
controllers that feature additional sensing capabilities.
15
+
16
+
Link to datasheets: https://www.azoteq.com/
17
+
18
+
properties:
19
+
compatible:
20
+
enum:
21
+
- azoteq,iqs7222a
22
+
- azoteq,iqs7222b
23
+
- azoteq,iqs7222c
24
+
25
+
reg:
26
+
maxItems: 1
27
+
28
+
irq-gpios:
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+
maxItems: 1
30
+
description:
31
+
Specifies the GPIO connected to the device's active-low RDY output.
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+
33
+
reset-gpios:
34
+
maxItems: 1
35
+
description:
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+
Specifies the GPIO connected to the device's active-low MCLR input. The
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+
device is temporarily held in hardware reset prior to initialization if
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+
this property is present.
39
+
40
+
azoteq,rf-filt-enable:
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+
type: boolean
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+
description: Enables the device's internal RF filter.
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+
44
+
azoteq,max-counts:
45
+
$ref: /schemas/types.yaml#/definitions/uint32
46
+
enum: [0, 1, 2, 3]
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+
description: |
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+
Specifies the maximum number of conversion periods (counts) that can be
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+
reported as follows:
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+
0: 1023
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+
1: 2047
52
+
2: 4095
53
+
3: 16384
54
+
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+
azoteq,auto-mode:
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+
$ref: /schemas/types.yaml#/definitions/uint32
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+
enum: [0, 1, 2, 3]
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+
description: |
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+
Specifies the number of conversions to occur before an interrupt is
60
+
generated as follows:
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+
0: 4
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+
1: 8
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+
2: 16
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+
3: 32
65
+
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+
azoteq,ati-frac-div-fine:
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+
$ref: /schemas/types.yaml#/definitions/uint32
68
+
minimum: 0
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+
maximum: 31
70
+
description: Specifies the preloaded ATI fine fractional divider.
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+
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+
azoteq,ati-frac-div-coarse:
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+
$ref: /schemas/types.yaml#/definitions/uint32
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+
minimum: 0
75
+
maximum: 31
76
+
description: Specifies the preloaded ATI coarse fractional divider.
77
+
78
+
azoteq,ati-comp-select:
79
+
$ref: /schemas/types.yaml#/definitions/uint32
80
+
minimum: 0
81
+
maximum: 1023
82
+
description: Specifies the preloaded ATI compensation selection.
83
+
84
+
azoteq,lta-beta-lp:
85
+
$ref: /schemas/types.yaml#/definitions/uint32
86
+
minimum: 0
87
+
maximum: 15
88
+
description:
89
+
Specifies the long-term average filter damping factor to be applied during
90
+
low-power mode.
91
+
92
+
azoteq,lta-beta-np:
93
+
$ref: /schemas/types.yaml#/definitions/uint32
94
+
minimum: 0
95
+
maximum: 15
96
+
description:
97
+
Specifies the long-term average filter damping factor to be applied during
98
+
normal-power mode.
99
+
100
+
azoteq,counts-beta-lp:
101
+
$ref: /schemas/types.yaml#/definitions/uint32
102
+
minimum: 0
103
+
maximum: 15
104
+
description:
105
+
Specifies the counts filter damping factor to be applied during low-power
106
+
mode.
107
+
108
+
azoteq,counts-beta-np:
109
+
$ref: /schemas/types.yaml#/definitions/uint32
110
+
minimum: 0
111
+
maximum: 15
112
+
description:
113
+
Specifies the counts filter damping factor to be applied during normal-
114
+
power mode.
115
+
116
+
azoteq,lta-fast-beta-lp:
117
+
$ref: /schemas/types.yaml#/definitions/uint32
118
+
minimum: 0
119
+
maximum: 15
120
+
description:
121
+
Specifies the long-term average filter fast damping factor to be applied
122
+
during low-power mode.
123
+
124
+
azoteq,lta-fast-beta-np:
125
+
$ref: /schemas/types.yaml#/definitions/uint32
126
+
minimum: 0
127
+
maximum: 15
128
+
description:
129
+
Specifies the long-term average filter fast damping factor to be applied
130
+
during normal-power mode.
131
+
132
+
azoteq,timeout-ati-ms:
133
+
multipleOf: 500
134
+
minimum: 0
135
+
maximum: 32767500
136
+
description:
137
+
Specifies the delay (in ms) before ATI is retried following an ATI error.
138
+
139
+
azoteq,rate-ati-ms:
140
+
minimum: 0
141
+
maximum: 65535
142
+
description: Specifies the rate (in ms) at which ATI status is evaluated.
143
+
144
+
azoteq,timeout-np-ms:
145
+
minimum: 0
146
+
maximum: 65535
147
+
description:
148
+
Specifies the length of time (in ms) to wait for an event before moving
149
+
from normal-power mode to low-power mode.
150
+
151
+
azoteq,rate-np-ms:
152
+
minimum: 0
153
+
maximum: 3000
154
+
description: Specifies the report rate (in ms) during normal-power mode.
155
+
156
+
azoteq,timeout-lp-ms:
157
+
minimum: 0
158
+
maximum: 65535
159
+
description:
160
+
Specifies the length of time (in ms) to wait for an event before moving
161
+
from low-power mode to ultra-low-power mode.
162
+
163
+
azoteq,rate-lp-ms:
164
+
minimum: 0
165
+
maximum: 3000
166
+
description: Specifies the report rate (in ms) during low-power mode.
167
+
168
+
azoteq,timeout-ulp-ms:
169
+
minimum: 0
170
+
maximum: 65535
171
+
description:
172
+
Specifies the rate (in ms) at which channels not regularly sampled during
173
+
ultra-low-power mode are updated.
174
+
175
+
azoteq,rate-ulp-ms:
176
+
minimum: 0
177
+
maximum: 3000
178
+
description: Specifies the report rate (in ms) during ultra-low-power mode.
179
+
180
+
patternProperties:
181
+
"^cycle-[0-9]$":
182
+
type: object
183
+
description: Represents a conversion cycle serving two sensing channels.
184
+
185
+
properties:
186
+
azoteq,conv-period:
187
+
$ref: /schemas/types.yaml#/definitions/uint32
188
+
minimum: 0
189
+
maximum: 255
190
+
description: Specifies the cycle's conversion period.
191
+
192
+
azoteq,conv-frac:
193
+
$ref: /schemas/types.yaml#/definitions/uint32
194
+
minimum: 0
195
+
maximum: 255
196
+
description: Specifies the cycle's conversion frequency fraction.
197
+
198
+
azoteq,tx-enable:
199
+
$ref: /schemas/types.yaml#/definitions/uint32-array
200
+
minItems: 1
201
+
maxItems: 9
202
+
items:
203
+
minimum: 0
204
+
maximum: 8
205
+
description: Specifies the CTx pin(s) associated with the cycle.
206
+
207
+
azoteq,rx-float-inactive:
208
+
type: boolean
209
+
description: Floats any inactive CRx pins instead of grounding them.
210
+
211
+
azoteq,dead-time-enable:
212
+
type: boolean
213
+
description:
214
+
Increases the denominator of the conversion frequency formula by one.
215
+
216
+
azoteq,tx-freq-fosc:
217
+
type: boolean
218
+
description:
219
+
Fixes the conversion frequency to that of the device's core clock.
220
+
221
+
azoteq,vbias-enable:
222
+
type: boolean
223
+
description: Enables the bias voltage for use during inductive sensing.
224
+
225
+
azoteq,sense-mode:
226
+
$ref: /schemas/types.yaml#/definitions/uint32
227
+
enum: [0, 1, 2, 3]
228
+
description: |
229
+
Specifies the cycle's sensing mode as follows:
230
+
0: None
231
+
1: Self capacitive
232
+
2: Mutual capacitive
233
+
3: Inductive
234
+
235
+
Note that in the case of IQS7222A, cycles 5 and 6 are restricted to
236
+
Hall-effect sensing.
237
+
238
+
azoteq,iref-enable:
239
+
type: boolean
240
+
description:
241
+
Enables the current reference for use during various sensing modes.
242
+
243
+
azoteq,iref-level:
244
+
$ref: /schemas/types.yaml#/definitions/uint32
245
+
minimum: 0
246
+
maximum: 15
247
+
description: Specifies the cycle's current reference level.
248
+
249
+
azoteq,iref-trim:
250
+
$ref: /schemas/types.yaml#/definitions/uint32
251
+
minimum: 0
252
+
maximum: 15
253
+
description: Specifies the cycle's current reference trim.
254
+
255
+
dependencies:
256
+
azoteq,iref-level: ["azoteq,iref-enable"]
257
+
azoteq,iref-trim: ["azoteq,iref-enable"]
258
+
259
+
additionalProperties: false
260
+
261
+
"^channel-([0-9]|1[0-9])$":
262
+
type: object
263
+
description:
264
+
Represents a single sensing channel. A channel is active if defined and
265
+
inactive otherwise.
266
+
267
+
Note that in the case of IQS7222A, channels 10 and 11 are restricted to
268
+
Hall-effect sensing with events reported on channel 10 only.
269
+
270
+
properties:
271
+
azoteq,ulp-allow:
272
+
type: boolean
273
+
description:
274
+
Permits the device to enter ultra-low-power mode while the channel
275
+
lies in a state of touch or proximity.
276
+
277
+
azoteq,ref-select:
278
+
$ref: /schemas/types.yaml#/definitions/uint32
279
+
minimum: 0
280
+
maximum: 9
281
+
description: Specifies a separate reference channel to be followed.
282
+
283
+
azoteq,ref-weight:
284
+
$ref: /schemas/types.yaml#/definitions/uint32
285
+
minimum: 0
286
+
maximum: 65535
287
+
description: Specifies the relative weight of the reference channel.
288
+
289
+
azoteq,use-prox:
290
+
type: boolean
291
+
description:
292
+
Activates the reference channel in response to proximity events
293
+
instead of touch events.
294
+
295
+
azoteq,ati-band:
296
+
$ref: /schemas/types.yaml#/definitions/uint32
297
+
enum: [0, 1, 2, 3]
298
+
description: |
299
+
Specifies the channel's ATI band as a fraction of its ATI target as
300
+
follows:
301
+
0: 1/16
302
+
1: 1/8
303
+
2: 1/4
304
+
3: 1/2
305
+
306
+
azoteq,global-halt:
307
+
type: boolean
308
+
description:
309
+
Specifies that the channel's long-term average is to freeze if any
310
+
other participating channel lies in a proximity or touch state.
311
+
312
+
azoteq,invert-enable:
313
+
type: boolean
314
+
description:
315
+
Inverts the polarity of the states reported for proximity and touch
316
+
events relative to their respective thresholds.
317
+
318
+
azoteq,dual-direction:
319
+
type: boolean
320
+
description:
321
+
Specifies that the channel's long-term average is to freeze in the
322
+
presence of either increasing or decreasing counts, thereby permit-
323
+
ting events to be reported in either direction.
324
+
325
+
azoteq,rx-enable:
326
+
$ref: /schemas/types.yaml#/definitions/uint32-array
327
+
minItems: 1
328
+
maxItems: 4
329
+
items:
330
+
minimum: 0
331
+
maximum: 7
332
+
description: Specifies the CRx pin(s) associated with the channel.
333
+
334
+
azoteq,samp-cap-double:
335
+
type: boolean
336
+
description: Doubles the sampling capacitance from 40 pF to 80 pF.
337
+
338
+
azoteq,vref-half:
339
+
type: boolean
340
+
description: Halves the discharge threshold from 1.0 V to 0.5 V.
341
+
342
+
azoteq,proj-bias:
343
+
$ref: /schemas/types.yaml#/definitions/uint32
344
+
enum: [0, 1, 2, 3]
345
+
description: |
346
+
Specifies the bias current applied during mutual (projected)
347
+
capacitive sensing as follows:
348
+
0: 2 uA
349
+
1: 5 uA
350
+
2: 7 uA
351
+
3: 10 uA
352
+
353
+
azoteq,ati-target:
354
+
$ref: /schemas/types.yaml#/definitions/uint32
355
+
multipleOf: 8
356
+
minimum: 0
357
+
maximum: 2040
358
+
description: Specifies the channel's ATI target.
359
+
360
+
azoteq,ati-base:
361
+
$ref: /schemas/types.yaml#/definitions/uint32
362
+
multipleOf: 16
363
+
minimum: 0
364
+
maximum: 496
365
+
description: Specifies the channel's ATI base.
366
+
367
+
azoteq,ati-mode:
368
+
$ref: /schemas/types.yaml#/definitions/uint32
369
+
enum: [0, 1, 2, 3, 4, 5]
370
+
description: |
371
+
Specifies the channel's ATI mode as follows:
372
+
0: Disabled
373
+
1: Compensation
374
+
2: Compensation divider
375
+
3: Fine fractional divider
376
+
4: Coarse fractional divider
377
+
5: Full
378
+
379
+
azoteq,ati-frac-div-fine:
380
+
$ref: /schemas/types.yaml#/definitions/uint32
381
+
minimum: 0
382
+
maximum: 31
383
+
description: Specifies the channel's ATI fine fractional divider.
384
+
385
+
azoteq,ati-frac-mult-coarse:
386
+
$ref: /schemas/types.yaml#/definitions/uint32
387
+
minimum: 0
388
+
maximum: 15
389
+
description: Specifies the channel's ATI coarse fractional multiplier.
390
+
391
+
azoteq,ati-frac-div-coarse:
392
+
$ref: /schemas/types.yaml#/definitions/uint32
393
+
minimum: 0
394
+
maximum: 31
395
+
description: Specifies the channel's ATI coarse fractional divider.
396
+
397
+
azoteq,ati-comp-div:
398
+
$ref: /schemas/types.yaml#/definitions/uint32
399
+
minimum: 0
400
+
maximum: 31
401
+
description: Specifies the channel's ATI compensation divider.
402
+
403
+
azoteq,ati-comp-select:
404
+
$ref: /schemas/types.yaml#/definitions/uint32
405
+
minimum: 0
406
+
maximum: 1023
407
+
description: Specifies the channel's ATI compensation selection.
408
+
409
+
azoteq,debounce-enter:
410
+
$ref: /schemas/types.yaml#/definitions/uint32
411
+
minimum: 0
412
+
maximum: 15
413
+
description: Specifies the channel's debounce entrance factor.
414
+
415
+
azoteq,debounce-exit:
416
+
$ref: /schemas/types.yaml#/definitions/uint32
417
+
minimum: 0
418
+
maximum: 15
419
+
description: Specifies the channel's debounce exit factor.
420
+
421
+
patternProperties:
422
+
"^event-(prox|touch)$":
423
+
type: object
424
+
description:
425
+
Represents a proximity or touch event reported by the channel.
426
+
427
+
properties:
428
+
azoteq,gpio-select:
429
+
$ref: /schemas/types.yaml#/definitions/uint32-array
430
+
minItems: 1
431
+
maxItems: 3
432
+
items:
433
+
minimum: 0
434
+
maximum: 2
435
+
description: |
436
+
Specifies one or more GPIO mapped to the event as follows:
437
+
0: GPIO0
438
+
1: GPIO3 (IQS7222C only)
439
+
2: GPIO4 (IQS7222C only)
440
+
441
+
Note that although multiple events can be mapped to a single
442
+
GPIO, they must all be of the same type (proximity, touch or
443
+
slider gesture).
444
+
445
+
azoteq,thresh:
446
+
$ref: /schemas/types.yaml#/definitions/uint32
447
+
description:
448
+
Specifies the threshold for the event. Valid entries range from
449
+
0-127 and 0-255 for proximity and touch events, respectively.
450
+
451
+
azoteq,hyst:
452
+
$ref: /schemas/types.yaml#/definitions/uint32
453
+
minimum: 0
454
+
maximum: 255
455
+
description:
456
+
Specifies the hysteresis for the event (touch events only).
457
+
458
+
azoteq,timeout-press-ms:
459
+
multipleOf: 500
460
+
minimum: 0
461
+
maximum: 127500
462
+
description:
463
+
Specifies the length of time (in ms) to wait before automatically
464
+
releasing a press event. Specify zero to allow the press state to
465
+
persist indefinitely.
466
+
467
+
The IQS7222B does not feature channel-specific timeouts; the time-
468
+
out specified for any one channel applies to all channels.
469
+
470
+
linux,code:
471
+
$ref: /schemas/types.yaml#/definitions/uint32
472
+
description:
473
+
Numeric key or switch code associated with the event. Specify
474
+
KEY_RESERVED (0) to opt out of event reporting.
475
+
476
+
linux,input-type:
477
+
$ref: /schemas/types.yaml#/definitions/uint32
478
+
enum: [1, 5]
479
+
default: 1
480
+
description:
481
+
Specifies whether the event is to be interpreted as a key (1)
482
+
or a switch (5).
483
+
484
+
required:
485
+
- linux,code
486
+
487
+
additionalProperties: false
488
+
489
+
dependencies:
490
+
azoteq,ref-weight: ["azoteq,ref-select"]
491
+
azoteq,use-prox: ["azoteq,ref-select"]
492
+
493
+
additionalProperties: false
494
+
495
+
"^slider-[0-1]$":
496
+
type: object
497
+
description: Represents a slider comprising three or four channels.
498
+
499
+
properties:
500
+
azoteq,channel-select:
501
+
$ref: /schemas/types.yaml#/definitions/uint32-array
502
+
minItems: 3
503
+
maxItems: 4
504
+
items:
505
+
minimum: 0
506
+
maximum: 9
507
+
description:
508
+
Specifies the order of the channels that participate in the slider.
509
+
510
+
azoteq,slider-size:
511
+
$ref: /schemas/types.yaml#/definitions/uint32
512
+
minimum: 0
513
+
maximum: 65535
514
+
description:
515
+
Specifies the slider's one-dimensional resolution, equal to the
516
+
maximum coordinate plus one.
517
+
518
+
azoteq,lower-cal:
519
+
$ref: /schemas/types.yaml#/definitions/uint32
520
+
minimum: 0
521
+
maximum: 255
522
+
description: Specifies the slider's lower starting point.
523
+
524
+
azoteq,upper-cal:
525
+
$ref: /schemas/types.yaml#/definitions/uint32
526
+
minimum: 0
527
+
maximum: 255
528
+
description: Specifies the slider's upper starting point.
529
+
530
+
azoteq,top-speed:
531
+
$ref: /schemas/types.yaml#/definitions/uint32
532
+
minimum: 0
533
+
maximum: 65535
534
+
description:
535
+
Specifies the speed of movement after which coordinate filtering is
536
+
no longer applied.
537
+
538
+
azoteq,bottom-speed:
539
+
$ref: /schemas/types.yaml#/definitions/uint32
540
+
multipleOf: 4
541
+
minimum: 0
542
+
maximum: 1020
543
+
description:
544
+
Specifies the speed of movement after which coordinate filtering is
545
+
linearly reduced.
546
+
547
+
azoteq,bottom-beta:
548
+
$ref: /schemas/types.yaml#/definitions/uint32
549
+
minimum: 0
550
+
maximum: 7
551
+
description:
552
+
Specifies the coordinate filter damping factor to be applied
553
+
while the speed of movement is below that which is specified
554
+
by azoteq,bottom-speed.
555
+
556
+
azoteq,static-beta:
557
+
type: boolean
558
+
description:
559
+
Applies the coordinate filter damping factor specified by
560
+
azoteq,bottom-beta regardless of the speed of movement.
561
+
562
+
azoteq,use-prox:
563
+
type: boolean
564
+
description:
565
+
Directs the slider to respond to the proximity states of the selected
566
+
channels instead of their corresponding touch states. Note the slider
567
+
cannot report granular coordinates during a state of proximity.
568
+
569
+
linux,axis:
570
+
$ref: /schemas/types.yaml#/definitions/uint32
571
+
description:
572
+
Specifies the absolute axis to which coordinates are mapped. Specify
573
+
ABS_WHEEL to operate the slider as a wheel (IQS7222C only).
574
+
575
+
patternProperties:
576
+
"^event-(press|tap|(swipe|flick)-(pos|neg))$":
577
+
type: object
578
+
description:
579
+
Represents a press or gesture (IQS7222A only) event reported by
580
+
the slider.
581
+
582
+
properties:
583
+
linux,code:
584
+
$ref: /schemas/types.yaml#/definitions/uint32
585
+
description: Numeric key code associated with the event.
586
+
587
+
azoteq,gesture-max-ms:
588
+
multipleOf: 4
589
+
minimum: 0
590
+
maximum: 1020
591
+
description:
592
+
Specifies the length of time (in ms) within which a tap, swipe
593
+
or flick gesture must be completed in order to be acknowledged
594
+
by the device. The number specified for any one swipe or flick
595
+
gesture applies to all remaining swipe or flick gestures.
596
+
597
+
azoteq,gesture-min-ms:
598
+
multipleOf: 4
599
+
minimum: 0
600
+
maximum: 124
601
+
description:
602
+
Specifies the length of time (in ms) for which a tap gesture must
603
+
be held in order to be acknowledged by the device.
604
+
605
+
azoteq,gesture-dist:
606
+
$ref: /schemas/types.yaml#/definitions/uint32
607
+
multipleOf: 16
608
+
minimum: 0
609
+
maximum: 4080
610
+
description:
611
+
Specifies the distance across which a swipe or flick gesture must
612
+
travel in order to be acknowledged by the device. The number spec-
613
+
ified for any one swipe or flick gesture applies to all remaining
614
+
swipe or flick gestures.
615
+
616
+
azoteq,gpio-select:
617
+
$ref: /schemas/types.yaml#/definitions/uint32-array
618
+
minItems: 1
619
+
maxItems: 1
620
+
items:
621
+
minimum: 0
622
+
maximum: 0
623
+
description: |
624
+
Specifies an individual GPIO mapped to a tap, swipe or flick
625
+
gesture as follows:
626
+
0: GPIO0
627
+
1: GPIO3 (reserved)
628
+
2: GPIO4 (reserved)
629
+
630
+
Note that although multiple events can be mapped to a single
631
+
GPIO, they must all be of the same type (proximity, touch or
632
+
slider gesture).
633
+
634
+
required:
635
+
- linux,code
636
+
637
+
additionalProperties: false
638
+
639
+
required:
640
+
- azoteq,channel-select
641
+
642
+
additionalProperties: false
643
+
644
+
"^gpio-[0-2]$":
645
+
type: object
646
+
description: |
647
+
Represents a GPIO mapped to one or more events as follows:
648
+
gpio-0: GPIO0
649
+
gpio-1: GPIO3 (IQS7222C only)
650
+
gpio-2: GPIO4 (IQS7222C only)
651
+
652
+
allOf:
653
+
- $ref: ../pinctrl/pincfg-node.yaml#
654
+
655
+
properties:
656
+
drive-open-drain: true
657
+
658
+
additionalProperties: false
659
+
660
+
allOf:
661
+
- if:
662
+
properties:
663
+
compatible:
664
+
contains:
665
+
const: azoteq,iqs7222b
666
+
667
+
then:
668
+
patternProperties:
669
+
"^cycle-[0-9]$":
670
+
properties:
671
+
azoteq,iref-enable: false
672
+
673
+
"^channel-([0-9]|1[0-9])$":
674
+
properties:
675
+
azoteq,ref-select: false
676
+
677
+
patternProperties:
678
+
"^event-(prox|touch)$":
679
+
properties:
680
+
azoteq,gpio-select: false
681
+
682
+
"^slider-[0-1]$": false
683
+
684
+
"^gpio-[0-2]$": false
685
+
686
+
- if:
687
+
properties:
688
+
compatible:
689
+
contains:
690
+
const: azoteq,iqs7222a
691
+
692
+
then:
693
+
patternProperties:
694
+
"^channel-([0-9]|1[0-9])$":
695
+
patternProperties:
696
+
"^event-(prox|touch)$":
697
+
properties:
698
+
azoteq,gpio-select:
699
+
maxItems: 1
700
+
items:
701
+
maximum: 0
702
+
703
+
"^slider-[0-1]$":
704
+
properties:
705
+
azoteq,slider-size:
706
+
multipleOf: 16
707
+
maximum: 4080
708
+
709
+
azoteq,top-speed:
710
+
multipleOf: 4
711
+
maximum: 1020
712
+
713
+
else:
714
+
patternProperties:
715
+
"^channel-([0-9]|1[0-9])$":
716
+
properties:
717
+
azoteq,ulp-allow: false
718
+
719
+
"^slider-[0-1]$":
720
+
patternProperties:
721
+
"^event-(press|tap|(swipe|flick)-(pos|neg))$":
722
+
properties:
723
+
azoteq,gesture-max-ms: false
724
+
725
+
azoteq,gesture-min-ms: false
726
+
727
+
azoteq,gesture-dist: false
728
+
729
+
azoteq,gpio-select: false
730
+
731
+
required:
732
+
- compatible
733
+
- reg
734
+
- irq-gpios
735
+
736
+
additionalProperties: false
737
+
738
+
examples:
739
+
- |
740
+
#include <dt-bindings/gpio/gpio.h>
741
+
#include <dt-bindings/input/input.h>
742
+
743
+
i2c {
744
+
#address-cells = <1>;
745
+
#size-cells = <0>;
746
+
747
+
iqs7222a@44 {
748
+
compatible = "azoteq,iqs7222a";
749
+
reg = <0x44>;
750
+
irq-gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
751
+
azoteq,lta-beta-lp = <7>;
752
+
azoteq,lta-beta-np = <8>;
753
+
azoteq,counts-beta-lp = <2>;
754
+
azoteq,counts-beta-np = <3>;
755
+
azoteq,lta-fast-beta-lp = <3>;
756
+
azoteq,lta-fast-beta-np = <4>;
757
+
758
+
cycle-0 {
759
+
azoteq,conv-period = <5>;
760
+
azoteq,conv-frac = <127>;
761
+
azoteq,tx-enable = <1>, <2>, <4>, <5>;
762
+
azoteq,dead-time-enable;
763
+
azoteq,sense-mode = <2>;
764
+
};
765
+
766
+
cycle-1 {
767
+
azoteq,conv-period = <5>;
768
+
azoteq,conv-frac = <127>;
769
+
azoteq,tx-enable = <5>;
770
+
azoteq,dead-time-enable;
771
+
azoteq,sense-mode = <2>;
772
+
};
773
+
774
+
cycle-2 {
775
+
azoteq,conv-period = <5>;
776
+
azoteq,conv-frac = <127>;
777
+
azoteq,tx-enable = <4>;
778
+
azoteq,dead-time-enable;
779
+
azoteq,sense-mode = <2>;
780
+
};
781
+
782
+
cycle-3 {
783
+
azoteq,conv-period = <5>;
784
+
azoteq,conv-frac = <127>;
785
+
azoteq,tx-enable = <2>;
786
+
azoteq,dead-time-enable;
787
+
azoteq,sense-mode = <2>;
788
+
};
789
+
790
+
cycle-4 {
791
+
azoteq,conv-period = <5>;
792
+
azoteq,conv-frac = <127>;
793
+
azoteq,tx-enable = <1>;
794
+
azoteq,dead-time-enable;
795
+
azoteq,sense-mode = <2>;
796
+
};
797
+
798
+
cycle-5 {
799
+
azoteq,conv-period = <2>;
800
+
azoteq,conv-frac = <0>;
801
+
};
802
+
803
+
cycle-6 {
804
+
azoteq,conv-period = <2>;
805
+
azoteq,conv-frac = <0>;
806
+
};
807
+
808
+
channel-0 {
809
+
azoteq,ulp-allow;
810
+
azoteq,global-halt;
811
+
azoteq,invert-enable;
812
+
azoteq,rx-enable = <3>;
813
+
azoteq,ati-target = <800>;
814
+
azoteq,ati-base = <208>;
815
+
azoteq,ati-mode = <5>;
816
+
};
817
+
818
+
channel-1 {
819
+
azoteq,global-halt;
820
+
azoteq,invert-enable;
821
+
azoteq,rx-enable = <3>;
822
+
azoteq,ati-target = <496>;
823
+
azoteq,ati-base = <208>;
824
+
azoteq,ati-mode = <5>;
825
+
};
826
+
827
+
channel-2 {
828
+
azoteq,global-halt;
829
+
azoteq,invert-enable;
830
+
azoteq,rx-enable = <3>;
831
+
azoteq,ati-target = <496>;
832
+
azoteq,ati-base = <208>;
833
+
azoteq,ati-mode = <5>;
834
+
};
835
+
836
+
channel-3 {
837
+
azoteq,global-halt;
838
+
azoteq,invert-enable;
839
+
azoteq,rx-enable = <3>;
840
+
azoteq,ati-target = <496>;
841
+
azoteq,ati-base = <208>;
842
+
azoteq,ati-mode = <5>;
843
+
};
844
+
845
+
channel-4 {
846
+
azoteq,global-halt;
847
+
azoteq,invert-enable;
848
+
azoteq,rx-enable = <3>;
849
+
azoteq,ati-target = <496>;
850
+
azoteq,ati-base = <208>;
851
+
azoteq,ati-mode = <5>;
852
+
};
853
+
854
+
channel-5 {
855
+
azoteq,ulp-allow;
856
+
azoteq,global-halt;
857
+
azoteq,invert-enable;
858
+
azoteq,rx-enable = <6>;
859
+
azoteq,ati-target = <800>;
860
+
azoteq,ati-base = <144>;
861
+
azoteq,ati-mode = <5>;
862
+
};
863
+
864
+
channel-6 {
865
+
azoteq,global-halt;
866
+
azoteq,invert-enable;
867
+
azoteq,rx-enable = <6>;
868
+
azoteq,ati-target = <496>;
869
+
azoteq,ati-base = <160>;
870
+
azoteq,ati-mode = <5>;
871
+
872
+
event-touch {
873
+
linux,code = <KEY_MUTE>;
874
+
};
875
+
};
876
+
877
+
channel-7 {
878
+
azoteq,global-halt;
879
+
azoteq,invert-enable;
880
+
azoteq,rx-enable = <6>;
881
+
azoteq,ati-target = <496>;
882
+
azoteq,ati-base = <160>;
883
+
azoteq,ati-mode = <5>;
884
+
885
+
event-touch {
886
+
linux,code = <KEY_VOLUMEDOWN>;
887
+
};
888
+
};
889
+
890
+
channel-8 {
891
+
azoteq,global-halt;
892
+
azoteq,invert-enable;
893
+
azoteq,rx-enable = <6>;
894
+
azoteq,ati-target = <496>;
895
+
azoteq,ati-base = <160>;
896
+
azoteq,ati-mode = <5>;
897
+
898
+
event-touch {
899
+
linux,code = <KEY_VOLUMEUP>;
900
+
};
901
+
};
902
+
903
+
channel-9 {
904
+
azoteq,global-halt;
905
+
azoteq,invert-enable;
906
+
azoteq,rx-enable = <6>;
907
+
azoteq,ati-target = <496>;
908
+
azoteq,ati-base = <160>;
909
+
azoteq,ati-mode = <5>;
910
+
911
+
event-touch {
912
+
linux,code = <KEY_POWER>;
913
+
};
914
+
};
915
+
916
+
channel-10 {
917
+
azoteq,ulp-allow;
918
+
azoteq,ati-target = <496>;
919
+
azoteq,ati-base = <112>;
920
+
921
+
event-touch {
922
+
linux,code = <SW_LID>;
923
+
linux,input-type = <EV_SW>;
924
+
};
925
+
};
926
+
927
+
channel-11 {
928
+
azoteq,ati-target = <496>;
929
+
azoteq,ati-base = <112>;
930
+
};
931
+
932
+
slider-0 {
933
+
azoteq,channel-select = <1>, <2>, <3>, <4>;
934
+
azoteq,slider-size = <4080>;
935
+
azoteq,upper-cal = <50>;
936
+
azoteq,lower-cal = <30>;
937
+
azoteq,top-speed = <200>;
938
+
azoteq,bottom-speed = <1>;
939
+
azoteq,bottom-beta = <3>;
940
+
941
+
event-tap {
942
+
linux,code = <KEY_PLAYPAUSE>;
943
+
azoteq,gesture-max-ms = <600>;
944
+
azoteq,gesture-min-ms = <24>;
945
+
};
946
+
947
+
event-flick-pos {
948
+
linux,code = <KEY_NEXTSONG>;
949
+
azoteq,gesture-max-ms = <600>;
950
+
azoteq,gesture-dist = <816>;
951
+
};
952
+
953
+
event-flick-neg {
954
+
linux,code = <KEY_PREVIOUSSONG>;
955
+
};
956
+
};
957
+
};
958
+
};
959
+
960
+
...
+30
-6
Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml
+30
-6
Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml
···
15
15
Google's ChromeOS EC Keyboard is a simple matrix keyboard
16
16
implemented on a separate EC (Embedded Controller) device. It provides
17
17
a message for reading key scans from the EC. These are then converted
18
-
into keycodes for processing by the kernel.
19
-
20
-
allOf:
21
-
- $ref: "/schemas/input/matrix-keymap.yaml#"
18
+
into keycodes for processing by the kernel. This device also supports
19
+
switches/buttons like power and volume buttons.
22
20
23
21
properties:
24
22
compatible:
25
-
const: google,cros-ec-keyb
23
+
oneOf:
24
+
- description: ChromeOS EC with only buttons/switches
25
+
const: google,cros-ec-keyb-switches
26
+
- description: ChromeOS EC with keyboard and possibly buttons/switches
27
+
const: google,cros-ec-keyb
26
28
27
29
google,needs-ghost-filter:
28
30
description:
···
44
42
where the lower 16 bits are reserved. This property is specified only
45
43
when the keyboard has a custom design for the top row keys.
46
44
45
+
dependencies:
46
+
function-row-phsymap: [ 'linux,keymap' ]
47
+
google,needs-ghost-filter: [ 'linux,keymap' ]
48
+
47
49
required:
48
50
- compatible
51
+
52
+
if:
53
+
properties:
54
+
compatible:
55
+
contains:
56
+
const: google,cros-ec-keyb
57
+
then:
58
+
$ref: "/schemas/input/matrix-keymap.yaml#"
59
+
required:
60
+
- keypad,num-rows
61
+
- keypad,num-columns
62
+
- linux,keymap
49
63
50
64
unevaluatedProperties: false
51
65
52
66
examples:
53
67
- |
54
68
#include <dt-bindings/input/input.h>
55
-
cros-ec-keyb {
69
+
keyboard-controller {
56
70
compatible = "google,cros-ec-keyb";
57
71
keypad,num-rows = <8>;
58
72
keypad,num-columns = <13>;
···
132
114
/* UP LEFT */
133
115
0x070b0067 0x070c0069>;
134
116
};
117
+
- |
118
+
/* No matrix keyboard, just buttons/switches */
119
+
keyboard-controller {
120
+
compatible = "google,cros-ec-keyb-switches";
121
+
};
122
+
...
+1
-3
drivers/input/input.c
+1
-3
drivers/input/input.c
···
1793
1793
1794
1794
static int input_inhibit_device(struct input_dev *dev)
1795
1795
{
1796
-
int ret = 0;
1797
-
1798
1796
mutex_lock(&dev->mutex);
1799
1797
1800
1798
if (dev->inhibited)
···
1814
1816
1815
1817
out:
1816
1818
mutex_unlock(&dev->mutex);
1817
-
return ret;
1819
+
return 0;
1818
1820
}
1819
1821
1820
1822
static int input_uninhibit_device(struct input_dev *dev)
+11
drivers/input/joystick/Kconfig
+11
drivers/input/joystick/Kconfig
···
399
399
Say Y here if you want enable support for the four
400
400
built-in controller ports on the Nintendo 64 console.
401
401
402
+
config JOYSTICK_SENSEHAT
403
+
tristate "Raspberry Pi Sense HAT joystick"
404
+
depends on INPUT && I2C
405
+
select MFD_SIMPLE_MFD_I2C
406
+
help
407
+
Say Y here if you want to enable the driver for the
408
+
the Raspberry Pi Sense HAT.
409
+
410
+
To compile this driver as a module, choose M here: the
411
+
module will be called sensehat_joystick.
412
+
402
413
endif
+1
drivers/input/joystick/Makefile
+1
drivers/input/joystick/Makefile
···
28
28
obj-$(CONFIG_JOYSTICK_PSXPAD_SPI) += psxpad-spi.o
29
29
obj-$(CONFIG_JOYSTICK_PXRC) += pxrc.o
30
30
obj-$(CONFIG_JOYSTICK_QWIIC) += qwiic-joystick.o
31
+
obj-$(CONFIG_JOYSTICK_SENSEHAT) += sensehat-joystick.o
31
32
obj-$(CONFIG_JOYSTICK_SIDEWINDER) += sidewinder.o
32
33
obj-$(CONFIG_JOYSTICK_SPACEBALL) += spaceball.o
33
34
obj-$(CONFIG_JOYSTICK_SPACEORB) += spaceorb.o
+137
drivers/input/joystick/sensehat-joystick.c
+137
drivers/input/joystick/sensehat-joystick.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-or-later
2
+
/*
3
+
* Raspberry Pi Sense HAT joystick driver
4
+
* http://raspberrypi.org
5
+
*
6
+
* Copyright (C) 2015 Raspberry Pi
7
+
* Copyright (C) 2021 Charles Mirabile, Mwesigwa Guma, Joel Savitz
8
+
*
9
+
* Original Author: Serge Schneider
10
+
* Revised for upstream Linux by: Charles Mirabile, Mwesigwa Guma, Joel Savitz
11
+
*/
12
+
13
+
#include <linux/module.h>
14
+
#include <linux/input.h>
15
+
#include <linux/i2c.h>
16
+
#include <linux/interrupt.h>
17
+
#include <linux/platform_device.h>
18
+
#include <linux/regmap.h>
19
+
#include <linux/property.h>
20
+
21
+
#define JOYSTICK_SMB_REG 0xf2
22
+
23
+
struct sensehat_joystick {
24
+
struct platform_device *pdev;
25
+
struct input_dev *keys_dev;
26
+
unsigned long prev_states;
27
+
struct regmap *regmap;
28
+
};
29
+
30
+
static const unsigned int keymap[] = {
31
+
BTN_DPAD_DOWN, BTN_DPAD_RIGHT, BTN_DPAD_UP, BTN_SELECT, BTN_DPAD_LEFT,
32
+
};
33
+
34
+
static irqreturn_t sensehat_joystick_report(int irq, void *cookie)
35
+
{
36
+
struct sensehat_joystick *sensehat_joystick = cookie;
37
+
unsigned long curr_states, changes;
38
+
unsigned int keys;
39
+
int error;
40
+
int i;
41
+
42
+
error = regmap_read(sensehat_joystick->regmap, JOYSTICK_SMB_REG, &keys);
43
+
if (error < 0) {
44
+
dev_err(&sensehat_joystick->pdev->dev,
45
+
"Failed to read joystick state: %d", error);
46
+
return IRQ_NONE;
47
+
}
48
+
curr_states = keys;
49
+
bitmap_xor(&changes, &curr_states, &sensehat_joystick->prev_states,
50
+
ARRAY_SIZE(keymap));
51
+
52
+
for_each_set_bit(i, &changes, ARRAY_SIZE(keymap))
53
+
input_report_key(sensehat_joystick->keys_dev, keymap[i],
54
+
curr_states & BIT(i));
55
+
56
+
input_sync(sensehat_joystick->keys_dev);
57
+
sensehat_joystick->prev_states = keys;
58
+
return IRQ_HANDLED;
59
+
}
60
+
61
+
static int sensehat_joystick_probe(struct platform_device *pdev)
62
+
{
63
+
struct sensehat_joystick *sensehat_joystick;
64
+
int error, i, irq;
65
+
66
+
sensehat_joystick = devm_kzalloc(&pdev->dev, sizeof(*sensehat_joystick),
67
+
GFP_KERNEL);
68
+
if (!sensehat_joystick)
69
+
return -ENOMEM;
70
+
71
+
sensehat_joystick->pdev = pdev;
72
+
73
+
sensehat_joystick->regmap = dev_get_regmap(pdev->dev.parent, NULL);
74
+
if (!sensehat_joystick->regmap) {
75
+
dev_err(&pdev->dev, "unable to get sensehat regmap");
76
+
return -ENODEV;
77
+
}
78
+
79
+
sensehat_joystick->keys_dev = devm_input_allocate_device(&pdev->dev);
80
+
if (!sensehat_joystick->keys_dev) {
81
+
dev_err(&pdev->dev, "Could not allocate input device");
82
+
return -ENOMEM;
83
+
}
84
+
85
+
sensehat_joystick->keys_dev->name = "Raspberry Pi Sense HAT Joystick";
86
+
sensehat_joystick->keys_dev->phys = "sensehat-joystick/input0";
87
+
sensehat_joystick->keys_dev->id.bustype = BUS_I2C;
88
+
89
+
__set_bit(EV_KEY, sensehat_joystick->keys_dev->evbit);
90
+
__set_bit(EV_REP, sensehat_joystick->keys_dev->evbit);
91
+
for (i = 0; i < ARRAY_SIZE(keymap); i++)
92
+
__set_bit(keymap[i], sensehat_joystick->keys_dev->keybit);
93
+
94
+
error = input_register_device(sensehat_joystick->keys_dev);
95
+
if (error) {
96
+
dev_err(&pdev->dev, "Could not register input device");
97
+
return error;
98
+
}
99
+
100
+
irq = platform_get_irq(pdev, 0);
101
+
if (irq < 0) {
102
+
dev_err(&pdev->dev, "Could not retrieve interrupt request");
103
+
return irq;
104
+
}
105
+
106
+
error = devm_request_threaded_irq(&pdev->dev, irq,
107
+
NULL, sensehat_joystick_report,
108
+
IRQF_ONESHOT, "keys",
109
+
sensehat_joystick);
110
+
if (error) {
111
+
dev_err(&pdev->dev, "IRQ request failed");
112
+
return error;
113
+
}
114
+
115
+
return 0;
116
+
}
117
+
118
+
static const struct of_device_id sensehat_joystick_device_id[] = {
119
+
{ .compatible = "raspberrypi,sensehat-joystick" },
120
+
{},
121
+
};
122
+
MODULE_DEVICE_TABLE(of, sensehat_joystick_device_id);
123
+
124
+
static struct platform_driver sensehat_joystick_driver = {
125
+
.probe = sensehat_joystick_probe,
126
+
.driver = {
127
+
.name = "sensehat-joystick",
128
+
.of_match_table = sensehat_joystick_device_id,
129
+
},
130
+
};
131
+
132
+
module_platform_driver(sensehat_joystick_driver);
133
+
134
+
MODULE_DESCRIPTION("Raspberry Pi Sense HAT joystick driver");
135
+
MODULE_AUTHOR("Charles Mirabile <cmirabil@redhat.com>");
136
+
MODULE_AUTHOR("Serge Schneider <serge@raspberrypi.org>");
137
+
MODULE_LICENSE("GPL");
+1
-2
drivers/input/keyboard/bcm-keypad.c
+1
-2
drivers/input/keyboard/bcm-keypad.c
+1
-2
drivers/input/keyboard/clps711x-keypad.c
+1
-2
drivers/input/keyboard/clps711x-keypad.c
+18
-11
drivers/input/keyboard/cros_ec_keyb.c
+18
-11
drivers/input/keyboard/cros_ec_keyb.c
···
435
435
* but the ckdev->bs_idev will remain NULL when this function exits.
436
436
*
437
437
* @ckdev: The keyboard device
438
+
* @expect_buttons_switches: Indicates that EC must report button and/or
439
+
* switch events
438
440
*
439
441
* Returns 0 if no error or -error upon error.
440
442
*/
441
-
static int cros_ec_keyb_register_bs(struct cros_ec_keyb *ckdev)
443
+
static int cros_ec_keyb_register_bs(struct cros_ec_keyb *ckdev,
444
+
bool expect_buttons_switches)
442
445
{
443
446
struct cros_ec_device *ec_dev = ckdev->ec;
444
447
struct device *dev = ckdev->dev;
···
468
465
switches = get_unaligned_le32(&event_data.switches);
469
466
470
467
if (!buttons && !switches)
471
-
return 0;
468
+
return expect_buttons_switches ? -EINVAL : 0;
472
469
473
470
/*
474
471
* We call the non-matrix buttons/switches 'input1', if present.
···
519
516
}
520
517
521
518
/**
522
-
* cros_ec_keyb_register_bs - Register matrix keys
519
+
* cros_ec_keyb_register_matrix - Register matrix keys
523
520
*
524
521
* Handles all the bits of the keyboard driver related to matrix keys.
525
522
*
···
651
648
.attrs = cros_ec_keyb_attrs,
652
649
};
653
650
654
-
655
651
static int cros_ec_keyb_probe(struct platform_device *pdev)
656
652
{
657
653
struct cros_ec_device *ec = dev_get_drvdata(pdev->dev.parent);
658
654
struct device *dev = &pdev->dev;
659
655
struct cros_ec_keyb *ckdev;
656
+
bool buttons_switches_only = device_get_match_data(dev);
660
657
int err;
661
658
662
659
if (!dev->of_node)
···
670
667
ckdev->dev = dev;
671
668
dev_set_drvdata(dev, ckdev);
672
669
673
-
err = cros_ec_keyb_register_matrix(ckdev);
674
-
if (err) {
675
-
dev_err(dev, "cannot register matrix inputs: %d\n", err);
676
-
return err;
670
+
if (!buttons_switches_only) {
671
+
err = cros_ec_keyb_register_matrix(ckdev);
672
+
if (err) {
673
+
dev_err(dev, "cannot register matrix inputs: %d\n",
674
+
err);
675
+
return err;
676
+
}
677
677
}
678
678
679
-
err = cros_ec_keyb_register_bs(ckdev);
679
+
err = cros_ec_keyb_register_bs(ckdev, buttons_switches_only);
680
680
if (err) {
681
681
dev_err(dev, "cannot register non-matrix inputs: %d\n", err);
682
682
return err;
···
687
681
688
682
err = devm_device_add_group(dev, &cros_ec_keyb_attr_group);
689
683
if (err) {
690
-
dev_err(dev, "failed to create attributes. err=%d\n", err);
684
+
dev_err(dev, "failed to create attributes: %d\n", err);
691
685
return err;
692
686
}
693
687
···
716
710
#ifdef CONFIG_OF
717
711
static const struct of_device_id cros_ec_keyb_of_match[] = {
718
712
{ .compatible = "google,cros-ec-keyb" },
719
-
{},
713
+
{ .compatible = "google,cros-ec-keyb-switches", .data = (void *)true },
714
+
{}
720
715
};
721
716
MODULE_DEVICE_TABLE(of, cros_ec_keyb_of_match);
722
717
#endif
+1
-6
drivers/input/keyboard/ep93xx_keypad.c
+1
-6
drivers/input/keyboard/ep93xx_keypad.c
···
231
231
struct ep93xx_keypad *keypad;
232
232
const struct matrix_keymap_data *keymap_data;
233
233
struct input_dev *input_dev;
234
-
struct resource *res;
235
234
int err;
236
235
237
236
keypad = devm_kzalloc(&pdev->dev, sizeof(*keypad), GFP_KERNEL);
···
249
250
if (keypad->irq < 0)
250
251
return keypad->irq;
251
252
252
-
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
253
-
if (!res)
254
-
return -ENXIO;
255
-
256
-
keypad->mmio_base = devm_ioremap_resource(&pdev->dev, res);
253
+
keypad->mmio_base = devm_platform_ioremap_resource(pdev, 0);
257
254
if (IS_ERR(keypad->mmio_base))
258
255
return PTR_ERR(keypad->mmio_base);
259
256
+1
-1
drivers/input/keyboard/gpio_keys.c
+1
-1
drivers/input/keyboard/gpio_keys.c
+5
-5
drivers/input/keyboard/mt6779-keypad.c
+5
-5
drivers/input/keyboard/mt6779-keypad.c
···
24
24
struct regmap *regmap;
25
25
struct input_dev *input_dev;
26
26
struct clk *clk;
27
-
void __iomem *base;
28
27
u32 n_rows;
29
28
u32 n_cols;
30
29
DECLARE_BITMAP(keymap_state, MTK_KPD_NUM_BITS);
···
90
91
static int mt6779_keypad_pdrv_probe(struct platform_device *pdev)
91
92
{
92
93
struct mt6779_keypad *keypad;
94
+
void __iomem *base;
93
95
int irq;
94
96
u32 debounce;
95
97
bool wakeup;
···
100
100
if (!keypad)
101
101
return -ENOMEM;
102
102
103
-
keypad->base = devm_platform_ioremap_resource(pdev, 0);
104
-
if (IS_ERR(keypad->base))
105
-
return PTR_ERR(keypad->base);
103
+
base = devm_platform_ioremap_resource(pdev, 0);
104
+
if (IS_ERR(base))
105
+
return PTR_ERR(base);
106
106
107
-
keypad->regmap = devm_regmap_init_mmio(&pdev->dev, keypad->base,
107
+
keypad->regmap = devm_regmap_init_mmio(&pdev->dev, base,
108
108
&mt6779_keypad_regmap_cfg);
109
109
if (IS_ERR(keypad->regmap)) {
110
110
dev_err(&pdev->dev,
+59
-4
drivers/input/keyboard/sun4i-lradc-keys.c
+59
-4
drivers/input/keyboard/sun4i-lradc-keys.c
···
14
14
* there are no boards known to use channel 1.
15
15
*/
16
16
17
+
#include <linux/clk.h>
17
18
#include <linux/err.h>
18
19
#include <linux/init.h>
19
20
#include <linux/input.h>
···
23
22
#include <linux/module.h>
24
23
#include <linux/of_platform.h>
25
24
#include <linux/platform_device.h>
25
+
#include <linux/pm_wakeirq.h>
26
+
#include <linux/pm_wakeup.h>
26
27
#include <linux/regulator/consumer.h>
28
+
#include <linux/reset.h>
27
29
#include <linux/slab.h>
28
30
29
31
#define LRADC_CTRL 0x00
···
62
58
/* struct lradc_variant - Describe sun4i-a10-lradc-keys hardware variant
63
59
* @divisor_numerator: The numerator of lradc Vref internally divisor
64
60
* @divisor_denominator: The denominator of lradc Vref internally divisor
61
+
* @has_clock_reset: If the binding requires a clock and reset
65
62
*/
66
63
struct lradc_variant {
67
64
u8 divisor_numerator;
68
65
u8 divisor_denominator;
66
+
bool has_clock_reset;
69
67
};
70
68
71
69
static const struct lradc_variant lradc_variant_a10 = {
···
80
74
.divisor_denominator = 4
81
75
};
82
76
77
+
static const struct lradc_variant lradc_variant_r329 = {
78
+
.divisor_numerator = 3,
79
+
.divisor_denominator = 4,
80
+
.has_clock_reset = true,
81
+
};
82
+
83
83
struct sun4i_lradc_keymap {
84
84
u32 voltage;
85
85
u32 keycode;
···
95
83
struct device *dev;
96
84
struct input_dev *input;
97
85
void __iomem *base;
86
+
struct clk *clk;
87
+
struct reset_control *reset;
98
88
struct regulator *vref_supply;
99
89
struct sun4i_lradc_keymap *chan0_map;
100
90
const struct lradc_variant *variant;
···
154
140
if (error)
155
141
return error;
156
142
143
+
error = reset_control_deassert(lradc->reset);
144
+
if (error)
145
+
goto err_disable_reg;
146
+
147
+
error = clk_prepare_enable(lradc->clk);
148
+
if (error)
149
+
goto err_assert_reset;
150
+
157
151
lradc->vref = regulator_get_voltage(lradc->vref_supply) *
158
152
lradc->variant->divisor_numerator /
159
153
lradc->variant->divisor_denominator;
···
175
153
writel(CHAN0_KEYUP_IRQ | CHAN0_KEYDOWN_IRQ, lradc->base + LRADC_INTC);
176
154
177
155
return 0;
156
+
157
+
err_assert_reset:
158
+
reset_control_assert(lradc->reset);
159
+
err_disable_reg:
160
+
regulator_disable(lradc->vref_supply);
161
+
162
+
return error;
178
163
}
179
164
180
165
static void sun4i_lradc_close(struct input_dev *dev)
···
193
164
SAMPLE_RATE(2), lradc->base + LRADC_CTRL);
194
165
writel(0, lradc->base + LRADC_INTC);
195
166
167
+
clk_disable_unprepare(lradc->clk);
168
+
reset_control_assert(lradc->reset);
196
169
regulator_disable(lradc->vref_supply);
197
170
}
198
171
···
257
226
{
258
227
struct sun4i_lradc_data *lradc;
259
228
struct device *dev = &pdev->dev;
260
-
int i;
261
-
int error;
229
+
int error, i, irq;
262
230
263
231
lradc = devm_kzalloc(dev, sizeof(struct sun4i_lradc_data), GFP_KERNEL);
264
232
if (!lradc)
···
271
241
if (!lradc->variant) {
272
242
dev_err(&pdev->dev, "Missing sun4i-a10-lradc-keys variant\n");
273
243
return -EINVAL;
244
+
}
245
+
246
+
if (lradc->variant->has_clock_reset) {
247
+
lradc->clk = devm_clk_get(dev, NULL);
248
+
if (IS_ERR(lradc->clk))
249
+
return PTR_ERR(lradc->clk);
250
+
251
+
lradc->reset = devm_reset_control_get_exclusive(dev, NULL);
252
+
if (IS_ERR(lradc->reset))
253
+
return PTR_ERR(lradc->reset);
274
254
}
275
255
276
256
lradc->vref_supply = devm_regulator_get(dev, "vref");
···
312
272
if (IS_ERR(lradc->base))
313
273
return PTR_ERR(lradc->base);
314
274
315
-
error = devm_request_irq(dev, platform_get_irq(pdev, 0),
316
-
sun4i_lradc_irq, 0,
275
+
irq = platform_get_irq(pdev, 0);
276
+
if (irq < 0)
277
+
return irq;
278
+
279
+
error = devm_request_irq(dev, irq, sun4i_lradc_irq, 0,
317
280
"sun4i-a10-lradc-keys", lradc);
318
281
if (error)
319
282
return error;
···
324
281
error = input_register_device(lradc->input);
325
282
if (error)
326
283
return error;
284
+
285
+
if (device_property_read_bool(dev, "wakeup-source")) {
286
+
error = dev_pm_set_wake_irq(dev, irq);
287
+
if (error)
288
+
dev_warn(dev,
289
+
"Failed to set IRQ %d as a wake IRQ: %d\n",
290
+
irq, error);
291
+
else
292
+
device_set_wakeup_capable(dev, true);
293
+
}
327
294
328
295
return 0;
329
296
}
···
343
290
.data = &lradc_variant_a10 },
344
291
{ .compatible = "allwinner,sun8i-a83t-r-lradc",
345
292
.data = &r_lradc_variant_a83t },
293
+
{ .compatible = "allwinner,sun50i-r329-lradc",
294
+
.data = &lradc_variant_r329 },
346
295
{ /* sentinel */ }
347
296
};
348
297
MODULE_DEVICE_TABLE(of, sun4i_lradc_of_match);
+10
drivers/input/misc/Kconfig
+10
drivers/input/misc/Kconfig
···
762
762
To compile this driver as a module, choose M here: the
763
763
module will be called iqs626a.
764
764
765
+
config INPUT_IQS7222
766
+
tristate "Azoteq IQS7222A/B/C capacitive touch controller"
767
+
depends on I2C
768
+
help
769
+
Say Y to enable support for the Azoteq IQS7222A/B/C family
770
+
of capacitive touch controllers.
771
+
772
+
To compile this driver as a module, choose M here: the
773
+
module will be called iqs7222.
774
+
765
775
config INPUT_CMA3000
766
776
tristate "VTI CMA3000 Tri-axis accelerometer"
767
777
help
+1
drivers/input/misc/Makefile
+1
drivers/input/misc/Makefile
···
44
44
obj-$(CONFIG_INPUT_IMS_PCU) += ims-pcu.o
45
45
obj-$(CONFIG_INPUT_IQS269A) += iqs269a.o
46
46
obj-$(CONFIG_INPUT_IQS626A) += iqs626a.o
47
+
obj-$(CONFIG_INPUT_IQS7222) += iqs7222.o
47
48
obj-$(CONFIG_INPUT_KEYSPAN_REMOTE) += keyspan_remote.o
48
49
obj-$(CONFIG_INPUT_KXTJ9) += kxtj9.o
49
50
obj-$(CONFIG_INPUT_M68K_BEEP) += m68kspkr.o
+2446
drivers/input/misc/iqs7222.c
+2446
drivers/input/misc/iqs7222.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-or-later
2
+
/*
3
+
* Azoteq IQS7222A/B/C Capacitive Touch Controller
4
+
*
5
+
* Copyright (C) 2022 Jeff LaBundy <jeff@labundy.com>
6
+
*/
7
+
8
+
#include <linux/bits.h>
9
+
#include <linux/delay.h>
10
+
#include <linux/device.h>
11
+
#include <linux/err.h>
12
+
#include <linux/gpio/consumer.h>
13
+
#include <linux/i2c.h>
14
+
#include <linux/input.h>
15
+
#include <linux/interrupt.h>
16
+
#include <linux/kernel.h>
17
+
#include <linux/ktime.h>
18
+
#include <linux/module.h>
19
+
#include <linux/of_device.h>
20
+
#include <linux/property.h>
21
+
#include <linux/slab.h>
22
+
#include <asm/unaligned.h>
23
+
24
+
#define IQS7222_PROD_NUM 0x00
25
+
#define IQS7222_PROD_NUM_A 840
26
+
#define IQS7222_PROD_NUM_B 698
27
+
#define IQS7222_PROD_NUM_C 863
28
+
29
+
#define IQS7222_SYS_STATUS 0x10
30
+
#define IQS7222_SYS_STATUS_RESET BIT(3)
31
+
#define IQS7222_SYS_STATUS_ATI_ERROR BIT(1)
32
+
#define IQS7222_SYS_STATUS_ATI_ACTIVE BIT(0)
33
+
34
+
#define IQS7222_CHAN_SETUP_0_REF_MODE_MASK GENMASK(15, 14)
35
+
#define IQS7222_CHAN_SETUP_0_REF_MODE_FOLLOW BIT(15)
36
+
#define IQS7222_CHAN_SETUP_0_REF_MODE_REF BIT(14)
37
+
#define IQS7222_CHAN_SETUP_0_CHAN_EN BIT(8)
38
+
39
+
#define IQS7222_SLDR_SETUP_0_CHAN_CNT_MASK GENMASK(2, 0)
40
+
#define IQS7222_SLDR_SETUP_2_RES_MASK GENMASK(15, 8)
41
+
#define IQS7222_SLDR_SETUP_2_RES_SHIFT 8
42
+
#define IQS7222_SLDR_SETUP_2_TOP_SPEED_MASK GENMASK(7, 0)
43
+
#define IQS7222_SLDR_SETUP_3_CHAN_SEL_MASK GENMASK(9, 0)
44
+
45
+
#define IQS7222_GPIO_SETUP_0_GPIO_EN BIT(0)
46
+
47
+
#define IQS7222_SYS_SETUP 0xD0
48
+
#define IQS7222_SYS_SETUP_INTF_MODE_MASK GENMASK(7, 6)
49
+
#define IQS7222_SYS_SETUP_INTF_MODE_TOUCH BIT(7)
50
+
#define IQS7222_SYS_SETUP_INTF_MODE_EVENT BIT(6)
51
+
#define IQS7222_SYS_SETUP_PWR_MODE_MASK GENMASK(5, 4)
52
+
#define IQS7222_SYS_SETUP_PWR_MODE_AUTO IQS7222_SYS_SETUP_PWR_MODE_MASK
53
+
#define IQS7222_SYS_SETUP_REDO_ATI BIT(2)
54
+
#define IQS7222_SYS_SETUP_ACK_RESET BIT(0)
55
+
56
+
#define IQS7222_EVENT_MASK_ATI BIT(12)
57
+
58
+
#define IQS7222_COMMS_HOLD BIT(0)
59
+
#define IQS7222_COMMS_ERROR 0xEEEE
60
+
#define IQS7222_COMMS_RETRY_MS 50
61
+
#define IQS7222_COMMS_TIMEOUT_MS 100
62
+
#define IQS7222_RESET_TIMEOUT_MS 250
63
+
#define IQS7222_ATI_TIMEOUT_MS 2000
64
+
65
+
#define IQS7222_MAX_COLS_STAT 8
66
+
#define IQS7222_MAX_COLS_CYCLE 3
67
+
#define IQS7222_MAX_COLS_GLBL 3
68
+
#define IQS7222_MAX_COLS_BTN 3
69
+
#define IQS7222_MAX_COLS_CHAN 6
70
+
#define IQS7222_MAX_COLS_FILT 2
71
+
#define IQS7222_MAX_COLS_SLDR 11
72
+
#define IQS7222_MAX_COLS_GPIO 3
73
+
#define IQS7222_MAX_COLS_SYS 13
74
+
75
+
#define IQS7222_MAX_CHAN 20
76
+
#define IQS7222_MAX_SLDR 2
77
+
78
+
#define IQS7222_NUM_RETRIES 5
79
+
#define IQS7222_REG_OFFSET 0x100
80
+
81
+
enum iqs7222_reg_key_id {
82
+
IQS7222_REG_KEY_NONE,
83
+
IQS7222_REG_KEY_PROX,
84
+
IQS7222_REG_KEY_TOUCH,
85
+
IQS7222_REG_KEY_DEBOUNCE,
86
+
IQS7222_REG_KEY_TAP,
87
+
IQS7222_REG_KEY_AXIAL,
88
+
IQS7222_REG_KEY_WHEEL,
89
+
IQS7222_REG_KEY_NO_WHEEL,
90
+
IQS7222_REG_KEY_RESERVED
91
+
};
92
+
93
+
enum iqs7222_reg_grp_id {
94
+
IQS7222_REG_GRP_STAT,
95
+
IQS7222_REG_GRP_CYCLE,
96
+
IQS7222_REG_GRP_GLBL,
97
+
IQS7222_REG_GRP_BTN,
98
+
IQS7222_REG_GRP_CHAN,
99
+
IQS7222_REG_GRP_FILT,
100
+
IQS7222_REG_GRP_SLDR,
101
+
IQS7222_REG_GRP_GPIO,
102
+
IQS7222_REG_GRP_SYS,
103
+
IQS7222_NUM_REG_GRPS
104
+
};
105
+
106
+
static const char * const iqs7222_reg_grp_names[] = {
107
+
[IQS7222_REG_GRP_CYCLE] = "cycle",
108
+
[IQS7222_REG_GRP_CHAN] = "channel",
109
+
[IQS7222_REG_GRP_SLDR] = "slider",
110
+
[IQS7222_REG_GRP_GPIO] = "gpio",
111
+
};
112
+
113
+
static const unsigned int iqs7222_max_cols[] = {
114
+
[IQS7222_REG_GRP_STAT] = IQS7222_MAX_COLS_STAT,
115
+
[IQS7222_REG_GRP_CYCLE] = IQS7222_MAX_COLS_CYCLE,
116
+
[IQS7222_REG_GRP_GLBL] = IQS7222_MAX_COLS_GLBL,
117
+
[IQS7222_REG_GRP_BTN] = IQS7222_MAX_COLS_BTN,
118
+
[IQS7222_REG_GRP_CHAN] = IQS7222_MAX_COLS_CHAN,
119
+
[IQS7222_REG_GRP_FILT] = IQS7222_MAX_COLS_FILT,
120
+
[IQS7222_REG_GRP_SLDR] = IQS7222_MAX_COLS_SLDR,
121
+
[IQS7222_REG_GRP_GPIO] = IQS7222_MAX_COLS_GPIO,
122
+
[IQS7222_REG_GRP_SYS] = IQS7222_MAX_COLS_SYS,
123
+
};
124
+
125
+
static const unsigned int iqs7222_gpio_links[] = { 2, 5, 6, };
126
+
127
+
struct iqs7222_event_desc {
128
+
const char *name;
129
+
u16 mask;
130
+
u16 val;
131
+
u16 enable;
132
+
enum iqs7222_reg_key_id reg_key;
133
+
};
134
+
135
+
static const struct iqs7222_event_desc iqs7222_kp_events[] = {
136
+
{
137
+
.name = "event-prox",
138
+
.enable = BIT(0),
139
+
.reg_key = IQS7222_REG_KEY_PROX,
140
+
},
141
+
{
142
+
.name = "event-touch",
143
+
.enable = BIT(1),
144
+
.reg_key = IQS7222_REG_KEY_TOUCH,
145
+
},
146
+
};
147
+
148
+
static const struct iqs7222_event_desc iqs7222_sl_events[] = {
149
+
{ .name = "event-press", },
150
+
{
151
+
.name = "event-tap",
152
+
.mask = BIT(0),
153
+
.val = BIT(0),
154
+
.enable = BIT(0),
155
+
.reg_key = IQS7222_REG_KEY_TAP,
156
+
},
157
+
{
158
+
.name = "event-swipe-pos",
159
+
.mask = BIT(5) | BIT(1),
160
+
.val = BIT(1),
161
+
.enable = BIT(1),
162
+
.reg_key = IQS7222_REG_KEY_AXIAL,
163
+
},
164
+
{
165
+
.name = "event-swipe-neg",
166
+
.mask = BIT(5) | BIT(1),
167
+
.val = BIT(5) | BIT(1),
168
+
.enable = BIT(1),
169
+
.reg_key = IQS7222_REG_KEY_AXIAL,
170
+
},
171
+
{
172
+
.name = "event-flick-pos",
173
+
.mask = BIT(5) | BIT(2),
174
+
.val = BIT(2),
175
+
.enable = BIT(2),
176
+
.reg_key = IQS7222_REG_KEY_AXIAL,
177
+
},
178
+
{
179
+
.name = "event-flick-neg",
180
+
.mask = BIT(5) | BIT(2),
181
+
.val = BIT(5) | BIT(2),
182
+
.enable = BIT(2),
183
+
.reg_key = IQS7222_REG_KEY_AXIAL,
184
+
},
185
+
};
186
+
187
+
struct iqs7222_reg_grp_desc {
188
+
u16 base;
189
+
int num_row;
190
+
int num_col;
191
+
};
192
+
193
+
struct iqs7222_dev_desc {
194
+
u16 prod_num;
195
+
u16 fw_major;
196
+
u16 fw_minor;
197
+
u16 sldr_res;
198
+
u16 touch_link;
199
+
u16 wheel_enable;
200
+
int allow_offset;
201
+
int event_offset;
202
+
int comms_offset;
203
+
struct iqs7222_reg_grp_desc reg_grps[IQS7222_NUM_REG_GRPS];
204
+
};
205
+
206
+
static const struct iqs7222_dev_desc iqs7222_devs[] = {
207
+
{
208
+
.prod_num = IQS7222_PROD_NUM_A,
209
+
.fw_major = 1,
210
+
.fw_minor = 12,
211
+
.sldr_res = U8_MAX * 16,
212
+
.touch_link = 1768,
213
+
.allow_offset = 9,
214
+
.event_offset = 10,
215
+
.comms_offset = 12,
216
+
.reg_grps = {
217
+
[IQS7222_REG_GRP_STAT] = {
218
+
.base = IQS7222_SYS_STATUS,
219
+
.num_row = 1,
220
+
.num_col = 8,
221
+
},
222
+
[IQS7222_REG_GRP_CYCLE] = {
223
+
.base = 0x8000,
224
+
.num_row = 7,
225
+
.num_col = 3,
226
+
},
227
+
[IQS7222_REG_GRP_GLBL] = {
228
+
.base = 0x8700,
229
+
.num_row = 1,
230
+
.num_col = 3,
231
+
},
232
+
[IQS7222_REG_GRP_BTN] = {
233
+
.base = 0x9000,
234
+
.num_row = 12,
235
+
.num_col = 3,
236
+
},
237
+
[IQS7222_REG_GRP_CHAN] = {
238
+
.base = 0xA000,
239
+
.num_row = 12,
240
+
.num_col = 6,
241
+
},
242
+
[IQS7222_REG_GRP_FILT] = {
243
+
.base = 0xAC00,
244
+
.num_row = 1,
245
+
.num_col = 2,
246
+
},
247
+
[IQS7222_REG_GRP_SLDR] = {
248
+
.base = 0xB000,
249
+
.num_row = 2,
250
+
.num_col = 11,
251
+
},
252
+
[IQS7222_REG_GRP_GPIO] = {
253
+
.base = 0xC000,
254
+
.num_row = 1,
255
+
.num_col = 3,
256
+
},
257
+
[IQS7222_REG_GRP_SYS] = {
258
+
.base = IQS7222_SYS_SETUP,
259
+
.num_row = 1,
260
+
.num_col = 13,
261
+
},
262
+
},
263
+
},
264
+
{
265
+
.prod_num = IQS7222_PROD_NUM_B,
266
+
.fw_major = 1,
267
+
.fw_minor = 43,
268
+
.event_offset = 10,
269
+
.comms_offset = 11,
270
+
.reg_grps = {
271
+
[IQS7222_REG_GRP_STAT] = {
272
+
.base = IQS7222_SYS_STATUS,
273
+
.num_row = 1,
274
+
.num_col = 6,
275
+
},
276
+
[IQS7222_REG_GRP_CYCLE] = {
277
+
.base = 0x8000,
278
+
.num_row = 10,
279
+
.num_col = 2,
280
+
},
281
+
[IQS7222_REG_GRP_GLBL] = {
282
+
.base = 0x8A00,
283
+
.num_row = 1,
284
+
.num_col = 3,
285
+
},
286
+
[IQS7222_REG_GRP_BTN] = {
287
+
.base = 0x9000,
288
+
.num_row = 20,
289
+
.num_col = 2,
290
+
},
291
+
[IQS7222_REG_GRP_CHAN] = {
292
+
.base = 0xB000,
293
+
.num_row = 20,
294
+
.num_col = 4,
295
+
},
296
+
[IQS7222_REG_GRP_FILT] = {
297
+
.base = 0xC400,
298
+
.num_row = 1,
299
+
.num_col = 2,
300
+
},
301
+
[IQS7222_REG_GRP_SYS] = {
302
+
.base = IQS7222_SYS_SETUP,
303
+
.num_row = 1,
304
+
.num_col = 13,
305
+
},
306
+
},
307
+
},
308
+
{
309
+
.prod_num = IQS7222_PROD_NUM_B,
310
+
.fw_major = 1,
311
+
.fw_minor = 27,
312
+
.reg_grps = {
313
+
[IQS7222_REG_GRP_STAT] = {
314
+
.base = IQS7222_SYS_STATUS,
315
+
.num_row = 1,
316
+
.num_col = 6,
317
+
},
318
+
[IQS7222_REG_GRP_CYCLE] = {
319
+
.base = 0x8000,
320
+
.num_row = 10,
321
+
.num_col = 2,
322
+
},
323
+
[IQS7222_REG_GRP_GLBL] = {
324
+
.base = 0x8A00,
325
+
.num_row = 1,
326
+
.num_col = 3,
327
+
},
328
+
[IQS7222_REG_GRP_BTN] = {
329
+
.base = 0x9000,
330
+
.num_row = 20,
331
+
.num_col = 2,
332
+
},
333
+
[IQS7222_REG_GRP_CHAN] = {
334
+
.base = 0xB000,
335
+
.num_row = 20,
336
+
.num_col = 4,
337
+
},
338
+
[IQS7222_REG_GRP_FILT] = {
339
+
.base = 0xC400,
340
+
.num_row = 1,
341
+
.num_col = 2,
342
+
},
343
+
[IQS7222_REG_GRP_SYS] = {
344
+
.base = IQS7222_SYS_SETUP,
345
+
.num_row = 1,
346
+
.num_col = 10,
347
+
},
348
+
},
349
+
},
350
+
{
351
+
.prod_num = IQS7222_PROD_NUM_C,
352
+
.fw_major = 2,
353
+
.fw_minor = 6,
354
+
.sldr_res = U16_MAX,
355
+
.touch_link = 1686,
356
+
.wheel_enable = BIT(3),
357
+
.event_offset = 9,
358
+
.comms_offset = 10,
359
+
.reg_grps = {
360
+
[IQS7222_REG_GRP_STAT] = {
361
+
.base = IQS7222_SYS_STATUS,
362
+
.num_row = 1,
363
+
.num_col = 6,
364
+
},
365
+
[IQS7222_REG_GRP_CYCLE] = {
366
+
.base = 0x8000,
367
+
.num_row = 5,
368
+
.num_col = 3,
369
+
},
370
+
[IQS7222_REG_GRP_GLBL] = {
371
+
.base = 0x8500,
372
+
.num_row = 1,
373
+
.num_col = 3,
374
+
},
375
+
[IQS7222_REG_GRP_BTN] = {
376
+
.base = 0x9000,
377
+
.num_row = 10,
378
+
.num_col = 3,
379
+
},
380
+
[IQS7222_REG_GRP_CHAN] = {
381
+
.base = 0xA000,
382
+
.num_row = 10,
383
+
.num_col = 6,
384
+
},
385
+
[IQS7222_REG_GRP_FILT] = {
386
+
.base = 0xAA00,
387
+
.num_row = 1,
388
+
.num_col = 2,
389
+
},
390
+
[IQS7222_REG_GRP_SLDR] = {
391
+
.base = 0xB000,
392
+
.num_row = 2,
393
+
.num_col = 10,
394
+
},
395
+
[IQS7222_REG_GRP_GPIO] = {
396
+
.base = 0xC000,
397
+
.num_row = 3,
398
+
.num_col = 3,
399
+
},
400
+
[IQS7222_REG_GRP_SYS] = {
401
+
.base = IQS7222_SYS_SETUP,
402
+
.num_row = 1,
403
+
.num_col = 12,
404
+
},
405
+
},
406
+
},
407
+
{
408
+
.prod_num = IQS7222_PROD_NUM_C,
409
+
.fw_major = 1,
410
+
.fw_minor = 13,
411
+
.sldr_res = U16_MAX,
412
+
.touch_link = 1674,
413
+
.wheel_enable = BIT(3),
414
+
.event_offset = 9,
415
+
.comms_offset = 10,
416
+
.reg_grps = {
417
+
[IQS7222_REG_GRP_STAT] = {
418
+
.base = IQS7222_SYS_STATUS,
419
+
.num_row = 1,
420
+
.num_col = 6,
421
+
},
422
+
[IQS7222_REG_GRP_CYCLE] = {
423
+
.base = 0x8000,
424
+
.num_row = 5,
425
+
.num_col = 3,
426
+
},
427
+
[IQS7222_REG_GRP_GLBL] = {
428
+
.base = 0x8500,
429
+
.num_row = 1,
430
+
.num_col = 3,
431
+
},
432
+
[IQS7222_REG_GRP_BTN] = {
433
+
.base = 0x9000,
434
+
.num_row = 10,
435
+
.num_col = 3,
436
+
},
437
+
[IQS7222_REG_GRP_CHAN] = {
438
+
.base = 0xA000,
439
+
.num_row = 10,
440
+
.num_col = 6,
441
+
},
442
+
[IQS7222_REG_GRP_FILT] = {
443
+
.base = 0xAA00,
444
+
.num_row = 1,
445
+
.num_col = 2,
446
+
},
447
+
[IQS7222_REG_GRP_SLDR] = {
448
+
.base = 0xB000,
449
+
.num_row = 2,
450
+
.num_col = 10,
451
+
},
452
+
[IQS7222_REG_GRP_GPIO] = {
453
+
.base = 0xC000,
454
+
.num_row = 1,
455
+
.num_col = 3,
456
+
},
457
+
[IQS7222_REG_GRP_SYS] = {
458
+
.base = IQS7222_SYS_SETUP,
459
+
.num_row = 1,
460
+
.num_col = 11,
461
+
},
462
+
},
463
+
},
464
+
};
465
+
466
+
struct iqs7222_prop_desc {
467
+
const char *name;
468
+
enum iqs7222_reg_grp_id reg_grp;
469
+
enum iqs7222_reg_key_id reg_key;
470
+
int reg_offset;
471
+
int reg_shift;
472
+
int reg_width;
473
+
int val_pitch;
474
+
int val_min;
475
+
int val_max;
476
+
bool invert;
477
+
const char *label;
478
+
};
479
+
480
+
static const struct iqs7222_prop_desc iqs7222_props[] = {
481
+
{
482
+
.name = "azoteq,conv-period",
483
+
.reg_grp = IQS7222_REG_GRP_CYCLE,
484
+
.reg_offset = 0,
485
+
.reg_shift = 8,
486
+
.reg_width = 8,
487
+
.label = "conversion period",
488
+
},
489
+
{
490
+
.name = "azoteq,conv-frac",
491
+
.reg_grp = IQS7222_REG_GRP_CYCLE,
492
+
.reg_offset = 0,
493
+
.reg_shift = 0,
494
+
.reg_width = 8,
495
+
.label = "conversion frequency fractional divider",
496
+
},
497
+
{
498
+
.name = "azoteq,rx-float-inactive",
499
+
.reg_grp = IQS7222_REG_GRP_CYCLE,
500
+
.reg_offset = 1,
501
+
.reg_shift = 6,
502
+
.reg_width = 1,
503
+
.invert = true,
504
+
},
505
+
{
506
+
.name = "azoteq,dead-time-enable",
507
+
.reg_grp = IQS7222_REG_GRP_CYCLE,
508
+
.reg_offset = 1,
509
+
.reg_shift = 5,
510
+
.reg_width = 1,
511
+
},
512
+
{
513
+
.name = "azoteq,tx-freq-fosc",
514
+
.reg_grp = IQS7222_REG_GRP_CYCLE,
515
+
.reg_offset = 1,
516
+
.reg_shift = 4,
517
+
.reg_width = 1,
518
+
},
519
+
{
520
+
.name = "azoteq,vbias-enable",
521
+
.reg_grp = IQS7222_REG_GRP_CYCLE,
522
+
.reg_offset = 1,
523
+
.reg_shift = 3,
524
+
.reg_width = 1,
525
+
},
526
+
{
527
+
.name = "azoteq,sense-mode",
528
+
.reg_grp = IQS7222_REG_GRP_CYCLE,
529
+
.reg_offset = 1,
530
+
.reg_shift = 0,
531
+
.reg_width = 3,
532
+
.val_max = 3,
533
+
.label = "sensing mode",
534
+
},
535
+
{
536
+
.name = "azoteq,iref-enable",
537
+
.reg_grp = IQS7222_REG_GRP_CYCLE,
538
+
.reg_offset = 2,
539
+
.reg_shift = 10,
540
+
.reg_width = 1,
541
+
},
542
+
{
543
+
.name = "azoteq,iref-level",
544
+
.reg_grp = IQS7222_REG_GRP_CYCLE,
545
+
.reg_offset = 2,
546
+
.reg_shift = 4,
547
+
.reg_width = 4,
548
+
.label = "current reference level",
549
+
},
550
+
{
551
+
.name = "azoteq,iref-trim",
552
+
.reg_grp = IQS7222_REG_GRP_CYCLE,
553
+
.reg_offset = 2,
554
+
.reg_shift = 0,
555
+
.reg_width = 4,
556
+
.label = "current reference trim",
557
+
},
558
+
{
559
+
.name = "azoteq,rf-filt-enable",
560
+
.reg_grp = IQS7222_REG_GRP_GLBL,
561
+
.reg_offset = 0,
562
+
.reg_shift = 15,
563
+
.reg_width = 1,
564
+
},
565
+
{
566
+
.name = "azoteq,max-counts",
567
+
.reg_grp = IQS7222_REG_GRP_GLBL,
568
+
.reg_offset = 0,
569
+
.reg_shift = 13,
570
+
.reg_width = 2,
571
+
.label = "maximum counts",
572
+
},
573
+
{
574
+
.name = "azoteq,auto-mode",
575
+
.reg_grp = IQS7222_REG_GRP_GLBL,
576
+
.reg_offset = 0,
577
+
.reg_shift = 2,
578
+
.reg_width = 2,
579
+
.label = "number of conversions",
580
+
},
581
+
{
582
+
.name = "azoteq,ati-frac-div-fine",
583
+
.reg_grp = IQS7222_REG_GRP_GLBL,
584
+
.reg_offset = 1,
585
+
.reg_shift = 9,
586
+
.reg_width = 5,
587
+
.label = "ATI fine fractional divider",
588
+
},
589
+
{
590
+
.name = "azoteq,ati-frac-div-coarse",
591
+
.reg_grp = IQS7222_REG_GRP_GLBL,
592
+
.reg_offset = 1,
593
+
.reg_shift = 0,
594
+
.reg_width = 5,
595
+
.label = "ATI coarse fractional divider",
596
+
},
597
+
{
598
+
.name = "azoteq,ati-comp-select",
599
+
.reg_grp = IQS7222_REG_GRP_GLBL,
600
+
.reg_offset = 2,
601
+
.reg_shift = 0,
602
+
.reg_width = 10,
603
+
.label = "ATI compensation selection",
604
+
},
605
+
{
606
+
.name = "azoteq,ati-band",
607
+
.reg_grp = IQS7222_REG_GRP_CHAN,
608
+
.reg_offset = 0,
609
+
.reg_shift = 12,
610
+
.reg_width = 2,
611
+
.label = "ATI band",
612
+
},
613
+
{
614
+
.name = "azoteq,global-halt",
615
+
.reg_grp = IQS7222_REG_GRP_CHAN,
616
+
.reg_offset = 0,
617
+
.reg_shift = 11,
618
+
.reg_width = 1,
619
+
},
620
+
{
621
+
.name = "azoteq,invert-enable",
622
+
.reg_grp = IQS7222_REG_GRP_CHAN,
623
+
.reg_offset = 0,
624
+
.reg_shift = 10,
625
+
.reg_width = 1,
626
+
},
627
+
{
628
+
.name = "azoteq,dual-direction",
629
+
.reg_grp = IQS7222_REG_GRP_CHAN,
630
+
.reg_offset = 0,
631
+
.reg_shift = 9,
632
+
.reg_width = 1,
633
+
},
634
+
{
635
+
.name = "azoteq,samp-cap-double",
636
+
.reg_grp = IQS7222_REG_GRP_CHAN,
637
+
.reg_offset = 0,
638
+
.reg_shift = 3,
639
+
.reg_width = 1,
640
+
},
641
+
{
642
+
.name = "azoteq,vref-half",
643
+
.reg_grp = IQS7222_REG_GRP_CHAN,
644
+
.reg_offset = 0,
645
+
.reg_shift = 2,
646
+
.reg_width = 1,
647
+
},
648
+
{
649
+
.name = "azoteq,proj-bias",
650
+
.reg_grp = IQS7222_REG_GRP_CHAN,
651
+
.reg_offset = 0,
652
+
.reg_shift = 0,
653
+
.reg_width = 2,
654
+
.label = "projected bias current",
655
+
},
656
+
{
657
+
.name = "azoteq,ati-target",
658
+
.reg_grp = IQS7222_REG_GRP_CHAN,
659
+
.reg_offset = 1,
660
+
.reg_shift = 8,
661
+
.reg_width = 8,
662
+
.val_pitch = 8,
663
+
.label = "ATI target",
664
+
},
665
+
{
666
+
.name = "azoteq,ati-base",
667
+
.reg_grp = IQS7222_REG_GRP_CHAN,
668
+
.reg_offset = 1,
669
+
.reg_shift = 3,
670
+
.reg_width = 5,
671
+
.val_pitch = 16,
672
+
.label = "ATI base",
673
+
},
674
+
{
675
+
.name = "azoteq,ati-mode",
676
+
.reg_grp = IQS7222_REG_GRP_CHAN,
677
+
.reg_offset = 1,
678
+
.reg_shift = 0,
679
+
.reg_width = 3,
680
+
.val_max = 5,
681
+
.label = "ATI mode",
682
+
},
683
+
{
684
+
.name = "azoteq,ati-frac-div-fine",
685
+
.reg_grp = IQS7222_REG_GRP_CHAN,
686
+
.reg_offset = 2,
687
+
.reg_shift = 9,
688
+
.reg_width = 5,
689
+
.label = "ATI fine fractional divider",
690
+
},
691
+
{
692
+
.name = "azoteq,ati-frac-mult-coarse",
693
+
.reg_grp = IQS7222_REG_GRP_CHAN,
694
+
.reg_offset = 2,
695
+
.reg_shift = 5,
696
+
.reg_width = 4,
697
+
.label = "ATI coarse fractional multiplier",
698
+
},
699
+
{
700
+
.name = "azoteq,ati-frac-div-coarse",
701
+
.reg_grp = IQS7222_REG_GRP_CHAN,
702
+
.reg_offset = 2,
703
+
.reg_shift = 0,
704
+
.reg_width = 5,
705
+
.label = "ATI coarse fractional divider",
706
+
},
707
+
{
708
+
.name = "azoteq,ati-comp-div",
709
+
.reg_grp = IQS7222_REG_GRP_CHAN,
710
+
.reg_offset = 3,
711
+
.reg_shift = 11,
712
+
.reg_width = 5,
713
+
.label = "ATI compensation divider",
714
+
},
715
+
{
716
+
.name = "azoteq,ati-comp-select",
717
+
.reg_grp = IQS7222_REG_GRP_CHAN,
718
+
.reg_offset = 3,
719
+
.reg_shift = 0,
720
+
.reg_width = 10,
721
+
.label = "ATI compensation selection",
722
+
},
723
+
{
724
+
.name = "azoteq,debounce-exit",
725
+
.reg_grp = IQS7222_REG_GRP_BTN,
726
+
.reg_key = IQS7222_REG_KEY_DEBOUNCE,
727
+
.reg_offset = 0,
728
+
.reg_shift = 12,
729
+
.reg_width = 4,
730
+
.label = "debounce exit factor",
731
+
},
732
+
{
733
+
.name = "azoteq,debounce-enter",
734
+
.reg_grp = IQS7222_REG_GRP_BTN,
735
+
.reg_key = IQS7222_REG_KEY_DEBOUNCE,
736
+
.reg_offset = 0,
737
+
.reg_shift = 8,
738
+
.reg_width = 4,
739
+
.label = "debounce entrance factor",
740
+
},
741
+
{
742
+
.name = "azoteq,thresh",
743
+
.reg_grp = IQS7222_REG_GRP_BTN,
744
+
.reg_key = IQS7222_REG_KEY_PROX,
745
+
.reg_offset = 0,
746
+
.reg_shift = 0,
747
+
.reg_width = 8,
748
+
.val_max = 127,
749
+
.label = "threshold",
750
+
},
751
+
{
752
+
.name = "azoteq,thresh",
753
+
.reg_grp = IQS7222_REG_GRP_BTN,
754
+
.reg_key = IQS7222_REG_KEY_TOUCH,
755
+
.reg_offset = 1,
756
+
.reg_shift = 0,
757
+
.reg_width = 8,
758
+
.label = "threshold",
759
+
},
760
+
{
761
+
.name = "azoteq,hyst",
762
+
.reg_grp = IQS7222_REG_GRP_BTN,
763
+
.reg_key = IQS7222_REG_KEY_TOUCH,
764
+
.reg_offset = 1,
765
+
.reg_shift = 8,
766
+
.reg_width = 8,
767
+
.label = "hysteresis",
768
+
},
769
+
{
770
+
.name = "azoteq,lta-beta-lp",
771
+
.reg_grp = IQS7222_REG_GRP_FILT,
772
+
.reg_offset = 0,
773
+
.reg_shift = 12,
774
+
.reg_width = 4,
775
+
.label = "low-power mode long-term average beta",
776
+
},
777
+
{
778
+
.name = "azoteq,lta-beta-np",
779
+
.reg_grp = IQS7222_REG_GRP_FILT,
780
+
.reg_offset = 0,
781
+
.reg_shift = 8,
782
+
.reg_width = 4,
783
+
.label = "normal-power mode long-term average beta",
784
+
},
785
+
{
786
+
.name = "azoteq,counts-beta-lp",
787
+
.reg_grp = IQS7222_REG_GRP_FILT,
788
+
.reg_offset = 0,
789
+
.reg_shift = 4,
790
+
.reg_width = 4,
791
+
.label = "low-power mode counts beta",
792
+
},
793
+
{
794
+
.name = "azoteq,counts-beta-np",
795
+
.reg_grp = IQS7222_REG_GRP_FILT,
796
+
.reg_offset = 0,
797
+
.reg_shift = 0,
798
+
.reg_width = 4,
799
+
.label = "normal-power mode counts beta",
800
+
},
801
+
{
802
+
.name = "azoteq,lta-fast-beta-lp",
803
+
.reg_grp = IQS7222_REG_GRP_FILT,
804
+
.reg_offset = 1,
805
+
.reg_shift = 4,
806
+
.reg_width = 4,
807
+
.label = "low-power mode long-term average fast beta",
808
+
},
809
+
{
810
+
.name = "azoteq,lta-fast-beta-np",
811
+
.reg_grp = IQS7222_REG_GRP_FILT,
812
+
.reg_offset = 1,
813
+
.reg_shift = 0,
814
+
.reg_width = 4,
815
+
.label = "normal-power mode long-term average fast beta",
816
+
},
817
+
{
818
+
.name = "azoteq,lower-cal",
819
+
.reg_grp = IQS7222_REG_GRP_SLDR,
820
+
.reg_offset = 0,
821
+
.reg_shift = 8,
822
+
.reg_width = 8,
823
+
.label = "lower calibration",
824
+
},
825
+
{
826
+
.name = "azoteq,static-beta",
827
+
.reg_grp = IQS7222_REG_GRP_SLDR,
828
+
.reg_key = IQS7222_REG_KEY_NO_WHEEL,
829
+
.reg_offset = 0,
830
+
.reg_shift = 6,
831
+
.reg_width = 1,
832
+
},
833
+
{
834
+
.name = "azoteq,bottom-beta",
835
+
.reg_grp = IQS7222_REG_GRP_SLDR,
836
+
.reg_key = IQS7222_REG_KEY_NO_WHEEL,
837
+
.reg_offset = 0,
838
+
.reg_shift = 3,
839
+
.reg_width = 3,
840
+
.label = "bottom beta",
841
+
},
842
+
{
843
+
.name = "azoteq,static-beta",
844
+
.reg_grp = IQS7222_REG_GRP_SLDR,
845
+
.reg_key = IQS7222_REG_KEY_WHEEL,
846
+
.reg_offset = 0,
847
+
.reg_shift = 7,
848
+
.reg_width = 1,
849
+
},
850
+
{
851
+
.name = "azoteq,bottom-beta",
852
+
.reg_grp = IQS7222_REG_GRP_SLDR,
853
+
.reg_key = IQS7222_REG_KEY_WHEEL,
854
+
.reg_offset = 0,
855
+
.reg_shift = 4,
856
+
.reg_width = 3,
857
+
.label = "bottom beta",
858
+
},
859
+
{
860
+
.name = "azoteq,bottom-speed",
861
+
.reg_grp = IQS7222_REG_GRP_SLDR,
862
+
.reg_offset = 1,
863
+
.reg_shift = 8,
864
+
.reg_width = 8,
865
+
.label = "bottom speed",
866
+
},
867
+
{
868
+
.name = "azoteq,upper-cal",
869
+
.reg_grp = IQS7222_REG_GRP_SLDR,
870
+
.reg_offset = 1,
871
+
.reg_shift = 0,
872
+
.reg_width = 8,
873
+
.label = "upper calibration",
874
+
},
875
+
{
876
+
.name = "azoteq,gesture-max-ms",
877
+
.reg_grp = IQS7222_REG_GRP_SLDR,
878
+
.reg_key = IQS7222_REG_KEY_TAP,
879
+
.reg_offset = 9,
880
+
.reg_shift = 8,
881
+
.reg_width = 8,
882
+
.val_pitch = 4,
883
+
.label = "maximum gesture time",
884
+
},
885
+
{
886
+
.name = "azoteq,gesture-min-ms",
887
+
.reg_grp = IQS7222_REG_GRP_SLDR,
888
+
.reg_key = IQS7222_REG_KEY_TAP,
889
+
.reg_offset = 9,
890
+
.reg_shift = 3,
891
+
.reg_width = 5,
892
+
.val_pitch = 4,
893
+
.label = "minimum gesture time",
894
+
},
895
+
{
896
+
.name = "azoteq,gesture-dist",
897
+
.reg_grp = IQS7222_REG_GRP_SLDR,
898
+
.reg_key = IQS7222_REG_KEY_AXIAL,
899
+
.reg_offset = 10,
900
+
.reg_shift = 8,
901
+
.reg_width = 8,
902
+
.val_pitch = 16,
903
+
.label = "gesture distance",
904
+
},
905
+
{
906
+
.name = "azoteq,gesture-max-ms",
907
+
.reg_grp = IQS7222_REG_GRP_SLDR,
908
+
.reg_key = IQS7222_REG_KEY_AXIAL,
909
+
.reg_offset = 10,
910
+
.reg_shift = 0,
911
+
.reg_width = 8,
912
+
.val_pitch = 4,
913
+
.label = "maximum gesture time",
914
+
},
915
+
{
916
+
.name = "drive-open-drain",
917
+
.reg_grp = IQS7222_REG_GRP_GPIO,
918
+
.reg_offset = 0,
919
+
.reg_shift = 1,
920
+
.reg_width = 1,
921
+
},
922
+
{
923
+
.name = "azoteq,timeout-ati-ms",
924
+
.reg_grp = IQS7222_REG_GRP_SYS,
925
+
.reg_offset = 1,
926
+
.reg_shift = 0,
927
+
.reg_width = 16,
928
+
.val_pitch = 500,
929
+
.label = "ATI error timeout",
930
+
},
931
+
{
932
+
.name = "azoteq,rate-ati-ms",
933
+
.reg_grp = IQS7222_REG_GRP_SYS,
934
+
.reg_offset = 2,
935
+
.reg_shift = 0,
936
+
.reg_width = 16,
937
+
.label = "ATI report rate",
938
+
},
939
+
{
940
+
.name = "azoteq,timeout-np-ms",
941
+
.reg_grp = IQS7222_REG_GRP_SYS,
942
+
.reg_offset = 3,
943
+
.reg_shift = 0,
944
+
.reg_width = 16,
945
+
.label = "normal-power mode timeout",
946
+
},
947
+
{
948
+
.name = "azoteq,rate-np-ms",
949
+
.reg_grp = IQS7222_REG_GRP_SYS,
950
+
.reg_offset = 4,
951
+
.reg_shift = 0,
952
+
.reg_width = 16,
953
+
.val_max = 3000,
954
+
.label = "normal-power mode report rate",
955
+
},
956
+
{
957
+
.name = "azoteq,timeout-lp-ms",
958
+
.reg_grp = IQS7222_REG_GRP_SYS,
959
+
.reg_offset = 5,
960
+
.reg_shift = 0,
961
+
.reg_width = 16,
962
+
.label = "low-power mode timeout",
963
+
},
964
+
{
965
+
.name = "azoteq,rate-lp-ms",
966
+
.reg_grp = IQS7222_REG_GRP_SYS,
967
+
.reg_offset = 6,
968
+
.reg_shift = 0,
969
+
.reg_width = 16,
970
+
.val_max = 3000,
971
+
.label = "low-power mode report rate",
972
+
},
973
+
{
974
+
.name = "azoteq,timeout-ulp-ms",
975
+
.reg_grp = IQS7222_REG_GRP_SYS,
976
+
.reg_offset = 7,
977
+
.reg_shift = 0,
978
+
.reg_width = 16,
979
+
.label = "ultra-low-power mode timeout",
980
+
},
981
+
{
982
+
.name = "azoteq,rate-ulp-ms",
983
+
.reg_grp = IQS7222_REG_GRP_SYS,
984
+
.reg_offset = 8,
985
+
.reg_shift = 0,
986
+
.reg_width = 16,
987
+
.val_max = 3000,
988
+
.label = "ultra-low-power mode report rate",
989
+
},
990
+
};
991
+
992
+
struct iqs7222_private {
993
+
const struct iqs7222_dev_desc *dev_desc;
994
+
struct gpio_desc *reset_gpio;
995
+
struct gpio_desc *irq_gpio;
996
+
struct i2c_client *client;
997
+
struct input_dev *keypad;
998
+
unsigned int kp_type[IQS7222_MAX_CHAN][ARRAY_SIZE(iqs7222_kp_events)];
999
+
unsigned int kp_code[IQS7222_MAX_CHAN][ARRAY_SIZE(iqs7222_kp_events)];
1000
+
unsigned int sl_code[IQS7222_MAX_SLDR][ARRAY_SIZE(iqs7222_sl_events)];
1001
+
unsigned int sl_axis[IQS7222_MAX_SLDR];
1002
+
u16 cycle_setup[IQS7222_MAX_CHAN / 2][IQS7222_MAX_COLS_CYCLE];
1003
+
u16 glbl_setup[IQS7222_MAX_COLS_GLBL];
1004
+
u16 btn_setup[IQS7222_MAX_CHAN][IQS7222_MAX_COLS_BTN];
1005
+
u16 chan_setup[IQS7222_MAX_CHAN][IQS7222_MAX_COLS_CHAN];
1006
+
u16 filt_setup[IQS7222_MAX_COLS_FILT];
1007
+
u16 sldr_setup[IQS7222_MAX_SLDR][IQS7222_MAX_COLS_SLDR];
1008
+
u16 gpio_setup[ARRAY_SIZE(iqs7222_gpio_links)][IQS7222_MAX_COLS_GPIO];
1009
+
u16 sys_setup[IQS7222_MAX_COLS_SYS];
1010
+
};
1011
+
1012
+
static u16 *iqs7222_setup(struct iqs7222_private *iqs7222,
1013
+
enum iqs7222_reg_grp_id reg_grp, int row)
1014
+
{
1015
+
switch (reg_grp) {
1016
+
case IQS7222_REG_GRP_CYCLE:
1017
+
return iqs7222->cycle_setup[row];
1018
+
1019
+
case IQS7222_REG_GRP_GLBL:
1020
+
return iqs7222->glbl_setup;
1021
+
1022
+
case IQS7222_REG_GRP_BTN:
1023
+
return iqs7222->btn_setup[row];
1024
+
1025
+
case IQS7222_REG_GRP_CHAN:
1026
+
return iqs7222->chan_setup[row];
1027
+
1028
+
case IQS7222_REG_GRP_FILT:
1029
+
return iqs7222->filt_setup;
1030
+
1031
+
case IQS7222_REG_GRP_SLDR:
1032
+
return iqs7222->sldr_setup[row];
1033
+
1034
+
case IQS7222_REG_GRP_GPIO:
1035
+
return iqs7222->gpio_setup[row];
1036
+
1037
+
case IQS7222_REG_GRP_SYS:
1038
+
return iqs7222->sys_setup;
1039
+
1040
+
default:
1041
+
return NULL;
1042
+
}
1043
+
}
1044
+
1045
+
static int iqs7222_irq_poll(struct iqs7222_private *iqs7222, u16 timeout_ms)
1046
+
{
1047
+
ktime_t irq_timeout = ktime_add_ms(ktime_get(), timeout_ms);
1048
+
int ret;
1049
+
1050
+
do {
1051
+
usleep_range(1000, 1100);
1052
+
1053
+
ret = gpiod_get_value_cansleep(iqs7222->irq_gpio);
1054
+
if (ret < 0)
1055
+
return ret;
1056
+
else if (ret > 0)
1057
+
return 0;
1058
+
} while (ktime_compare(ktime_get(), irq_timeout) < 0);
1059
+
1060
+
return -EBUSY;
1061
+
}
1062
+
1063
+
static int iqs7222_hard_reset(struct iqs7222_private *iqs7222)
1064
+
{
1065
+
struct i2c_client *client = iqs7222->client;
1066
+
int error;
1067
+
1068
+
if (!iqs7222->reset_gpio)
1069
+
return 0;
1070
+
1071
+
gpiod_set_value_cansleep(iqs7222->reset_gpio, 1);
1072
+
usleep_range(1000, 1100);
1073
+
1074
+
gpiod_set_value_cansleep(iqs7222->reset_gpio, 0);
1075
+
1076
+
error = iqs7222_irq_poll(iqs7222, IQS7222_RESET_TIMEOUT_MS);
1077
+
if (error)
1078
+
dev_err(&client->dev, "Failed to reset device: %d\n", error);
1079
+
1080
+
return error;
1081
+
}
1082
+
1083
+
static int iqs7222_force_comms(struct iqs7222_private *iqs7222)
1084
+
{
1085
+
u8 msg_buf[] = { 0xFF, 0x00, };
1086
+
int ret;
1087
+
1088
+
/*
1089
+
* The device cannot communicate until it asserts its interrupt (RDY)
1090
+
* pin. Attempts to do so while RDY is deasserted return an ACK; how-
1091
+
* ever all write data is ignored, and all read data returns 0xEE.
1092
+
*
1093
+
* Unsolicited communication must be preceded by a special force com-
1094
+
* munication command, after which the device eventually asserts its
1095
+
* RDY pin and agrees to communicate.
1096
+
*
1097
+
* Regardless of whether communication is forced or the result of an
1098
+
* interrupt, the device automatically deasserts its RDY pin once it
1099
+
* detects an I2C stop condition, or a timeout expires.
1100
+
*/
1101
+
ret = gpiod_get_value_cansleep(iqs7222->irq_gpio);
1102
+
if (ret < 0)
1103
+
return ret;
1104
+
else if (ret > 0)
1105
+
return 0;
1106
+
1107
+
ret = i2c_master_send(iqs7222->client, msg_buf, sizeof(msg_buf));
1108
+
if (ret < (int)sizeof(msg_buf)) {
1109
+
if (ret >= 0)
1110
+
ret = -EIO;
1111
+
1112
+
/*
1113
+
* The datasheet states that the host must wait to retry any
1114
+
* failed attempt to communicate over I2C.
1115
+
*/
1116
+
msleep(IQS7222_COMMS_RETRY_MS);
1117
+
return ret;
1118
+
}
1119
+
1120
+
return iqs7222_irq_poll(iqs7222, IQS7222_COMMS_TIMEOUT_MS);
1121
+
}
1122
+
1123
+
static int iqs7222_read_burst(struct iqs7222_private *iqs7222,
1124
+
u16 reg, void *val, u16 num_val)
1125
+
{
1126
+
u8 reg_buf[sizeof(__be16)];
1127
+
int ret, i;
1128
+
struct i2c_client *client = iqs7222->client;
1129
+
struct i2c_msg msg[] = {
1130
+
{
1131
+
.addr = client->addr,
1132
+
.flags = 0,
1133
+
.len = reg > U8_MAX ? sizeof(reg) : sizeof(u8),
1134
+
.buf = reg_buf,
1135
+
},
1136
+
{
1137
+
.addr = client->addr,
1138
+
.flags = I2C_M_RD,
1139
+
.len = num_val * sizeof(__le16),
1140
+
.buf = (u8 *)val,
1141
+
},
1142
+
};
1143
+
1144
+
if (reg > U8_MAX)
1145
+
put_unaligned_be16(reg, reg_buf);
1146
+
else
1147
+
*reg_buf = (u8)reg;
1148
+
1149
+
/*
1150
+
* The following loop protects against an edge case in which the RDY
1151
+
* pin is automatically deasserted just as the read is initiated. In
1152
+
* that case, the read must be retried using forced communication.
1153
+
*/
1154
+
for (i = 0; i < IQS7222_NUM_RETRIES; i++) {
1155
+
ret = iqs7222_force_comms(iqs7222);
1156
+
if (ret < 0)
1157
+
continue;
1158
+
1159
+
ret = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
1160
+
if (ret < (int)ARRAY_SIZE(msg)) {
1161
+
if (ret >= 0)
1162
+
ret = -EIO;
1163
+
1164
+
msleep(IQS7222_COMMS_RETRY_MS);
1165
+
continue;
1166
+
}
1167
+
1168
+
if (get_unaligned_le16(msg[1].buf) == IQS7222_COMMS_ERROR) {
1169
+
ret = -ENODATA;
1170
+
continue;
1171
+
}
1172
+
1173
+
ret = 0;
1174
+
break;
1175
+
}
1176
+
1177
+
/*
1178
+
* The following delay ensures the device has deasserted the RDY pin
1179
+
* following the I2C stop condition.
1180
+
*/
1181
+
usleep_range(50, 100);
1182
+
1183
+
if (ret < 0)
1184
+
dev_err(&client->dev,
1185
+
"Failed to read from address 0x%04X: %d\n", reg, ret);
1186
+
1187
+
return ret;
1188
+
}
1189
+
1190
+
static int iqs7222_read_word(struct iqs7222_private *iqs7222, u16 reg, u16 *val)
1191
+
{
1192
+
__le16 val_buf;
1193
+
int error;
1194
+
1195
+
error = iqs7222_read_burst(iqs7222, reg, &val_buf, 1);
1196
+
if (error)
1197
+
return error;
1198
+
1199
+
*val = le16_to_cpu(val_buf);
1200
+
1201
+
return 0;
1202
+
}
1203
+
1204
+
static int iqs7222_write_burst(struct iqs7222_private *iqs7222,
1205
+
u16 reg, const void *val, u16 num_val)
1206
+
{
1207
+
int reg_len = reg > U8_MAX ? sizeof(reg) : sizeof(u8);
1208
+
int val_len = num_val * sizeof(__le16);
1209
+
int msg_len = reg_len + val_len;
1210
+
int ret, i;
1211
+
struct i2c_client *client = iqs7222->client;
1212
+
u8 *msg_buf;
1213
+
1214
+
msg_buf = kzalloc(msg_len, GFP_KERNEL);
1215
+
if (!msg_buf)
1216
+
return -ENOMEM;
1217
+
1218
+
if (reg > U8_MAX)
1219
+
put_unaligned_be16(reg, msg_buf);
1220
+
else
1221
+
*msg_buf = (u8)reg;
1222
+
1223
+
memcpy(msg_buf + reg_len, val, val_len);
1224
+
1225
+
/*
1226
+
* The following loop protects against an edge case in which the RDY
1227
+
* pin is automatically asserted just before the force communication
1228
+
* command is sent.
1229
+
*
1230
+
* In that case, the subsequent I2C stop condition tricks the device
1231
+
* into preemptively deasserting the RDY pin and the command must be
1232
+
* sent again.
1233
+
*/
1234
+
for (i = 0; i < IQS7222_NUM_RETRIES; i++) {
1235
+
ret = iqs7222_force_comms(iqs7222);
1236
+
if (ret < 0)
1237
+
continue;
1238
+
1239
+
ret = i2c_master_send(client, msg_buf, msg_len);
1240
+
if (ret < msg_len) {
1241
+
if (ret >= 0)
1242
+
ret = -EIO;
1243
+
1244
+
msleep(IQS7222_COMMS_RETRY_MS);
1245
+
continue;
1246
+
}
1247
+
1248
+
ret = 0;
1249
+
break;
1250
+
}
1251
+
1252
+
kfree(msg_buf);
1253
+
1254
+
usleep_range(50, 100);
1255
+
1256
+
if (ret < 0)
1257
+
dev_err(&client->dev,
1258
+
"Failed to write to address 0x%04X: %d\n", reg, ret);
1259
+
1260
+
return ret;
1261
+
}
1262
+
1263
+
static int iqs7222_write_word(struct iqs7222_private *iqs7222, u16 reg, u16 val)
1264
+
{
1265
+
__le16 val_buf = cpu_to_le16(val);
1266
+
1267
+
return iqs7222_write_burst(iqs7222, reg, &val_buf, 1);
1268
+
}
1269
+
1270
+
static int iqs7222_ati_trigger(struct iqs7222_private *iqs7222)
1271
+
{
1272
+
struct i2c_client *client = iqs7222->client;
1273
+
ktime_t ati_timeout;
1274
+
u16 sys_status = 0;
1275
+
u16 sys_setup = iqs7222->sys_setup[0] & ~IQS7222_SYS_SETUP_ACK_RESET;
1276
+
int error, i;
1277
+
1278
+
for (i = 0; i < IQS7222_NUM_RETRIES; i++) {
1279
+
/*
1280
+
* Trigger ATI from streaming and normal-power modes so that
1281
+
* the RDY pin continues to be asserted during ATI.
1282
+
*/
1283
+
error = iqs7222_write_word(iqs7222, IQS7222_SYS_SETUP,
1284
+
sys_setup |
1285
+
IQS7222_SYS_SETUP_REDO_ATI);
1286
+
if (error)
1287
+
return error;
1288
+
1289
+
ati_timeout = ktime_add_ms(ktime_get(), IQS7222_ATI_TIMEOUT_MS);
1290
+
1291
+
do {
1292
+
error = iqs7222_irq_poll(iqs7222,
1293
+
IQS7222_COMMS_TIMEOUT_MS);
1294
+
if (error)
1295
+
continue;
1296
+
1297
+
error = iqs7222_read_word(iqs7222, IQS7222_SYS_STATUS,
1298
+
&sys_status);
1299
+
if (error)
1300
+
return error;
1301
+
1302
+
if (sys_status & IQS7222_SYS_STATUS_ATI_ACTIVE)
1303
+
continue;
1304
+
1305
+
if (sys_status & IQS7222_SYS_STATUS_ATI_ERROR)
1306
+
break;
1307
+
1308
+
/*
1309
+
* Use stream-in-touch mode if either slider reports
1310
+
* absolute position.
1311
+
*/
1312
+
sys_setup |= test_bit(EV_ABS, iqs7222->keypad->evbit)
1313
+
? IQS7222_SYS_SETUP_INTF_MODE_TOUCH
1314
+
: IQS7222_SYS_SETUP_INTF_MODE_EVENT;
1315
+
sys_setup |= IQS7222_SYS_SETUP_PWR_MODE_AUTO;
1316
+
1317
+
return iqs7222_write_word(iqs7222, IQS7222_SYS_SETUP,
1318
+
sys_setup);
1319
+
} while (ktime_compare(ktime_get(), ati_timeout) < 0);
1320
+
1321
+
dev_err(&client->dev,
1322
+
"ATI attempt %d of %d failed with status 0x%02X, %s\n",
1323
+
i + 1, IQS7222_NUM_RETRIES, (u8)sys_status,
1324
+
i < IQS7222_NUM_RETRIES ? "retrying..." : "stopping");
1325
+
}
1326
+
1327
+
return -ETIMEDOUT;
1328
+
}
1329
+
1330
+
static int iqs7222_dev_init(struct iqs7222_private *iqs7222, int dir)
1331
+
{
1332
+
const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
1333
+
int comms_offset = dev_desc->comms_offset;
1334
+
int error, i, j, k;
1335
+
1336
+
/*
1337
+
* Take advantage of the stop-bit disable function, if available, to
1338
+
* save the trouble of having to reopen a communication window after
1339
+
* each burst read or write.
1340
+
*/
1341
+
if (comms_offset) {
1342
+
u16 comms_setup;
1343
+
1344
+
error = iqs7222_read_word(iqs7222,
1345
+
IQS7222_SYS_SETUP + comms_offset,
1346
+
&comms_setup);
1347
+
if (error)
1348
+
return error;
1349
+
1350
+
error = iqs7222_write_word(iqs7222,
1351
+
IQS7222_SYS_SETUP + comms_offset,
1352
+
comms_setup | IQS7222_COMMS_HOLD);
1353
+
if (error)
1354
+
return error;
1355
+
}
1356
+
1357
+
for (i = 0; i < IQS7222_NUM_REG_GRPS; i++) {
1358
+
int num_row = dev_desc->reg_grps[i].num_row;
1359
+
int num_col = dev_desc->reg_grps[i].num_col;
1360
+
u16 reg = dev_desc->reg_grps[i].base;
1361
+
__le16 *val_buf;
1362
+
u16 *val;
1363
+
1364
+
if (!num_col)
1365
+
continue;
1366
+
1367
+
val = iqs7222_setup(iqs7222, i, 0);
1368
+
if (!val)
1369
+
continue;
1370
+
1371
+
val_buf = kcalloc(num_col, sizeof(__le16), GFP_KERNEL);
1372
+
if (!val_buf)
1373
+
return -ENOMEM;
1374
+
1375
+
for (j = 0; j < num_row; j++) {
1376
+
switch (dir) {
1377
+
case READ:
1378
+
error = iqs7222_read_burst(iqs7222, reg,
1379
+
val_buf, num_col);
1380
+
for (k = 0; k < num_col; k++)
1381
+
val[k] = le16_to_cpu(val_buf[k]);
1382
+
break;
1383
+
1384
+
case WRITE:
1385
+
for (k = 0; k < num_col; k++)
1386
+
val_buf[k] = cpu_to_le16(val[k]);
1387
+
error = iqs7222_write_burst(iqs7222, reg,
1388
+
val_buf, num_col);
1389
+
break;
1390
+
1391
+
default:
1392
+
error = -EINVAL;
1393
+
}
1394
+
1395
+
if (error)
1396
+
break;
1397
+
1398
+
reg += IQS7222_REG_OFFSET;
1399
+
val += iqs7222_max_cols[i];
1400
+
}
1401
+
1402
+
kfree(val_buf);
1403
+
1404
+
if (error)
1405
+
return error;
1406
+
}
1407
+
1408
+
if (comms_offset) {
1409
+
u16 comms_setup;
1410
+
1411
+
error = iqs7222_read_word(iqs7222,
1412
+
IQS7222_SYS_SETUP + comms_offset,
1413
+
&comms_setup);
1414
+
if (error)
1415
+
return error;
1416
+
1417
+
error = iqs7222_write_word(iqs7222,
1418
+
IQS7222_SYS_SETUP + comms_offset,
1419
+
comms_setup & ~IQS7222_COMMS_HOLD);
1420
+
if (error)
1421
+
return error;
1422
+
}
1423
+
1424
+
if (dir == READ)
1425
+
return 0;
1426
+
1427
+
return iqs7222_ati_trigger(iqs7222);
1428
+
}
1429
+
1430
+
static int iqs7222_dev_info(struct iqs7222_private *iqs7222)
1431
+
{
1432
+
struct i2c_client *client = iqs7222->client;
1433
+
bool prod_num_valid = false;
1434
+
__le16 dev_id[3];
1435
+
int error, i;
1436
+
1437
+
error = iqs7222_read_burst(iqs7222, IQS7222_PROD_NUM, dev_id,
1438
+
ARRAY_SIZE(dev_id));
1439
+
if (error)
1440
+
return error;
1441
+
1442
+
for (i = 0; i < ARRAY_SIZE(iqs7222_devs); i++) {
1443
+
if (le16_to_cpu(dev_id[0]) != iqs7222_devs[i].prod_num)
1444
+
continue;
1445
+
1446
+
prod_num_valid = true;
1447
+
1448
+
if (le16_to_cpu(dev_id[1]) < iqs7222_devs[i].fw_major)
1449
+
continue;
1450
+
1451
+
if (le16_to_cpu(dev_id[2]) < iqs7222_devs[i].fw_minor)
1452
+
continue;
1453
+
1454
+
iqs7222->dev_desc = &iqs7222_devs[i];
1455
+
return 0;
1456
+
}
1457
+
1458
+
if (prod_num_valid)
1459
+
dev_err(&client->dev, "Unsupported firmware revision: %u.%u\n",
1460
+
le16_to_cpu(dev_id[1]), le16_to_cpu(dev_id[2]));
1461
+
else
1462
+
dev_err(&client->dev, "Unrecognized product number: %u\n",
1463
+
le16_to_cpu(dev_id[0]));
1464
+
1465
+
return -EINVAL;
1466
+
}
1467
+
1468
+
static int iqs7222_gpio_select(struct iqs7222_private *iqs7222,
1469
+
struct fwnode_handle *child_node,
1470
+
int child_enable, u16 child_link)
1471
+
{
1472
+
const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
1473
+
struct i2c_client *client = iqs7222->client;
1474
+
int num_gpio = dev_desc->reg_grps[IQS7222_REG_GRP_GPIO].num_row;
1475
+
int error, count, i;
1476
+
unsigned int gpio_sel[ARRAY_SIZE(iqs7222_gpio_links)];
1477
+
1478
+
if (!num_gpio)
1479
+
return 0;
1480
+
1481
+
if (!fwnode_property_present(child_node, "azoteq,gpio-select"))
1482
+
return 0;
1483
+
1484
+
count = fwnode_property_count_u32(child_node, "azoteq,gpio-select");
1485
+
if (count > num_gpio) {
1486
+
dev_err(&client->dev, "Invalid number of %s GPIOs\n",
1487
+
fwnode_get_name(child_node));
1488
+
return -EINVAL;
1489
+
} else if (count < 0) {
1490
+
dev_err(&client->dev, "Failed to count %s GPIOs: %d\n",
1491
+
fwnode_get_name(child_node), count);
1492
+
return count;
1493
+
}
1494
+
1495
+
error = fwnode_property_read_u32_array(child_node,
1496
+
"azoteq,gpio-select",
1497
+
gpio_sel, count);
1498
+
if (error) {
1499
+
dev_err(&client->dev, "Failed to read %s GPIOs: %d\n",
1500
+
fwnode_get_name(child_node), error);
1501
+
return error;
1502
+
}
1503
+
1504
+
for (i = 0; i < count; i++) {
1505
+
u16 *gpio_setup;
1506
+
1507
+
if (gpio_sel[i] >= num_gpio) {
1508
+
dev_err(&client->dev, "Invalid %s GPIO: %u\n",
1509
+
fwnode_get_name(child_node), gpio_sel[i]);
1510
+
return -EINVAL;
1511
+
}
1512
+
1513
+
gpio_setup = iqs7222->gpio_setup[gpio_sel[i]];
1514
+
1515
+
if (gpio_setup[2] && child_link != gpio_setup[2]) {
1516
+
dev_err(&client->dev,
1517
+
"Conflicting GPIO %u event types\n",
1518
+
gpio_sel[i]);
1519
+
return -EINVAL;
1520
+
}
1521
+
1522
+
gpio_setup[0] |= IQS7222_GPIO_SETUP_0_GPIO_EN;
1523
+
gpio_setup[1] |= child_enable;
1524
+
gpio_setup[2] = child_link;
1525
+
}
1526
+
1527
+
return 0;
1528
+
}
1529
+
1530
+
static int iqs7222_parse_props(struct iqs7222_private *iqs7222,
1531
+
struct fwnode_handle **child_node,
1532
+
int child_index,
1533
+
enum iqs7222_reg_grp_id reg_grp,
1534
+
enum iqs7222_reg_key_id reg_key)
1535
+
{
1536
+
u16 *setup = iqs7222_setup(iqs7222, reg_grp, child_index);
1537
+
struct i2c_client *client = iqs7222->client;
1538
+
struct fwnode_handle *reg_grp_node;
1539
+
char reg_grp_name[16];
1540
+
int i;
1541
+
1542
+
switch (reg_grp) {
1543
+
case IQS7222_REG_GRP_CYCLE:
1544
+
case IQS7222_REG_GRP_CHAN:
1545
+
case IQS7222_REG_GRP_SLDR:
1546
+
case IQS7222_REG_GRP_GPIO:
1547
+
case IQS7222_REG_GRP_BTN:
1548
+
/*
1549
+
* These groups derive a child node and return it to the caller
1550
+
* for additional group-specific processing. In some cases, the
1551
+
* child node may have already been derived.
1552
+
*/
1553
+
reg_grp_node = *child_node;
1554
+
if (reg_grp_node)
1555
+
break;
1556
+
1557
+
snprintf(reg_grp_name, sizeof(reg_grp_name), "%s-%d",
1558
+
iqs7222_reg_grp_names[reg_grp], child_index);
1559
+
1560
+
reg_grp_node = device_get_named_child_node(&client->dev,
1561
+
reg_grp_name);
1562
+
if (!reg_grp_node)
1563
+
return 0;
1564
+
1565
+
*child_node = reg_grp_node;
1566
+
break;
1567
+
1568
+
case IQS7222_REG_GRP_GLBL:
1569
+
case IQS7222_REG_GRP_FILT:
1570
+
case IQS7222_REG_GRP_SYS:
1571
+
/*
1572
+
* These groups are not organized beneath a child node, nor are
1573
+
* they subject to any additional processing by the caller.
1574
+
*/
1575
+
reg_grp_node = dev_fwnode(&client->dev);
1576
+
break;
1577
+
1578
+
default:
1579
+
return -EINVAL;
1580
+
}
1581
+
1582
+
for (i = 0; i < ARRAY_SIZE(iqs7222_props); i++) {
1583
+
const char *name = iqs7222_props[i].name;
1584
+
int reg_offset = iqs7222_props[i].reg_offset;
1585
+
int reg_shift = iqs7222_props[i].reg_shift;
1586
+
int reg_width = iqs7222_props[i].reg_width;
1587
+
int val_pitch = iqs7222_props[i].val_pitch ? : 1;
1588
+
int val_min = iqs7222_props[i].val_min;
1589
+
int val_max = iqs7222_props[i].val_max;
1590
+
bool invert = iqs7222_props[i].invert;
1591
+
const char *label = iqs7222_props[i].label ? : name;
1592
+
unsigned int val;
1593
+
int error;
1594
+
1595
+
if (iqs7222_props[i].reg_grp != reg_grp ||
1596
+
iqs7222_props[i].reg_key != reg_key)
1597
+
continue;
1598
+
1599
+
/*
1600
+
* Boolean register fields are one bit wide; they are forcibly
1601
+
* reset to provide a means to undo changes by a bootloader if
1602
+
* necessary.
1603
+
*
1604
+
* Scalar fields, on the other hand, are left untouched unless
1605
+
* their corresponding properties are present.
1606
+
*/
1607
+
if (reg_width == 1) {
1608
+
if (invert)
1609
+
setup[reg_offset] |= BIT(reg_shift);
1610
+
else
1611
+
setup[reg_offset] &= ~BIT(reg_shift);
1612
+
}
1613
+
1614
+
if (!fwnode_property_present(reg_grp_node, name))
1615
+
continue;
1616
+
1617
+
if (reg_width == 1) {
1618
+
if (invert)
1619
+
setup[reg_offset] &= ~BIT(reg_shift);
1620
+
else
1621
+
setup[reg_offset] |= BIT(reg_shift);
1622
+
1623
+
continue;
1624
+
}
1625
+
1626
+
error = fwnode_property_read_u32(reg_grp_node, name, &val);
1627
+
if (error) {
1628
+
dev_err(&client->dev, "Failed to read %s %s: %d\n",
1629
+
fwnode_get_name(reg_grp_node), label, error);
1630
+
return error;
1631
+
}
1632
+
1633
+
if (!val_max)
1634
+
val_max = GENMASK(reg_width - 1, 0) * val_pitch;
1635
+
1636
+
if (val < val_min || val > val_max) {
1637
+
dev_err(&client->dev, "Invalid %s %s: %u\n",
1638
+
fwnode_get_name(reg_grp_node), label, val);
1639
+
return -EINVAL;
1640
+
}
1641
+
1642
+
setup[reg_offset] &= ~GENMASK(reg_shift + reg_width - 1,
1643
+
reg_shift);
1644
+
setup[reg_offset] |= (val / val_pitch << reg_shift);
1645
+
}
1646
+
1647
+
return 0;
1648
+
}
1649
+
1650
+
static int iqs7222_parse_cycle(struct iqs7222_private *iqs7222, int cycle_index)
1651
+
{
1652
+
u16 *cycle_setup = iqs7222->cycle_setup[cycle_index];
1653
+
struct i2c_client *client = iqs7222->client;
1654
+
struct fwnode_handle *cycle_node = NULL;
1655
+
unsigned int pins[9];
1656
+
int error, count, i;
1657
+
1658
+
/*
1659
+
* Each channel shares a cycle with one other channel; the mapping of
1660
+
* channels to cycles is fixed. Properties defined for a cycle impact
1661
+
* both channels tied to the cycle.
1662
+
*/
1663
+
error = iqs7222_parse_props(iqs7222, &cycle_node, cycle_index,
1664
+
IQS7222_REG_GRP_CYCLE,
1665
+
IQS7222_REG_KEY_NONE);
1666
+
if (error)
1667
+
return error;
1668
+
1669
+
if (!cycle_node)
1670
+
return 0;
1671
+
1672
+
/*
1673
+
* Unlike channels which are restricted to a select range of CRx pins
1674
+
* based on channel number, any cycle can claim any of the device's 9
1675
+
* CTx pins (CTx0-8).
1676
+
*/
1677
+
if (!fwnode_property_present(cycle_node, "azoteq,tx-enable"))
1678
+
return 0;
1679
+
1680
+
count = fwnode_property_count_u32(cycle_node, "azoteq,tx-enable");
1681
+
if (count < 0) {
1682
+
dev_err(&client->dev, "Failed to count %s CTx pins: %d\n",
1683
+
fwnode_get_name(cycle_node), count);
1684
+
return count;
1685
+
} else if (count > ARRAY_SIZE(pins)) {
1686
+
dev_err(&client->dev, "Invalid number of %s CTx pins\n",
1687
+
fwnode_get_name(cycle_node));
1688
+
return -EINVAL;
1689
+
}
1690
+
1691
+
error = fwnode_property_read_u32_array(cycle_node, "azoteq,tx-enable",
1692
+
pins, count);
1693
+
if (error) {
1694
+
dev_err(&client->dev, "Failed to read %s CTx pins: %d\n",
1695
+
fwnode_get_name(cycle_node), error);
1696
+
return error;
1697
+
}
1698
+
1699
+
cycle_setup[1] &= ~GENMASK(7 + ARRAY_SIZE(pins) - 1, 7);
1700
+
1701
+
for (i = 0; i < count; i++) {
1702
+
if (pins[i] > 8) {
1703
+
dev_err(&client->dev, "Invalid %s CTx pin: %u\n",
1704
+
fwnode_get_name(cycle_node), pins[i]);
1705
+
return -EINVAL;
1706
+
}
1707
+
1708
+
cycle_setup[1] |= BIT(pins[i] + 7);
1709
+
}
1710
+
1711
+
return 0;
1712
+
}
1713
+
1714
+
static int iqs7222_parse_chan(struct iqs7222_private *iqs7222, int chan_index)
1715
+
{
1716
+
const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
1717
+
struct i2c_client *client = iqs7222->client;
1718
+
struct fwnode_handle *chan_node = NULL;
1719
+
int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row;
1720
+
int ext_chan = rounddown(num_chan, 10);
1721
+
int error, i;
1722
+
u16 *chan_setup = iqs7222->chan_setup[chan_index];
1723
+
u16 *sys_setup = iqs7222->sys_setup;
1724
+
unsigned int val;
1725
+
1726
+
error = iqs7222_parse_props(iqs7222, &chan_node, chan_index,
1727
+
IQS7222_REG_GRP_CHAN,
1728
+
IQS7222_REG_KEY_NONE);
1729
+
if (error)
1730
+
return error;
1731
+
1732
+
if (!chan_node)
1733
+
return 0;
1734
+
1735
+
if (dev_desc->allow_offset) {
1736
+
sys_setup[dev_desc->allow_offset] |= BIT(chan_index);
1737
+
if (fwnode_property_present(chan_node, "azoteq,ulp-allow"))
1738
+
sys_setup[dev_desc->allow_offset] &= ~BIT(chan_index);
1739
+
}
1740
+
1741
+
chan_setup[0] |= IQS7222_CHAN_SETUP_0_CHAN_EN;
1742
+
1743
+
/*
1744
+
* The reference channel function allows for differential measurements
1745
+
* and is only available in the case of IQS7222A or IQS7222C.
1746
+
*/
1747
+
if (dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_col > 4 &&
1748
+
fwnode_property_present(chan_node, "azoteq,ref-select")) {
1749
+
u16 *ref_setup;
1750
+
1751
+
error = fwnode_property_read_u32(chan_node, "azoteq,ref-select",
1752
+
&val);
1753
+
if (error) {
1754
+
dev_err(&client->dev,
1755
+
"Failed to read %s reference channel: %d\n",
1756
+
fwnode_get_name(chan_node), error);
1757
+
return error;
1758
+
}
1759
+
1760
+
if (val >= ext_chan) {
1761
+
dev_err(&client->dev,
1762
+
"Invalid %s reference channel: %u\n",
1763
+
fwnode_get_name(chan_node), val);
1764
+
return -EINVAL;
1765
+
}
1766
+
1767
+
ref_setup = iqs7222->chan_setup[val];
1768
+
1769
+
/*
1770
+
* Configure the current channel as a follower of the selected
1771
+
* reference channel.
1772
+
*/
1773
+
chan_setup[0] |= IQS7222_CHAN_SETUP_0_REF_MODE_FOLLOW;
1774
+
chan_setup[4] = val * 42 + 1048;
1775
+
1776
+
if (!fwnode_property_read_u32(chan_node, "azoteq,ref-weight",
1777
+
&val)) {
1778
+
if (val > U16_MAX) {
1779
+
dev_err(&client->dev,
1780
+
"Invalid %s reference weight: %u\n",
1781
+
fwnode_get_name(chan_node), val);
1782
+
return -EINVAL;
1783
+
}
1784
+
1785
+
chan_setup[5] = val;
1786
+
}
1787
+
1788
+
/*
1789
+
* Configure the selected channel as a reference channel which
1790
+
* serves the current channel.
1791
+
*/
1792
+
ref_setup[0] |= IQS7222_CHAN_SETUP_0_REF_MODE_REF;
1793
+
ref_setup[5] |= BIT(chan_index);
1794
+
1795
+
ref_setup[4] = dev_desc->touch_link;
1796
+
if (fwnode_property_present(chan_node, "azoteq,use-prox"))
1797
+
ref_setup[4] -= 2;
1798
+
}
1799
+
1800
+
if (fwnode_property_present(chan_node, "azoteq,rx-enable")) {
1801
+
/*
1802
+
* Each channel can claim up to 4 CRx pins. The first half of
1803
+
* the channels can use CRx0-3, while the second half can use
1804
+
* CRx4-7.
1805
+
*/
1806
+
unsigned int pins[4];
1807
+
int count;
1808
+
1809
+
count = fwnode_property_count_u32(chan_node,
1810
+
"azoteq,rx-enable");
1811
+
if (count < 0) {
1812
+
dev_err(&client->dev,
1813
+
"Failed to count %s CRx pins: %d\n",
1814
+
fwnode_get_name(chan_node), count);
1815
+
return count;
1816
+
} else if (count > ARRAY_SIZE(pins)) {
1817
+
dev_err(&client->dev,
1818
+
"Invalid number of %s CRx pins\n",
1819
+
fwnode_get_name(chan_node));
1820
+
return -EINVAL;
1821
+
}
1822
+
1823
+
error = fwnode_property_read_u32_array(chan_node,
1824
+
"azoteq,rx-enable",
1825
+
pins, count);
1826
+
if (error) {
1827
+
dev_err(&client->dev,
1828
+
"Failed to read %s CRx pins: %d\n",
1829
+
fwnode_get_name(chan_node), error);
1830
+
return error;
1831
+
}
1832
+
1833
+
chan_setup[0] &= ~GENMASK(4 + ARRAY_SIZE(pins) - 1, 4);
1834
+
1835
+
for (i = 0; i < count; i++) {
1836
+
int min_crx = chan_index < ext_chan / 2 ? 0 : 4;
1837
+
1838
+
if (pins[i] < min_crx || pins[i] > min_crx + 3) {
1839
+
dev_err(&client->dev,
1840
+
"Invalid %s CRx pin: %u\n",
1841
+
fwnode_get_name(chan_node), pins[i]);
1842
+
return -EINVAL;
1843
+
}
1844
+
1845
+
chan_setup[0] |= BIT(pins[i] + 4 - min_crx);
1846
+
}
1847
+
}
1848
+
1849
+
for (i = 0; i < ARRAY_SIZE(iqs7222_kp_events); i++) {
1850
+
const char *event_name = iqs7222_kp_events[i].name;
1851
+
u16 event_enable = iqs7222_kp_events[i].enable;
1852
+
struct fwnode_handle *event_node;
1853
+
1854
+
event_node = fwnode_get_named_child_node(chan_node, event_name);
1855
+
if (!event_node)
1856
+
continue;
1857
+
1858
+
error = iqs7222_parse_props(iqs7222, &event_node, chan_index,
1859
+
IQS7222_REG_GRP_BTN,
1860
+
iqs7222_kp_events[i].reg_key);
1861
+
if (error)
1862
+
return error;
1863
+
1864
+
error = iqs7222_gpio_select(iqs7222, event_node,
1865
+
BIT(chan_index),
1866
+
dev_desc->touch_link - (i ? 0 : 2));
1867
+
if (error)
1868
+
return error;
1869
+
1870
+
if (!fwnode_property_read_u32(event_node,
1871
+
"azoteq,timeout-press-ms",
1872
+
&val)) {
1873
+
/*
1874
+
* The IQS7222B employs a global pair of press timeout
1875
+
* registers as opposed to channel-specific registers.
1876
+
*/
1877
+
u16 *setup = dev_desc->reg_grps
1878
+
[IQS7222_REG_GRP_BTN].num_col > 2 ?
1879
+
&iqs7222->btn_setup[chan_index][2] :
1880
+
&sys_setup[9];
1881
+
1882
+
if (val > U8_MAX * 500) {
1883
+
dev_err(&client->dev,
1884
+
"Invalid %s press timeout: %u\n",
1885
+
fwnode_get_name(chan_node), val);
1886
+
return -EINVAL;
1887
+
}
1888
+
1889
+
*setup &= ~(U8_MAX << i * 8);
1890
+
*setup |= (val / 500 << i * 8);
1891
+
}
1892
+
1893
+
error = fwnode_property_read_u32(event_node, "linux,code",
1894
+
&val);
1895
+
if (error) {
1896
+
dev_err(&client->dev, "Failed to read %s code: %d\n",
1897
+
fwnode_get_name(chan_node), error);
1898
+
return error;
1899
+
}
1900
+
1901
+
iqs7222->kp_code[chan_index][i] = val;
1902
+
iqs7222->kp_type[chan_index][i] = EV_KEY;
1903
+
1904
+
if (fwnode_property_present(event_node, "linux,input-type")) {
1905
+
error = fwnode_property_read_u32(event_node,
1906
+
"linux,input-type",
1907
+
&val);
1908
+
if (error) {
1909
+
dev_err(&client->dev,
1910
+
"Failed to read %s input type: %d\n",
1911
+
fwnode_get_name(chan_node), error);
1912
+
return error;
1913
+
}
1914
+
1915
+
if (val != EV_KEY && val != EV_SW) {
1916
+
dev_err(&client->dev,
1917
+
"Invalid %s input type: %u\n",
1918
+
fwnode_get_name(chan_node), val);
1919
+
return -EINVAL;
1920
+
}
1921
+
1922
+
iqs7222->kp_type[chan_index][i] = val;
1923
+
}
1924
+
1925
+
/*
1926
+
* Reference channels can opt out of event reporting by using
1927
+
* KEY_RESERVED in place of a true key or switch code.
1928
+
*/
1929
+
if (iqs7222->kp_type[chan_index][i] == EV_KEY &&
1930
+
iqs7222->kp_code[chan_index][i] == KEY_RESERVED)
1931
+
continue;
1932
+
1933
+
input_set_capability(iqs7222->keypad,
1934
+
iqs7222->kp_type[chan_index][i],
1935
+
iqs7222->kp_code[chan_index][i]);
1936
+
1937
+
if (!dev_desc->event_offset)
1938
+
continue;
1939
+
1940
+
sys_setup[dev_desc->event_offset] |= event_enable;
1941
+
}
1942
+
1943
+
/*
1944
+
* The following call handles a special pair of properties that apply
1945
+
* to a channel node, but reside within the button (event) group.
1946
+
*/
1947
+
return iqs7222_parse_props(iqs7222, &chan_node, chan_index,
1948
+
IQS7222_REG_GRP_BTN,
1949
+
IQS7222_REG_KEY_DEBOUNCE);
1950
+
}
1951
+
1952
+
static int iqs7222_parse_sldr(struct iqs7222_private *iqs7222, int sldr_index)
1953
+
{
1954
+
const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
1955
+
struct i2c_client *client = iqs7222->client;
1956
+
struct fwnode_handle *sldr_node = NULL;
1957
+
int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row;
1958
+
int ext_chan = rounddown(num_chan, 10);
1959
+
int count, error, reg_offset, i;
1960
+
u16 *sldr_setup = iqs7222->sldr_setup[sldr_index];
1961
+
u16 *sys_setup = iqs7222->sys_setup;
1962
+
unsigned int chan_sel[4], val;
1963
+
1964
+
error = iqs7222_parse_props(iqs7222, &sldr_node, sldr_index,
1965
+
IQS7222_REG_GRP_SLDR,
1966
+
IQS7222_REG_KEY_NONE);
1967
+
if (error)
1968
+
return error;
1969
+
1970
+
if (!sldr_node)
1971
+
return 0;
1972
+
1973
+
/*
1974
+
* Each slider can be spread across 3 to 4 channels. It is possible to
1975
+
* select only 2 channels, but doing so prevents the slider from using
1976
+
* the specified resolution.
1977
+
*/
1978
+
count = fwnode_property_count_u32(sldr_node, "azoteq,channel-select");
1979
+
if (count < 0) {
1980
+
dev_err(&client->dev, "Failed to count %s channels: %d\n",
1981
+
fwnode_get_name(sldr_node), count);
1982
+
return count;
1983
+
} else if (count < 3 || count > ARRAY_SIZE(chan_sel)) {
1984
+
dev_err(&client->dev, "Invalid number of %s channels\n",
1985
+
fwnode_get_name(sldr_node));
1986
+
return -EINVAL;
1987
+
}
1988
+
1989
+
error = fwnode_property_read_u32_array(sldr_node,
1990
+
"azoteq,channel-select",
1991
+
chan_sel, count);
1992
+
if (error) {
1993
+
dev_err(&client->dev, "Failed to read %s channels: %d\n",
1994
+
fwnode_get_name(sldr_node), error);
1995
+
return error;
1996
+
}
1997
+
1998
+
/*
1999
+
* Resolution and top speed, if small enough, are packed into a single
2000
+
* register. Otherwise, each occupies its own register and the rest of
2001
+
* the slider-related register addresses are offset by one.
2002
+
*/
2003
+
reg_offset = dev_desc->sldr_res < U16_MAX ? 0 : 1;
2004
+
2005
+
sldr_setup[0] |= count;
2006
+
sldr_setup[3 + reg_offset] &= ~IQS7222_SLDR_SETUP_3_CHAN_SEL_MASK;
2007
+
2008
+
for (i = 0; i < ARRAY_SIZE(chan_sel); i++) {
2009
+
sldr_setup[5 + reg_offset + i] = 0;
2010
+
if (i >= count)
2011
+
continue;
2012
+
2013
+
if (chan_sel[i] >= ext_chan) {
2014
+
dev_err(&client->dev, "Invalid %s channel: %u\n",
2015
+
fwnode_get_name(sldr_node), chan_sel[i]);
2016
+
return -EINVAL;
2017
+
}
2018
+
2019
+
/*
2020
+
* The following fields indicate which channels participate in
2021
+
* the slider, as well as each channel's relative placement.
2022
+
*/
2023
+
sldr_setup[3 + reg_offset] |= BIT(chan_sel[i]);
2024
+
sldr_setup[5 + reg_offset + i] = chan_sel[i] * 42 + 1080;
2025
+
}
2026
+
2027
+
sldr_setup[4 + reg_offset] = dev_desc->touch_link;
2028
+
if (fwnode_property_present(sldr_node, "azoteq,use-prox"))
2029
+
sldr_setup[4 + reg_offset] -= 2;
2030
+
2031
+
if (!fwnode_property_read_u32(sldr_node, "azoteq,slider-size", &val)) {
2032
+
if (!val || val > dev_desc->sldr_res) {
2033
+
dev_err(&client->dev, "Invalid %s size: %u\n",
2034
+
fwnode_get_name(sldr_node), val);
2035
+
return -EINVAL;
2036
+
}
2037
+
2038
+
if (reg_offset) {
2039
+
sldr_setup[3] = val;
2040
+
} else {
2041
+
sldr_setup[2] &= ~IQS7222_SLDR_SETUP_2_RES_MASK;
2042
+
sldr_setup[2] |= (val / 16 <<
2043
+
IQS7222_SLDR_SETUP_2_RES_SHIFT);
2044
+
}
2045
+
}
2046
+
2047
+
if (!fwnode_property_read_u32(sldr_node, "azoteq,top-speed", &val)) {
2048
+
if (val > (reg_offset ? U16_MAX : U8_MAX * 4)) {
2049
+
dev_err(&client->dev, "Invalid %s top speed: %u\n",
2050
+
fwnode_get_name(sldr_node), val);
2051
+
return -EINVAL;
2052
+
}
2053
+
2054
+
if (reg_offset) {
2055
+
sldr_setup[2] = val;
2056
+
} else {
2057
+
sldr_setup[2] &= ~IQS7222_SLDR_SETUP_2_TOP_SPEED_MASK;
2058
+
sldr_setup[2] |= (val / 4);
2059
+
}
2060
+
}
2061
+
2062
+
if (!fwnode_property_read_u32(sldr_node, "linux,axis", &val)) {
2063
+
u16 sldr_max = sldr_setup[3] - 1;
2064
+
2065
+
if (!reg_offset) {
2066
+
sldr_max = sldr_setup[2];
2067
+
2068
+
sldr_max &= IQS7222_SLDR_SETUP_2_RES_MASK;
2069
+
sldr_max >>= IQS7222_SLDR_SETUP_2_RES_SHIFT;
2070
+
2071
+
sldr_max = sldr_max * 16 - 1;
2072
+
}
2073
+
2074
+
input_set_abs_params(iqs7222->keypad, val, 0, sldr_max, 0, 0);
2075
+
iqs7222->sl_axis[sldr_index] = val;
2076
+
}
2077
+
2078
+
if (dev_desc->wheel_enable) {
2079
+
sldr_setup[0] &= ~dev_desc->wheel_enable;
2080
+
if (iqs7222->sl_axis[sldr_index] == ABS_WHEEL)
2081
+
sldr_setup[0] |= dev_desc->wheel_enable;
2082
+
}
2083
+
2084
+
for (i = 0; i < ARRAY_SIZE(iqs7222_sl_events); i++) {
2085
+
const char *event_name = iqs7222_sl_events[i].name;
2086
+
struct fwnode_handle *event_node;
2087
+
2088
+
/*
2089
+
* The absence of a register offset means the remaining fields
2090
+
* in the group represent gesture settings.
2091
+
*/
2092
+
if (iqs7222_sl_events[i].enable && !reg_offset)
2093
+
sldr_setup[9] &= ~iqs7222_sl_events[i].enable;
2094
+
2095
+
event_node = fwnode_get_named_child_node(sldr_node, event_name);
2096
+
if (!event_node)
2097
+
continue;
2098
+
2099
+
error = iqs7222_parse_props(iqs7222, &event_node, sldr_index,
2100
+
IQS7222_REG_GRP_SLDR,
2101
+
reg_offset ?
2102
+
IQS7222_REG_KEY_RESERVED :
2103
+
iqs7222_sl_events[i].reg_key);
2104
+
if (error)
2105
+
return error;
2106
+
2107
+
error = fwnode_property_read_u32(event_node, "linux,code",
2108
+
&val);
2109
+
if (error) {
2110
+
dev_err(&client->dev, "Failed to read %s code: %d\n",
2111
+
fwnode_get_name(sldr_node), error);
2112
+
return error;
2113
+
}
2114
+
2115
+
iqs7222->sl_code[sldr_index][i] = val;
2116
+
input_set_capability(iqs7222->keypad, EV_KEY, val);
2117
+
2118
+
/*
2119
+
* The press/release event is determined based on whether the
2120
+
* coordinate field reports 0xFFFF and has no explicit enable
2121
+
* control.
2122
+
*/
2123
+
if (!iqs7222_sl_events[i].enable || reg_offset)
2124
+
continue;
2125
+
2126
+
sldr_setup[9] |= iqs7222_sl_events[i].enable;
2127
+
2128
+
error = iqs7222_gpio_select(iqs7222, event_node,
2129
+
iqs7222_sl_events[i].enable,
2130
+
1568 + sldr_index * 30);
2131
+
if (error)
2132
+
return error;
2133
+
2134
+
if (!dev_desc->event_offset)
2135
+
continue;
2136
+
2137
+
sys_setup[dev_desc->event_offset] |= BIT(10 + sldr_index);
2138
+
}
2139
+
2140
+
/*
2141
+
* The following call handles a special pair of properties that shift
2142
+
* to make room for a wheel enable control in the case of IQS7222C.
2143
+
*/
2144
+
return iqs7222_parse_props(iqs7222, &sldr_node, sldr_index,
2145
+
IQS7222_REG_GRP_SLDR,
2146
+
dev_desc->wheel_enable ?
2147
+
IQS7222_REG_KEY_WHEEL :
2148
+
IQS7222_REG_KEY_NO_WHEEL);
2149
+
}
2150
+
2151
+
static int iqs7222_parse_all(struct iqs7222_private *iqs7222)
2152
+
{
2153
+
const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
2154
+
const struct iqs7222_reg_grp_desc *reg_grps = dev_desc->reg_grps;
2155
+
u16 *sys_setup = iqs7222->sys_setup;
2156
+
int error, i;
2157
+
2158
+
if (dev_desc->event_offset)
2159
+
sys_setup[dev_desc->event_offset] = IQS7222_EVENT_MASK_ATI;
2160
+
2161
+
for (i = 0; i < reg_grps[IQS7222_REG_GRP_CYCLE].num_row; i++) {
2162
+
error = iqs7222_parse_cycle(iqs7222, i);
2163
+
if (error)
2164
+
return error;
2165
+
}
2166
+
2167
+
error = iqs7222_parse_props(iqs7222, NULL, 0, IQS7222_REG_GRP_GLBL,
2168
+
IQS7222_REG_KEY_NONE);
2169
+
if (error)
2170
+
return error;
2171
+
2172
+
for (i = 0; i < reg_grps[IQS7222_REG_GRP_GPIO].num_row; i++) {
2173
+
struct fwnode_handle *gpio_node = NULL;
2174
+
u16 *gpio_setup = iqs7222->gpio_setup[i];
2175
+
int j;
2176
+
2177
+
gpio_setup[0] &= ~IQS7222_GPIO_SETUP_0_GPIO_EN;
2178
+
gpio_setup[1] = 0;
2179
+
gpio_setup[2] = 0;
2180
+
2181
+
error = iqs7222_parse_props(iqs7222, &gpio_node, i,
2182
+
IQS7222_REG_GRP_GPIO,
2183
+
IQS7222_REG_KEY_NONE);
2184
+
if (error)
2185
+
return error;
2186
+
2187
+
if (reg_grps[IQS7222_REG_GRP_GPIO].num_row == 1)
2188
+
continue;
2189
+
2190
+
/*
2191
+
* The IQS7222C exposes multiple GPIO and must be informed
2192
+
* as to which GPIO this group represents.
2193
+
*/
2194
+
for (j = 0; j < ARRAY_SIZE(iqs7222_gpio_links); j++)
2195
+
gpio_setup[0] &= ~BIT(iqs7222_gpio_links[j]);
2196
+
2197
+
gpio_setup[0] |= BIT(iqs7222_gpio_links[i]);
2198
+
}
2199
+
2200
+
for (i = 0; i < reg_grps[IQS7222_REG_GRP_CHAN].num_row; i++) {
2201
+
u16 *chan_setup = iqs7222->chan_setup[i];
2202
+
2203
+
chan_setup[0] &= ~IQS7222_CHAN_SETUP_0_REF_MODE_MASK;
2204
+
chan_setup[0] &= ~IQS7222_CHAN_SETUP_0_CHAN_EN;
2205
+
2206
+
chan_setup[5] = 0;
2207
+
}
2208
+
2209
+
for (i = 0; i < reg_grps[IQS7222_REG_GRP_CHAN].num_row; i++) {
2210
+
error = iqs7222_parse_chan(iqs7222, i);
2211
+
if (error)
2212
+
return error;
2213
+
}
2214
+
2215
+
error = iqs7222_parse_props(iqs7222, NULL, 0, IQS7222_REG_GRP_FILT,
2216
+
IQS7222_REG_KEY_NONE);
2217
+
if (error)
2218
+
return error;
2219
+
2220
+
for (i = 0; i < reg_grps[IQS7222_REG_GRP_SLDR].num_row; i++) {
2221
+
u16 *sldr_setup = iqs7222->sldr_setup[i];
2222
+
2223
+
sldr_setup[0] &= ~IQS7222_SLDR_SETUP_0_CHAN_CNT_MASK;
2224
+
2225
+
error = iqs7222_parse_sldr(iqs7222, i);
2226
+
if (error)
2227
+
return error;
2228
+
}
2229
+
2230
+
sys_setup[0] &= ~IQS7222_SYS_SETUP_INTF_MODE_MASK;
2231
+
sys_setup[0] &= ~IQS7222_SYS_SETUP_PWR_MODE_MASK;
2232
+
2233
+
sys_setup[0] |= IQS7222_SYS_SETUP_ACK_RESET;
2234
+
2235
+
return iqs7222_parse_props(iqs7222, NULL, 0, IQS7222_REG_GRP_SYS,
2236
+
IQS7222_REG_KEY_NONE);
2237
+
}
2238
+
2239
+
static int iqs7222_report(struct iqs7222_private *iqs7222)
2240
+
{
2241
+
const struct iqs7222_dev_desc *dev_desc = iqs7222->dev_desc;
2242
+
struct i2c_client *client = iqs7222->client;
2243
+
int num_chan = dev_desc->reg_grps[IQS7222_REG_GRP_CHAN].num_row;
2244
+
int num_stat = dev_desc->reg_grps[IQS7222_REG_GRP_STAT].num_col;
2245
+
int error, i, j;
2246
+
__le16 status[IQS7222_MAX_COLS_STAT];
2247
+
2248
+
error = iqs7222_read_burst(iqs7222, IQS7222_SYS_STATUS, status,
2249
+
num_stat);
2250
+
if (error)
2251
+
return error;
2252
+
2253
+
if (le16_to_cpu(status[0]) & IQS7222_SYS_STATUS_RESET) {
2254
+
dev_err(&client->dev, "Unexpected device reset\n");
2255
+
return iqs7222_dev_init(iqs7222, WRITE);
2256
+
}
2257
+
2258
+
if (le16_to_cpu(status[0]) & IQS7222_SYS_STATUS_ATI_ERROR) {
2259
+
dev_err(&client->dev, "Unexpected ATI error\n");
2260
+
return iqs7222_ati_trigger(iqs7222);
2261
+
}
2262
+
2263
+
if (le16_to_cpu(status[0]) & IQS7222_SYS_STATUS_ATI_ACTIVE)
2264
+
return 0;
2265
+
2266
+
for (i = 0; i < num_chan; i++) {
2267
+
u16 *chan_setup = iqs7222->chan_setup[i];
2268
+
2269
+
if (!(chan_setup[0] & IQS7222_CHAN_SETUP_0_CHAN_EN))
2270
+
continue;
2271
+
2272
+
for (j = 0; j < ARRAY_SIZE(iqs7222_kp_events); j++) {
2273
+
/*
2274
+
* Proximity state begins at offset 2 and spills into
2275
+
* offset 3 for devices with more than 16 channels.
2276
+
*
2277
+
* Touch state begins at the first offset immediately
2278
+
* following proximity state.
2279
+
*/
2280
+
int k = 2 + j * (num_chan > 16 ? 2 : 1);
2281
+
u16 state = le16_to_cpu(status[k + i / 16]);
2282
+
2283
+
input_event(iqs7222->keypad,
2284
+
iqs7222->kp_type[i][j],
2285
+
iqs7222->kp_code[i][j],
2286
+
!!(state & BIT(i % 16)));
2287
+
}
2288
+
}
2289
+
2290
+
for (i = 0; i < dev_desc->reg_grps[IQS7222_REG_GRP_SLDR].num_row; i++) {
2291
+
u16 *sldr_setup = iqs7222->sldr_setup[i];
2292
+
u16 sldr_pos = le16_to_cpu(status[4 + i]);
2293
+
u16 state = le16_to_cpu(status[6 + i]);
2294
+
2295
+
if (!(sldr_setup[0] & IQS7222_SLDR_SETUP_0_CHAN_CNT_MASK))
2296
+
continue;
2297
+
2298
+
if (sldr_pos < dev_desc->sldr_res)
2299
+
input_report_abs(iqs7222->keypad, iqs7222->sl_axis[i],
2300
+
sldr_pos);
2301
+
2302
+
for (j = 0; j < ARRAY_SIZE(iqs7222_sl_events); j++) {
2303
+
u16 mask = iqs7222_sl_events[j].mask;
2304
+
u16 val = iqs7222_sl_events[j].val;
2305
+
2306
+
if (!iqs7222_sl_events[j].enable) {
2307
+
input_report_key(iqs7222->keypad,
2308
+
iqs7222->sl_code[i][j],
2309
+
sldr_pos < dev_desc->sldr_res);
2310
+
continue;
2311
+
}
2312
+
2313
+
/*
2314
+
* The remaining offsets represent gesture state, and
2315
+
* are discarded in the case of IQS7222C because only
2316
+
* absolute position is reported.
2317
+
*/
2318
+
if (num_stat < IQS7222_MAX_COLS_STAT)
2319
+
continue;
2320
+
2321
+
input_report_key(iqs7222->keypad,
2322
+
iqs7222->sl_code[i][j],
2323
+
(state & mask) == val);
2324
+
}
2325
+
}
2326
+
2327
+
input_sync(iqs7222->keypad);
2328
+
2329
+
return 0;
2330
+
}
2331
+
2332
+
static irqreturn_t iqs7222_irq(int irq, void *context)
2333
+
{
2334
+
struct iqs7222_private *iqs7222 = context;
2335
+
2336
+
return iqs7222_report(iqs7222) ? IRQ_NONE : IRQ_HANDLED;
2337
+
}
2338
+
2339
+
static int iqs7222_probe(struct i2c_client *client)
2340
+
{
2341
+
struct iqs7222_private *iqs7222;
2342
+
unsigned long irq_flags;
2343
+
int error, irq;
2344
+
2345
+
iqs7222 = devm_kzalloc(&client->dev, sizeof(*iqs7222), GFP_KERNEL);
2346
+
if (!iqs7222)
2347
+
return -ENOMEM;
2348
+
2349
+
i2c_set_clientdata(client, iqs7222);
2350
+
iqs7222->client = client;
2351
+
2352
+
iqs7222->keypad = devm_input_allocate_device(&client->dev);
2353
+
if (!iqs7222->keypad)
2354
+
return -ENOMEM;
2355
+
2356
+
iqs7222->keypad->name = client->name;
2357
+
iqs7222->keypad->id.bustype = BUS_I2C;
2358
+
2359
+
/*
2360
+
* The RDY pin behaves as an interrupt, but must also be polled ahead
2361
+
* of unsolicited I2C communication. As such, it is first opened as a
2362
+
* GPIO and then passed to gpiod_to_irq() to register the interrupt.
2363
+
*/
2364
+
iqs7222->irq_gpio = devm_gpiod_get(&client->dev, "irq", GPIOD_IN);
2365
+
if (IS_ERR(iqs7222->irq_gpio)) {
2366
+
error = PTR_ERR(iqs7222->irq_gpio);
2367
+
dev_err(&client->dev, "Failed to request IRQ GPIO: %d\n",
2368
+
error);
2369
+
return error;
2370
+
}
2371
+
2372
+
iqs7222->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
2373
+
GPIOD_OUT_HIGH);
2374
+
if (IS_ERR(iqs7222->reset_gpio)) {
2375
+
error = PTR_ERR(iqs7222->reset_gpio);
2376
+
dev_err(&client->dev, "Failed to request reset GPIO: %d\n",
2377
+
error);
2378
+
return error;
2379
+
}
2380
+
2381
+
error = iqs7222_hard_reset(iqs7222);
2382
+
if (error)
2383
+
return error;
2384
+
2385
+
error = iqs7222_dev_info(iqs7222);
2386
+
if (error)
2387
+
return error;
2388
+
2389
+
error = iqs7222_dev_init(iqs7222, READ);
2390
+
if (error)
2391
+
return error;
2392
+
2393
+
error = iqs7222_parse_all(iqs7222);
2394
+
if (error)
2395
+
return error;
2396
+
2397
+
error = iqs7222_dev_init(iqs7222, WRITE);
2398
+
if (error)
2399
+
return error;
2400
+
2401
+
error = iqs7222_report(iqs7222);
2402
+
if (error)
2403
+
return error;
2404
+
2405
+
error = input_register_device(iqs7222->keypad);
2406
+
if (error) {
2407
+
dev_err(&client->dev, "Failed to register device: %d\n", error);
2408
+
return error;
2409
+
}
2410
+
2411
+
irq = gpiod_to_irq(iqs7222->irq_gpio);
2412
+
if (irq < 0)
2413
+
return irq;
2414
+
2415
+
irq_flags = gpiod_is_active_low(iqs7222->irq_gpio) ? IRQF_TRIGGER_LOW
2416
+
: IRQF_TRIGGER_HIGH;
2417
+
irq_flags |= IRQF_ONESHOT;
2418
+
2419
+
error = devm_request_threaded_irq(&client->dev, irq, NULL, iqs7222_irq,
2420
+
irq_flags, client->name, iqs7222);
2421
+
if (error)
2422
+
dev_err(&client->dev, "Failed to request IRQ: %d\n", error);
2423
+
2424
+
return error;
2425
+
}
2426
+
2427
+
static const struct of_device_id iqs7222_of_match[] = {
2428
+
{ .compatible = "azoteq,iqs7222a" },
2429
+
{ .compatible = "azoteq,iqs7222b" },
2430
+
{ .compatible = "azoteq,iqs7222c" },
2431
+
{ }
2432
+
};
2433
+
MODULE_DEVICE_TABLE(of, iqs7222_of_match);
2434
+
2435
+
static struct i2c_driver iqs7222_i2c_driver = {
2436
+
.driver = {
2437
+
.name = "iqs7222",
2438
+
.of_match_table = iqs7222_of_match,
2439
+
},
2440
+
.probe_new = iqs7222_probe,
2441
+
};
2442
+
module_i2c_driver(iqs7222_i2c_driver);
2443
+
2444
+
MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
2445
+
MODULE_DESCRIPTION("Azoteq IQS7222A/B/C Capacitive Touch Controller");
2446
+
MODULE_LICENSE("GPL");
+114
-15
drivers/input/misc/pm8941-pwrkey.c
+114
-15
drivers/input/misc/pm8941-pwrkey.c
···
9
9
#include <linux/input.h>
10
10
#include <linux/interrupt.h>
11
11
#include <linux/kernel.h>
12
+
#include <linux/ktime.h>
12
13
#include <linux/log2.h>
13
14
#include <linux/module.h>
14
15
#include <linux/of.h>
16
+
#include <linux/of_address.h>
15
17
#include <linux/of_device.h>
16
18
#include <linux/platform_device.h>
17
19
#include <linux/reboot.h>
18
20
#include <linux/regmap.h>
19
21
20
22
#define PON_REV2 0x01
23
+
24
+
#define PON_SUBTYPE 0x05
25
+
26
+
#define PON_SUBTYPE_PRIMARY 0x01
27
+
#define PON_SUBTYPE_SECONDARY 0x02
28
+
#define PON_SUBTYPE_1REG 0x03
29
+
#define PON_SUBTYPE_GEN2_PRIMARY 0x04
30
+
#define PON_SUBTYPE_GEN2_SECONDARY 0x05
31
+
#define PON_SUBTYPE_GEN3_PBS 0x08
32
+
#define PON_SUBTYPE_GEN3_HLOS 0x09
21
33
22
34
#define PON_RT_STS 0x10
23
35
#define PON_KPDPWR_N_SET BIT(0)
···
57
45
unsigned int status_bit;
58
46
bool supports_ps_hold_poff_config;
59
47
bool supports_debounce_config;
48
+
bool has_pon_pbs;
60
49
const char *name;
61
50
const char *phys;
62
51
};
···
66
53
struct device *dev;
67
54
int irq;
68
55
u32 baseaddr;
56
+
u32 pon_pbs_baseaddr;
69
57
struct regmap *regmap;
70
58
struct input_dev *input;
71
59
72
60
unsigned int revision;
61
+
unsigned int subtype;
73
62
struct notifier_block reboot_notifier;
74
63
75
64
u32 code;
65
+
u32 sw_debounce_time_us;
66
+
ktime_t sw_debounce_end_time;
67
+
bool last_status;
76
68
const struct pm8941_data *data;
77
69
};
78
70
···
147
129
{
148
130
struct pm8941_pwrkey *pwrkey = _data;
149
131
unsigned int sts;
150
-
int error;
132
+
int err;
151
133
152
-
error = regmap_read(pwrkey->regmap,
153
-
pwrkey->baseaddr + PON_RT_STS, &sts);
154
-
if (error)
134
+
if (pwrkey->sw_debounce_time_us) {
135
+
if (ktime_before(ktime_get(), pwrkey->sw_debounce_end_time)) {
136
+
dev_dbg(pwrkey->dev,
137
+
"ignoring key event received before debounce end %llu us\n",
138
+
pwrkey->sw_debounce_end_time);
139
+
return IRQ_HANDLED;
140
+
}
141
+
}
142
+
143
+
err = regmap_read(pwrkey->regmap, pwrkey->baseaddr + PON_RT_STS, &sts);
144
+
if (err)
155
145
return IRQ_HANDLED;
156
146
157
-
input_report_key(pwrkey->input, pwrkey->code,
158
-
sts & pwrkey->data->status_bit);
147
+
sts &= pwrkey->data->status_bit;
148
+
149
+
if (pwrkey->sw_debounce_time_us && !sts)
150
+
pwrkey->sw_debounce_end_time = ktime_add_us(ktime_get(),
151
+
pwrkey->sw_debounce_time_us);
152
+
153
+
/*
154
+
* Simulate a press event in case a release event occurred without a
155
+
* corresponding press event.
156
+
*/
157
+
if (!pwrkey->last_status && !sts) {
158
+
input_report_key(pwrkey->input, pwrkey->code, 1);
159
+
input_sync(pwrkey->input);
160
+
}
161
+
pwrkey->last_status = sts;
162
+
163
+
input_report_key(pwrkey->input, pwrkey->code, sts);
159
164
input_sync(pwrkey->input);
160
165
161
166
return IRQ_HANDLED;
167
+
}
168
+
169
+
static int pm8941_pwrkey_sw_debounce_init(struct pm8941_pwrkey *pwrkey)
170
+
{
171
+
unsigned int val, addr, mask;
172
+
int error;
173
+
174
+
if (pwrkey->data->has_pon_pbs && !pwrkey->pon_pbs_baseaddr) {
175
+
dev_err(pwrkey->dev,
176
+
"PON_PBS address missing, can't read HW debounce time\n");
177
+
return 0;
178
+
}
179
+
180
+
if (pwrkey->pon_pbs_baseaddr)
181
+
addr = pwrkey->pon_pbs_baseaddr + PON_DBC_CTL;
182
+
else
183
+
addr = pwrkey->baseaddr + PON_DBC_CTL;
184
+
error = regmap_read(pwrkey->regmap, addr, &val);
185
+
if (error)
186
+
return error;
187
+
188
+
if (pwrkey->subtype >= PON_SUBTYPE_GEN2_PRIMARY)
189
+
mask = 0xf;
190
+
else
191
+
mask = 0x7;
192
+
193
+
pwrkey->sw_debounce_time_us =
194
+
2 * USEC_PER_SEC / (1 << (mask - (val & mask)));
195
+
196
+
dev_dbg(pwrkey->dev, "SW debounce time = %u us\n",
197
+
pwrkey->sw_debounce_time_us);
198
+
199
+
return 0;
162
200
}
163
201
164
202
static int __maybe_unused pm8941_pwrkey_suspend(struct device *dev)
···
245
171
struct pm8941_pwrkey *pwrkey;
246
172
bool pull_up;
247
173
struct device *parent;
174
+
struct device_node *regmap_node;
175
+
const __be32 *addr;
248
176
u32 req_delay;
249
177
int error;
250
178
···
268
192
pwrkey->data = of_device_get_match_data(&pdev->dev);
269
193
270
194
parent = pdev->dev.parent;
195
+
regmap_node = pdev->dev.of_node;
271
196
pwrkey->regmap = dev_get_regmap(parent, NULL);
272
197
if (!pwrkey->regmap) {
198
+
regmap_node = parent->of_node;
273
199
/*
274
200
* We failed to get regmap for parent. Let's see if we are
275
201
* a child of pon node and read regmap and reg from its
···
282
204
dev_err(&pdev->dev, "failed to locate regmap\n");
283
205
return -ENODEV;
284
206
}
285
-
286
-
error = of_property_read_u32(parent->of_node,
287
-
"reg", &pwrkey->baseaddr);
288
-
} else {
289
-
error = of_property_read_u32(pdev->dev.of_node, "reg",
290
-
&pwrkey->baseaddr);
291
207
}
292
-
if (error)
293
-
return error;
208
+
209
+
addr = of_get_address(regmap_node, 0, NULL, NULL);
210
+
if (!addr) {
211
+
dev_err(&pdev->dev, "reg property missing\n");
212
+
return -EINVAL;
213
+
}
214
+
pwrkey->baseaddr = be32_to_cpup(addr);
215
+
216
+
if (pwrkey->data->has_pon_pbs) {
217
+
/* PON_PBS base address is optional */
218
+
addr = of_get_address(regmap_node, 1, NULL, NULL);
219
+
if (addr)
220
+
pwrkey->pon_pbs_baseaddr = be32_to_cpup(addr);
221
+
}
294
222
295
223
pwrkey->irq = platform_get_irq(pdev, 0);
296
224
if (pwrkey->irq < 0)
···
305
221
error = regmap_read(pwrkey->regmap, pwrkey->baseaddr + PON_REV2,
306
222
&pwrkey->revision);
307
223
if (error) {
308
-
dev_err(&pdev->dev, "failed to set debounce: %d\n", error);
224
+
dev_err(&pdev->dev, "failed to read revision: %d\n", error);
225
+
return error;
226
+
}
227
+
228
+
error = regmap_read(pwrkey->regmap, pwrkey->baseaddr + PON_SUBTYPE,
229
+
&pwrkey->subtype);
230
+
if (error) {
231
+
dev_err(&pdev->dev, "failed to read subtype: %d\n", error);
309
232
return error;
310
233
}
311
234
···
349
258
return error;
350
259
}
351
260
}
261
+
262
+
error = pm8941_pwrkey_sw_debounce_init(pwrkey);
263
+
if (error)
264
+
return error;
352
265
353
266
if (pwrkey->data->pull_up_bit) {
354
267
error = regmap_update_bits(pwrkey->regmap,
···
415
320
.phys = "pm8941_pwrkey/input0",
416
321
.supports_ps_hold_poff_config = true,
417
322
.supports_debounce_config = true,
323
+
.has_pon_pbs = false,
418
324
};
419
325
420
326
static const struct pm8941_data resin_data = {
···
425
329
.phys = "pm8941_resin/input0",
426
330
.supports_ps_hold_poff_config = true,
427
331
.supports_debounce_config = true,
332
+
.has_pon_pbs = false,
428
333
};
429
334
430
335
static const struct pm8941_data pon_gen3_pwrkey_data = {
···
434
337
.phys = "pmic_pwrkey/input0",
435
338
.supports_ps_hold_poff_config = false,
436
339
.supports_debounce_config = false,
340
+
.has_pon_pbs = true,
437
341
};
438
342
439
343
static const struct pm8941_data pon_gen3_resin_data = {
···
443
345
.phys = "pmic_resin/input0",
444
346
.supports_ps_hold_poff_config = false,
445
347
.supports_debounce_config = false,
348
+
.has_pon_pbs = true,
446
349
};
447
350
448
351
static const struct of_device_id pm8941_pwr_key_id_table[] = {
+1
drivers/input/misc/sparcspkr.c
+1
drivers/input/misc/sparcspkr.c
+1
-1
drivers/input/mouse/cypress_ps2.c
+1
-1
drivers/input/mouse/cypress_ps2.c
+9
-2
drivers/input/mouse/psmouse-smbus.c
+9
-2
drivers/input/mouse/psmouse-smbus.c
···
26
26
static LIST_HEAD(psmouse_smbus_list);
27
27
static DEFINE_MUTEX(psmouse_smbus_mutex);
28
28
29
+
static struct workqueue_struct *psmouse_smbus_wq;
30
+
29
31
static void psmouse_smbus_check_adapter(struct i2c_adapter *adapter)
30
32
{
31
33
struct psmouse_smbus_dev *smbdev;
···
163
161
INIT_WORK(&rwork->work, psmouse_smbus_remove_i2c_device);
164
162
rwork->client = client;
165
163
166
-
schedule_work(&rwork->work);
164
+
queue_work(psmouse_smbus_wq, &rwork->work);
167
165
}
168
166
}
169
167
···
307
305
{
308
306
int error;
309
307
308
+
psmouse_smbus_wq = alloc_workqueue("psmouse-smbus", 0, 0);
309
+
if (!psmouse_smbus_wq)
310
+
return -ENOMEM;
311
+
310
312
error = bus_register_notifier(&i2c_bus_type, &psmouse_smbus_notifier);
311
313
if (error) {
312
314
pr_err("failed to register i2c bus notifier: %d\n", error);
315
+
destroy_workqueue(psmouse_smbus_wq);
313
316
return error;
314
317
}
315
318
···
324
317
void psmouse_smbus_module_exit(void)
325
318
{
326
319
bus_unregister_notifier(&i2c_bus_type, &psmouse_smbus_notifier);
327
-
flush_scheduled_work();
320
+
destroy_workqueue(psmouse_smbus_wq);
328
321
}
+14
drivers/input/mouse/vmmouse.c
+14
drivers/input/mouse/vmmouse.c
···
366
366
}
367
367
368
368
/**
369
+
* vmmouse_reset - Disable vmmouse and reset
370
+
*
371
+
* @psmouse: Pointer to the psmouse struct
372
+
*
373
+
* Tries to disable vmmouse mode before enter suspend.
374
+
*/
375
+
static void vmmouse_reset(struct psmouse *psmouse)
376
+
{
377
+
vmmouse_disable(psmouse);
378
+
psmouse_reset(psmouse);
379
+
}
380
+
381
+
/**
369
382
* vmmouse_disconnect - Take down vmmouse driver
370
383
*
371
384
* @psmouse: Pointer to the psmouse struct
···
485
472
psmouse->protocol_handler = vmmouse_process_byte;
486
473
psmouse->disconnect = vmmouse_disconnect;
487
474
psmouse->reconnect = vmmouse_reconnect;
475
+
psmouse->cleanup = vmmouse_reset;
488
476
489
477
return 0;
490
478
-1
drivers/input/rmi4/rmi_f54.c
-1
drivers/input/rmi4/rmi_f54.c
+1
-2
drivers/input/tablet/aiptek.c
+1
-2
drivers/input/tablet/aiptek.c
···
931
931
}
932
932
msleep(aiptek->curSetting.programmableDelay);
933
933
934
-
if ((ret =
935
-
aiptek_get_report(aiptek, 3, 2, buf, sizeof_buf)) != sizeof_buf) {
934
+
if (aiptek_get_report(aiptek, 3, 2, buf, sizeof_buf) != sizeof_buf) {
936
935
dev_dbg(&aiptek->intf->dev,
937
936
"aiptek_query failed: returned 0x%02x 0x%02x 0x%02x\n",
938
937
buf[0], buf[1], buf[2]);
+8
-8
drivers/input/touchscreen/stmfts.c
+8
-8
drivers/input/touchscreen/stmfts.c
···
337
337
struct stmfts_data *sdata = input_get_drvdata(dev);
338
338
int err;
339
339
340
-
err = pm_runtime_get_sync(&sdata->client->dev);
341
-
if (err < 0)
342
-
goto out;
340
+
err = pm_runtime_resume_and_get(&sdata->client->dev);
341
+
if (err)
342
+
return err;
343
343
344
344
err = i2c_smbus_write_byte(sdata->client, STMFTS_MS_MT_SENSE_ON);
345
-
if (err)
346
-
goto out;
345
+
if (err) {
346
+
pm_runtime_put_sync(&sdata->client->dev);
347
+
return err;
348
+
}
347
349
348
350
mutex_lock(&sdata->mutex);
349
351
sdata->running = true;
···
368
366
"failed to enable touchkey\n");
369
367
}
370
368
371
-
out:
372
-
pm_runtime_put_noidle(&sdata->client->dev);
373
-
return err;
369
+
return 0;
374
370
}
375
371
376
372
static void stmfts_input_close(struct input_dev *dev)