Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/ast: Enable MMIO without ast device instance
We'll have to enable the MMIO access for detecting the ast device
type. Make this work without an instance of the ast device.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231116100240.22975-7-tzimmermann@suse.de
+11
-7
+9
-7
drivers/gpu/drm/ast/ast_main.c
+9
-7
drivers/gpu/drm/ast/ast_main.c
···
54
54
*/
55
55
static void ast_enable_mmio_release(void *data)
56
56
{
57
-
struct ast_device *ast = data;
57
+
void __iomem *ioregs = (void __force __iomem *)data;
58
58
59
59
/* enable standard VGA decode */
60
-
ast_set_index_reg(ast, AST_IO_VGACRI, 0xa1, 0x04);
60
+
__ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1, AST_IO_VGACRA1_MMIO_ENABLED);
61
61
}
62
62
63
-
static int ast_enable_mmio(struct ast_device *ast)
63
+
static int ast_enable_mmio(struct device *dev, void __iomem *ioregs)
64
64
{
65
-
struct drm_device *dev = &ast->base;
65
+
void *data = (void __force *)ioregs;
66
66
67
-
ast_set_index_reg(ast, AST_IO_VGACRI, 0xa1, 0x06);
67
+
__ast_write8_i(ioregs, AST_IO_VGACRI, 0xa1,
68
+
AST_IO_VGACRA1_MMIO_ENABLED |
69
+
AST_IO_VGACRA1_VGAIO_DISABLED);
68
70
69
-
return devm_add_action_or_reset(dev->dev, ast_enable_mmio_release, ast);
71
+
return devm_add_action_or_reset(dev, ast_enable_mmio_release, data);
70
72
}
71
73
72
74
static void ast_open_key(void __iomem *ioregs)
···
498
496
/* Enable extended register access */
499
497
ast_open_key(ioregs);
500
498
501
-
ret = ast_enable_mmio(ast);
499
+
ret = ast_enable_mmio(&pdev->dev, ioregs);
502
500
if (ret)
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501
return ERR_PTR(ret);
504
502
+2
drivers/gpu/drm/ast/ast_reg.h
+2
drivers/gpu/drm/ast/ast_reg.h
···
29
29
30
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#define AST_IO_VGACRI (0x54)
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31
#define AST_IO_VGACR80_PASSWORD (0xa8)
32
+
#define AST_IO_VGACRA1_VGAIO_DISABLED BIT(1)
33
+
#define AST_IO_VGACRA1_MMIO_ENABLED BIT(2)
32
34
#define AST_IO_VGACRCB_HWC_16BPP BIT(0) /* set: ARGB4444, cleared: 2bpp palette */
33
35
#define AST_IO_VGACRCB_HWC_ENABLED BIT(1)
34
36