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arch/powerpc/sysdev/fsl_rio.c: correct IECSR register clear value

This bug causes the IECSR register clear failure. In this case, the RETE
(retry error threshold exceeded) interrupt will be generated and cannot be
cleared. So the related ISR may be called persistently.

The RETE bit in IECSR is cleared by writing a 1 to it.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: <stable@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by

Liu Gang-B34182 and committed by
Linus Torvalds 671ee7f0 62d17601

+3 -2
+3 -2
arch/powerpc/sysdev/fsl_rio.c
··· 54 54 #define ODSR_CLEAR 0x1c00 55 55 #define LTLEECSR_ENABLE_ALL 0xFFC000FC 56 56 #define ESCSR_CLEAR 0x07120204 57 + #define IECSR_CLEAR 0x80000000 57 58 58 59 #define RIO_PORT1_EDCSR 0x0640 59 60 #define RIO_PORT2_EDCSR 0x0680 ··· 1090 1089 1091 1090 if (offset == 0) { 1092 1091 out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0); 1093 - out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), 0); 1092 + out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), IECSR_CLEAR); 1094 1093 out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR); 1095 1094 } else { 1096 1095 out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0); 1097 - out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), 0); 1096 + out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), IECSR_CLEAR); 1098 1097 out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR); 1099 1098 } 1100 1099 }