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dt-bindings: phy: Convert brcm,sr-pcie-phy to DT schema

Convert the Broadcom Stingray PCIe PHY binding to DT schema format. It's
a straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212508.741193-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Rob Herring (Arm) and committed by
Vinod Koul
6725c334 f151f3a6

+46 -41
-41
Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.txt
··· 1 - Broadcom Stingray PCIe PHY 2 - 3 - Required properties: 4 - - compatible: must be "brcm,sr-pcie-phy" 5 - - reg: base address and length of the PCIe SS register space 6 - - brcm,sr-cdru: phandle to the CDRU syscon node 7 - - brcm,sr-mhb: phandle to the MHB syscon node 8 - - #phy-cells: Must be 1, denotes the PHY index 9 - 10 - For PAXB based root complex, one can have a configuration of up to 8 PHYs 11 - PHY index goes from 0 to 7 12 - 13 - For the internal PAXC based root complex, PHY index is always 8 14 - 15 - Example: 16 - mhb: syscon@60401000 { 17 - compatible = "brcm,sr-mhb", "syscon"; 18 - reg = <0 0x60401000 0 0x38c>; 19 - }; 20 - 21 - cdru: syscon@6641d000 { 22 - compatible = "brcm,sr-cdru", "syscon"; 23 - reg = <0 0x6641d000 0 0x400>; 24 - }; 25 - 26 - pcie_phy: phy@40000000 { 27 - compatible = "brcm,sr-pcie-phy"; 28 - reg = <0 0x40000000 0 0x800>; 29 - brcm,sr-cdru = <&cdru>; 30 - brcm,sr-mhb = <&mhb>; 31 - #phy-cells = <1>; 32 - }; 33 - 34 - /* users of the PCIe PHY */ 35 - 36 - pcie0: pcie@48000000 { 37 - ... 38 - ... 39 - phys = <&pcie_phy 0>; 40 - phy-names = "pcie-phy"; 41 - };
+46
Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/phy/brcm,sr-pcie-phy.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Broadcom Stingray PCIe PHY 8 + 9 + maintainers: 10 + - Ray Jui <ray.jui@broadcom.com> 11 + 12 + description: > 13 + For PAXB based root complex, one can have a configuration of up to 8 PHYs. 14 + PHY index goes from 0 to 7. 15 + 16 + For the internal PAXC based root complex, PHY index is always 8. 17 + 18 + properties: 19 + compatible: 20 + const: brcm,sr-pcie-phy 21 + 22 + reg: 23 + maxItems: 1 24 + 25 + '#phy-cells': 26 + const: 1 27 + 28 + brcm,sr-cdru: 29 + description: phandle to the CDRU syscon node 30 + $ref: /schemas/types.yaml#/definitions/phandle 31 + 32 + brcm,sr-mhb: 33 + description: phandle to the MHB syscon node 34 + $ref: /schemas/types.yaml#/definitions/phandle 35 + 36 + additionalProperties: false 37 + 38 + examples: 39 + - | 40 + phy@40000000 { 41 + compatible = "brcm,sr-pcie-phy"; 42 + reg = <0x40000000 0x800>; 43 + brcm,sr-cdru = <&cdru>; 44 + brcm,sr-mhb = <&mhb>; 45 + #phy-cells = <1>; 46 + };