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clk: qcom: dispcc-sm6115: Add missing MDSS resets

The MDSS resets were left undescribed. Add them to allow resetting the
display subsystem, which is necessary to avoid issues caused by state
left over from the bootloader on various platforms.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Val Packett <val@packett.cool>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260303034847.13870-4-val@packett.cool
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Val Packett and committed by
Bjorn Andersson 67d41a92 8081dbb0

+7
+7
drivers/clk/qcom/dispcc-sm6115.c
··· 22 22 #include "clk-regmap-divider.h" 23 23 #include "common.h" 24 24 #include "gdsc.h" 25 + #include "reset.h" 25 26 26 27 enum { 27 28 DT_BI_TCXO, ··· 512 511 }, 513 512 }; 514 513 514 + static const struct qcom_reset_map disp_cc_sm6115_resets[] = { 515 + [DISP_CC_MDSS_CORE_BCR] = { 0x2000 }, 516 + }; 517 + 515 518 static struct gdsc mdss_gdsc = { 516 519 .gdscr = 0x3000, 517 520 .pd = { ··· 566 561 .config = &disp_cc_sm6115_regmap_config, 567 562 .clks = disp_cc_sm6115_clocks, 568 563 .num_clks = ARRAY_SIZE(disp_cc_sm6115_clocks), 564 + .resets = disp_cc_sm6115_resets, 565 + .num_resets = ARRAY_SIZE(disp_cc_sm6115_resets), 569 566 .gdscs = disp_cc_sm6115_gdscs, 570 567 .num_gdscs = ARRAY_SIZE(disp_cc_sm6115_gdscs), 571 568 };