tjh.dev / kernel
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Merge branch 'octeontx2-improve-mailbox-tracing'

Subbaraya Sundeep says:

====================
octeontx2: Improve mailbox tracing

Octeontx2 VF,PF and AF devices communicate using hardware
shared mailbox region where VFs can only to talk to its PFs
and PFs can only talk to AF. AF does the entire resource management
for all PFs and VFs. The shared mbox region is used for synchronous
requests (requests from PF to AF or VF to PF) and async notifications
(notifications from AF to PFs or PF to VFs). Sending a request to AF
from VF involves various stages like
1. VF allocates message in shared region
2. Triggers interrupt to PF
3. PF upon receiving interrupt from VF will copy the message
from VF<->PF region to PF<->AF region
4. Triggers interrupt to AF
5. AF processes it and writes response in PF<->AF region
6. Triggers interrupt to PF
7. PF copies responses from PF<->AF region to VF<->PF region
8. Triggers interrupt to Vf
9. VF reads response in VF<->PF region

Due to various stages involved, Tracepoints are used in mailbox code for
debugging. Existing tracepoints need some improvements so that maximum
information can be inferred from trace logs during an issue.
This patchset tries to enhance existing tracepoints and also adds
a couple of tracepoints.
====================

Link: https://patch.msgid.link/1747136408-30685-1-git-send-email-sbhatta@marvell.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

Paolo Abeni 67fa7564 c1660800

+91 -20
+14 -3
drivers/net/ethernet/marvell/octeontx2/af/mbox.c
··· 188 188 { 189 189 unsigned long timeout = jiffies + msecs_to_jiffies(MBOX_RSP_TIMEOUT); 190 190 struct otx2_mbox_dev *mdev = &mbox->dev[devid]; 191 - struct device *sender = &mbox->pdev->dev; 192 191 193 192 while (!time_after(jiffies, timeout)) { 194 193 if (mdev->num_msgs == mdev->msgs_acked) 195 194 return 0; 196 195 usleep_range(800, 1000); 197 196 } 198 - dev_dbg(sender, "timed out while waiting for rsp\n"); 197 + trace_otx2_msg_wait_rsp(mbox->pdev); 199 198 return -EIO; 200 199 } 201 200 EXPORT_SYMBOL(otx2_mbox_wait_for_rsp); ··· 218 219 struct otx2_mbox_dev *mdev = &mbox->dev[devid]; 219 220 struct mbox_hdr *tx_hdr, *rx_hdr; 220 221 void *hw_mbase = mdev->hwbase; 222 + struct mbox_msghdr *msg; 221 223 u64 intr_val; 222 224 223 225 tx_hdr = hw_mbase + mbox->tx_start; ··· 251 251 tx_hdr->num_msgs = mdev->num_msgs; 252 252 rx_hdr->num_msgs = 0; 253 253 254 - trace_otx2_msg_send(mbox->pdev, tx_hdr->num_msgs, tx_hdr->msg_size); 254 + msg = (struct mbox_msghdr *)(hw_mbase + mbox->tx_start + msgs_offset); 255 + 256 + trace_otx2_msg_send(mbox->pdev, tx_hdr->num_msgs, tx_hdr->msg_size, 257 + msg->id, msg->pcifunc); 255 258 256 259 spin_unlock(&mdev->mbox_lock); 257 260 ··· 447 444 switch (id) { 448 445 #define M(_name, _id, _1, _2, _3) case _id: return # _name; 449 446 MBOX_MESSAGES 447 + #undef M 448 + 449 + #define M(_name, _id, _1, _2, _3) case _id: return # _name; 450 + MBOX_UP_CGX_MESSAGES 451 + #undef M 452 + 453 + #define M(_name, _id, _1, _2, _3) case _id: return # _name; 454 + MBOX_UP_CPT_MESSAGES 450 455 #undef M 451 456 default: 452 457 return "INVALID ID";
+1 -1
drivers/net/ethernet/marvell/octeontx2/af/rvu.c
··· 2173 2173 if (rsp && err) \ 2174 2174 rsp->hdr.rc = err; \ 2175 2175 \ 2176 - trace_otx2_msg_process(mbox->pdev, _id, err); \ 2176 + trace_otx2_msg_process(mbox->pdev, _id, err, req->pcifunc); \ 2177 2177 return rsp ? err : -ENOMEM; \ 2178 2178 } 2179 2179 MBOX_MESSAGES
+1 -1
drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
··· 34 34 return NULL; \ 35 35 req->hdr.sig = OTX2_MBOX_REQ_SIG; \ 36 36 req->hdr.id = _id; \ 37 - trace_otx2_msg_alloc(rvu->pdev, _id, sizeof(*req)); \ 37 + trace_otx2_msg_alloc(rvu->pdev, _id, sizeof(*req), 0); \ 38 38 return req; \ 39 39 } 40 40
+1
drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.c
··· 11 11 EXPORT_TRACEPOINT_SYMBOL(otx2_msg_alloc); 12 12 EXPORT_TRACEPOINT_SYMBOL(otx2_msg_interrupt); 13 13 EXPORT_TRACEPOINT_SYMBOL(otx2_msg_process); 14 + EXPORT_TRACEPOINT_SYMBOL(otx2_msg_status);
+50 -12
drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h
··· 18 18 #include "mbox.h" 19 19 20 20 TRACE_EVENT(otx2_msg_alloc, 21 - TP_PROTO(const struct pci_dev *pdev, u16 id, u64 size), 22 - TP_ARGS(pdev, id, size), 21 + TP_PROTO(const struct pci_dev *pdev, u16 id, u64 size, u16 pcifunc), 22 + TP_ARGS(pdev, id, size, pcifunc), 23 23 TP_STRUCT__entry(__string(dev, pci_name(pdev)) 24 24 __field(u16, id) 25 25 __field(u64, size) 26 + __field(u16, pcifunc) 26 27 ), 27 28 TP_fast_assign(__assign_str(dev); 28 29 __entry->id = id; 29 30 __entry->size = size; 31 + __entry->pcifunc = pcifunc; 30 32 ), 31 - TP_printk("[%s] msg:(%s) size:%lld\n", __get_str(dev), 32 - otx2_mbox_id2name(__entry->id), __entry->size) 33 + TP_printk("[%s] msg:(%s) size:%lld pcifunc:0x%x\n", __get_str(dev), 34 + otx2_mbox_id2name(__entry->id), __entry->size, 35 + __entry->pcifunc) 33 36 ); 34 37 35 38 TRACE_EVENT(otx2_msg_send, 36 - TP_PROTO(const struct pci_dev *pdev, u16 num_msgs, u64 msg_size), 37 - TP_ARGS(pdev, num_msgs, msg_size), 39 + TP_PROTO(const struct pci_dev *pdev, u16 num_msgs, u64 msg_size, 40 + u16 id, u16 pcifunc), 41 + TP_ARGS(pdev, num_msgs, msg_size, id, pcifunc), 38 42 TP_STRUCT__entry(__string(dev, pci_name(pdev)) 39 43 __field(u16, num_msgs) 40 44 __field(u64, msg_size) 45 + __field(u16, id) 46 + __field(u16, pcifunc) 41 47 ), 42 48 TP_fast_assign(__assign_str(dev); 43 49 __entry->num_msgs = num_msgs; 44 50 __entry->msg_size = msg_size; 51 + __entry->id = id; 52 + __entry->pcifunc = pcifunc; 45 53 ), 46 - TP_printk("[%s] sent %d msg(s) of size:%lld\n", __get_str(dev), 47 - __entry->num_msgs, __entry->msg_size) 54 + TP_printk("[%s] sent %d msg(s) of size:%lld msg:(%s) pcifunc:0x%x\n", 55 + __get_str(dev), __entry->num_msgs, __entry->msg_size, 56 + otx2_mbox_id2name(__entry->id), __entry->pcifunc) 48 57 ); 49 58 50 59 TRACE_EVENT(otx2_msg_check, ··· 90 81 ); 91 82 92 83 TRACE_EVENT(otx2_msg_process, 93 - TP_PROTO(const struct pci_dev *pdev, u16 id, int err), 94 - TP_ARGS(pdev, id, err), 84 + TP_PROTO(const struct pci_dev *pdev, u16 id, int err, u16 pcifunc), 85 + TP_ARGS(pdev, id, err, pcifunc), 95 86 TP_STRUCT__entry(__string(dev, pci_name(pdev)) 96 87 __field(u16, id) 97 88 __field(int, err) 89 + __field(u16, pcifunc) 98 90 ), 99 91 TP_fast_assign(__assign_str(dev); 100 92 __entry->id = id; 101 93 __entry->err = err; 94 + __entry->pcifunc = pcifunc; 102 95 ), 103 - TP_printk("[%s] msg:(%s) error:%d\n", __get_str(dev), 104 - otx2_mbox_id2name(__entry->id), __entry->err) 96 + TP_printk("[%s] msg:(%s) error:%d pcifunc:0x%x\n", __get_str(dev), 97 + otx2_mbox_id2name(__entry->id), 98 + __entry->err, __entry->pcifunc) 99 + ); 100 + 101 + TRACE_EVENT(otx2_msg_wait_rsp, 102 + TP_PROTO(const struct pci_dev *pdev), 103 + TP_ARGS(pdev), 104 + TP_STRUCT__entry(__string(dev, pci_name(pdev)) 105 + ), 106 + TP_fast_assign(__assign_str(dev) 107 + ), 108 + TP_printk("[%s] timed out while waiting for response\n", 109 + __get_str(dev)) 110 + ); 111 + 112 + TRACE_EVENT(otx2_msg_status, 113 + TP_PROTO(const struct pci_dev *pdev, const char *msg, u16 num_msgs), 114 + TP_ARGS(pdev, msg, num_msgs), 115 + TP_STRUCT__entry(__string(dev, pci_name(pdev)) 116 + __string(str, msg) 117 + __field(u16, num_msgs) 118 + ), 119 + TP_fast_assign(__assign_str(dev); 120 + __assign_str(str); 121 + __entry->num_msgs = num_msgs; 122 + ), 123 + TP_printk("[%s] %s num_msgs:%d\n", __get_str(dev), 124 + __get_str(str), __entry->num_msgs) 105 125 ); 106 126 107 127 #endif /* __RVU_TRACE_H */
+3 -1
drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
··· 871 871 *otx2_mbox_alloc_msg_ ## _fn_name(struct mbox *mbox) \ 872 872 { \ 873 873 struct _req_type *req; \ 874 + u16 pcifunc = mbox->pfvf->pcifunc; \ 874 875 \ 875 876 req = (struct _req_type *)otx2_mbox_alloc_msg_rsp( \ 876 877 &mbox->mbox, 0, sizeof(struct _req_type), \ ··· 880 879 return NULL; \ 881 880 req->hdr.sig = OTX2_MBOX_REQ_SIG; \ 882 881 req->hdr.id = _id; \ 883 - trace_otx2_msg_alloc(mbox->mbox.pdev, _id, sizeof(*req)); \ 882 + req->hdr.pcifunc = pcifunc; \ 883 + trace_otx2_msg_alloc(mbox->mbox.pdev, _id, sizeof(*req), pcifunc); \ 884 884 return req; \ 885 885 } 886 886
+20 -1
drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
··· 465 465 466 466 offset = ALIGN(sizeof(struct mbox_hdr), MBOX_MSG_ALIGN); 467 467 468 + trace_otx2_msg_status(pf->pdev, "PF-VF down queue handler(forwarding)", 469 + vf_mbox->num_msgs); 470 + 468 471 for (id = 0; id < vf_mbox->num_msgs; id++) { 469 472 msg = (struct mbox_msghdr *)(mdev->mbase + mbox->rx_start + 470 473 offset); ··· 476 473 goto inval_msg; 477 474 478 475 /* Set VF's number in each of the msg */ 479 - msg->pcifunc &= RVU_PFVF_FUNC_MASK; 476 + msg->pcifunc &= ~RVU_PFVF_FUNC_MASK; 480 477 msg->pcifunc |= (vf_idx + 1) & RVU_PFVF_FUNC_MASK; 481 478 offset = msg->next_msgoff; 482 479 } ··· 505 502 mdev = &mbox->dev[vf_idx]; 506 503 507 504 offset = mbox->rx_start + ALIGN(sizeof(struct mbox_hdr), MBOX_MSG_ALIGN); 505 + 506 + trace_otx2_msg_status(pf->pdev, "PF-VF up queue handler(response)", 507 + vf_mbox->up_num_msgs); 508 508 509 509 for (id = 0; id < vf_mbox->up_num_msgs; id++) { 510 510 msg = mdev->mbase + offset; ··· 825 819 offset = mbox->rx_start + ALIGN(sizeof(*rsp_hdr), MBOX_MSG_ALIGN); 826 820 pf = af_mbox->pfvf; 827 821 822 + trace_otx2_msg_status(pf->pdev, "PF-AF down queue handler(response)", 823 + num_msgs); 824 + 828 825 for (id = 0; id < num_msgs; id++) { 829 826 msg = (struct mbox_msghdr *)(mdev->mbase + offset); 830 827 otx2_process_pfaf_mbox_msg(pf, msg); ··· 983 974 984 975 offset = mbox->rx_start + ALIGN(sizeof(*rsp_hdr), MBOX_MSG_ALIGN); 985 976 977 + trace_otx2_msg_status(pf->pdev, "PF-AF up queue handler(notification)", 978 + num_msgs); 979 + 986 980 for (id = 0; id < num_msgs; id++) { 987 981 msg = (struct mbox_msghdr *)(mdev->mbase + offset); 988 982 ··· 1035 1023 1036 1024 trace_otx2_msg_interrupt(pf->pdev, "UP message from AF to PF", 1037 1025 BIT_ULL(0)); 1026 + 1027 + trace_otx2_msg_status(pf->pdev, "PF-AF up work queued(interrupt)", 1028 + hdr->num_msgs); 1038 1029 } 1039 1030 1040 1031 if (mbox_data & MBOX_DOWN_MSG) { ··· 1054 1039 1055 1040 trace_otx2_msg_interrupt(pf->pdev, "DOWN reply from AF to PF", 1056 1041 BIT_ULL(0)); 1042 + 1043 + trace_otx2_msg_status(pf->pdev, "PF-AF down work queued(interrupt)", 1044 + hdr->num_msgs); 1057 1045 } 1058 1046 1059 1047 return IRQ_HANDLED; ··· 3303 3285 req = (struct cgx_link_info_msg *)msghdr; 3304 3286 req->hdr.id = MBOX_MSG_CGX_LINK_EVENT; 3305 3287 req->hdr.sig = OTX2_MBOX_REQ_SIG; 3288 + req->hdr.pcifunc = pf->pcifunc; 3306 3289 memcpy(&req->link_info, &pf->linfo, sizeof(req->link_info)); 3307 3290 3308 3291 otx2_mbox_wait_for_zero(&pf->mbox_pfvf[0].mbox_up, vf_idx);
+1 -1
drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c
··· 136 136 137 137 rsp->hdr.id = MBOX_MSG_CGX_LINK_EVENT; 138 138 rsp->hdr.sig = OTX2_MBOX_RSP_SIG; 139 - rsp->hdr.pcifunc = 0; 139 + rsp->hdr.pcifunc = req->pcifunc; 140 140 rsp->hdr.rc = 0; 141 141 err = otx2_mbox_up_handler_cgx_link_event( 142 142 vf, (struct cgx_link_info_msg *)req, rsp);