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dt-bindings: clk: cleanup comments

For spdx, first line /* */ for *.h, change tab to space

Replacements
devider to divider
Comunications to Communications
periphrals to peripherals
supportted to supported
wich to which
Documentatoin to Documentation

Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220309222302.1114561-1-trix@redhat.com

authored by

Tom Rix and committed by
Rob Herring
6853fece b48b5636

+13 -14
+1 -1
include/dt-bindings/clock/alphascale,asm9260.h
··· 55 55 #define CLKID_AHB_I2S1 45 56 56 #define CLKID_AHB_MAC1 46 57 57 58 - /* devider */ 58 + /* divider */ 59 59 #define CLKID_SYS_CPU 47 60 60 #define CLKID_SYS_AHB 48 61 61 #define CLKID_SYS_I2S0M 49
+1 -1
include/dt-bindings/clock/axis,artpec6-clkctrl.h
··· 2 2 /* 3 3 * ARTPEC-6 clock controller indexes 4 4 * 5 - * Copyright 2016 Axis Comunications AB. 5 + * Copyright 2016 Axis Communications AB. 6 6 */ 7 7 8 8 #ifndef DT_BINDINGS_CLK_ARTPEC6_CLKCTRL_H
+1 -2
include/dt-bindings/clock/boston-clock.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 1 2 /* 2 3 * Copyright (C) 2016 Imagination Technologies 3 - * 4 - * SPDX-License-Identifier: GPL-2.0 5 4 */ 6 5 7 6 #ifndef __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__
+2 -2
include/dt-bindings/clock/marvell,mmp2.h
··· 32 32 #define MMP2_CLK_I2S0 31 33 33 #define MMP2_CLK_I2S1 32 34 34 35 - /* apb periphrals */ 35 + /* apb peripherals */ 36 36 #define MMP2_CLK_TWSI0 60 37 37 #define MMP2_CLK_TWSI1 61 38 38 #define MMP2_CLK_TWSI2 62 ··· 60 60 #define MMP3_CLK_THERMAL2 84 61 61 #define MMP3_CLK_THERMAL3 85 62 62 63 - /* axi periphrals */ 63 + /* axi peripherals */ 64 64 #define MMP2_CLK_SDH0 101 65 65 #define MMP2_CLK_SDH1 102 66 66 #define MMP2_CLK_SDH2 103
+2 -2
include/dt-bindings/clock/marvell,pxa168.h
··· 23 23 #define PXA168_CLK_UART_PLL 27 24 24 #define PXA168_CLK_USB_PLL 28 25 25 26 - /* apb periphrals */ 26 + /* apb peripherals */ 27 27 #define PXA168_CLK_TWSI0 60 28 28 #define PXA168_CLK_TWSI1 61 29 29 #define PXA168_CLK_TWSI2 62 ··· 45 45 #define PXA168_CLK_SSP4 78 46 46 #define PXA168_CLK_TIMER 79 47 47 48 - /* axi periphrals */ 48 + /* axi peripherals */ 49 49 #define PXA168_CLK_DFC 100 50 50 #define PXA168_CLK_SDH0 101 51 51 #define PXA168_CLK_SDH1 102
+2 -2
include/dt-bindings/clock/marvell,pxa910.h
··· 23 23 #define PXA910_CLK_UART_PLL 27 24 24 #define PXA910_CLK_USB_PLL 28 25 25 26 - /* apb periphrals */ 26 + /* apb peripherals */ 27 27 #define PXA910_CLK_TWSI0 60 28 28 #define PXA910_CLK_TWSI1 61 29 29 #define PXA910_CLK_TWSI2 62 ··· 43 43 #define PXA910_CLK_TIMER0 76 44 44 #define PXA910_CLK_TIMER1 77 45 45 46 - /* axi periphrals */ 46 + /* axi peripherals */ 47 47 #define PXA910_CLK_DFC 100 48 48 #define PXA910_CLK_SDH0 101 49 49 #define PXA910_CLK_SDH1 102
+1 -1
include/dt-bindings/clock/nuvoton,npcm7xx-clock.h
··· 1 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 2 /* 3 3 * Nuvoton NPCM7xx Clock Generator binding 4 - * clock binding number for all clocks supportted by nuvoton,npcm7xx-clk 4 + * clock binding number for all clocks supported by nuvoton,npcm7xx-clk 5 5 * 6 6 * Copyright (C) 2018 Nuvoton Technologies tali.perry@nuvoton.com 7 7 *
+2 -2
include/dt-bindings/clock/stm32fx-clock.h
··· 7 7 */ 8 8 9 9 /* 10 - * List of clocks wich are not derived from system clock (SYSCLOCK) 10 + * List of clocks which are not derived from system clock (SYSCLOCK) 11 11 * 12 12 * The index of these clocks is the secondary index of DT bindings 13 - * (see Documentatoin/devicetree/bindings/clock/st,stm32-rcc.txt) 13 + * (see Documentation/devicetree/bindings/clock/st,stm32-rcc.txt) 14 14 * 15 15 * e.g: 16 16 <assigned-clocks = <&rcc 1 CLK_LSE>;
+1 -1
include/dt-bindings/clock/stratix10-clock.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 2 /* 3 3 * Copyright (C) 2017, Intel Corporation 4 4 */