tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/i915/cx0: Add MTL+ .get_hw_state hook

Add .get_hw_state hook to MTL+ platforms for dpll framework.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20251117104602.2363671-26-mika.kahola@intel.com

Mika Kahola 685f3653 9b5f839e

+37 -3
+7 -2
drivers/gpu/drm/i915/display/intel_cx0_phy.c
··· 3594 3594 return ICL_PORT_DPLL_DEFAULT; 3595 3595 } 3596 3596 3597 - void intel_cx0pll_readout_hw_state(struct intel_encoder *encoder, 3597 + bool intel_cx0pll_readout_hw_state(struct intel_encoder *encoder, 3598 3598 struct intel_cx0pll_state *pll_state) 3599 3599 { 3600 3600 memset(pll_state, 0, sizeof(*pll_state)); 3601 3601 3602 3602 pll_state->tbt_mode = intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder)); 3603 3603 if (pll_state->tbt_mode) 3604 - return; 3604 + return true; 3605 + 3606 + if (!intel_cx0_pll_is_enabled(encoder)) 3607 + return false; 3605 3608 3606 3609 if (intel_encoder_is_c10phy(encoder)) 3607 3610 intel_c10pll_readout_hw_state(encoder, pll_state); 3608 3611 else 3609 3612 intel_c20pll_readout_hw_state(encoder, pll_state); 3613 + 3614 + return true; 3610 3615 } 3611 3616 3612 3617 static bool mtl_compare_hw_state_c10(const struct intel_c10pll_state *a,
+1 -1
drivers/gpu/drm/i915/display/intel_cx0_phy.h
··· 37 37 int intel_cx0pll_calc_state(const struct intel_crtc_state *crtc_state, 38 38 struct intel_encoder *encoder, 39 39 struct intel_dpll_hw_state *hw_state); 40 - void intel_cx0pll_readout_hw_state(struct intel_encoder *encoder, 40 + bool intel_cx0pll_readout_hw_state(struct intel_encoder *encoder, 41 41 struct intel_cx0pll_state *pll_state); 42 42 int intel_cx0pll_calc_port_clock(struct intel_encoder *encoder, 43 43 const struct intel_cx0pll_state *pll_state);
+29
drivers/gpu/drm/i915/display/intel_dpll_mgr.c
··· 4351 4351 .compare_hw_state = icl_compare_hw_state, 4352 4352 }; 4353 4353 4354 + static struct intel_encoder *get_intel_encoder(struct intel_display *display, 4355 + const struct intel_dpll *pll) 4356 + { 4357 + struct intel_encoder *encoder; 4358 + enum intel_dpll_id mtl_id; 4359 + 4360 + for_each_intel_encoder(display->drm, encoder) { 4361 + mtl_id = mtl_port_to_pll_id(display, encoder->port); 4362 + 4363 + if (mtl_id == pll->info->id) 4364 + return encoder; 4365 + } 4366 + 4367 + return NULL; 4368 + } 4369 + 4370 + static bool mtl_pll_get_hw_state(struct intel_display *display, 4371 + struct intel_dpll *pll, 4372 + struct intel_dpll_hw_state *dpll_hw_state) 4373 + { 4374 + struct intel_encoder *encoder = get_intel_encoder(display, pll); 4375 + 4376 + if (!encoder) 4377 + return false; 4378 + 4379 + return intel_cx0pll_readout_hw_state(encoder, &dpll_hw_state->cx0pll); 4380 + } 4381 + 4354 4382 static const struct intel_dpll_funcs mtl_pll_funcs = { 4383 + .get_hw_state = mtl_pll_get_hw_state, 4355 4384 }; 4356 4385 4357 4386 static const struct dpll_info mtl_plls[] = {