Merge branch 'initial-support-for-pic64-hpsc-hx-ethernet-endpoint'

Charles Perry says:

====================
Initial support for PIC64-HPSC/HX Ethernet endpoint

This series add basic support for Microchip "PIC64-HPSC" and "PIC64HX"
Ethernet endpoint. Both SoCs contain 4 GEM IP with support for
MII/RGMII/SGMII/USXGMII at rates of 10M to 10G. Only RGMII and SGMII at a
rate of 1G is tested for now. Each GEM IP has 8 priority queues and the
revision register reads 0x220c010e.

One particularity of this instantiation of GEM is that the MDIO controller
within the GEM IP is disconnected from any physical pin and the SoC rely on
another standalone MDIO controller.

The maximum jumbo frame size also seems to be different on PIC64-HPSC/HX
(16383) than what most other platforms use (10240). I've found that I need
to tweak a bit the MTU calculation for this, otherwise the RXBS field of
the DMACFG register overflows. See patch 2 for more details.

PIC64-HPSC/HX also supports other features guarded behind CAPS bit like
MACB_CAPS_QBV but I've omitted those intentionally because I didn't test
these.
====================

Link: https://patch.msgid.link/20260313140610.3681752-1-charles.perry@microchip.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

Paolo Abeni 3 months ago 68e8619d fdd97314

+32 -2

2 changed files

expand all

Documentation

devicetree

bindings

net

cdns,macb.yaml

drivers

net

ethernet

cadence

macb_main.c

+19

Documentation/devicetree/bindings/net/cdns,macb.yaml

··· 70 70 - microchip,sama7d65-gem # Microchip SAMA7D65 gigabit ethernet interface 71 71 - const: microchip,sama7g5-gem # Microchip SAMA7G5 gigabit ethernet interface 72 72 73 + - items: 74 + - const: microchip,pic64hpsc-gem # Microchip PIC64-HPSC 75 + - const: cdns,gem 76 + - items: 77 + - const: microchip,pic64hx-gem # Microchip PIC64HX 78 + - const: microchip,pic64hpsc-gem # Microchip PIC64-HPSC 79 + - const: cdns,gem 80 + 73 81 reg: 74 82 minItems: 1 75 83 items: ··· 203 195 then: 204 196 required: 205 197 - phys 198 + 199 + - if: 200 + properties: 201 + compatible: 202 + contains: 203 + const: microchip,pic64hpsc-gem 204 + then: 205 + patternProperties: 206 + "^ethernet-phy@[0-9a-f]$": false 207 + properties: 208 + mdio: false 206 209 207 210 unevaluatedProperties: false 208 211

+13 -2

drivers/net/ethernet/cadence/macb_main.c

··· 50 50 51 51 #define MACB_RX_BUFFER_SIZE 128 52 52 #define RX_BUFFER_MULTIPLE 64 /* bytes */ 53 + #define RX_BUFFER_MAX (0xFF * RX_BUFFER_MULTIPLE) /* 16320 bytes */ 53 54 54 55 #define DEFAULT_RX_RING_SIZE 512 /* must be power of 2 */ 55 56 #define MIN_RX_RING_SIZE 64 ··· 2602 2601 if (!macb_is_gem(bp)) { 2603 2602 bp->rx_buffer_size = MACB_RX_BUFFER_SIZE; 2604 2603 } else { 2605 - bp->rx_buffer_size = size; 2604 + bp->rx_buffer_size = MIN(size, RX_BUFFER_MAX); 2606 2605 2607 2606 if (bp->rx_buffer_size % RX_BUFFER_MULTIPLE) { 2608 2607 netdev_dbg(bp->dev, ··· 5623 5622 .jumbo_max_len = 10240, 5624 5623 }; 5625 5624 5625 + static const struct macb_config pic64hpsc_config = { 5626 + .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO | 5627 + MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_USRIO_DISABLED, 5628 + .dma_burst_length = 16, 5629 + .init = init_reset_optional, 5630 + .jumbo_max_len = 16383, 5631 + }; 5632 + 5626 5633 static const struct of_device_id macb_dt_ids[] = { 5627 5634 { .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config }, 5628 5635 { .compatible = "cdns,macb" }, ··· 5649 5640 { .compatible = "cdns,zynq-gem", .data = &zynq_config }, /* deprecated */ 5650 5641 { .compatible = "sifive,fu540-c000-gem", .data = &fu540_c000_config }, 5651 5642 { .compatible = "microchip,mpfs-macb", .data = &mpfs_config }, 5643 + { .compatible = "microchip,pic64hpsc-gem", .data = &pic64hpsc_config}, 5652 5644 { .compatible = "microchip,sama7g5-gem", .data = &sama7g5_gem_config }, 5653 5645 { .compatible = "microchip,sama7g5-emac", .data = &sama7g5_emac_config }, 5654 5646 { .compatible = "mobileye,eyeq5-gem", .data = &eyeq5_config }, ··· 5801 5791 /* MTU range: 68 - 1518 or 10240 */ 5802 5792 dev->min_mtu = GEM_MTU_MIN_SIZE; 5803 5793 if ((bp->caps & MACB_CAPS_JUMBO) && bp->jumbo_max_len) 5804 - dev->max_mtu = bp->jumbo_max_len - ETH_HLEN - ETH_FCS_LEN; 5794 + dev->max_mtu = MIN(bp->jumbo_max_len, RX_BUFFER_MAX) - 5795 + ETH_HLEN - ETH_FCS_LEN; 5805 5796 else 5806 5797 dev->max_mtu = 1536 - ETH_HLEN - ETH_FCS_LEN; 5807 5798

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