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firmware: qcom_scm: Rename peripheral as pas_id

Peripheral and pas_id refers to unique id for a subsystem and used only
when peripheral authentication service from secure world is utilized.

Lets rename peripheral to pas_id to reflect closer to its meaning.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260105-kvmrprocv10-v10-3-022e96815380@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Mukesh Ojha and committed by
Bjorn Andersson 69054348 25906ae9

+20 -20
+15 -15
drivers/firmware/qcom/qcom_scm.c
··· 562 562 * qcom_scm_pas_init_image() - Initialize peripheral authentication service 563 563 * state machine for a given peripheral, using the 564 564 * metadata 565 - * @peripheral: peripheral id 565 + * @pas_id: peripheral authentication service id 566 566 * @metadata: pointer to memory containing ELF header, program header table 567 567 * and optional blob of data used for authenticating the metadata 568 568 * and the rest of the firmware ··· 575 575 * track the metadata allocation, this needs to be released by invoking 576 576 * qcom_scm_pas_metadata_release() by the caller. 577 577 */ 578 - int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size, 578 + int qcom_scm_pas_init_image(u32 pas_id, const void *metadata, size_t size, 579 579 struct qcom_scm_pas_metadata *ctx) 580 580 { 581 581 dma_addr_t mdata_phys; ··· 585 585 .svc = QCOM_SCM_SVC_PIL, 586 586 .cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE, 587 587 .arginfo = QCOM_SCM_ARGS(2, QCOM_SCM_VAL, QCOM_SCM_RW), 588 - .args[0] = peripheral, 588 + .args[0] = pas_id, 589 589 .owner = ARM_SMCCC_OWNER_SIP, 590 590 }; 591 591 struct qcom_scm_res res; ··· 656 656 /** 657 657 * qcom_scm_pas_mem_setup() - Prepare the memory related to a given peripheral 658 658 * for firmware loading 659 - * @peripheral: peripheral id 659 + * @pas_id: peripheral authentication service id 660 660 * @addr: start address of memory area to prepare 661 661 * @size: size of the memory area to prepare 662 662 * 663 663 * Returns 0 on success. 664 664 */ 665 - int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size) 665 + int qcom_scm_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size) 666 666 { 667 667 int ret; 668 668 struct qcom_scm_desc desc = { 669 669 .svc = QCOM_SCM_SVC_PIL, 670 670 .cmd = QCOM_SCM_PIL_PAS_MEM_SETUP, 671 671 .arginfo = QCOM_SCM_ARGS(3), 672 - .args[0] = peripheral, 672 + .args[0] = pas_id, 673 673 .args[1] = addr, 674 674 .args[2] = size, 675 675 .owner = ARM_SMCCC_OWNER_SIP, ··· 697 697 /** 698 698 * qcom_scm_pas_auth_and_reset() - Authenticate the given peripheral firmware 699 699 * and reset the remote processor 700 - * @peripheral: peripheral id 700 + * @pas_id: peripheral authentication service id 701 701 * 702 702 * Return 0 on success. 703 703 */ 704 - int qcom_scm_pas_auth_and_reset(u32 peripheral) 704 + int qcom_scm_pas_auth_and_reset(u32 pas_id) 705 705 { 706 706 int ret; 707 707 struct qcom_scm_desc desc = { 708 708 .svc = QCOM_SCM_SVC_PIL, 709 709 .cmd = QCOM_SCM_PIL_PAS_AUTH_AND_RESET, 710 710 .arginfo = QCOM_SCM_ARGS(1), 711 - .args[0] = peripheral, 711 + .args[0] = pas_id, 712 712 .owner = ARM_SMCCC_OWNER_SIP, 713 713 }; 714 714 struct qcom_scm_res res; ··· 733 733 734 734 /** 735 735 * qcom_scm_pas_shutdown() - Shut down the remote processor 736 - * @peripheral: peripheral id 736 + * @pas_id: peripheral authentication service id 737 737 * 738 738 * Returns 0 on success. 739 739 */ 740 - int qcom_scm_pas_shutdown(u32 peripheral) 740 + int qcom_scm_pas_shutdown(u32 pas_id) 741 741 { 742 742 int ret; 743 743 struct qcom_scm_desc desc = { 744 744 .svc = QCOM_SCM_SVC_PIL, 745 745 .cmd = QCOM_SCM_PIL_PAS_SHUTDOWN, 746 746 .arginfo = QCOM_SCM_ARGS(1), 747 - .args[0] = peripheral, 747 + .args[0] = pas_id, 748 748 .owner = ARM_SMCCC_OWNER_SIP, 749 749 }; 750 750 struct qcom_scm_res res; ··· 770 770 /** 771 771 * qcom_scm_pas_supported() - Check if the peripheral authentication service is 772 772 * available for the given peripherial 773 - * @peripheral: peripheral id 773 + * @pas_id: peripheral authentication service id 774 774 * 775 775 * Returns true if PAS is supported for this peripheral, otherwise false. 776 776 */ 777 - bool qcom_scm_pas_supported(u32 peripheral) 777 + bool qcom_scm_pas_supported(u32 pas_id) 778 778 { 779 779 int ret; 780 780 struct qcom_scm_desc desc = { 781 781 .svc = QCOM_SCM_SVC_PIL, 782 782 .cmd = QCOM_SCM_PIL_PAS_IS_SUPPORTED, 783 783 .arginfo = QCOM_SCM_ARGS(1), 784 - .args[0] = peripheral, 784 + .args[0] = pas_id, 785 785 .owner = ARM_SMCCC_OWNER_SIP, 786 786 }; 787 787 struct qcom_scm_res res;
+5 -5
include/linux/firmware/qcom/qcom_scm.h
··· 72 72 ssize_t size; 73 73 }; 74 74 75 - int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size, 75 + int qcom_scm_pas_init_image(u32 pas_id, const void *metadata, size_t size, 76 76 struct qcom_scm_pas_metadata *ctx); 77 77 void qcom_scm_pas_metadata_release(struct qcom_scm_pas_metadata *ctx); 78 - int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size); 79 - int qcom_scm_pas_auth_and_reset(u32 peripheral); 80 - int qcom_scm_pas_shutdown(u32 peripheral); 81 - bool qcom_scm_pas_supported(u32 peripheral); 78 + int qcom_scm_pas_mem_setup(u32 pas_id, phys_addr_t addr, phys_addr_t size); 79 + int qcom_scm_pas_auth_and_reset(u32 pas_id); 80 + int qcom_scm_pas_shutdown(u32 pas_id); 81 + bool qcom_scm_pas_supported(u32 pas_id); 82 82 83 83 int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val); 84 84 int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);